A method and device for accelerating simulation software

Abstract

The embodiment of the present application provides a method and device for accelerating simulation software, which is applied in the field of computer technology. The CFD simulation task to be processed is discretized to generate a grid to be calculated; the target calculation grid obtained by splitting the grid to be calculated is assigned to a process, and the process is mapped to the CPU core of the computing node for execution. The intra-node communication and inter-node message passing of the computing node are respectively realized based on the shared memory mode and the process mapping message passing mode. The computing node is calculated using a neural network solver adapted to a heterogeneous accelerator to obtain a simulation result. The shared memory takes into account the memory and cache occupancy within the node, and the process mapping takes into account the storage and communication characteristics of the node, and the computing resources and storage resources are combined and optimized; the memory access characteristics of the heterogeneous accelerator are analyzed, and a neural network solver adapted to the heterogeneous accelerator is proposed for calculation, which reduces the number of memory accesses during the reasoning process of the heterogeneous accelerator. The simulation performance of the CFD software is improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a method and device for accelerating simulation software. Background Art

[0002] The use of software to simulate complex real-world scenarios has been widely used in various fields.

[0003] Take Computational Fluid Dynamics (CFD) software as an example. It provides researchers with a cost-effective and low-risk numerical simulation environment, allowing them to achieve highly accurate simulations without having to build physical prototypes.

[0004] Currently, a common approach is to leverage supercomputing systems to optimize CFD simulations in areas such as communication and computational operators, integrating CFD with high-performance computing. With the advancement of artificial intelligence (AI), researchers are increasingly using neural networks to replace key operators in CFD calculations, shifting the computational paradigm to improve CFD software's computational speed. Neural networks are trained to approximate specific mathematical operators, and then the trained models are deployed on heterogeneous computing devices for efficient computation.

[0005] Current architecture-based CFD software acceleration solutions offer limited optimization for storage bandwidth bottlenecks encountered during computations. They fail to fully consider the storage and communication characteristics of compute nodes in supercomputing systems, and fail to optimize the combination of compute and storage resources. AI-based CFD software acceleration solutions focus on simulation performance while ignoring the adaptability of heterogeneous accelerators. In other words, they fail to fully consider the storage and compute characteristics of heterogeneous computing devices. The proposed network structures are not consistent with the architectural characteristics of heterogeneous accelerators, resulting in additional memory access overhead. Consequently, current CFD software acceleration solutions exhibit low simulation performance. Summary of the Invention

[0006] In view of this, the present application provides a method and device for accelerating simulation software, which comprehensively optimizes the framework of CFD software by utilizing the heterogeneous characteristics and storage characteristics of supercomputing systems: using intra-node shared memory mode communication and inter-node process mapping communication to optimize the communication speed of computing nodes, and using a neural network solver suitable for heterogeneous accelerators to perform node calculations to reduce the number of memory accesses; it can improve the simulation performance of CFD software.

[0007] To solve the above problems, the technical solutions provided by this application are as follows:

[0008] In a first aspect, an embodiment of the present application provides a method for accelerating simulation software, the method being applied to a supercomputing system, comprising:

[0009] In response to obtaining a pending computational fluid dynamics (CFD) simulation task, discretizing the pending CFD simulation task to generate a grid to be calculated;

[0010] Assigning the target computational grid obtained by splitting the to-be-computed grid to a message passing interface (MPI) process, and mapping the MPI process to a central processing unit (CPU) core of a computing node for execution;

[0011] Implementing intra-node communication of the computing nodes based on a shared memory mode;

[0012] Determine a communication mapping result of the MPI process;

[0013] completing inter-node message transmission of the computing nodes based on the communication mapping result;

[0014] The computing nodes are calculated using a neural network solver adapted to the heterogeneous accelerator, and the calculation results of each computing node are integrated to obtain a simulation result.

[0015] In one possible implementation, determining the communication mapping result of the MPI process includes:

[0016] Use the communication hardware coverage boundary test algorithm to determine the number of computing nodes covered by each network routing module;

[0017] Based on the number of computing nodes covered by each network routing module, a communication cost matrix is ​​obtained by testing using a dynamic topology awareness algorithm;

[0018] Determine the communication volume matrix according to the number of cross-grids of the target computing grid between MPI processes;

[0019] The communication cost matrix and the communication volume matrix are matched to obtain a communication mapping result of the MPI process.

[0020] In one possible implementation, determining the number of computing nodes covered by each network routing module using a communication hardware coverage boundary testing algorithm includes:

[0021] determining a communication delay between the computing nodes;

[0022] The communication hardware coverage boundary test algorithm is used to compare the communication delays between the computing nodes to obtain the number of computing nodes covered by each network routing module.

[0023] In one possible implementation, the communication cost matrix is ​​obtained by testing using a dynamic topology awareness algorithm based on the number of computing nodes covered by each network routing module, including:

[0024] Determining a communication hardware coverage boundary based on the number of computing nodes covered by each network routing module, wherein the communication hardware coverage boundary includes the network routing modules corresponding to the row switches, the network routing modules corresponding to the column switches, and the nodes included in the network routing modules;

[0025] Using a communication delay test tool, test the node delay of the same network routing module, the first delay between network routing modules of switches in the same row, the second delay between network routing modules of switches in the same column, and the switch delay between switches in different rows and columns.

[0026] The communication cost matrix is ​​obtained by using a dynamic topology awareness algorithm based on the node delay, the first delay, the second delay, and the switch delay test.

[0027] In one possible implementation, completing inter-node message transmission of the computing node based on the communication mapping result includes:

[0028] Determine a message transmission path between computing nodes where the MPI process is located based on the communication mapping result;

[0029] Inter-node message transmission of computing nodes is completed based on the message transmission path.

[0030] In a second aspect, an embodiment of the present application provides an acceleration device for simulation software, wherein the acceleration device is applied to a supercomputing system, comprising:

[0031] a discretization module, configured to discretize the CFD simulation task to be processed and generate a grid to be calculated in response to obtaining the CFD simulation task to be processed;

[0032] An allocation module is used to allocate the target computational grid obtained by splitting the to-be-computed grid to a message passing interface (MPI) process, and the MPI process is mapped to a central processing unit (CPU) core of a computing node for execution;

[0033] An intra-node communication module, configured to implement intra-node communication of the computing nodes based on a shared memory mode;

[0034] A determination module, configured to determine a communication mapping result of the MPI process;

[0035] A message transmission module, configured to complete inter-node message transmission of the computing nodes based on the communication mapping result;

[0036] The computing module is used to calculate the computing nodes using a neural network solver adapted to the heterogeneous accelerator, and to fuse the calculation results of each computing node to obtain a simulation result.

[0037] In one possible implementation, the determining module includes:

[0038] A determination submodule, configured to determine the number of computing nodes covered by each network routing module using a communication hardware coverage boundary test algorithm;

[0039] A testing submodule, configured to obtain a communication cost matrix by testing using a dynamic topology awareness algorithm based on the number of computing nodes covered by each network routing module;

[0040] The determining submodule is further configured to determine a communication volume matrix according to the number of cross-grids of the target computing grids between the MPI processes;

[0041] The matching submodule is used to match the communication cost matrix and the communication volume matrix to obtain the communication mapping result of the MPI process.

[0042] In one possible implementation, the determining submodule is configured to determine the number of computing nodes covered by each network routing module using a communication hardware coverage boundary testing algorithm, including:

[0043] a determining unit, configured to determine a communication delay between the computing nodes;

[0044] The comparison unit is used to compare the communication delays between the computing nodes using the communication hardware coverage boundary test algorithm to obtain the number of computing nodes covered by each network routing module.

[0045] In one possible implementation, the testing submodule is specifically configured to:

[0046] The communication hardware coverage boundary is determined based on the number of computing nodes covered by each network routing module, and the communication hardware coverage boundary includes the network routing modules corresponding to the row switches, the network routing modules corresponding to the column switches, and the nodes included in the network routing modules; a communication delay testing tool is used to test the node delay of the same network routing module, the first delay between network routing modules in the same row switch, the second delay between network routing modules in the same column switch, and the switch delay between switches in different rows and different columns; and a dynamic topology awareness algorithm is used to obtain the communication cost matrix based on the node delay, the first delay, the second delay, and the switch delay tests.

[0047] In one possible implementation, the message delivery module is specifically configured to:

[0048] The message transmission path between the computing nodes where the MPI process is located is determined based on the communication mapping result; and the inter-node message transmission of the computing nodes is completed based on the message transmission path.

[0049] In a third aspect, the present application provides an acceleration device for simulating software, the device comprising: a processor, a memory, and a system bus;

[0050] The processor and the memory are connected via the system bus;

[0051] The memory is used to store one or more programs, and the one or more programs include instructions. When the instructions are executed by the processor, the processor executes the acceleration method of the simulation software described in the first aspect above.

[0052] In a fourth aspect, the present application provides a computer-readable storage medium storing instructions, which, when executed on a device, enables the device to execute the acceleration method for simulation software described in the first aspect above.

[0053] It can be seen that this application has the following beneficial effects:

[0054] The embodiment of the present application provides a method for accelerating simulation software, which is applied to a supercomputing system. First, in response to obtaining a pending computational fluid dynamics (CFD) simulation task, the pending CFD simulation task is discretized to generate a grid to be calculated. Secondly, the grid to be calculated is split to obtain a target computational grid, and the target computational grid is assigned to a message passing interface (MPI) process, and the MPI process is mapped to the CPU core of the computing node for execution. Then, the intra-node communication of the computing node is realized based on the shared memory mode; the communication mapping result of the MPI process is determined, and the inter-node message passing of the computing node is completed based on the communication mapping result. Finally, a neural network solver adapted to a heterogeneous accelerator is used to calculate the computing node, and the calculation results of each computing node are fused to obtain a simulation result. In this way, a comprehensive optimization framework for CFD software for supercomputing systems is proposed, which optimizes the intra-node communication and inter-node communication of computing nodes and the inference speed of heterogeneous accelerators. The number of MPI processes within a single computing node is reduced. The principle of communication locality is utilized to optimize the communication speed of computing nodes using intra-node shared memory mode communication and inter-node process mapping. This fully considers the storage and communication characteristics of computing nodes in supercomputing systems, and optimizes computing and storage resources in combination. By analyzing the memory access characteristics of heterogeneous accelerators, a neural network solver adapted for heterogeneous accelerators is proposed for node computing, reducing the number of memory accesses during heterogeneous accelerator reasoning. The embodiments of this application achieve improved simulation performance of CFD software.

[0055] The embodiment of the present application also provides a device corresponding to the above method, which has the same beneficial effects as the above method. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] Figure 1 A flowchart of a method for accelerating simulation software provided in an embodiment of the present application;

[0057] Figure 2 A schematic diagram of a process mapping framework for a supercomputing system with a two-dimensional network topology provided in an embodiment of the present application;

[0058] Figure 3 A schematic diagram of a neural network architecture of a digital signal processing unit (DSP) according to an embodiment of the present application;

[0059] Figure 4 A schematic diagram of the structure of an acceleration device for simulation software provided in an embodiment of the present application;

[0060] Figure 5 A schematic diagram of the structure of an acceleration device for simulation software provided in an embodiment of the present application. DETAILED DESCRIPTION

[0061] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0062] In this application, relational terms such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. The terms "comprises", "comprising" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further limitations, an element defined by the statement "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element.

[0063] CFD software is widely used, and improving its computational efficiency on supercomputing systems is key to improving simulation efficiency. Currently, numerous solutions leverage supercomputing systems to optimize CFD simulations in areas such as communication and computational operators. These solutions offer insights into integrating CFD with high-performance computing and have resulted in certain performance improvements. With the development of artificial intelligence (AI) technology, the use of neural networks to replace key operators in CFD calculations has also increased CFD calculation speed. Specifically, neural networks can be trained to approximate specific mathematical operators, and heterogeneous computing can be combined to enhance CFD simulation performance.

[0064] However, architecture-specific CFD software acceleration solutions fail to fully consider the storage and communication characteristics of supercomputing nodes. Consequently, the storage bandwidth bottlenecks encountered by CFD software during computations are poorly optimized, and computational and storage resources are not optimally combined. Solutions using artificial intelligence to accelerate CFD software primarily focus on simulation results, failing to fully consider the storage and computational characteristics of heterogeneous computing devices. The proposed network structures are ill-suited to the architectural characteristics of heterogeneous accelerators and incur additional memory access overhead. Consequently, these solutions result in low CFD software simulation performance.

[0065] In view of this, an embodiment of the present application provides a method and device for accelerating simulation software, which is applied to a supercomputing system. First, in response to obtaining a computational fluid dynamics (CFD) simulation task to be processed, the CFD simulation task to be processed is discretized to generate a grid to be calculated. Secondly, the grid to be calculated is split to obtain a target calculation grid, and the target calculation grid is assigned to a message passing interface (MPI) process, and the MPI process is mapped to the CPU core of the computing node for execution. Then, intra-node communication of the computing node is implemented based on the shared memory mode; the communication mapping result of the MPI process is determined, and the message passing between the computing nodes is completed based on the communication mapping result. Finally, a neural network solver adapted to a heterogeneous accelerator is used to calculate the computing node, and the calculation results of each computing node are fused to obtain a simulation result. In this way, a comprehensive optimization framework for CFD software for supercomputing systems is proposed, which optimizes the intra-node communication and inter-node communication of computing nodes and the inference speed of heterogeneous accelerators. The number of MPI processes within a single computing node is reduced. The principle of communication locality is utilized to optimize the communication speed of computing nodes using intra-node shared memory mode communication and inter-node process mapping communication. This fully considers the storage and communication characteristics of computing nodes in supercomputing systems, and optimizes computing and storage resources in combination. By analyzing the memory access characteristics of heterogeneous accelerators, a neural network solver adapted for heterogeneous accelerators is proposed for node computing, reducing the number of memory accesses during heterogeneous accelerator reasoning. The embodiments of this application achieve improved simulation performance of CFD software.

[0066] In order to facilitate understanding of the technical solution provided by the embodiment of the present application, a simulation software acceleration method and device provided by the embodiment of the present application are described below with reference to the accompanying drawings.

[0067] See also Figure 1 , Figure 1 This is a flow chart of a simulation software acceleration method provided in an embodiment of the present application. This simulation software acceleration method can be applied to a supercomputing system, which may include multiple clusters. Computing nodes are allocated to user-submitted simulation tasks based on the current cluster status. Specifically, idle clusters are used to process simulation tasks. The acceleration method specifically includes steps S101-S105.

[0068] S101: In response to obtaining a computational fluid dynamics (CFD) simulation task to be processed, discretizing the CFD simulation task to be processed to generate a grid to be calculated.

[0069] The simulated physical space is regionally decomposed. After the regional decomposition is completed, the computational fluid dynamics (CFD) simulation task to be processed can be discretized into grids to be calculated, that is, the computational domain specified by the user is discretized into grids to be calculated.

[0070] The pending CFD simulation task may include a CFD program and input data to be simulated, and the pending CFD simulation task is submitted to a supercomputing system for execution. Slurm on the supercomputing system will allocate computing nodes to the user based on the current cluster status.

[0071] After the computing nodes are allocated, they execute executable files to perform communication and calculations.

[0072] S102: Allocate the target computational grid obtained by splitting the to-be-computed grid to a message passing interface (MPI) process, and map the MPI process to a CPU core of a computing node for execution.

[0073] The pending CFD simulation tasks are described using MPI for coarse-grained parallelism. By calling the DecomposePar tool, the Scotch partitioning algorithm is used to assign subregions containing the pending computational mesh to MPI processes. This involves splitting the pending computational mesh into target computational meshes, which are then assigned to MPI processes. MPI processes are directly mapped to the central processing unit (CPU) cores of the compute nodes for execution, with CPU cores communicating within and across nodes. OpenFoam then returns the number of meshes contained in each MPI process, as well as the number of meshes intersecting with other MPI processes.

[0074] MPI processes can run on different compute nodes, and each compute node can run one or more MPI processes. Compute nodes provide computing resources and memory space for MPI processes, supporting their execution and communication. Each compute node contains a certain number of CPU cores for executing computing tasks, and MPI processes are mapped to specific CPU cores for execution.

[0075] S103: Implementing intra-node communication of the computing node based on a shared memory mode.

[0076] In one possible implementation, intra-node communication between compute nodes can be based on shared memory. The speed of shared memory communication is related to memory usage, cache capacity, and the distribution of non-uniform memory access (NUMA) nodes. This can be combined with the computational characteristics of CFD software to reduce the number of CFD processes within a single compute node, thereby reducing memory and cache usage within the node and improving message transmission speed.

[0077] Specifically, the computational characteristics of CFD software may include computational memory access ratio, CPU computation time, node memory occupancy, high-speed memory access characteristics, and memory access location characteristics. The computational memory access ratio represents the ratio of computational time overhead to memory access time overhead during the CFD program's computational process; the CPU computation time represents the time spent using the CPU for computation during the CFD program's execution; the node memory occupancy represents the amount of computational node memory occupied during the CFD program's execution; the high-speed memory access characteristic represents the read and write characteristics of computational data in the CPU cache during the CFD program's computational process, primarily including read and write counts, access misses, and other characteristics; and the memory access location characteristic represents the memory location accessed by the CFD program. Different data storage locations will result in different memory access speeds, so memory access is not consistent access.

[0078] Analysis of the computational characteristics of the CFD software revealed that computational memory access was low, but the memory access overhead was high. Analysis of the CPU computation time and node memory usage revealed that the computational and memory access loads of each MPI process were similar, with no instances of some MPI processes being significantly more loaded than others. The load averaging of the MPI processes made it possible to reduce the load on individual computing nodes.

[0079] The embodiments of the present application can reduce the number of MPI processes deployed on a single computing node and utilize more computing nodes for calculations, wherein each MPI process occupies a NUMA cluster within a CPU. The aforementioned deployment method can reduce the memory usage of the total computing node and reduce the time consumption caused by cache pool refresh. At the same time, by reducing the number of MPI processes deployed within a single computing node, the MPI process can monopolize all the caches of the NUMA nodes within the CPU, increase the cache capacity visible to a single MPI process, and reduce the overhead caused by cache read and write misses.

[0080] In actual implementation, reducing the computational load of a single computing node can improve overall performance. The partial differential equation solving component was accelerated by 6.29 times, and the overall speedup ratio was 2.58.

[0081] S104: Determine the communication mapping result of the MPI process.

[0082] Implement MPI process mapping during computing node communication and computing, and reduce the load on a single computing node. Figure 2 , Figure 2 A schematic diagram of a process mapping framework for a supercomputing system with a two-dimensional network topology provided in an embodiment of the present application.

[0083] Figure 2 The right part is the task decomposition part of the CFD software preprocessing process, which splits the overall grid to be calculated into different MPI processes for calculation, as shown in the Decompose part.

[0084] After the split is complete, the target computational grids of different MPI processes intersect. Cross-grid Halo cells exchange information based on the requirements of the numerical solver, resulting in message passing between MPI processes. This means that cross-process data exchange occurs between cross-grid Halo cells. The greater the number of cross-grid Halo cells, the greater the communication volume between MPI processes.

[0085] Figure 2 The middle part is the process mapping part, and the MPI process is mapped on the computing node HN through Process Mapping. Figure 2 In the example, an MPI process is mapped to a computing node HN through Process Mapping. In actual use, there may be multiple MPI processes mapped to a computing node to implement the calculation.

[0086] Figure 2The left side shows the overall topology of the supercomputing system's interconnected network, including row switches (CS) and column switches (RS). These switches are linked to the Network Routing Module (NRM). The coordinates of the NRM represent the connection between the row and column switches. For example, NRM (0,1) indicates a communication connection between the column switch with ID 0 and the row switch with ID 1. The NRM is attached to specific compute nodes (HNs). These HNs are used for specific computations, and MPI processes are mapped to these HNs to implement computations.

[0087] The 4x3 cube pointing to the compute node HN represents the compute task belonging to the MPI process, that is, the target compute grid for the MPI process. Since the compute task is bound to the MPI process, the two are essentially equivalent. The black areas on the sides of the target compute grid represent the Halo cells where MPI processes intersect.

[0088] The process mapping method in this embodiment maps MPI processes with high communication volumes to computing devices with closer hardware proximity, reducing the likelihood that high-traffic processes will traverse long communication paths. The mapping process primarily consists of dynamic topology awareness, traffic approximation, and process mapping. Details of the mapping process are provided below.

[0089] The grid to be calculated is split into target calculation grids to be assigned to the MPI process, the communication mapping result of the MPI process is determined, and communication and calculation are realized based on the communication mapping result.

[0090] S105: completing inter-node message transmission of the computing nodes based on the communication mapping result.

[0091] By utilizing the parallel computing resources of the supercomputing system, CFD simulation tasks are distributed to multiple computing nodes to achieve large-scale parallel computing. Communication and computing are achieved based on the communication mapping results, and communication can be manifested at the data transmission level.

[0092] In one possible implementation, completing the inter-node message passing of the computing nodes based on the communication mapping result includes: determining the message passing path between the computing nodes where the MPI process is located based on the communication mapping result; and completing the inter-node message passing of the computing nodes based on the message passing path.

[0093] This data transmission (message delivery path) can be divided into three cases. First, two MPI processes are located in different computing nodes HN within the same NRM. Messages are transmitted along the path of computing node HN1-NRM-computing node HN2. Second, two MPI processes are located in nodes belonging to different NRMs, where the two NRMs are in the same row / column. Messages are transmitted along the path of computing node HN1-NRM1-row / column switch-NRM2-computing node HN2. Third, two MPI processes are located in nodes belonging to different NRMs, where the row and column switches of the two NRMs are different. Messages are transmitted along the path of computing node HN1-NRM1-row switch-column switch-NRM2-computing node HN2.

[0094] The message passing between computing nodes is completed based on the message passing path, and the computing tasks corresponding to the MPI process are further completed.

[0095] S106: Utilize a neural network solver adapted to the heterogeneous accelerator to perform calculations on the computing nodes, and fuse the calculation results of each computing node to obtain a simulation result.

[0096] The embodiment of the present application optimizes the CFD software deployed on the supercomputing system in two stages. The first stage is to optimize the communication layer of the CFD software, and the second stage is to optimize the neural network solver used in the CFD software.

[0097] When heterogeneous accelerators are used, memory access speed and bandwidth are relatively limited, which in turn affects the speed of neural network inference. Taking a fully connected neural network as an example, limited memory access speed and bandwidth mean that a single memory access can only obtain a portion of the neural network weights and sample data, and can only perform a portion of the matrix multiplication. After performing multiple matrix multiplications, the inference results of a neural network layer are fully output. This process involves multiple segmented reads and multiple storages. The aforementioned memory access overhead affects the inference speed of the neural network.

[0098] The embodiment of the present application proposes a neural network solver with a special structure based on the read bandwidth of the heterogeneous accelerator, which increases the number of layers of the neural network. Figure 3 , Figure 3This is a schematic diagram of a neural network architecture featuring a digital signal processing unit (DSP) architecture of an embodiment of the present application. The number of neurons in the neural network solver matches the single memory access bandwidth of the heterogeneous accelerator, and the network layer therein can be loaded at one time. That is, if the number of weights in a single layer of the neural network solver meets the bandwidth of a single memory access, only a single memory access is required to perform reasoning on a layer of weights, reducing the writing operation of intermediate results. Among them, the neural network architecture is based on full connectivity and uses Gaussian Error Linear Unit (GELU) as the activation function.

[0099] Solving ordinary differential equations (ODEs) is an important step in CFD programs. Through the above adaptation work, CFD programs can use neural network solvers adapted to heterogeneous accelerators to perform ODE calculations.

[0100] After executing the calculation of the computing node, the calculation results of each computing node are iterated to obtain the final simulation result.

[0101] In one possible implementation, when CFD software is actually used, the first step of each round of execution of the CFD program is to solve the mass conservation equation and the momentum equation. This process can be solved using the Generalized Algebraic MultiGrid (GAMG) solver. The GAMG solver is mainly used to solve the discretized form of partial differential equations (PDEs). During the solution process, the target computational grid needs to synchronize data to ensure the consistency of the results, thereby introducing inter-process communication. The embodiment of the present application uses process mapping and reduces the load of a single node to optimize the performance of the solver.

[0102] The acceleration solution of the above simulation software can be applied to computational fluid dynamics software or computing frameworks such as OpenFoam and DeepFlame.

[0103] Based on the contents of the above steps S101-S106, it can be seen that the communication within the computing node, the communication between the computing nodes and the inference speed of the heterogeneous accelerator are optimized. Specifically, for the shared memory communication mode within the computing node, the communication within the computing node is accelerated by reasonably occupying computing resources and improving the shared memory access bandwidth. For communication between computing nodes, process mapping is used to optimize the communication speed between computing nodes. In terms of speeding up heterogeneous accelerators, by analyzing the memory access characteristics of heterogeneous accelerators, a neural network solver suitable for heterogeneous accelerators is proposed, and the network structure is modified to reduce the number of memory accesses during the accelerator inference process. In this way, the heterogeneous characteristics and storage characteristics of the supercomputing system are used to set the acceleration scheme of the simulation software, and by deeply integrating artificial intelligence models with high-performance computing resources, the efficient execution of multi-scale, high-precision CFD simulations is achieved, thereby improving the simulation performance of CFD.

[0104] The following describes the communication mapping results for determining an MPI process provided by an embodiment of the present application.

[0105] The communication between computing nodes is expressed as the communication mapping of MPI processes. By utilizing the principle of communication locality, a dynamic topology awareness algorithm was invented. Based on the network topology structure, process mapping is used to optimize the communication speed between nodes.

[0106] In one possible implementation, determining a communication mapping result for the MPI process includes: determining the number of computing nodes covered by each network routing module using a communication hardware coverage boundary testing algorithm; obtaining a communication cost matrix based on the number of computing nodes covered by each network routing module using a dynamic topology awareness algorithm; determining a communication volume matrix based on the number of cross-grids of target computing grids between the MPI processes; and matching the communication cost matrix and the communication volume matrix to obtain a communication mapping result for the MPI process.

[0107] The dynamic topology awareness algorithm first obtains the number of nodes covered by different network routing modules (hardware devices) by executing the communication hardware coverage boundary test algorithm, and then uses the dynamic topology awareness algorithm to test and obtain the communication cost matrix for MPI process mapping.

[0108] After obtaining the communication cost matrix, we can use the number of cross-grid Halo cells between MPI processes as an approximation of the communication volume to obtain the communication volume matrix between the CFD software MPI processes. This communication volume matrix determines the MPI processes and the communication volume that need to communicate synchronously during each iteration of the PDE solution.

[0109] The communication cost matrix and the communication volume matrix are matched using a quadratic allocation algorithm to obtain a mapping relationship between each MPI process and a specific computing device, that is, a communication mapping result. The communication mapping result is a mapping result with the minimum cost.

[0110] In one possible implementation, the communication hardware coverage bounds testing algorithm compares message delivery delays to determine the number of compute nodes covered by each network routing module. Determining the number of compute nodes covered by each network routing module using the communication hardware coverage bounds testing algorithm includes determining the communication delay between compute nodes and comparing the communication delay between compute nodes using the communication hardware coverage bounds testing algorithm to determine the number of compute nodes covered by each network routing module.

[0111]

[0112]

[0113] The calculation of communication delay may include:

[0114] The communication latency is calculated by calculating the time it takes to transmit fixed-length packets between nodes. The average of these transmission times is calculated after repeated transmission experiments. In the examples presented here, the packet length is the mode of the packet sizes in the CFD software. The number of transmission experiments is not limited and can be selected based on actual needs. To ensure accurate communication latency, the number of transmission experiments is typically no less than one thousand.

[0115] In one possible implementation, based on the number of computing nodes covered by each network routing module, a communication cost matrix is ​​obtained by testing using a dynamic topology awareness algorithm, including:

[0116] The communication hardware coverage boundary is determined based on the number of computing nodes covered by each network routing module. This boundary includes the network routing modules corresponding to row switches, the network routing modules corresponding to column switches, and the nodes contained within each network routing module. A communication delay testing tool is used to test the node delay within the same network routing module, the first delay between network routing modules in the same row of switches, the second delay between network routing modules in the same column of switches, and the switch delay between switches in different rows and columns. A dynamic topology-aware algorithm is used to determine the communication cost matrix based on the node delay, first delay, second delay, and switch delay tests.

[0117]

[0118]

[0119] Among them, the computing nodes 1 and 2 under the NRM of different row / column switches are selected. According to the delay test method described above, a fixed-length packet is sent and the message transmission delay is tested to obtain the node delay Latency NRM , First delay Latency CS2. Latency RS and switch latency DiffCR .

[0120] The aforementioned four delay data are used as weight values ​​of the communication standby matrix. Different row and column positions are assigned different weight values, and the positions and delays correspond one to one.

[0121] Communication cost matrix M phy The initialization value is 0. In the above for loop, the communication cost matrix M is assigned phy The corresponding numerical value.

[0122] In one possible implementation, the quadratic assignment algorithm is described. The quadratic assignment method is used to match two matrices so that the sum of their products is minimized. It analyzes the correlation or regression between two matrices by comparing the similarities between the values ​​in each cell of the two matrices.

[0123] Assume that there are adjacency matrices A and B, and it is necessary to find a vertex arrangement that minimizes the mismatch between A and B. The adjacency matrices A and B may be the communication cost matrix and the communication volume matrix.

[0124] The quadratic assignment algorithm begins by selecting an initial permutation matrix P(0), typically a "flat doubly stochastic matrix," where all elements are 1 / n. The objective function of the quadratic assignment problem (QAP) is typically defined as minimizing the product of two factors. The QAP is then relaxed to rQAP, which relaxes the constraints of the permutation matrix P to a doubly stochastic matrix D, where all rows and columns sum to 1.

[0125] This doubly random matrix may not be a permutation matrix, and it can be projected back to a set of permutation matrices via the Linear Assignment Problem (LAP). The Frank-Wolfe algorithm is applied to solve a minimization problem with linear constraints to output the final permutation matrix that provides the optimal vertex matching between the adjacency matrices A and B.

[0126] The above embodiment of the present application provides an acceleration method based on the above simulation software. Next, an acceleration device for simulation software provided in the embodiment of the present application is described. The acceleration device is applied to a supercomputing system for executing the above Figure 1 The method shown.

[0127] The function of the acceleration device of the simulation software is explained. The structural diagram of the acceleration device of the simulation software is shown in FIG. Figure 4As shown, it includes a discretization module 401 , an allocation module 402 , an intra-node communication module 403 , a determination module 404 , a message transmission module 405 and a calculation module 406 .

[0128] in,

[0129] A discretization module 401 is configured to discretize the CFD simulation task to be processed and generate a grid to be calculated in response to obtaining the CFD simulation task to be processed;

[0130] An allocation module 402 is configured to allocate the target computational grid obtained by splitting the computational grid to an MPI process, wherein the MPI process is mapped to a CPU core of a computational node for execution;

[0131] Intra-node communication module 403, configured to implement intra-node communication of the computing node based on a shared memory mode;

[0132] A determination module 404 is configured to determine a communication mapping result of the MPI process;

[0133] A message transmission module 405 is configured to complete inter-node message transmission of the computing nodes based on the communication mapping result;

[0134] The computing module 406 is used to perform calculations on the computing nodes using a neural network solver adapted to the heterogeneous accelerator, and to fuse the calculation results of each computing node to obtain a simulation result.

[0135] In one possible implementation, the determining module 403 includes:

[0136] A determination submodule, configured to determine the number of computing nodes covered by each network routing module using a communication hardware coverage boundary test algorithm;

[0137] A testing submodule, configured to obtain a communication cost matrix by testing using a dynamic topology awareness algorithm based on the number of computing nodes covered by each network routing module;

[0138] The determining submodule is further configured to determine a communication volume matrix according to the number of cross-grids of the target computing grids between the MPI processes;

[0139] The matching submodule is used to match the communication cost matrix and the communication volume matrix to obtain the communication mapping result of the MPI process.

[0140] In one possible implementation, the determining submodule is configured to determine the number of computing nodes covered by each network routing module using a communication hardware coverage boundary testing algorithm, including:

[0141] a determining unit, configured to determine a communication delay between the computing nodes;

[0142] The comparison unit is used to compare the communication delays between the computing nodes using the communication hardware coverage boundary test algorithm to obtain the number of computing nodes covered by each network routing module.

[0143] In one possible implementation, the testing submodule is specifically configured to:

[0144] The communication hardware coverage boundary is determined based on the number of computing nodes covered by each network routing module, and the communication hardware coverage boundary includes the network routing modules corresponding to the row switches, the network routing modules corresponding to the column switches, and the nodes included in the network routing modules; a communication delay testing tool is used to test the node delay of the same network routing module, the first delay between network routing modules in the same row switch, the second delay between network routing modules in the same column switch, and the switch delay between switches in different rows and different columns; and a dynamic topology awareness algorithm is used to obtain the communication cost matrix based on the node delay, the first delay, the second delay, and the switch delay tests.

[0145] In one possible implementation, the message delivery module 405 is specifically configured to:

[0146] The message transmission path between the computing nodes where the MPI process is located is determined based on the communication mapping result; and the inter-node message transmission of the computing nodes is completed based on the message transmission path.

[0147] An embodiment of the present application provides an acceleration device for simulation software, comprising a discretization module, an allocation module, an intra-node communication module, a determination module, a message passing module, and a calculation module. The discretization module is used to discretize the pending computational fluid dynamics (CFD) simulation task in response to obtaining the pending CFD simulation task, and generate a grid to be calculated. The allocation module is used to allocate the target computational grid obtained by splitting the grid to be calculated to a message passing interface (MPI) process, and the MPI process is mapped to the CPU core of the computing node for execution. The intra-node communication module is used to implement intra-node communication of the computing node based on a shared memory mode. The determination module is used to determine the communication mapping result of the MPI process. The message passing module is used to complete inter-node message passing of the computing node based on the communication mapping result. The calculation module is used to calculate the computing node using a neural network solver adapted for heterogeneous accelerators, and to fuse the calculation results of each computing node to obtain a simulation result. In this way, a comprehensive optimization framework for CFD software for supercomputing systems is proposed, which optimizes the intra-node communication and inter-node communication of computing nodes and the inference speed of heterogeneous accelerators. The number of MPI processes within a single computing node is reduced. The principle of communication locality is utilized to optimize the communication speed of computing nodes using intra-node shared memory mode communication and inter-node process mapping. This fully considers the storage and communication characteristics of computing nodes in supercomputing systems, and optimizes computing and storage resources in combination. By analyzing the memory access characteristics of heterogeneous accelerators, a neural network solver adapted for heterogeneous accelerators is proposed for node computing, reducing the number of memory accesses during heterogeneous accelerator reasoning. The embodiments of this application achieve improved simulation performance of CFD software.

[0148] Based on the acceleration method of simulation software provided by the above method embodiment, the embodiment of the present application provides an acceleration device for simulation software, see Figure 5 , the device includes: a processor, a memory, and a system bus;

[0149] The processor and the memory are connected via the system bus;

[0150] The memory is used to store one or more programs, and the one or more programs include instructions. When the instructions are executed by the processor, the processor executes the acceleration method of the simulation software described in any one of the above embodiments.

[0151] Based on the acceleration method of simulation software provided in the above method embodiment, an embodiment of the present application provides a computer-readable storage medium, which stores instructions. When the instructions are executed on a device, the device executes the acceleration method of simulation software described in any of the above embodiments.

[0152] Each embodiment in this specification is described in a progressive manner. The same or similar parts between the embodiments can be referred to each other. Each embodiment focuses on the differences from other embodiments. In particular, for the device or device embodiment, since it is basically similar to the method embodiment, the description is relatively simple. For the relevant parts, refer to the partial description of the method embodiment. The device and device embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. A person of ordinary skill in the art can understand and implement it without expending creative work.

[0153] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0154] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present application. Various modifications to these embodiments will be readily apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application is not limited to the embodiments shown herein, but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for accelerating simulation software, characterized in that: The method is applied to a supercomputing system and includes: In response to obtaining a pending computational fluid dynamics (CFD) simulation task, discretizing the pending CFD simulation task to generate a grid to be calculated; Assigning the target computational grid obtained by splitting the to-be-computed grid to a message passing interface (MPI) process, and mapping the MPI process to a central processing unit (CPU) core of a computing node for execution; Implementing intra-node communication of the computing nodes based on a shared memory mode; Determine a communication mapping result of the MPI process; completing inter-node message transmission of the computing nodes based on the communication mapping result; Utilizing a neural network solver adapted to a heterogeneous accelerator to perform calculations on the computing nodes, and fusing the calculation results of each computing node to obtain a simulation result; The determining of the communication mapping result of the MPI process comprises: Use the communication hardware coverage boundary test algorithm to determine the number of computing nodes covered by each network routing module; Based on the number of computing nodes covered by each network routing module, a communication cost matrix is ​​obtained by testing using a dynamic topology awareness algorithm; Determine the communication volume matrix according to the number of cross-grids of the target computing grid between MPI processes; The communication cost matrix and the communication volume matrix are matched to obtain a communication mapping result of the MPI process.

2. The acceleration method according to claim 1, characterized in that: The method of using the communication hardware coverage boundary test algorithm to determine the number of computing nodes covered by each network routing module includes: determining a communication delay between the computing nodes; The communication hardware coverage boundary test algorithm is used to compare the communication delays between the computing nodes to obtain the number of computing nodes covered by each network routing module.

3. The acceleration method according to claim 1, characterized in that: The communication cost matrix is ​​obtained by testing the number of computing nodes covered by each network routing module using a dynamic topology awareness algorithm, including: Determining a communication hardware coverage boundary based on the number of computing nodes covered by each network routing module, wherein the communication hardware coverage boundary includes the network routing modules corresponding to the row switches, the network routing modules corresponding to the column switches, and the nodes included in the network routing modules; Using a communication delay test tool, test the node delay of the same network routing module, the first delay between network routing modules of switches in the same row, the second delay between network routing modules of switches in the same column, and the switch delay between switches in different rows and columns. The communication cost matrix is ​​obtained by using a dynamic topology awareness algorithm based on the node delay, the first delay, the second delay, and the switch delay test.

4. The acceleration method according to claim 1, characterized in that: The completing inter-node message transmission of the computing node based on the communication mapping result includes: Determine a message transmission path between computing nodes where the MPI process is located based on the communication mapping result; Inter-node message transmission of computing nodes is completed based on the message transmission path.

5. An acceleration device for simulation software, characterized in that: The acceleration device is applied to a supercomputing system, comprising: a discretization module, configured to discretize the CFD simulation task to be processed and generate a grid to be calculated in response to obtaining the CFD simulation task to be processed; An allocation module is used to allocate the target computational grid obtained by splitting the to-be-computed grid to a message passing interface (MPI) process, and the MPI process is mapped to a central processing unit (CPU) core of a computing node for execution; An intra-node communication module, configured to implement intra-node communication of the computing node based on a shared memory mode; A determination module, configured to determine a communication mapping result of the MPI process; A message transmission module, configured to complete inter-node message transmission of the computing nodes based on the communication mapping result; A computing module, configured to perform calculations on the computing nodes using a neural network solver adapted to the heterogeneous accelerator, and to fuse the calculation results of each computing node to obtain a simulation result; The determining module includes: A determination submodule, configured to determine the number of computing nodes covered by each network routing module using a communication hardware coverage boundary test algorithm; A testing submodule, configured to obtain a communication cost matrix by testing using a dynamic topology awareness algorithm based on the number of computing nodes covered by each network routing module; The determining submodule is further configured to determine a communication volume matrix according to the number of cross-grids of the target computing grids between the MPI processes; The matching submodule is used to match the communication cost matrix and the communication volume matrix to obtain the communication mapping result of the MPI process.

6. The acceleration device according to claim 5, characterized in that The determination submodule is used to determine the number of computing nodes covered by each network routing module using a communication hardware coverage boundary test algorithm, including: a determining unit, configured to determine a communication delay between the computing nodes; The comparison unit is used to compare the communication delays between the computing nodes using the communication hardware coverage boundary test algorithm to obtain the number of computing nodes covered by each network routing module.

7. The acceleration device according to claim 5, characterized in that The test submodule is specifically used for: The communication hardware coverage boundary is determined based on the number of computing nodes covered by each network routing module, and the communication hardware coverage boundary includes the network routing modules corresponding to the row switches, the network routing modules corresponding to the column switches, and the nodes included in the network routing modules; a communication delay testing tool is used to test the node delay of the same network routing module, the first delay between network routing modules in the same row switch, the second delay between network routing modules in the same column switch, and the switch delay between switches in different rows and different columns; and a dynamic topology awareness algorithm is used to obtain the communication cost matrix based on the node delay, the first delay, the second delay, and the switch delay tests.

8. The acceleration device according to claim 5, characterized in that The message transmission module is specifically used for: The message transmission path between the computing nodes where the MPI process is located is determined based on the communication mapping result; and the inter-node message transmission of the computing nodes is completed based on the message transmission path.

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