Software and hardware interactive system based on variable-length data packets

By designing a software and hardware interaction system based on uncertain data packets, using status registers and ring buffers to achieve coordinated interaction between software and GPU hardware resources, the problem of poor performance of GPU hardware in the prior art is solved and the processing efficiency of GPU hardware is improved.

CN119741184APending Publication Date: 2025-04-01METAX INTEGRATED CIRCUITS (SHANGHAI) CO LTD
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Patent Information

Application Number
CN202311242371.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-09-25
Publication Date
2025-04-01

AI Technical Summary

Technical Problem

The existing software and hardware interaction mechanism is complex, and the GPU hardware performance is poor, making it difficult to reasonably send uncertainty-long data packets of software processes to GPU hardware resources for processing.

Method used

A software and hardware interaction system based on uncertain data packets is designed, and the mapping relationship between the ring buffer and the doorbell address is established through the W group status registers to realize the coordinated interaction between the software and GPU hardware resources. Each processing module can process uncertain data packets corresponding to X processes in time-sharing multiplexing, and update the target read pointer sequence number through the preset update time period to avoid frequent access to GPU hardware.

Benefits of technology

It realizes the reasonable delivery of uncertain data packets to GPU hardware resources for processing, improves GPU hardware performance, and avoids the problem of frequent access to GPU hardware occupying the bus bandwidth.

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Abstract

The present invention relates to the field of computer technology, and in particular to a software-hardware interaction system based on variable-length data packets, including software, GPU hardware, and software and storage areas, wherein the software includes a driver and M processes; the GPU hardware includes a doorbell interface, N processing modules, and W groups of status registers, wherein the doorbell interface is connected to the N processing modules, each processing module is connected to X groups of status registers, and each processing module can process variable-length data packets corresponding to X processes. During the system initialization process, the driver is used to set W ring buffers in the storage area to establish a mapping relationship between the ring buffer and the doorbell address; during the storage process of the variable-length data packet, the target write pointer sequence number is updated in real time; and the target read pointer sequence number is updated at intervals of a preset update time period. The present invention can reasonably send the variable-length data packet to the GPU hardware resource for processing, thereby improving the GPU hardware performance.
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Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a software and hardware interaction system based on variable-length data packets. Background Art

[0002] When a computer performs graphics operations, it needs software and graphics processing unit (GPU) hardware to work together, and the software sends variable-length data packets to the GPU hardware for processing. The software includes thousands of processes, each of which corresponds to multiple variable-length data packets, while GPU hardware resources are limited. The existing software-hardware interaction mechanism is complex, and the GPU hardware performance is poor. Therefore, how to reasonably send the variable-length data packets of the software process to the GPU hardware resources for processing and improve the GPU hardware performance has become a technical problem that needs to be solved urgently. Summary of the invention

[0003] The present invention aims to provide a software-hardware interaction system based on variable-length data packets, which can reasonably send variable-length data packets to GPU hardware resources for processing, thereby improving GPU hardware performance.

[0004] According to one aspect of the present invention, a software-hardware interaction system based on variable-length data packets is provided, comprising software, GPU hardware, and a storage area accessible to both the software and the GPU hardware, wherein the software comprises a driver and M processes, the length of the variable-length data packet corresponding to each process is an integer multiple of G, the length of the variable-length data packet is ≤ S, G is the unit length of the variable-length data packet, and S is the unit length of the storage area for reading; the GPU hardware comprises a doorbell interface, N processing modules, and W groups of status registers, M>W>N, the doorbell interface is connected to the N processing modules, each processing module is connected to the X groups of status registers, and each processing module can process the variable-length data packets corresponding to the X processes in a time-division multiplexing manner, W=N*X;

[0005] During the system initialization process, the driver is used to set W ring buffers in the storage area, set corresponding status information in W groups of status registers, and establish a mapping relationship between the ring buffers and the doorbell addresses, each ring buffer corresponds to a doorbell address, and the status information includes a usage status, a doorbell address, a ring buffer start address, a read pointer sequence number and a write pointer sequence number, the initial values ​​of the read pointer sequence number and the write pointer sequence number are 0, and the length of the ring buffer is L=Z*G, Z is an integer, and L is an integer multiple of S;

[0006] In the variable-length data packet storage process, the driver selects the target ring buffer corresponding to the process to be processed based on the use status of the W group status register, determines the distributable variable-length data packet length corresponding to the process to be processed according to the target read pointer sequence number and the target write pointer sequence number corresponding to the target ring buffer, and the target processing module corresponding to the target ring buffer stores the variable-length data packet to be distributed corresponding to the process to be processed into the target ring buffer according to the distributable variable-length data packet length, and updates the target write pointer sequence number in real time according to the stored variable-length data packet length through the doorbell interface;

[0007] During the processing of variable-length data packets, the target processing module is used to read variable-length data packets from the target ring buffer for processing when the target read pointer number and the target write pointer number are not equal. At every preset update time period, the target read pointer number is updated through the doorbell interface based on the total length of the variable-length data packets processed in the current update time period.

[0008] Compared with the prior art, the present invention has obvious advantages and beneficial effects. By means of the above technical solution, the software and hardware interactive system based on variable-length data packets provided by the present invention can achieve considerable technical advancement and practicality, and has wide industrial utilization value, and has at least the following beneficial effects:

[0009] The system of the present invention establishes a mapping relationship between W doorbell addresses and a ring buffer set in a storage area accessible to both software and GPU hardware through W groups of status registers, realizes the coordinated interaction of software and GPU hardware resources based on the information in the status registers, can reasonably send variable-length data packets to GPU hardware resources for processing, and updates the target read pointer sequence number once every preset update time period through an update time period, thereby avoiding frequent access to GPU hardware to occupy bus bandwidth and improving GPU hardware performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0011] Figure 1 A schematic diagram of a software and hardware interaction system based on variable-length data packets provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0012] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0013] The embodiment of the present invention provides a software and hardware interaction system based on variable-length data packets, such as Figure 1 As shown, it includes software, GPU hardware, and storage areas accessible to both software and GPU hardware, wherein the software runs in a central processing unit (CPU), the software includes a driver and M processes, and the data packets corresponding to each process are variable-length data packets, that is, the lengths of the data packets may not be equal, but the lengths of the variable-length data packets corresponding to each process are integer multiples of G, and the length of the variable-length data packets is ≤ S, G is the unit length of the variable-length data packets, S is the unit length of the read storage area, and S is also the length of the cache line. The GPU hardware includes a doorbell interface, N processing modules, and W groups of status registers, M>W>N. It should be noted that hardware resources are limited, so W is usually in the order of 10, while the number of software processes may be tens of thousands, so M is much larger than W. The doorbell interface is connected to N processing modules, each processing module is connected to X groups of status registers, and each processing module can process variable-length data packets corresponding to X processes in a time-sharing multiplexing manner, W=N*X; the processing module includes a RISC-V instruction set, RISC-V is an open instruction set architecture (ISA) based on the principle of reduced instruction set computing (RISC), and V represents the fifth generation of RISC (reduced instruction set computer), indicating that there have been four generations of RISC processor prototype chips before.

[0014] During the system initialization process, the driver is used to set W ring buffers (Ringbuffer) in the storage area, set corresponding status information in W groups of status registers, establish a mapping relationship between the ring buffer and the doorbell address, each ring buffer corresponds to a doorbell address, and the status information includes the use status, doorbell address, ring buffer start address, read pointer sequence number and write pointer sequence number, the initial value of the read pointer sequence number and the write pointer sequence number is 0, the length of the ring buffer L = Z * G, Z is an integer, and L is an integer multiple of S. It should be noted that the use status stored in the status register can show whether the corresponding ring buffer can be reallocated to other processes. The doorbell address and the ring buffer start address can limit the mapping relationship between the ring buffer and the doorbell address. The next write start address can be determined by combining the write pointer sequence number with the ring buffer start address and the unit length G of the variable length data packet. The next read start address can be determined by combining the read pointer sequence number with the ring buffer start address and the unit length G of the variable length data packet. It can be understood that the read pointer sequence number and the write pointer sequence number are counted in units of the unit length G of the variable length data packet, not in the number of data packets.

[0015] During the variable-length data packet storage process, the driver selects the target ring buffer corresponding to the process to be processed based on the usage status of the W group status register, determines the distributable variable-length data packet length corresponding to the process to be processed according to the target read pointer number and the target write pointer number corresponding to the target ring buffer, and the target processing module corresponding to the target ring buffer stores the variable-length data packet to be distributed corresponding to the process to be processed into the target ring buffer according to the distributable variable-length data packet length, and updates the target write pointer number in real time according to the stored variable-length data packet length through the doorbell interface.

[0016] In the process of processing variable-length data packets, the target processing module is used to read variable-length data packets from the target ring buffer for processing when the target read pointer sequence number and the target write pointer sequence number are not equal. The target read pointer sequence number is updated through the doorbell interface based on the total length of the variable-length data packets processed in the current update time period at each preset update time period. It should be noted that if the target write pointer sequence number is updated every time a variable-length data packet is processed, the target write pointer sequence number will be updated too frequently, and the bus bandwidth will be frequently occupied, reducing the GPU hardware performance. Therefore, a preset update time period is set, and the target read pointer sequence number is updated based on the total length of the variable-length data packets processed in the current update time period at each preset update time period, which can avoid frequent occupation of the bus bandwidth and improve the GPU hardware performance. The system can dynamically update the preset update time period according to the degree of influence of the target read pointer sequence number update on the bandwidth, and the degree of influence of the target read pointer sequence number update on the bandwidth is negatively correlated with the length of the preset update time period.

[0017] It should be noted that since the length of the data packet is uncertain, the system described in the embodiment of the present invention does not set and update the read pointer number and the write pointer number based on the number of data packets, but sets and updates the read pointer number and the write pointer number based on the unit length of the variable-length data packet. The system updates the target read pointer number and the target write pointer number in real time according to the writing and processing status of the variable-length data packet, and then determines the target read start address and the target write start address based on the target read pointer number and the target write pointer number, thereby realizing the coordinated interaction of software and hardware, and being able to reasonably send the variable-length data packets to the GPU hardware resources for processing, thereby improving the GPU hardware performance.

[0018] As an embodiment, each ring buffer can only store variable-length data packets corresponding to one process at the same time, and the corresponding use state of the ring buffer includes an optional state and an unselectable state; when variable-length data packets have been stored in the ring buffer and have not been completely processed, the corresponding use state is set to an unselectable state; when variable-length data packets are not stored in the shape buffer, or the corresponding process variable-length data packets have been completely processed, the corresponding use state is set to an optional state. It can be understood that the ring buffer is a circular first-in-first-out queue connected end to end. When variable-length data packets corresponding to a process have been allocated in the ring buffer and all variable-length data packets have not been processed, variable-length data packets of other processes cannot be stored. However, when all variable-length data packets have been processed, data packets of another process can be stored. There is no need to clear the ring buffer. It is only necessary to change the mapping relationship between the ring buffer and the doorbell address by changing the corresponding status register, so that the variable-length data packets of another process can directly overwrite the variable-length data packets in the corresponding ring buffer.

[0019] As an embodiment, during the storage of variable-length data packets, if there is at least one ring buffer whose use state is optional, the driver selects a ring buffer whose use state is optional as the target ring buffer corresponding to the process to be processed. That is, when there is a ring buffer to which no process has been allocated, one can be directly selected as the target ring buffer corresponding to the process to be processed.

[0020] As an embodiment, each process includes priority information. During the storage of variable-length data packets, if the usage status of W groups of status registers are all unselectable, and among the processes that have currently distributed variable-length data packets, there are processes whose priority is lower than that of the process to be processed, then the driving process adds a new ring buffer in the storage area as the target ring buffer corresponding to the process to be processed, selects a process to be adjusted from the processes that have distributed variable-length data packets, sets the starting address of the ring buffer in the corresponding status register in the process to be adjusted to the starting address of the target ring buffer, and sets the initial serial numbers of the corresponding read pointer and write pointer to 0. It should be noted that a low-priority process may require the processing result of a high-priority process during the processing, but during the distribution process, the low-priority process may be distributed first. When the hardware resources are insufficient to process the newly added ring buffer, a new ring buffer can be directly added by adjusting the mapping relationship, and the newly added ring buffer can be processed preferentially. In addition, since the storage space corresponding to the storage area is usually larger than the space occupied by W ring buffers, the ring buffer corresponding to the process to be adjusted can be retained in the ring buffer, and the process to be adjusted can be continued to be executed by directly changing the mapping relationship between the ring buffer and the doorbell address, without re-establishing the ring buffer corresponding to the process to be adjusted.

[0021] As an embodiment, the system further includes a preset cache area, and the driving process is further used to store the ring buffer starting address, read pointer sequence number and write pointer sequence number corresponding to the process to be adjusted in the preset cache area. When the use status of at least one group of status registers is updated to an optional state, the driving process selects a group of status registers whose use status is an optional state, and updates the ring buffer starting address, read pointer sequence number and write pointer sequence number in the selected status registers to the ring buffer starting address, read pointer sequence number and write pointer sequence number corresponding to the process to be adjusted. The system stores the ring buffer starting address, read pointer sequence number and write pointer sequence number corresponding to the process to be adjusted by setting a preset cache area. When the use status of at least one group of status registers is updated to an optional state, the system can quickly establish a mapping relationship between the ring buffer corresponding to the process to be adjusted and the doorbell address, and continue to execute the process to be adjusted, thereby improving the efficiency of software and hardware interaction.

[0022] As an embodiment, during the storage process of variable-length data packets, the driver is further configured to generate a variable-length data packet distribution instruction based on the selected target ring buffer doorbell address and the variable-length data packet information to be distributed, and send the variable-length data packet distribution instruction to the corresponding target processing module through the doorbell interface. The variable-length data packet information to be distributed includes {E1, E2, …, E k , …, E K}, where E k is the k-th variable-length data packet information to be distributed, and the value range of k is from 1 to K. E k =(I k , J k ), where I k is the length of the variable-length data packet corresponding to E k , and J k is the data of the variable-length data packet corresponding to E k .

[0023] As an embodiment, during the storage process of variable-length data packets, the driver determines the length of the variable-length data packets that can be distributed for the process to be processed according to the target read pointer number and the target write pointer number corresponding to the target ring buffer, including: obtaining the target read pointer number D and the target write pointer number C. If D < C, the length of the variable-length data packets that can be distributed E = [Z - (C - D)] * G; if D > C, the length of the variable-length data packets that can be distributed E = [D - C] * G.

[0024] During the storage process of variable-length data packets, the target processing module stores the variable-length data packets to be distributed in the target ring buffer according to the length of the variable-length data packets that can be distributed, including: the target processing module parses the variable-length data packet information to be distributed to obtain the total length P of the K variable-length data packets to be distributed corresponding to {E1, E2, …, E k , …, E K}, and the data J k of the K variable-length data packets to be distributed. If the current E ≥ P, it means that the length of the variable-length data packets that can be distributed currently meets the total length of the variable-length data packets to be distributed, and then the data J k of the K variable-length data packets to be distributed is stored in the target ring buffer in sequence. If E < P, it means that the length of the variable-length data packets that can be distributed currently does not meet the total length of the variable-length data packets to be distributed, and it is necessary to wait until E ≥ P, and then the data J k of the K variable-length data packets to be distributed is stored in the target ring buffer in sequence.

[0025] As an embodiment, the target write pointer sequence number is updated in real time according to the length of the stored variable-length data packet through the doorbell interface: if C+P / G≤Z, it means that the stored variable-length data packet to be distributed does not cross the starting position of the target ring buffer, then C=C+P / G is updated. If C+P / G>Z, it means that the stored variable-length data packet to be distributed crosses the starting position of the target ring buffer, then C=C+P / GZ is updated.

[0026] As an embodiment, during the processing of variable-length data packets, the target processing module is used to read variable-length data packets from the target ring buffer for processing when the target read pointer number and the target write pointer number are not equal, including: determining the length of the current data packet to be read according to the position indicated by the target read pointer number, and when the computing resources of the target processing module are sufficient to process the current data packet to be read, reading the interval to be read where the target read pointer number is located in units of S. If all the current data packets to be read are located in the read interval where the target read pointer number is located, the data of the current data packet to be read is directly extracted from the data read from the read storage interval where the target read pointer number is located for processing. If the first part of the current data packet to be read is located in the read interval where the target read pointer number is located, and the second part is located in the next read interval, continue to read the data of the next read interval, and extract the first part of the data from the data in the read interval where the target read pointer number is located, extract the second part of the data from the data in the next read interval, and splice the first part of the data and the second part of the data for processing. It should be noted that the existing GPU hardware technology can know the current hardware resource usage in real time and judge whether the computing resources are sufficient to process the data packets to be read. I will not repeat it here. After the variable-length data packet is processed, in addition to updating the corresponding target read pointer sequence number, the information of the currently read variable-length data packet can also be actively sent to the driver process, so that the driver process can quickly know whether the corresponding data packet can be distributed to the target ring buffer.

[0027] As an embodiment, the target read pointer number is updated through the doorbell interface based on the total length of the variable-length data packets processed in the current update time period at each preset update time period, including: when a variable-length data packet is processed, the unit length quantity F corresponding to the processed variable-length data packet is obtained, and U=U+F is set, where U is the read pointer number value to be adjusted, and the initial value of U is 0. When the preset update time period is exceeded, D+F and Z are compared. If D+F≤Z, D=D+F is updated, and U=0 is updated; if D+F>Z, D=D+FZ is updated, and U=0 is updated.

[0028] The system described in the embodiment of the present invention establishes a mapping relationship between W doorbell addresses and a ring buffer set in a storage area accessible to both software and GPU hardware through W groups of status registers, and realizes collaborative interaction between software and GPU hardware resources based on information in the status registers. It can reasonably send variable-length data packets to GPU hardware resources for processing, and update the target read pointer sequence number once every preset update time period through an update time period, thereby avoiding frequent access to GPU hardware to occupy bus bandwidth and improving GPU hardware performance.

[0029] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment as above, it is not used to limit the present invention. Any technician familiar with this profession can make some changes or modifications to equivalent embodiments of equivalent changes using the technical contents disclosed above without departing from the scope of the technical solution of the present invention. However, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of the technical solution of the present invention.

Claims

1. A software and hardware interaction system based on variable-length data packets, characterized in that it includes software, GPU hardware, and a storage area accessible by both the software and the GPU hardware. Among them, the software includes a driver program and M processes. The length of the variable-length data packet corresponding to each process is an integer multiple of G, and the length of the variable-length data packet ≤ S. G is the unit length of the variable-length data packet, and S is the unit length for reading the storage area; the GPU hardware includes a doorbell interface, N processing modules, and W groups of status registers, where M > W > N. The doorbell interface is connected to the N processing modules, each processing module is connected to X groups of status registers, and each processing module can process the variable-length data packets corresponding to X processes in a time-division multiplexing manner, and W = N * X; During the system initialization process, the driver program is used to set up W circular buffers in the storage area, set corresponding status information in the W groups of status registers, and establish a mapping relationship between the circular buffers and the doorbell addresses. Each circular buffer corresponds to a doorbell address. The status information includes usage status, doorbell address, circular buffer start address, read pointer sequence number, and write pointer sequence number. The initial values of the read pointer sequence number and the write pointer sequence number are 0. The length L of the circular buffer = Z * G, where Z is an integer, and L is an integer multiple of S; During the storage process of variable-length data packets, the driver program selects the target circular buffer corresponding to the process to be processed based on the usage status of the W groups of status registers, determines the length of the variable-length data packets that can be distributed corresponding to the process to be processed according to the target read pointer sequence number and the target write pointer sequence number corresponding to the target circular buffer. The target processing module corresponding to the target circular buffer stores the variable-length data packets to be distributed corresponding to the process to be processed into the target circular buffer according to the length of the variable-length data packets that can be distributed, and updates the target write pointer sequence number in real time through the doorbell interface according to the length of the stored variable-length data packets; During the processing process of variable-length data packets, the target processing module is used to read and process the variable-length data packets from the target circular buffer when the target read pointer sequence number and the target write pointer sequence number are not equal. Every preset update time period, the target read pointer sequence number is updated through the doorbell interface based on the total length of the variable-length data packets processed during the current update time period.

2. The system according to claim 1, characterized in that In the variable-length data packet storage process, the driver is also used to generate a variable-length data packet distribution instruction based on the selected target ring buffer doorbell address and the variable-length data packet information to be distributed, and send the variable-length data packet distribution instruction to the corresponding target processing module through the doorbell interface. The variable-length data packet information to be distributed includes {E1, E2, ..., E k ,…,E K },E k is the kth variable-length data packet to be distributed, the value range of k is 1 to K, E k =(I k ,J k ), I k For E k The corresponding variable length packet length, J k For E k The corresponding variable-length packet data.

3. The system according to claim 2, characterized in that During the storage process of variable-length data packets, the driver program determines the length of the variable-length data packets that can be distributed corresponding to the process to be processed according to the target read pointer sequence number and the target write pointer sequence number corresponding to the target circular buffer, including: Obtain the target read pointer sequence number D and the target write pointer sequence number C. If D < C, the length E of the variable-length data packets that can be distributed = [Z - (C - D)] * G; if D > C, the length E of the variable-length data packets that can be distributed = [D - C] * G.

4. The system according to claim 3, characterized in that In the variable-length data packet storage process, the target processing module stores the variable-length data packets to be distributed into the target ring buffer according to the length of the variable-length data packets that can be distributed, including: The target processing module parses the indefinite length data packet information to be distributed and obtains {E1, E2, ..., E k ,…,E K The total length P of the K indefinite-length data packets to be distributed corresponding to}, And K indefinite length data packets to be distributed J k , if the current E ≥ P, then K indefinite length data packets to be distributed J k Store them in the target ring buffer in sequence. Otherwise, when E≥P is satisfied, K indefinite length packets to be distributed are sent to the target ring buffer. k Stored sequentially in the target ring buffer.

5. The system according to claim 4, characterized in that The method of updating the target write pointer sequence number in real time according to the length of the stored variable-length data packet through the doorbell interface includes: If C+P / G≤Z, then update C=C+P / G; if C+P / G>Z, then update C=C+P / GZ.

6. The system according to claim 1, characterized in that In the variable-length data packet processing process, the target processing module is used to read the variable-length data packet from the target ring buffer for processing when the target read pointer sequence number and the target write pointer sequence number are not equal, including: Determine the length of the current data packet to be read according to the position indicated by the target read pointer serial number, and when the computing resources of the target processing module are sufficient to process the current data packet to be read, read the interval to be read where the target read pointer serial number is located in units of S; If all the data packets to be read are located in the read interval where the target read pointer number is located, the data packets to be read are directly extracted from the data read in the read storage interval where the target read pointer number is located for processing; If the first part of the data packet to be read is located in the read interval where the target read pointer number is located, and the second part is located in the next read interval, continue to read the data in the next read interval, and extract the first part of the data from the data in the read interval where the target read pointer number is located, and extract the second part of the data from the data in the next read interval, and splice the first part of the data and the second part of the data for processing.

7. The system according to claim 3, characterized in that The method of updating the target read pointer sequence number at each preset update time period through the doorbell interface based on the total length of the variable-length data packets processed in the current update time period includes: When a variable-length data packet is processed, the unit length quantity F corresponding to the processed variable-length data packet is obtained, and U=U+F is set, where U is the read pointer sequence number value to be adjusted, and the initial value of U is 0. When the preset update time period is exceeded, the sizes of D+F and Z are compared. If D+F≤Z, D=D+F is updated, and U=0 is updated; if D+F>Z, D=D+FZ is updated, and U=0 is updated.

8. The system according to claim 1, characterized in that The system dynamically updates the preset update time period according to the influence degree of the target read pointer serial number update on the bandwidth, and the influence degree of the target read pointer serial number update on the bandwidth is negatively correlated with the length of the preset update time period.

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