An overcurrent protection circuit for an on-board computer product

Abstract

The application provides an overcurrent protection circuit of an airborne computer product, and belongs to the technical field of power supply and distribution management of airborne computers, and comprises a power switch and an isolation circuit, which are used for controlling a power supply output switch; a current sampling detection circuit, which is used for establishing a linear relationship between a measured current and an output voltage; a signal conditioning circuit, which is used for conditioning an output signal of the current sampling detection circuit, and outputs a voltage of 0V when the current flowing through is 0A; a comparison circuit, which is used for comparing the voltage output by the signal conditioning circuit with a preset reference voltage, judging whether overcurrent occurs, outputting an overcurrent signal when overcurrent occurs, and closing a power output channel; and a level maintaining circuit, which is used for maintaining the overcurrent signal and preventing the overcurrent signal from failing; after overcurrent failure is eliminated, the overcurrent protection signal is reset through an overcurrent protection reset signal, and the power output channel is reopened. The application improves the safety and reliability of the airborne computer product.

Description

Technical Field

[0001] This application relates to the field of power supply and distribution management technology for airborne computers, and in particular to an overcurrent protection circuit for an airborne computer product. Background Technology

[0002] In airborne computer power supply products, overcurrent protection circuits are typically required to meet overcurrent protection requirements and prevent short circuits in aircraft busbars, which could lead to fault propagation and affect the operation of other airborne equipment. Traditional overcurrent protection designs usually use fuses, which are irreversible protection measures. Once the fault is cleared, the short-circuit protection is not released. Furthermore, in practical applications, fuses blow slowly, potentially causing abnormalities in the aircraft's power supply busbars before the fuse blows, thus compromising the safety of the airborne computer product. Summary of the Invention

[0003] In view of this, the present application provides an overcurrent protection circuit for an airborne computer product, which at least partially solves the problem that the existing overcurrent protection often uses fuses, which have a slow melting time and may cause abnormalities in the onboard power supply busbar before the fuse melts, thus affecting the safety of the airborne computer product.

[0004] This application provides an overcurrent protection circuit for an airborne computer product. The circuit includes a power switch, an isolation circuit, a current sampling and detection circuit, a signal conditioning circuit, a comparison circuit, and a level maintenance circuit connected in sequence. The output terminal of the level maintenance circuit is connected to the power switch and the isolation circuit.

[0005] The power switch and isolation circuit are used to control the power supply output switch.

[0006] The current sampling and detection circuit is used to establish a linear relationship between the measured current output by the power switch and the isolation circuit and the output voltage of the current sampling and detection circuit.

[0007] The signal conditioning circuit is used to condition the output voltage signal of the current sampling and detection circuit so that when the current flowing through it is 0A, the output voltage of the signal conditioning circuit is 0V.

[0008] The comparison circuit is used to compare the voltage output by the signal conditioning circuit with a preset reference voltage to determine whether the measured current has overcurrent. When overcurrent occurs, an overcurrent signal is output and the power output channel is shut down.

[0009] The level maintenance circuit is used to maintain the overcurrent signal to prevent the overcurrent signal from failing when the current is zero after the power output channel is closed; when the overcurrent fault is cleared, the overcurrent protection signal is reset by the overcurrent protection reset signal to reopen the power output channel.

[0010] According to a specific implementation of an embodiment of this application, the power switch and isolation circuit include an isolation diode and a BTS6163D chip connected in series. The switch is driven by a TTL level signal to activate the input V of the BTS6163D chip. IN Grounded, with a drive current of 2.4mA; the power output channel is switched on and off by floating or grounding the enable pin level of the BTS6163D chip.

[0011] According to one specific implementation of an embodiment of this application, the current sampling and detection circuit is configured as a Hall current sensor.

[0012] According to a specific implementation of this application, the Hall current sensor is model ACS712ELCTR-20A-T, and the linear relationship between the output voltage of the Hall current sensor and the measured current is:

[0013] V OUT =2.5+I SENSE ×A V ,

[0014] Among them, I SENSE For the measured current, A V V is the proportionality coefficient of current to voltage. OUT This is the output voltage of the Hall current sensor.

[0015] According to a specific implementation of this application, the signal conditioning circuit uses an operational amplifier LF147 to form a proportional amplifier, so that the output voltage signal of the current sampling and detection circuit is amplified by operation to achieve zeroing of the output voltage signal.

[0016] According to a specific implementation of an embodiment of this application, the level maintenance circuit includes an NPN transistor, a PNP transistor, a first NMOS transistor, and a second NMOS transistor. The output terminal of the comparator circuit is connected to the base of the NPN transistor, the emitter of the PNP transistor, and the gate of the second NMOS transistor, respectively. The emitter of the NPN transistor is grounded, and the collector of the NPN transistor is connected to the base of the PNP transistor through a resistor. The collector of the PNP transistor is connected to the power supply VCC through a resistor. The emitter of the PNP transistor is also connected to the source and gate of the first NMOS transistor. The drain of the first NMOS transistor is connected to the PROTECT signal output terminal. The source of the second NMOS transistor is grounded, and the drain of the second NMOS transistor is connected to the base of the NPN transistor. The gate of the second NMOS transistor is connected to the overcurrent protection reset signal.

[0017] According to one specific implementation of an embodiment of this application, the comparison circuit includes an operational amplifier LM193.

[0018] Beneficial effects:

[0019] The overcurrent protection circuit for the airborne computer product in this application embodiment provides an overcurrent protection circuit that realizes power supply current detection and overcurrent protection. When an overcurrent occurs, the overcurrent protection circuit issues an overcurrent protection signal, shuts down the power output switch, and maintains the validity of the overcurrent protection signal by a level maintenance circuit. After the overcurrent fault is cleared, the overcurrent protection can be released by an overcurrent reset signal, and the power output switch can be turned on, thereby improving the safety of the airborne computer product. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a general block diagram of an overcurrent protection circuit for an airborne computer product according to an embodiment of the present invention;

[0022] Figure 2 This is a structural diagram of a power switch and isolation circuit according to an embodiment of the present invention;

[0023] Figure 3 This is a structural diagram of a current sampling and detection circuit according to an embodiment of the present invention;

[0024] Figure 4 This is a structural diagram of a signal conditioning circuit according to an embodiment of the present invention;

[0025] Figure 5 This is a structural diagram of a comparison circuit and a level maintenance circuit according to an embodiment of the present invention;

[0026] Figure 6 This is a general structural diagram of the overcurrent protection circuit of an airborne computer product according to an embodiment of the present invention. Detailed Implementation

[0027] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0028] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. This application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be noted that, in the absence of conflict, the following embodiments and features in the embodiments can be combined with each other. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0029] It should be noted that various aspects of embodiments within the scope of the appended claims are described below. It will be apparent that the aspects described herein can be embodied in a wide variety of forms, and any particular structure and / or function described herein is merely illustrative. Based on this application, those skilled in the art will understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects set forth herein can be used to implement the device and / or practice the method. Additionally, this device and / or method can be implemented using structures and / or functionalities other than one or more of the aspects set forth herein.

[0030] It should also be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this application. The illustrations only show the components related to this application and are not drawn according to the number, shape and size of the components in actual implementation. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0031] Furthermore, specific details are provided in the following description to facilitate a thorough understanding of the examples. However, those skilled in the art will understand that the described aspects can be practiced without these specific details.

[0032] This application addresses current technical challenges by designing an overcurrent protection circuit for airborne computer power supplies. The circuit aims to detect and protect against overcurrent. When an overcurrent occurs, the overcurrent protection circuit sends an overcurrent protection signal, shutting off the power output switch. A level-maintaining circuit keeps the overcurrent protection signal valid. Once the overcurrent fault is cleared, an overcurrent reset signal can be used to release the overcurrent protection and reopen the power output switch.

[0033] In one embodiment, this application provides an overcurrent protection circuit for an airborne computer product, which is described below with reference to... Figures 1 to 6A detailed description is provided. Specifically, the circuit includes a power switch, an isolation circuit, a current sampling and detection circuit, a signal conditioning circuit, a comparison circuit, and a level maintenance circuit connected in sequence. The output terminal of the level maintenance circuit is connected to the power switch and the isolation circuit.

[0034] The power switch and isolation circuit are used to control the power supply output switch.

[0035] The current sampling and detection circuit is used to establish a linear relationship between the measured current output by the power switch and the isolation circuit and the output voltage of the current sampling and detection circuit.

[0036] The signal conditioning circuit is used to condition the output voltage signal of the current sampling and detection circuit so that when the current flowing through it is 0A, the output voltage of the signal conditioning circuit is 0V.

[0037] The comparison circuit is used to compare the voltage output by the signal conditioning circuit with a preset reference voltage to determine whether the measured current has overcurrent. When overcurrent occurs, an overcurrent signal is output and the power output channel is shut down.

[0038] The level maintenance circuit is used to maintain the overcurrent signal to prevent the overcurrent signal from failing when the current is zero after the power output channel is closed; when the overcurrent fault is cleared, the overcurrent protection signal is reset by the overcurrent protection reset signal to reopen the power output channel.

[0039] In this embodiment, an overcurrent protection circuit is provided to detect and protect against power supply current. When an overcurrent occurs, the overcurrent protection circuit sends an overcurrent protection signal, shuts down the power output switch, and maintains the validity of the overcurrent protection signal through a level maintenance circuit. After the overcurrent fault is cleared, the overcurrent protection can be released through an overcurrent reset signal, and the power output switch can be turned on, thereby improving the safety of the airborne computer product.

[0040] Specifically, refer to Figure 2 The power switch and isolation circuit include an isolation diode and a BTS6163D chip connected in series. The switch is driven by a TTL level signal to activate the input V of the BTS6163D chip. IN Grounded, with a drive current of 2.4mA; the power output channel is switched on and off by the floating or grounding level of the enable pin of the BTS6163D chip. The on / off function of the power switch and the main power output of the isolation circuit is controlled by the BTS6163D.

[0041] In one embodiment, the current sampling and detection circuit is configured as a Hall current sensor. The output voltage of the Hall current sensor is "zeroed" after passing through a signal conditioning circuit. According to the characteristics of the Hall current sensor, the output is 2V when the current flowing through it is 0. The signal conditioning circuit conditions the output voltage signal of the Hall current sensor so that the output of the signal conditioning circuit is 0V when the current flowing through it is 0A.

[0042] Preferably, the Hall current sensor is model ACS712ELCTR-20A-T, and the linear relationship between the output voltage of the Hall current sensor and the measured current is:

[0043] V OUT =2.5+I SENSE ×A V ,

[0044] Among them, I SENSE For the measured current, A V V is the proportionality coefficient of current to voltage. OUT This is the output voltage of the Hall current sensor.

[0045] The 12V voltage output channel current is converted into a voltage signal by a Hall current sensor. The Hall current sensor used is ACS712ELCTR-20A-T. Refer to the specific circuit diagram. Figure 3 .

[0046] In one embodiment, the signal conditioning circuit uses an operational amplifier LF147 to form a proportional amplifier, so that the output voltage signal of the current sampling and detection circuit is amplified by operation to achieve zeroing of the output voltage signal.

[0047] Specifically, the current sampling and detection circuit corresponds to a 2V output voltage at zero current. Since the AD sampling voltage range of DSPs or MCUs is generally 0-3.3V, to ensure compatibility with DSP or MCU AD sampling and facilitate current calculation, the signal conditioning circuit uses a general-purpose operational amplifier LF147 to form a proportional amplifier. This amplifier performs subtraction on the current detection signal, enabling the Hall current sampling circuit's output voltage signal to be "zeroed" after operational amplification. This ensures that when the current flowing through the circuit is 0A, the signal conditioning circuit output is 0V. (See attached diagram.) Figure 4 The input-output relationship of the signal conditioning circuit is as follows:

[0048] 12V_I_ADJ = 12V_I - 2.5,

[0049] The Hall current sample passes through the signal conditioning circuit and then enters the comparator circuit.

[0050] In one embodiment, the comparator circuit includes an operational amplifier LM193. The Hall current sample, after passing through a signal conditioning circuit, is compared with a reference voltage (2V) by a comparator. When the output voltage of the conditioning circuit is greater than 2V, the comparator circuit outputs a high level of 5V; when it is less than 2V, the comparator circuit outputs a low level of 0V. The output of the comparator circuit is connected to the input of a level-maintaining circuit.

[0051] In one embodiment, the level sustaining circuit includes an NPN transistor, a PNP transistor, a first NMOS transistor, and a second NMOS transistor. The output of the comparator circuit is connected to the base of the NPN transistor, the emitter of the PNP transistor, and the gate of the second NMOS transistor. The emitter of the NPN transistor is grounded. The collector of the NPN transistor is connected to the base of the PNP transistor through a resistor. The collector of the PNP transistor is connected to the power supply VCC through a resistor. The emitter of the PNP transistor is also connected to the source and gate of the first NMOS transistor. The drain of the first NMOS transistor is connected to the PROTECT signal output. The source of the second NMOS transistor is grounded. The drain of the second NMOS transistor is connected to the base of the NPN transistor. The gate of the second NMOS transistor is connected to the overcurrent protection reset signal.

[0052] In this embodiment, a level sustaining circuit is designed using the characteristics of NPN transistor 2N222 and PNP transistor 2N2907 to maintain the overcurrent signal and prevent the overcurrent signal from failing when the current becomes zero after the output channel (power switch) is turned off. When the comparator circuit outputs a high level of 5V (overcurrent occurs when the voltage of 12V_I_ADJ is greater than 2V), NPN transistor Q1 (2N222) turns on. After NPN transistor Q1 turns on, it drives PNP transistor Q2 (2N2907) to turn on. The emitter of PNP transistor Q2 is connected to the base of NPN transistor Q1, which can maintain the stable conduction of NPN transistor Q1. Finally, the first NMOS transistor Q4 turns on, and the PROTECT signal remains low. The PROTECT signal is connected to the control signal output terminal, thereby turning off the power switch.

[0053] Due to the presence of the level maintenance circuit, when the power switch is turned off, the current flowing through it is 0, the comparator circuit output is 0, and the first NMOS transistor Q4 remains on, ensuring the PROTECT signal is maintained even after the power switch is turned off. After the overcurrent fault is cleared, the overcurrent protection signal can be reset using the overcurrent protection reset signal (PROTECT_RESET). When PROTECT_RESET is high (5V), the first NMOS transistor Q3 is on, the base of NPN transistor Q1 is grounded, and NPN transistor Q1 is off, causing PNP transistor Q2 to turn off. The gate of the first NMOS transistor Q4 is left floating, and the first NMOS transistor Q4 is turned off, ultimately causing the PROTECT signal to float and reopening the power output channel. The application circuit diagram is attached. Figure 5 .

[0054] The embodiments provided by this invention realize power supply current detection and overcurrent protection. When an overcurrent occurs, the overcurrent protection circuit issues an overcurrent protection signal, shuts down the power output switch, and the overcurrent protection signal is kept valid by a level maintenance circuit. After the overcurrent fault is eliminated, the overcurrent protection can be released by an overcurrent reset signal, and the power output switch can be turned on, thereby improving the safety and reliability of airborne computer products.

[0055] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An overcurrent protection circuit for an airborne computer product, characterized in that, The circuit includes a power switch, an isolation circuit, a current sampling and detection circuit, a signal conditioning circuit, a comparison circuit, and a level maintenance circuit connected in sequence. The output terminal of the level maintenance circuit is connected to the power switch and the isolation circuit. The power switch and isolation circuit are used to control the power supply output switch. The current sampling and detection circuit is used to establish a linear relationship between the measured current output by the power switch and the isolation circuit and the output voltage of the current sampling and detection circuit. The signal conditioning circuit is used to condition the output voltage signal of the current sampling and detection circuit so that when the current flowing through it is 0A, the output voltage of the signal conditioning circuit is 0V. The signal conditioning circuit uses an operational amplifier LF147 to form a proportional amplifier, so that the output voltage signal of the current sampling and detection circuit is zeroed after being operationally amplified. The comparison circuit is used to compare the voltage output by the signal conditioning circuit with a preset reference voltage to determine whether the measured current has overcurrent. When overcurrent occurs, an overcurrent signal is output and the power output channel is shut down. The level maintenance circuit is used to maintain the overcurrent signal to prevent the overcurrent signal from failing when the current is zero after the power output channel is turned off. When the overcurrent fault is cleared, the overcurrent protection signal is reset by the overcurrent protection reset signal to reopen the power output channel. The level maintenance circuit includes an NPN transistor, a PNP transistor, a first NMOS transistor, and a second NMOS transistor. The output terminal of the comparator circuit is connected to the base of the NPN transistor, the emitter of the PNP transistor, and the gate of the second NMOS transistor, respectively. The emitter of the NPN transistor is grounded. The collector of the NPN transistor is connected to the base of the PNP transistor through a resistor. The collector of the PNP transistor is connected to the power supply VCC through a resistor. The emitter of the PNP transistor is also connected to the source and gate of the first NMOS transistor. The drain of the first NMOS transistor is connected to the PROTECT signal output terminal. The source of the second NMOS transistor is grounded. The drain of the second NMOS transistor is connected to the base of the NPN transistor. The gate of the second NMOS transistor is connected to the overcurrent protection reset signal.

2. The overcurrent protection circuit for the airborne computer product according to claim 1, characterized in that, The power switch and isolation circuit include an isolation diode and a BTS6163D chip connected in series. The switch is driven by a TTL level signal to activate the input V of the BTS6163D chip. IN Grounded, drive current is 2.4mA; The power output channel is switched on and off by floating or grounding the enable pin of the BTS6163D chip.

3. The overcurrent protection circuit for the airborne computer product according to claim 1, characterized in that, The current sampling and detection circuit is configured as a Hall current sensor.

4. The overcurrent protection circuit for the airborne computer product according to claim 3, characterized in that, The Hall current sensor is model ACS712ELCTR-20A-T, and the linear relationship between the output voltage of the Hall current sensor and the measured current is as follows: ， Among them, I SENSE For the measured current, A V V is the proportionality coefficient of current to voltage. OUT This is the output voltage of the Hall current sensor.

5. The overcurrent protection circuit for an airborne computer product according to claim 1, characterized in that, The comparator circuit includes an operational amplifier LM193.

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