An RC-IGBT structure with double field stop layer and a manufacturing method thereof

Abstract

The application provides an RC-IGBT structure with double field stop layers and a manufacturing method thereof, and aims to solve the problems of voltage folding phenomenon and reduced device withstand voltage of a traditional RC-IGBT in conduction. The structure has two layers of field stop layers, namely an nFS1 layer and an nFS2 layer, on the basis of a p floating zone at the collector side. The nFS1 layer can compress the electric field and prevent the electric field from extending to the n+ short circuit zone, thereby guaranteeing the device withstand voltage. The nFS2 layer adjusts the doping concentration to control the back hole injection rate. In addition, local oxide is used for isolation, thereby reducing the process difficulty. The RC-IGBT structure has the advantages of being capable of inhibiting the voltage folding phenomenon at a smaller cell size, significantly improving the performance and reliability of a power chip, having higher withstand voltage capacity and better dynamic characteristics, and having important significance for promoting the development and application of power electronic technology.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of semiconductor device transistors, and specifically discloses an RC-IGBT structure with double field stop layers and a manufacturing method thereof. BACKGROUND

[0002] As a core device in the field of power electronics, IGBT (Insulated Gate Bipolar Transistor) has the advantages of high input impedance, small driving power, fast switching speed, high working frequency, etc., and is widely used in intelligent power grids, electric vehicles, wind power generation, variable frequency home appliances, etc. However, IGBT is a unidirectional device and does not have reverse conduction capability itself. In most IGBT application circuits, a diode (freewheeling diode) needs to be connected in anti-parallel for protection. This approach not only increases the cost of the device, but also makes the IGBT module have high parasitic inductance and low integration.

[0003] To reduce costs and improve the power density of chips, RC-IGBT (Reverse Conducting Insulated Gate Bipolar Transistor) has emerged, which integrates IGBT and diode on the same silicon wafer. When RC-IGBT is in forward conduction, its working mode will change from unipolar mode to bipolar mode as the current increases. This transition is manifested as a clear voltage foldback phenomenon on the transfer curve. The transition between unipolar and bipolar modes during conduction will introduce electromagnetic oscillation in the circuit system, which seriously affects the system stability and is not conducive to the parallel use of devices. Therefore, how to suppress the inherent voltage foldback phenomenon at the initial stage of RC-IGBT conduction has become the focus of industry research.

[0004] The existing RC-IGBT structure mainly tries to solve the above problems in two ways:

[0005] One is the traditional RC-IGBT structure, which increases the lateral size of the p+ collector region to increase the short-circuit resistance of the collector side, so that the device enters the bipolar mode at a smaller current, thereby suppressing the voltage foldback phenomenon. However, this method will lead to an increase in chip area and uneven current distribution within the chip, which is not conducive to the performance optimization of the chip.

[0006] The second is the RC-IGBT structure with p floating region on the collector side. The structure introduces p floating region above the n+ short circuit region on the collector side, hinders the flow of electrons to the n+ short circuit region, and makes the electrons accumulate on the collector side, so that the device enters the bipolar mode under small current, and then suppresses the voltage foldback phenomenon. However, the back N-buffer region of the structure is local, and only the electric field can be blocked to the p+ collector. There is no field stop layer above the n+ short circuit region and the p floating region, and the electric field is easy to expand to the n+ short circuit region when blocking, which easily leads to the breakdown of the n+ short circuit region / p floating region junction in advance, so that the voltage resistance of the device is reduced. In addition, due to the existence of the local N-buffer region, the back electric field distribution is not uniform, which further affects the reliability of the device. SUMMARY

[0007] To solve the above problems, the present application provides an RC-IGBT structure with double field stop layers and a preparation method thereof, which can not only suppress the voltage foldback phenomenon, but also significantly improve the performance of the power chip and the reliability of the device by the design of the double field stop layers.

[0008] The specific technical scheme of the present application is as follows:

[0009] A manufacturing method of an RC-IGBT structure with double field stop layers, comprising the following steps:

[0010] 1. Providing a substrate: providing a semiconductor substrate with a second conductive type as a drift region of the RC-IGBT structure;

[0011] 2. Forming a first field stop layer: forming a first field stop layer on the first surface of the drift region, the first field stop layer having a second conductive type and a doping concentration higher than the drift region;

[0012] 3. Forming a first trench and a second trench: forming at least one first trench and at least one second trench on the first surface of the drift region, the first trench and the second trench penetrating the first field stop layer and extending into the drift region;

[0013] 4. Forming a trench gate: forming a first trench gate in the first trench and a second trench gate in the second trench;

[0014] 5. Forming a second field stop layer: forming a second field stop layer on the second surface of the drift region, the second surface being opposite to the first surface, the second field stop layer having a second conductive type and a doping concentration higher than the drift region; the second field stop layer and the first field stop layer jointly form a double field stop layer structure to effectively block the expansion of the electric field and improve the voltage resistance performance of the device;

[0015] 6. Forming base region, emitter region and anode region: forming a base region with a first conductivity type on the first field stop layer, forming an emitter region with a second conductivity type on the base region, and making the emitter region contact with the first trench gate; at the same time, part or all of the base region as an anode region;

[0016] 7. Forming a pillar region: forming a pillar region with a second conductivity type on the first field stop layer, the doping concentration of the pillar region is less than that of the emitter region, and the pillar region forms a Schottky contact with the anode region;

[0017] 8. Forming electrodes: forming a first electrode on the front surface of the RC-IGBT structure, the first electrode is electrically connected with the emitter region, the pillar region and the base region respectively; forming a second electrode on the back surface of the RC-IGBT structure, the second electrode is electrically connected with the drift region and the second field stop layer.

[0018] After step 5, it further includes a step of forming a buffer layer on the second field stop layer, the buffer layer has a second conductivity type, and the doping concentration is between that of the drift region and the second field stop layer; the buffer layer is used as a field stop layer when the RC-IGBT device is in the process of forward voltage resistance, further optimizing the electric field distribution.

[0019] The doping concentrations of the first field stop layer and the second field stop layer are independently adjustable to adapt to different application requirements, optimize the voltage resistance performance and dynamic characteristics of the device.

[0020] The formation of the trench gate includes depositing a gate oxide layer in the trench and filling a heavily doped n-type polysilicon to form a low-resistance conductive channel, thereby improving the switching speed of the device.

[0021] An RC-IGBT structure with double field stop layers made by the above manufacturing method.

[0022] The RC-IGBT structure with double field stop layers includes the following structure:

[0023] The semiconductor substrate as a drift region; the first field stop layer formed on the first surface of the drift region; the first trench and the second trench formed on the first surface of the drift region, and the first trench gate and the second trench gate located therein; the second field stop layer formed on the second surface of the drift region; the base region, the emitter region and the pillar region formed on the first field stop layer; the first electrode and the second electrode formed on the front surface and the back surface of the RC-IGBT structure respectively.

[0024] It further includes a metallization layer formed between the second field stop layer and the second electrode, the metallization layer is used to enhance the electrical connection between the second electrode and the second field stop layer, reduce the contact resistance, improve the thermal stability and current carrying capacity of the device.

[0025] The application provides an RC-IGBT structure with double field stop layers and a manufacturing method thereof.

[0026] Significantly improve the voltage resistance performance of the device: by introducing the double field stop layer structure, the application effectively blocks the expansion of the electric field inside the device, making the electric field distribution more uniform, thereby significantly improving the voltage resistance capability of the device. This is particularly important for high-voltage and high-power applications, and can ensure that the device still maintains stable performance under extreme working conditions.

[0027] Optimize current distribution and reduce dynamic loss: the trench gate and column region structure design in the application not only enhances the current conduction capability of the device, but also effectively suppresses the voltage foldback phenomenon by optimizing the current path, thereby reducing the dynamic loss of the device during switching. This is of great significance for improving the energy efficiency of power electronic equipment and reducing energy waste.

[0028] Improve the reliability and stability of the device: the double field stop layer structure and the introduction of the buffer layer enhance the electric field control capability of the device during forward voltage resistance, reduce the injection of hot carriers, and thereby improve the reliability and stability of the device. In addition, the addition of the metallization layer further enhances the electrical connection between the electrode and the semiconductor layer, reduces the contact resistance, and improves the thermal stability and current carrying capacity of the device.

[0029] Strong adaptability and wide application range: the RC-IGBT structure and the manufacturing method thereof can adapt to different application requirements by adjusting the doping concentration of the first field stop layer and the second field stop layer, and can optimize the voltage resistance performance and dynamic characteristics of the device. Therefore, the structure has a wide application prospect in motor drivers, power converters, renewable energy inverters, electric vehicle charging systems and other power electronic equipment.

[0030] In summary, the RC-IGBT structure with double field stop layers and the manufacturing method thereof not only significantly improve the voltage resistance performance and reliability of the device, but also reduce the dynamic loss, enhance the adaptability and application range, and have important significance for promoting the development and application of power electronic technology. BRIEF DESCRIPTION OF DRAWINGS

[0031] Figure 1 It is a schematic diagram of an n-type zone melting single crystal silicon wafer.

[0032] Figure 2 It is a schematic diagram of the structure after forming the nCS layer.

[0033] Figure 3 It is a schematic diagram of the structure after digging the trench and filling the polysilicon.

[0034] Figure 4 Structure schematic diagram after forming Pbody region.

[0035] Figure 5 Structure schematic diagram after forming n+ emitter region.

[0036] Figure 6 Structure schematic diagram after depositing interlayer dielectric layer and forming p+ ohmic contact.

[0037] Figure 7 Structure schematic diagram after sputtering metal layer and forming emitter and trench gate.

[0038] Figure 8 Structure schematic diagram after forming first layer field stop layer (nFS1 region).

[0039] Figure 9 Structure schematic diagram after forming second layer field stop layer (nFS2 region).

[0040] Figure 10 Structure schematic diagram after forming p+ collector in nFS2 region.

[0041] Figure 11 Structure schematic diagram after forming p floating region on the right side of nFS2 region.

[0042] Figure 12 Structure schematic diagram after forming n+ short region under p floating region.

[0043] Figure 13 Structure schematic diagram after depositing oxide on the back side and etching to form local oxide isolation.

[0044] Figure 14 Structure schematic diagram of complete structure after evaporating metal on the back side and forming collector.

[0045] Figure 15 Structure schematic diagram of traditional RC-IGBT structure.

[0046] Figure 16 Structure schematic diagram of RC-IGBT structure with p floating region on the collector side. DETAILED DESCRIPTION

[0047] The technical solutions of the present application will be described in detail below in combination with the drawings and examples. EXAMPLE

[0048] The present application proposes a manufacturing method of RC-IGBT structure with double field stop layers, and the specific implementation is as follows:

[0049] First, as shown in FIG. 1, a substrate 1 is prepared, and a p-type substrate is used in this embodiment. Figure 1As shown, n-type zone-melted single crystal silicon wafer is chosen as the substrate. Then, a series of front-end process flows are performed.

[0050] Step 1: As shown, phosphorus implantation is performed on the front side of the silicon wafer, and nCS layer is formed by high-temperature annealing. This layer serves as the channel stop layer, which helps control the subsequent process. Figure 2

[0051] Step 2: As shown, trenches are dug, and gate oxide layers are grown by thermal oxidation in the trenches, followed by filling of heavily doped n-type polysilicon. These trenches will form the gate structure of the device. Figure 3

[0052] Step 3: As shown, boron implantation is performed, and Pbody region is formed by high-temperature annealing. This region is a key part of the device, which helps control the conductivity of the channel region. Figure 4

[0053] Step 4: As shown, phosphorus implantation is performed to form n+ emitter region. This region will serve as the emitter of the device, responsible for injecting electrons into the channel region. Figure 5

[0054] Step 5: As shown, interlayer dielectric layer is deposited, and hole etching is performed on the dielectric layer, followed by boron implantation to form p+ ohmic contact. This helps achieve good electrical connection. Figure 6

[0055] Step 6: As shown, metal layer is sputtered, and n+ emitter region is short-circuited with the right two trenches by metal to form the emitter Emitter, and the left trench is connected with the gate to form the trench gate G. Then, a passivation layer is deposited on the front side to protect the device. Figure 7

[0056] Next, back-end process flow is performed:

[0057] Step 7: As shown, back-side process is performed, and first layer of field stop layer, i.e., nFS1 region, is formed by hydrogen implantation. This layer helps block the electric field from extending to the n+ short-circuit region, thereby improving the voltage withstand capability of the device. Figure 8

[0058] Step 8: As shown, second layer of field stop layer, i.e., nFS2 region, is formed by local phosphorus implantation. By adjusting the doping concentration of this layer, the back-side hole injection rate can be more flexibly controlled. Figure 9

[0059] Step 9: As shown, boron implantation is performed in the nFS2 region to form p+ collector. This region will serve as one of the collectors of the device, responsible for collecting the holes injected from the drift region. Figure 10

[0060] Step 10: As​​​​​​​​​Figure 11 As shown, boron implantation is performed on the right side of the nFS2 region using a reverse doping process to form a p floating region. This region helps to block the flow of electrons to the n+ short circuit region, causing the electrons to accumulate on the collector side, thereby entering the bipolar mode in advance.

[0061] Step eleven: as shown in Figure 12 Phosphorus implantation is performed below the p floating region to form an n+ short circuit region. This region will serve as another key part of the device, together with the p+ collector to form the collector structure.

[0062] Step twelve: as shown in Figure 13 Deposition of oxide on the back and etching to form local oxide isolation. This helps to reduce the process difficulty and improve the reliability of the device.

[0063] Step thirteen: as shown in Figure 14 Backside metal evaporation, and shorting the p+ collector and n+ short circuit region with metal to form the collector. At this point, the chip manufacturing process of the present application is completed.

[0064] Compared with the traditional RC-IGBT structure, the RC-IGBT structure with double field stop layer proposed in the present application has significant beneficial effects. First, by introducing the double field stop layer structure, the expansion of the electric field inside the device is effectively blocked, making the electric field distribution more uniform, thereby significantly improving the withstand voltage capability of the device. Second, the design of the double field stop layer can also more flexibly regulate the back hole injection rate, thereby optimizing the current distribution and dynamic characteristics of the device. In addition, the introduction of local oxide isolation reduces the process difficulty and improves the reliability of the device. Therefore, the RC-IGBT structure proposed in the present application not only has higher withstand voltage performance and better dynamic characteristics, but also has stronger adaptability and application range, which is of great significance for promoting the development and application of power electronics technology.

Claims

1. A method of manufacturing an RC-IGBT structure having a double field stop layer, characterized by, comprising the steps of providing a substrate to provide a semiconductor substrate with a second conductivity type as a drift region of the RC-IGBT structure; forming a first field stop layer to form a first field stop layer on a first surface of the drift region, the first field stop layer having the second conductivity type and a higher doping concentration than the drift region; forming first and second trenches to form at least one first trench and at least one second trench on the first surface of the drift region, the first and second trenches penetrating the first field stop layer and extending into the drift region; forming trench gates to form a first trench gate in the first trench and a second trench gate in the second trench; forming a second field stop layer to form a second field stop layer on a second surface of the drift region, the second surface being opposite to the first surface, the second field stop layer having the second conductivity type and a higher doping concentration than the drift region; the second field stop layer and the first field stop layer jointly form a double field stop layer structure to effectively block the electric field expansion and improve the voltage withstanding performance of the device; forming a base region, an emitter region and an anode region to form a base region having a first conductivity type on the first field stop layer, form an emitter region having a second conductivity type on the base region, and make the emitter region contact the first trench gate; at the same time, part or all of the base region serves as an anode region; forming a pillar region to form a pillar region having the second conductivity type on the first field stop layer, the doping concentration of the pillar region being lower than that of the emitter region, and the pillar region forms a Schottky contact with the anode region; forming electrodes to form a first electrode on the front surface of the RC-IGBT structure, the first electrode being electrically connected with the emitter region, the pillar region and the base region respectively; form a second electrode on the back surface of the RC-IGBT structure, the second electrode being electrically connected with the drift region and the second field stop layer.

2. The method of manufacturing an RC-IGBT structure with double field stop layer according to claim 1, characterized in that, After step 5, further comprising the step of forming a buffer layer on the second field stop layer, the buffer layer having the second conductivity type and a doping concentration between that of the drift region and the second field stop layer; the buffer layer is used as a field stop layer when the RC-IGBT device is in the process of withstanding forward voltage, further optimizing the electric field distribution.

3. The method of manufacturing an RC-IGBT structure with double field stop layer according to claim 1 or 2, characterized in that, The doping concentrations of the first field stop layer and the second field stop layer are independently adjustable to adapt to different application requirements and optimize the voltage withstanding performance and dynamic characteristics of the device.

4. The method of manufacturing an RC-IGBT structure with double field stop layer according to claim 1, characterized in that, The formation of the trench gate includes depositing a gate oxide layer in the trench and filling heavily doped n-type polysilicon to form a low-resistance conductive channel, thereby improving the switching speed of the device.

5. An RC-IGBT structure with a double field stop layer manufactured by the manufacturing method of any one of claims 1 to 4.

6. The RC-IGBT structure with double field stop layer according to claim 5, characterized in that, comprising the following structures a semiconductor substrate as a drift region; a first field stop layer formed on a first surface of the drift region; first and second trenches formed on the first surface of the drift region, and first and second trench gates located therein; a second field stop layer formed on a second surface of the drift region; a base region, an emitter region and a pillar region formed on the first field stop layer; a first electrode and a second electrode formed on the front surface and the back surface of the RC-IGBT structure respectively.

7. The RC-IGBT structure with double field stop layers according to claim 6, wherein, a metallization layer is further included formed between the second field stop layer and the second electrode, the metallization layer is used to enhance the electrical connection between the second electrode and the second field stop layer, reduce the contact resistance, improve the thermal stability and current carrying capacity of the device.

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