A back-contact battery and a photovoltaic module

Abstract

The present invention discloses a back-contact battery and a photovoltaic module, relating to the field of photovoltaic technology, so as to enable the first dielectric passivation layer to have a high field passivation and chemical passivation effect on the first doped semiconductor part, while reducing the field passivation influence of the second dielectric passivation layer on the second doped semiconductor part. The back-contact battery includes a semiconductor substrate, a first doped semiconductor part, a second doped semiconductor part, a first dielectric passivation layer, and a second dielectric passivation layer. Both the first dielectric passivation layer and the second dielectric passivation layer include a first sub-passivation layer having a field passivation function. The conductive type of the fixed charges of the first doped semiconductor part is opposite to that of the first sub-dielectric layer. The thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the first sub-passivation layer included in the second dielectric passivation layer. Both the first dielectric passivation layer and the second dielectric passivation layer further include a second sub-passivation layer having a chemical passivation function.

Description

[0001] This application claims the priority of a Chinese patent with an application number of 202411278194.1 and an invention title of "A Back-Contact Battery and a Photovoltaic Module", which was filed with the Chinese Patent Office on September 12, 2024. The entire content thereof is incorporated herein by reference. Technical Field

[0002] The present invention relates to the field of photovoltaic technology, and particularly to a back-contact battery and a photovoltaic module. Background Art

[0003] A solar cell is a device capable of converting solar light energy into electrical energy. Specifically, when the solar cell is in a working state, sunlight shines on the semiconductor p-n junction of the solar cell, forming new hole-electron pairs. Under the action of the built-in electric field in the p-n junction, the photo-generated holes flow to the p region, and the photo-generated electrons flow to the n region. After the circuit is connected, an electric current can be generated. Among them, a back-contact battery is a solar cell in which both the positive electrode and the negative electrode are located on the back surface of the battery. Compared with a double-sided contact solar cell, the front surface of the back-contact battery is not blocked by metal electrodes, so that the light-receiving side of the back-contact battery has a higher light utilization rate. Therefore, the back-contact battery has a higher short-circuit current and a higher photoelectric conversion efficiency, which is one of the technical directions for realizing high-efficiency crystalline silicon batteries. In addition, the above-mentioned back-contact battery may include a surface passivation layer having both field passivation and chemical passivation functions to improve the passivation effect on the side of the back-contact battery having the surface passivation layer.

[0004] However, for the existing back-contact battery including the above-mentioned surface passivation layer having both field passivation and chemical passivation functions, the surface passivation layer cannot simultaneously meet the passivation requirements of the P region and the N region, resulting in poor working performance of the battery. Summary of the Invention

[0005] The purpose of the present invention is to provide a back-contact battery and a photovoltaic module, which are used to reduce the influence of the second dielectric passivation layer on the field passivation of the second doped semiconductor part while the first dielectric passivation layer has a high field passivation and chemical passivation effect on the first doped semiconductor part according to the different conduction types of the first doped semiconductor part and the second doped semiconductor part, and improve the working efficiency of the back-contact battery.

[0006] To achieve the above object, in a first aspect, the present invention provides a back-contact battery, which includes: a semiconductor substrate, a first doped semiconductor portion, a second doped semiconductor portion, a first dielectric passivation layer, and a second dielectric passivation layer. The conduction types of the first doped semiconductor portion and the second doped semiconductor portion are opposite. Both the first dielectric passivation layer and the second dielectric passivation layer include a first sub-passivation layer having a field passivation function. The conduction type of the first doped semiconductor portion is opposite to the conduction type of the fixed charges of the first sub-passivation layer. Among them, the semiconductor substrate has opposite first and second surfaces. Along the direction parallel to the first surface, the first doped semiconductor portion and the second doped semiconductor portion are alternately distributed on the first surface. The first dielectric passivation layer covers the side of the first doped semiconductor portion facing away from the semiconductor substrate, and the second dielectric passivation layer covers the side of the second doped semiconductor portion facing away from the semiconductor substrate. The thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the first sub-passivation layer included in the second dielectric passivation layer. The above-mentioned first dielectric passivation layer and second dielectric passivation layer also both include a second sub-passivation layer having a chemical passivation function. The second sub-passivation layer is provided on the side of the first sub-passivation layer facing away from the semiconductor substrate. The material of the second sub-passivation layer included in the first dielectric passivation layer is different from the material of the first sub-passivation layer included in the first dielectric passivation layer. The material of the second sub-passivation layer included in the second dielectric passivation layer is different from the material of the first sub-passivation layer included in the second dielectric passivation layer.

[0007] In the case of adopting the above technical solution, the conduction types of the first doped semiconductor portion and the second doped semiconductor portion are opposite, and the conduction type of the first doped semiconductor is opposite to the conduction type of the fixed charges of the first sub-passivation layer covering the side of the first doped semiconductor portion facing away from the semiconductor substrate and the first sub-passivation layer covering the side of the second doped semiconductor portion facing away from the semiconductor substrate. Moreover, the first sub-passivation layer included in the first dielectric passivation layer and the second dielectric passivation layer not only has a chemical passivation function but also has a field passivation function. Furthermore, the first sub-passivation layer included in the first dielectric passivation layer induces charges opposite to the conduction type of the first doped semiconductor portion on the side close to the first doped semiconductor portion, while the side of the first sub-passivation layer included in the first dielectric passivation layer facing away from the first doped semiconductor portion has charges of the same conduction type as the first doped semiconductor portion, thereby forming an electric field at the first sub-passivation layer included in the first dielectric passivation layer. Since the conduction type of the fixed charges of the first sub-passivation layer included in the first dielectric passivation layer is opposite to the conduction type of the dopant in the first doped semiconductor portion, this electric field can shield minority carriers and enhance the carrier collection ability and carrier separation ability of the first doped semiconductor portion. On the contrary, the electric field formed in the first sub-passivation layer included in the second dielectric passivation layer forms a reverse field at the second doped semiconductor portion with the same conduction type as its own fixed charges. At this time, the field passivation function of the second dielectric passivation layer weakens the electric field of the second doped semiconductor portion, which will affect the carrier collection ability of the second doped semiconductor portion. Secondly, the field passivation effect of the first sub-passivation layer is proportional to its own thickness. Based on this, when the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the first sub-passivation layer included in the second dielectric passivation layer, the thickness of the first sub-passivation layer provided on the side of the second doped semiconductor portion facing away from the semiconductor substrate is smaller. At this time, the first sub-passivation layer with a smaller thickness included in the second dielectric passivation layer can weaken its own effect on the reverse field of the second doped semiconductor portion, which is beneficial to enabling the second doped semiconductor portion to have a higher carrier collection efficiency. At the same time, the presence of the first sub-passivation layer and the second sub-passivation layer included in the second dielectric passivation layer can chemically passivate the surface of the second doped semiconductor portion and reduce the surface defects of the second doped semiconductor portion; in addition, the thickness of the first sub-passivation layer provided on the side of the first doped semiconductor portion facing away from the semiconductor substrate is larger. At this time, the first sub-passivation layer with a larger thickness has a higher field passivation effect on the first doped semiconductor portion in the same direction, enhancing the carrier collection ability of the first doped semiconductor portion and reducing the surface defects of the first doped semiconductor portion.It can be seen that in the back-contact battery provided by the present invention, due to the different conduction types of the first doped semiconductor portion and the second doped semiconductor portion, while the first dielectric passivation layer has a high field passivation and chemical passivation effect on the first doped semiconductor portion, it reduces the influence of the second dielectric passivation layer on the field passivation of the second doped semiconductor portion, and simultaneously meets the passivation requirements of the doped semiconductor portions of two different conduction types, thereby facilitating the reduction of the carrier recombination rate and the improvement of the carrier separation ability in the portions corresponding to the first doped semiconductor portion and the second doped semiconductor portion on the backlight side of the back-contact battery, and improving the working performance of the back-contact battery.

[0008] As a possible implementation, under the same test conditions, among the portions on the backlight side of the back-contact battery, the PL brightness value corresponding to the portion corresponding to the second doped semiconductor portion is greater than the PL brightness value corresponding to the portion corresponding to the first doped semiconductor portion.

[0009] In the case of adopting the above technical solution, since the PL brightness value refers to the light brightness emitted by the battery under illumination conditions, the magnitude of this PL brightness value is related to the passivation performance of the tested portion, and characterizes the comprehensive passivation effect of all the film layers at the position corresponding to the first doped semiconductor portion or the position corresponding to the second doped semiconductor portion, such as including the comprehensive passivation effect of the tunneling passivation layer, the doped semiconductor portion, and the dielectric passivation layer. Specifically, under the same test conditions, the larger the PL brightness value, the higher the passivation performance of this portion, and the smaller the PL brightness value, the lower the passivation performance of this portion. Based on this, when among the portions on the backlight side of the back-contact battery, the PL brightness value corresponding to the portion corresponding to the second doped semiconductor portion is greater than the PL brightness value corresponding to the portion corresponding to the first doped semiconductor portion, it characterizes the comprehensive passivation effect of all the film layers at the position corresponding to the first doped semiconductor portion or the position corresponding to the second doped semiconductor portion, such as including the comprehensive passivation effect of the tunneling passivation layer, the doped semiconductor portion, and the dielectric passivation layer. The passivation performance of the portion corresponding to the second doped semiconductor portion on the backlight side of the back-contact battery provided by the present invention is higher than that of the portion corresponding to the first doped semiconductor portion. At the same time, the PL brightness values of the two regions can also indirectly reflect the chemical passivation effect, that is, the chemical passivation effect of the second dielectric passivation layer is greater than that of the first dielectric passivation layer. By chemical passivation, the comprehensive passivation effect corresponding to the second doped semiconductor portion is enhanced, and the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the back-contact battery is reduced, and the passivation requirements of the doped semiconductor portions of two different conduction types are simultaneously met, thereby facilitating the reduction of the carrier recombination rate and the improvement of the carrier separation ability in the portions corresponding to the first doped semiconductor portion and the second doped semiconductor portion on the backlight side of the back-contact battery, and improving the working performance of the back-contact battery.

[0010] As a possible implementation solution, the thickness of the above-mentioned first sub-passivation layer is greater than or equal to 2 nm and less than or equal to 15 nm. In this case, when the thickness of the first sub-passivation layer is within the above range, it can prevent the passivation effect of the first sub-passivation layer itself from being low due to its too small thickness, and ensure that the carrier recombination rate on the side of the first doped semiconductor part and the second doped semiconductor part away from the semiconductor substrate is low. In addition, it can also prevent the carrier collection efficiency of the second doped semiconductor part from being greatly affected due to the too large thickness of the first sub-passivation layer, and ensure that the back-contact battery has a high conversion efficiency.

[0011] As a possible implementation solution, the thickness of the first sub-passivation layer included in the above-mentioned first dielectric passivation layer is greater than or equal to 4 nm and less than or equal to 15 nm. In this case, the thickness of the first sub-passivation layer included in the first dielectric passivation layer is relatively large, which can further enhance the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer on the first doped semiconductor part, and is conducive to further reducing the degree of difference in the passivation effect between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back-contact battery, and further improving the working performance of the back-contact battery.

[0012] As a possible implementation solution, the thickness of the first sub-passivation layer included in the above-mentioned second dielectric passivation layer is greater than or equal to 2 nm and less than or equal to 8 nm.

[0013] In the case of adopting the above technical solution, when the thickness of the first sub-passivation layer included in the second dielectric passivation layer is within the above range, it is conducive to preventing the overall passivation effect of the second dielectric passivation layer on the second doped semiconductor part from being low due to the too small thickness of the first sub-passivation layer included in the second dielectric passivation layer, and ensuring that there are fewer surface defects on the side of the second doped semiconductor part away from the semiconductor substrate; in addition, it is also conducive to preventing the electric field weakening degree of the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer on the second doped semiconductor part from being high due to the too large thickness of the first sub-passivation layer included in the second dielectric passivation layer, and ensuring that the second doped semiconductor part has a high carrier collection efficiency.

[0014] As a possible implementation solution, the thickness of the second sub-passivation layer included in the above-mentioned first dielectric passivation layer is less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer.

[0015] In the case of adopting the above technical solution, the second sub-passivation layer included in the second dielectric passivation layer with a larger thickness (relative to the second sub-passivation layer included in the first dielectric passivation layer) is disposed on the first sub-passivation layer included in the second dielectric passivation layer with a smaller thickness (relative to the first sub-passivation layer included in the first dielectric passivation layer), which is conducive to making up for the weakening of the field passivation effect on the side of the second doped semiconductor portion facing away from the semiconductor substrate by the second sub-passivation layer included in the second dielectric passivation layer with a larger thickness, further reducing the number of surface defects on the side of the second doped semiconductor portion facing away from the semiconductor substrate, and being conducive to reducing the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the back contact battery, thereby improving the working performance of the back contact battery.

[0016] As a possible implementation solution, the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer is greater than or equal to 0.5 nm and less than or equal to 5 nm.

[0017] In the case of adopting the above technical solution, when the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer is within the above range, it can prevent the chemical passivation effects of the second sub-passivation layer included in the second dielectric passivation layer and the second sub-passivation layer included in the first dielectric passivation layer from being substantially the same due to the small difference, ensuring that the difference in chemical passivation effect between the portions corresponding to the first doped semiconductor portion and the second doped semiconductor portion on the backlight side can be made up by the second sub-passivation layer included in the second dielectric passivation layer. It can also prevent the passivation effect of the second sub-passivation layer included in the first dielectric passivation layer from being too low due to the too small thickness of the second sub-passivation layer included in the first dielectric passivation layer or the consumption of materials being too high due to the too large thickness of the second sub-passivation layer included in the second dielectric passivation layer, which is conducive to controlling the manufacturing cost of the battery.

[0018] As a possible implementation solution, the thickness of the second sub-passivation layer is greater than or equal to 50 nm and less than or equal to 160 nm. In this case, when the thickness of the second sub-passivation layer is within the above range, it is conducive to preventing the passivation effect of the second sub-passivation layer itself from being weak due to its small thickness, ensuring a low carrier recombination rate on the backlight side of the back contact battery, and improving the working performance of the back contact battery. In addition, it can also prevent the consumption of materials of the second sub-passivation layer itself from being large due to its large thickness, which is conducive to controlling the manufacturing cost of the back contact battery.

[0019] As a possible implementation, the thickness of the first dielectric passivation layer is less than that of the second dielectric passivation layer. In this case, since the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the second sub-passivation layer included in the second dielectric passivation layer, when the thickness of the first dielectric passivation layer is less than that of the second dielectric passivation layer, it is beneficial to make the thickness of the second sub-passivation layer included in the first dielectric passivation layer less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer. Based on this, the application principle of the beneficial effect that the thickness of the first dielectric passivation layer is less than that of the second dielectric passivation layer can refer to the application principle of the beneficial effect that the thickness of the second sub-passivation layer included in the first dielectric passivation layer is less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer described above, and will not be elaborated here.

[0020] As a possible implementation, the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1.

[0021] In the case of adopting the above technical solution, when the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1, the thickness of the first dielectric passivation layer disposed on the side of the first doped semiconductor portion away from the semiconductor substrate is substantially the same as the thickness of the second dielectric passivation layer disposed on the side of the second doped semiconductor portion away from the semiconductor substrate, which is beneficial to making the first dielectric passivation layer and the second dielectric passivation layer have substantially the same comprehensive passivation effect, thereby facilitating further reduction of the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the back contact battery.

[0022] As a possible implementation, the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is greater than or equal to 52 nm and less than or equal to 175 nm.

[0023] In the case of adopting the above technical solution, when the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is within the above range, the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is appropriate to prevent the passivation effect of the first dielectric passivation layer and / or the second dielectric passivation layer from being weak due to a small thickness value, and can also prevent the distribution density of the microstructures in the first dielectric passivation layer and / or the second dielectric passivation layer from being large or the consumption of materials from being high due to a large thickness, ensuring a high working efficiency of the back contact battery while facilitating control of the manufacturing cost of the battery.

[0024] As a possible implementation, the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1; and / or, the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer is greater than or equal to 2.0 and less than or equal to 2.2.

[0025] When the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1 under the above technical solution, the refractive indices of the first dielectric passivation layer and the second dielectric passivation layer are substantially the same, which is conducive to making the parts corresponding to the first dielectric passivation layer and the parts corresponding to the second dielectric passivation layer on the backlight side of the back-contact battery have substantially the same light refraction effect, facilitating uniform light absorption and ensuring the balance of electrons and holes. In addition, when the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer is within the above range, the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer has a high refraction effect on light, which is conducive to making more light be refracted into the semiconductor substrate through the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer, improving the bifaciality of the battery.

[0026] As a possible implementation solution, the first sub-passivation layer included in the first dielectric passivation layer is an alumina layer, and under the test conditions of an exposure time of 0.2 s and a light intensity of 1 sun, the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer facing away from the semiconductor substrate is greater than or equal to 5000, and / or the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer facing away from the semiconductor substrate is greater than or equal to 16500.

[0027] When the above technical solution is adopted, the alumina layer contains a large number of oxygen anions, which can form a relatively dense fixed negative charge at the interface between itself and the first doped semiconductor part, forming a built-in electric field that shields minority carriers, improving the carrier collection efficiency of the first doped semiconductor part and enhancing the carrier separation ability of the first doped semiconductor part. Secondly, under the test conditions of an exposure time of 0.2 s and a light intensity of 1 sun, when the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer facing away from the semiconductor substrate is greater than or equal to 5000, the presence of the first sub-passivation layer with a relatively large thickness in the first dielectric passivation layer improves the field passivation effect on the first doped semiconductor part, which is conducive to further reducing the difference in passivation effect between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back-contact battery. In addition, when the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer facing away from the semiconductor substrate is within the above range, the chemical passivation and / or field passivation of the second doped semiconductor part by the first sub-passivation layer included in the second dielectric passivation layer can minimize the influence of its own field passivation function on the carrier collection efficiency of the second doped semiconductor part, ensuring that the second doped semiconductor part has a high carrier separation ability, which is conducive to further reducing the difference in passivation effect between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back-contact battery.

[0028] As a possible implementation, when the first sub-passivation layers included in the first dielectric passivation layer and the second dielectric passivation layer are both alumina layers, the ratio of the PL luminance value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer that faces away from the semiconductor substrate to the PL luminance value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer that faces away from the semiconductor substrate is greater than or equal to 2.5 and less than or equal to 3.4. In this case, compared with the ratio of the PL luminance value corresponding to the side of the second doped semiconductor portion that faces away from the semiconductor substrate to the PL luminance value corresponding to the side of the first doped semiconductor portion that faces away from the semiconductor substrate (which is approximately greater than or equal to 3 and less than or equal to 4), when the ratio of the PL luminance value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer that faces away from the semiconductor substrate to the PL luminance value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer that faces away from the semiconductor substrate is greater than or equal to 2.5 and less than or equal to 3.4, the above ratio of the PL luminance values is smaller. That is, the presence of the first sub-passivation layers included in the first dielectric passivation layer and the second dielectric passivation layer helps to reduce the differentiation in the passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the back contact cell, while meeting the passivation requirements for the two doped semiconductor portions of different conduction types.

[0029] As a possible implementation, the surface reflectivity of the side of the first doped semiconductor portion that faces away from the semiconductor substrate is greater than the surface reflectivity of the side of the second doped semiconductor portion that faces away from the semiconductor substrate.

[0030] In the case of adopting the above technical solution, it can be understood that the surface reflectivity is inversely proportional to the specific surface area. The larger the specific surface area, the higher the surface light trapping effect and the lower the surface reflectivity. Secondly, the specific surface area is directly proportional to the surface roughness. The larger the specific surface area, the higher the surface roughness. Based on this, when the surface reflectivity of the side of the first doped semiconductor portion facing away from the semiconductor substrate is greater than the surface reflectivity of the side of the second doped semiconductor portion facing away from the semiconductor substrate, the surface roughness of the side of the first doped semiconductor portion facing away from the semiconductor substrate is smaller, and the surface roughness of the side of the second doped semiconductor portion facing away from the semiconductor substrate is larger. Under the same conditions, the film deposition thickness of the first sub-passivation layer included in the first dielectric passivation layer and the second dielectric passivation layer is inversely proportional to the roughness of the surface on which it is deposited. Therefore, when the surface roughness of the side of the first doped semiconductor portion facing away from the semiconductor substrate is small, it is beneficial to form a first sub-passivation layer with a relatively large thickness included in the first dielectric passivation layer on the side of the first doped semiconductor portion facing away from the semiconductor substrate when manufacturing the first sub-passivation layer included in the first dielectric passivation layer and the second dielectric passivation layer under the same process conditions, improving the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer, forming a first sub-passivation layer with a relatively small thickness included in the second dielectric passivation layer on the side of the second doped semiconductor portion facing away from the semiconductor substrate, reducing the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer, reducing the ratio of the PL brightness values of the portions corresponding to the first doped semiconductor portion and the portions corresponding to the second doped semiconductor portion on the backlight side of the battery, and reducing the degree of difference in passivation. Moreover, when the surface roughness of the side of the second doped semiconductor portion facing away from the semiconductor substrate is large, it is beneficial to form a first sub-passivation layer with a relatively small thickness included in the second dielectric passivation layer on the side of the second doped semiconductor portion facing away from the semiconductor substrate, reducing the influence of the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer on the carrier collection efficiency of the second doped semiconductor portion.

[0031] As a possible implementation solution, in the case where the surface reflectivity of the side of the first doped semiconductor portion facing away from the semiconductor substrate is greater than the surface reflectivity of the side of the second doped semiconductor portion facing away from the semiconductor substrate, the surface of the side of the first doped semiconductor portion facing away from the semiconductor substrate has a first texture structure, and the surface of the side of the second doped semiconductor portion facing away from the semiconductor substrate has a second texture structure. The one-dimensional size of the first texture structure is different from the one-dimensional size of the second texture structure.

[0032] In the case of adopting the above technical solution, by adjusting the one-dimensional dimensions of the first texture structure and the second texture structure, the reflectivity of the surface of the first doped semiconductor part with the first texture structure facing away from the semiconductor substrate can be made larger, and its surface roughness can be lower, which is conducive to forming a first sub-passivation layer included in the first dielectric passivation layer with a relatively large thickness on the side of the first doped semiconductor part facing away from the semiconductor substrate, improving the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer, forming a first sub-passivation layer included in the second dielectric passivation layer with a relatively small thickness on the side of the second doped semiconductor part facing away from the semiconductor substrate, reducing the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer, reducing the ratio of the PL brightness values of the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the battery, and reducing the degree of difference in passivation. Moreover, the reflectivity of the surface of the second doped semiconductor part with the second texture structure facing away from the semiconductor substrate can be made smaller, and its surface roughness can be higher, which is conducive to forming a first sub-passivation layer included in the second dielectric passivation layer with a relatively small thickness on the side of the second doped semiconductor part facing away from the semiconductor substrate, reducing the influence of the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer on the carrier collection efficiency of the second doped semiconductor part.

[0033] As a possible implementation solution, in the case where the first doped semiconductor part is a P-type doped semiconductor part and the second doped semiconductor part is an N-type doped semiconductor part, the doping concentration of the dopant in the first doped semiconductor part is less than the doping concentration of the dopant in the second doped semiconductor part, and / or the thickness of the first doped semiconductor part is greater than the thickness of the second doped semiconductor part.

[0034] In the case of adopting the above technical solution, as described above, the first sub-passivation layer included in the first dielectric passivation layer can form a superimposed field at the first doped semiconductor part, improving the carrier collection efficiency of the first doped semiconductor part. The first sub-passivation layer included in the second dielectric passivation layer will form a reverse field at the second doped semiconductor part, affecting the carrier collection efficiency of the second doped semiconductor part. Based on this, when the doping concentration of the dopant in the second doped semiconductor part is relatively large, the electric field intensity formed by the second doped semiconductor part itself is greater, which can compensate for the difference in carrier collection ability between the second doped semiconductor part and the first doped semiconductor part caused by the inhibitory effect of the reverse field formed by the field passivation function of the first sub-passivation layer included in the second dielectric passivation layer, facilitating the uniform collection of carriers of different conduction types.

[0035] As a possible implementation solution, when the first doped semiconductor portion is a P-type doped semiconductor portion and the second doped semiconductor portion is an N-type doped semiconductor portion, the thickness of the first doped semiconductor portion is greater than that of the second doped semiconductor portion. In this case, it is beneficial to increase the field passivation effect of the first doped semiconductor portion on the surface of the corresponding region of the semiconductor substrate, and the ratio of the PL brightness values of the portions corresponding to the first doped semiconductor portion and the second doped semiconductor portion on the backlight side of the battery can be further reduced, and the degree of difference in passivation can be reduced.

[0036] As a possible implementation solution, the first sub-passivation layer included in the first dielectric passivation layer includes a hydrogen-containing passivation layer, and a local region of the hydrogen-containing passivation layer has a microstructure.

[0037] In the case of adopting the above technical solution, the existence of the above microstructure indicates that the hydrogen ion content in the hydrogen-containing passivation layer is sufficient, so that the hydrogen passivation effect on the corresponding doped semiconductor layer is higher, and the surface defects of the corresponding doped semiconductor layer are further reduced. Specifically, at least one microstructure may be a bulging structure in the direction away from the semiconductor substrate. At this time, there is an accommodation space formed by bulging between the hydrogen-containing passivation layer with the microstructure and the corresponding doped semiconductor portion, and hydrogen gas generating the bulging structure exists in the accommodation space, further reducing the surface defects of the corresponding doped semiconductor layer. Secondly, the hydrogen gas in the bulging structure can continuously provide hydrogen ions during the subsequent manufacturing process or the battery working process, realizing continuous hydrogen passivation of the corresponding doped semiconductor layer, which is beneficial to improving the yield of the battery and extending the service life of the battery.

[0038] In addition, when at least one microstructure is also a microstructure with a concave or bulging middle part and a cyclone-shaped edge (at this time, the microstructure presents a morphology formed by a fluid rotating around a straight or curved axis in a certain direction), it indicates that the hydrogen content in the hydrogen-containing passivation layer is higher, so that the content of hydrogen ions that have not been used for hydrogen passivation is sufficient, and after escaping from the hydrogen-containing passivation layer, the microstructure undergoes film bursting. Based on this, when the hydrogen-containing passivation layer includes such a microstructure, the hydrogen-containing passivation layer has a higher hydrogen passivation effect on the corresponding doped semiconductor layer. And after the film bursting occurs, an uneven microstructure can be formed on the side of the hydrogen-containing passivation layer away from the semiconductor substrate, which is beneficial to reducing the reflectivity of the side of the hydrogen-containing passivation layer away from the semiconductor substrate and improving its light trapping effect.

[0039] As a possible implementation solution, when the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer both include a hydrogen-containing passivation layer, the distribution density of the microstructures in the first sub-passivation layer included in the first dielectric passivation layer is greater than the distribution density of the microstructures in the first sub-passivation layer included in the second dielectric passivation layer.

[0040] In the case of adopting the above technical solution, it can be understood that when the thickness of the hydrogen-containing passivation layer is greater and / or the compactness is higher, its own hydrogen content is higher, and it is more likely to form the above-mentioned microstructures due to hydrogen escape after being heated. Based on this, when the distribution density of the microstructures in the first sub-passivation layer included in the first dielectric passivation layer is greater than the distribution density of the microstructures in the first sub-passivation layer included in the second dielectric passivation layer, it is beneficial to make the first sub-passivation layer included in the first dielectric passivation layer have a greater thickness and / or a higher film compactness (compared with the first sub-passivation layer included in the second dielectric passivation layer) to ensure that the first sub-passivation layer included in the first dielectric passivation layer has a higher field passivation effect on the first doped semiconductor layer. At the same time, it is beneficial to make the first sub-passivation layer included in the second dielectric passivation layer have a smaller thickness and / or a lower film compactness to reduce the influence of the field passivation function of the first sub-passivation layer included in the second dielectric passivation layer on the carrier collection efficiency of the second doped semiconductor layer and ensure that the back-contact battery has a higher working efficiency.

[0041] As a possible implementation solution, the size of at least one microstructure is greater than or equal to 10 μm and less than or equal to 20 μm.

[0042] In the case of adopting the above technical solution, as described above, when the hydrogen-containing passivation layer has the above-mentioned microstructures, it indicates that the hydrogen ion content in the hydrogen-containing passivation layer is sufficient, making it have a higher chemical passivation effect on the corresponding doped semiconductor layer. The existence of the above-mentioned microstructures will also cause at least part of the hydrogen-containing passivation layer in the area of the microstructures not to be in contact with the corresponding doped semiconductor layer, that is, at least part of the hydrogen-containing passivation layer in the area of the microstructures cannot passivate the corresponding doped semiconductor layer. Based on this, when the size of the microstructures is within the above range, it can prevent the hydrogen content in the hydrogen-containing passivation layer itself from being less due to the small size; secondly, it can also prevent the effective contact area between the hydrogen-containing passivation layer and the corresponding doped semiconductor layer from being less due to the large size, ensuring that the hydrogen-containing passivation layer has a higher passivation effect on the corresponding doped semiconductor layer. In addition, it can also prevent the thickness of the first sub-passivation layer included in the second dielectric passivation layer from being larger due to the fact that the first sub-passivation layer included in the second dielectric passivation layer includes a hydrogen-containing passivation layer and the size of the microstructures in the first sub-passivation layer included in the second dielectric passivation layer is larger, which affects the carrier collection efficiency of the second doped semiconductor part.

[0043] As a possible implementation solution, the height of at least one microstructure is greater than or equal to 0.1 μm and less than or equal to 0.5 μm. The application principle of the beneficial effects in this case is similar to the application principle of the beneficial effects when the size of the microstructures is greater than or equal to 10 μm and less than or equal to 20 μm, which will not be elaborated here.

[0044] As a possible implementation solution, in the above-mentioned first doped semiconductor portion and / or second doped semiconductor portion, an uneven anti-reflection structure is formed at a position corresponding to the micro-structure. In this case, reducing the reflectivity of the side of the first doped semiconductor portion and / or second doped semiconductor portion facing away from the semiconductor substrate helps to refract more light through the first doped semiconductor portion and / or second doped semiconductor portion into the semiconductor substrate, thereby improving the bifaciality of the battery.

[0045] As a possible implementation solution, the above-mentioned back contact battery further includes a third passivation layer disposed on the second surface, and the thickness of the third passivation layer is greater than the thickness of the portion of the first sub-passivation layer included in the first dielectric passivation layer. In this case, the second surface side of the semiconductor substrate can be well chemically passivated by the third passivation layer with a higher thickness, reducing the number of surface defects and the carrier recombination rate on the second surface side.

[0046] As a possible implementation solution, the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are the same. In this case, it is beneficial to reduce the types of materials for different structures of the back contact battery, improve the compatibility between different structures, and improve the yield of the back contact battery.

[0047] As a possible implementation solution, the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are integrally continuous. In this case, the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer can be formed simultaneously based on the same material and in the same step, improving the manufacturing efficiency of the back contact battery and facilitating the reduction of the manufacturing cost of the back contact battery.

[0048] As a possible implementation solution, under the same test conditions, the ratio of the PL luminance value on the side of the first sub-passivation layer included in the second dielectric passivation layer facing away from the semiconductor substrate to the PL luminance value on the side of the first sub-passivation layer included in the first dielectric passivation layer facing away from the semiconductor substrate is PL1. And under the same test conditions, the ratio of the PL luminance value on the side of the second sub-passivation layer included in the second dielectric passivation layer facing away from the semiconductor substrate to the PL luminance value on the side of the second sub-passivation layer included in the first dielectric passivation layer facing away from the semiconductor substrate is PL2, and PL2 is less than PL1. In this case, by setting the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer with different thicknesses, the difference in passivation effects between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the back contact battery can be further reduced.

[0049] As a possible implementation solution, when the second sub-passivation layer is a silicon nitride layer, PL2 is greater than or equal to 1.62 and less than or equal to 1.9. In this case, when the second sub-passivation layer is formed, the ratio of the PL brightness values of the portions corresponding to the first doped semiconductor portion and the second doped semiconductor portion on the backlight side of the battery can be further reduced, and the degree of differentiation in passivation can be decreased.

[0050] As a possible implementation solution, the difference between the refractive index of the second sub-passivation layer included in the second dielectric passivation layer and the refractive index of the second sub-passivation layer included in the first dielectric passivation layer is greater than or equal to 0.01 and less than or equal to 0.1.

[0051] As a possible implementation solution, the material of the second sub-passivation layer included in the first dielectric passivation layer is the same as the material of the second sub-passivation layer included in the second dielectric passivation layer. In this case, it is beneficial to reduce the types of materials for different structures of the back contact battery, improve the compatibility between different structures, and improve the yield of the back contact battery.

[0052] As a possible implementation solution, the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are integrally continuous. In this case, the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer can be formed simultaneously based on the same material and in the same step, which improves the manufacturing efficiency of the back contact battery and is beneficial to reducing the manufacturing cost of the back contact battery.

[0053] In a second aspect, the present invention provides a photovoltaic module, which includes the back contact battery provided by the first aspect and its various implementation solutions.

[0054] For the beneficial effects of the second aspect and its various implementation solutions of the present invention, reference can be made to the analysis of the beneficial effects in the first aspect and its various implementation solutions, which will not be elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation to the present invention. In the drawings:

[0056] Figure 1 is a schematic longitudinal cross-sectional view of the structure of the back contact battery provided by the embodiment of the present invention Figure 1 ;

[0057] Figure 2 is a schematic longitudinal cross-sectional view of the structure of the back contact battery provided by the embodiment of the present invention Figure 2 ;

[0058] Figure 3 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 3 ;

[0059] Figure 4 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 4 ;

[0060] Figure 5 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 5 ;

[0061] Figure 6 3D image of a local area of ​​a back-contact cell on the backlight side provided by an embodiment of the present invention Figure 1 ;

[0062] Figure 7 3D image of a local area of ​​a back-contact cell on the backlight side provided by an embodiment of the present invention Figure 2 ;

[0063] Figure 8 SEM image of a local area of ​​the back-contact cell provided in an embodiment of the present invention on the back-light side Figure 1 ;

[0064] Figure 9 SEM image of a local area of ​​the back-contact cell provided in an embodiment of the present invention on the back-light side Figure 2 ;

[0065] Figure 10 A 3D scan of a local area on the backlight side of a back contact battery provided by an embodiment of the present invention;

[0066] Figure 11 A SEM image of a local area of ​​the first doped semiconductor portion in a back contact cell provided by an embodiment of the present invention, which is away from the semiconductor substrate;

[0067] Figure 12 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 6 ;

[0068] Figure 13 A PL brightness value test diagram of the finished structure of the back contact battery provided by an embodiment of the present invention on the back side;

[0069] Figure 14 A schematic diagram of the connection relationship of photovoltaic modules provided in an embodiment of the present invention.

[0070] Reference numerals: 11 is a semiconductor substrate, 12 is a first doped semiconductor portion, 13 is a second doped semiconductor portion, 14 is a first dielectric passivation layer, 15 is a second dielectric passivation layer, 16 is a first texture structure, 17 is a second texture structure, 18 is a microstructure, 19 is an antireflection structure, 20 is a third passivation layer, 21 is a first sub-passivation layer, 22 is a second sub-passivation layer, and 23 is an interface passivation layer. Detailed implementation manners

[0071] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present invention. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessarily confusing the concepts of the present invention.

[0072] Schematic diagrams of various structures according to embodiments of the present invention are shown in the accompanying drawings. These figures are not drawn to scale, where certain details are enlarged for clearer expression and certain details may be omitted. The shapes of various regions and layers shown in the figures, as well as their relative sizes and positional relationships, are merely exemplary and may deviate in practice due to manufacturing tolerances or technical limitations. Those skilled in the art can additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0073] In the context of the present invention, when a layer / component is referred to as being "on" another layer / component, the layer / component can be directly on the other layer / component, or there can be an intermediate layer / component between them. Additionally, if a layer / component is "on" another layer / component in one orientation, then when the orientation is reversed, the layer / component can be "under" the other layer / component. In order to make the technical problems, technical solutions, and beneficial effects to be solved by the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely used to explain the present invention and are not used to limit the present invention.

[0074] Furthermore, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, "a plurality" means two or more, unless otherwise specifically defined. "Several" means one or more, unless otherwise specifically defined.

[0075] In the description of the present invention, it should be noted that, unless otherwise clearly specified and defined, the terms "installation", "connection", and "coupling" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be a direct connection or an indirect connection through an intermediate medium, and it may be the communication inside two components or the interaction relationship between two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0076] A solar cell is a device that can convert the light energy of the sun into electrical energy. Specifically, when the solar cell is in a working state, sunlight shines on the semiconductor p-n junction of the solar cell, forming new hole-electron pairs. Under the action of the built-in electric field in the p-n junction, the photo-generated holes flow to the p region, and the photo-generated electrons flow to the n region. After the circuit is connected, an electric current can be generated. Among them, a solar cell in which both the positive electrode and the negative electrode are located on the back surface of the battery is a back-contact cell. Compared with a double-sided contact solar cell, the front surface of this back-contact cell has no metal electrode obstruction, so that the light-facing side of the back-contact cell has a higher light utilization rate. Therefore, the back-contact cell has a higher short-circuit current and a higher photoelectric conversion efficiency, and is one of the technical directions for realizing high-efficiency crystalline silicon cells at present. In addition, the above-mentioned back-contact cell may include a surface passivation layer having both field passivation and chemical passivation functions to improve the passivation effect on the side of the back-contact cell having the surface passivation layer.

[0077] However, for the existing back-contact cells including the above-mentioned surface passivation layer having both field passivation and chemical passivation functions, the surface passivation layer cannot simultaneously meet the passivation requirements of the P region and the N region, resulting in poor working performance of the battery. Specifically, the above-mentioned back-contact cell generally includes a semiconductor substrate, a first doped semiconductor portion, a second doped semiconductor portion, and a surface passivation layer. Among them, the first doped semiconductor portion and the second doped semiconductor portion are alternately distributed on the same surface of the semiconductor substrate, and the conduction types of the first doped semiconductor portion and the second doped semiconductor portion are opposite. The above-mentioned surface passivation layer covers the sides of the first doped semiconductor portion and the second doped semiconductor portion facing away from the semiconductor substrate. Moreover, the surface passivation layer (such as an alumina layer and / or a silicon nitride layer, etc.) not only has a chemical passivation function and can chemically passivate the sides of the first doped semiconductor portion and the second doped semiconductor portion facing away from the semiconductor substrate; moreover, the conduction type of the fixed charges of the surface passivation layer is opposite to the conduction type of the first doped semiconductor portion, so that the surface passivation layer also has a field passivation function and can perform field passivation on the first doped semiconductor portion, that is, strengthen the electric field of the first doped semiconductor portion, shield minority carriers through the electric field formed by the surface passivation layer, and accelerate the collection of majority carriers.

[0078] However, the field passivation function of the above-mentioned surface passivation layer will weaken the electric field of the second doped semiconductor part, affecting the carrier collection of the second doped semiconductor part. In the above situation, the existing back contact battery including the above-mentioned surface passivation layer does not perform a differential passivation function design for the different conduction types of the first doped semiconductor part and the second doped semiconductor part, resulting in poor carrier collection ability of the second doped semiconductor part due to the relatively large thickness of the surface passivation layer on both the first doped semiconductor part and the second doped semiconductor part, or poor passivation effect of the surface passivation layer on the first doped semiconductor part due to the relatively small thickness of the surface passivation layer on both the first doped semiconductor part and the second doped semiconductor part, which is not conducive to improving the working efficiency of the back contact battery.

[0079] To solve the above technical problems, in a first aspect, an embodiment of the present invention provides a back contact battery. As Figure 1 shown, the back contact battery includes: a semiconductor substrate 11, a first doped semiconductor part 12, a second doped semiconductor part 13, a first dielectric passivation layer 14, and a second dielectric passivation layer 15. The conduction types of the first doped semiconductor part 12 and the second doped semiconductor part 13 are opposite. Both the first dielectric passivation layer 14 and the second dielectric passivation layer 15 include a first sub-passivation layer 21 having a field passivation function and a chemical passivation function. The conduction type of the first doped semiconductor part 12 is opposite to the conduction type of the fixed charge of the first sub-passivation layer 21. Wherein, the semiconductor substrate 11 has opposite first and second surfaces. Along a direction parallel to the first surface, the first doped semiconductor part 12 and the second doped semiconductor part 13 are alternately distributed on the first surface. The first dielectric passivation layer 14 covers the side of the first doped semiconductor part 12 facing away from the semiconductor substrate 11, and the second dielectric passivation layer 15 covers the side of the second doped semiconductor part 13 facing away from the semiconductor substrate 11. The thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 is greater than the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15. As Figure 1 shown, the above-mentioned first dielectric passivation layer 14 and the second dielectric passivation layer may further include a second sub-passivation layer 22 having a chemical passivation function. The second sub-passivation layer 22 is disposed on the side of the first sub-passivation layer 21 facing away from the semiconductor substrate 11. The material of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 is different from the material of the first sub-passivation layer 21 included in the first dielectric passivation layer 14. The material of the second sub-passivation layer 22 included in the second dielectric passivation layer 15 is different from the material of the first sub-passivation layer 21 included in the second dielectric passivation layer 15.

[0080] In the case of adopting the above technical solution, the conduction types of the first doped semiconductor portion and the second doped semiconductor portion are opposite, and the conduction types of the first doped semiconductors are opposite to the conduction types of the fixed charges included in the first sub-passivation layer of the first dielectric passivation layer covering the side of the first doped semiconductor portion facing away from the semiconductor substrate and the first sub-passivation layer of the second dielectric passivation layer covering the side of the second doped semiconductor portion facing away from the semiconductor substrate, respectively. Moreover, the first sub-passivation layer included in the first dielectric passivation layer will induce charges opposite to the conduction type of the first doped semiconductor portion on the side close to the first doped semiconductor portion, while the side of the first sub-passivation layer included in the first dielectric passivation layer facing away from the first doped semiconductor portion has charges with the same conduction type as the first doped semiconductor portion, thereby forming an electric field at the first sub-passivation layer included in the first dielectric passivation layer. Since the conduction type of the fixed charges included in the first sub-passivation layer of the first dielectric passivation layer is opposite to the conduction type of the dopant in the first doped semiconductor portion, this electric field can shield minority carriers and enhance the carrier collection ability and carrier separation ability of the first doped semiconductor portion. On the contrary, the electric field formed in the first sub-passivation layer included in the second dielectric passivation layer will form a reverse field at the second doped semiconductor portion with the same conduction type as its own fixed charges. At this time, the field passivation function of the first sub-passivation layer included in the second dielectric passivation layer has a weakening effect on the electric field of the second doped semiconductor portion, which will affect the carrier collection ability of the second doped semiconductor portion. Secondly, within a certain range, the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer and the second dielectric passivation layer is proportional to its own thickness. Based on this, as Figure 1As shown, when the thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 is greater than the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15, the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15 provided on the side of the second doped semiconductor portion 13 away from the semiconductor substrate 11 is smaller. At this time, the first sub-passivation layer 21 with a smaller thickness included in the second dielectric passivation layer 15 can weaken its effect on the reverse field of the second doped semiconductor portion 13, which is conducive to enabling the second doped semiconductor portion 13 to have a higher carrier collection efficiency. At the same time, the presence of both the first sub-passivation layer 21 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 can chemically passivate the surface of the second doped semiconductor portion 13 and reduce the surface defects of the second doped semiconductor portion 13. In addition, the thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 provided on the side of the first doped semiconductor portion 12 away from the semiconductor substrate 11 is larger. At this time, the first sub-passivation layer 21 with a larger thickness included in the first dielectric passivation layer 14 has a higher field passivation effect on the forward field of the first doped semiconductor portion 12, enhances the carrier collection ability of the first doped semiconductor portion 12 and reduces the surface defects of the first doped semiconductor portion 12. It can be seen that in the back-contact battery provided by the embodiment of the present invention, for the different conduction types of the first doped semiconductor portion 12 and the second doped semiconductor portion 13, while the first dielectric passivation layer 14 has a high field passivation and chemical passivation effect on the first doped semiconductor portion 12, it reduces the weakening effect of the second dielectric passivation layer 15 on the field passivation of the second doped semiconductor portion 13, and simultaneously meets the passivation requirements of two doped semiconductor portions with different conduction types, thereby facilitating the parts corresponding to the first doped semiconductor portion 12 and the parts corresponding to the second doped semiconductor portion 13 on the backlight side of the back-contact battery to both have a low carrier recombination rate and a high carrier separation ability, and improving the working performance of the back-contact battery 。

[0081] In the actual application process, the embodiment of the present invention does not make specific limitations on the material and conduction type of the semiconductor substrate. Exemplarily, the above semiconductor substrate may be a silicon substrate. Alternatively, the above semiconductor substrate may also be a substrate of any semiconductor material such as a silicon-germanium substrate, a germanium substrate, or a gallium arsenide substrate. In addition, the above semiconductor substrate may be an N-type semiconductor substrate or a P-type semiconductor substrate

[0082] Secondly, the above semiconductor substrate includes opposite first and second surfaces. The first surface of the semiconductor substrate corresponds to the backlight side of the back-contact battery, and the second surface of the semiconductor substrate corresponds to the light-facing side of the back-contact battery. Among them, as Figure 1 and Figure 2 shown, the second surface of the semiconductor substrate 11 may be a flat surface or a textured surface. When the second surface of the semiconductor substrate 11 is a textured surface, it is beneficial to improve the light trapping effect of the second surface and the light utilization rate of the back-contact battery

[0083] Regarding the surface topography of the first surface of the semiconductor substrate, the first doped semiconductor portions and the second doped semiconductor portions are alternately distributed on the first surface of the semiconductor substrate. Moreover, the surface topography of the sides of the first doped semiconductor portions and the second doped semiconductor portions facing away from the semiconductor substrate is affected by the surface topography of the corresponding regions of the semiconductor substrate where the above two doped semiconductor layers are formed. And the surface topography of the sides of the first doped semiconductor portions and the second doped semiconductor portions facing away from the semiconductor substrate affects their own surface roughness, and further affects the thicknesses of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer respectively formed on the sides of the first doped semiconductor portions and the second doped semiconductor portions facing away from the semiconductor substrate. Based on this, the surface topography of different regions of the semiconductor substrate can be determined according to the thickness requirements of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer in the actual application scenario.

[0084] For example: the first surface of the semiconductor substrate can be a polished surface or a texture structure can be further formed on the polished surface. And, in the first surface, the side length of the tower-based texture structure formed on the surface of the region corresponding to the first doped semiconductor portion can be greater than the side length of the tower-based texture structure formed on the surface of the region corresponding to the second doped semiconductor portion; and / or, in the first surface, the height of the tower-based texture structure formed on the surface of the region corresponding to the first doped semiconductor portion can be less than the height of the tower-based texture structure formed on the surface of the region corresponding to the second doped semiconductor portion.

[0085] Another example: the first surface of the semiconductor substrate can all be a matte surface. And, in the first surface, the base side length (or diagonal length) of the pyramid-shaped matte surface structure formed on the surface of the region corresponding to the first doped semiconductor portion can be less than the base side length (or diagonal length) of the pyramid-shaped matte surface structure formed on the surface of the region corresponding to the second doped semiconductor portion; and / or, in the first surface, the height of the pyramid-shaped matte surface structure formed on the surface of the region corresponding to the first doped semiconductor portion can be less than the height of the pyramid-shaped matte surface structure formed on the surface of the region corresponding to the second doped semiconductor portion.

[0086] Another example: in the first surface, the surface of the region corresponding to the first doped semiconductor portion can be a polished surface or a texture structure can be further formed on the polished surface, and the surface of the region corresponding to the second doped semiconductor portion can be a matte surface.

[0087] It should be noted that the surface topography of each region on the first side of the semiconductor substrate may also be the same. In this case, by adjusting the formation parameters of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer, etc., the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer with different thicknesses can be obtained.

[0088] For the above-mentioned first doped semiconductor portion and second doped semiconductor portion, in terms of the conduction type, the embodiments of the present invention do not specifically limit the conduction types of the first doped semiconductor portion and the second doped semiconductor portion, as long as the conduction types of the first doped semiconductor portion and the second doped semiconductor portion are opposite, and the conduction type of the first doped semiconductor portion is opposite to the conduction type of the fixed charge in the first sub-passivation layer. Specifically, the conduction type of the first doped semiconductor portion may be N-type. At this time, the conduction type of the second doped semiconductor portion is P-type, and both the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer have fixed negative charges; or, the conduction type of the first doped semiconductor portion may also be P-type. At this time, the conduction type of the second doped semiconductor portion is N-type, and both the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer have fixed positive charges.

[0089] In terms of the distribution, as Figure 1 shown, the above-mentioned first doped semiconductor portion 12 may be disposed in a partial region on the first side of the semiconductor substrate 11. Or, as Figure 3 shown, the first doped semiconductor portion 12 may also be disposed on a partial region on the first side of the semiconductor substrate 11.

[0090] As for the second doped semiconductor portion, as Figure 2 shown, the above-mentioned second doped semiconductor portion 13 may be disposed in a partial region on the first side of the semiconductor substrate 11. Or, as Figure 3 shown, the second doped semiconductor portion 13 may also be at least disposed on a partial region on the first side of the semiconductor substrate 11.

[0091] Among them, when both the first doped semiconductor portion and the second doped semiconductor portion are doped semiconductor layers disposed on the first side, as Figure 1 and Figure 2 shown, the first doped semiconductor portion 12 and the second doped semiconductor portion 13 may be alternately and spaced apart on one side of the first side of the semiconductor substrate 11. Or, as Figure 3 shown, the second doped semiconductor portion 13 may also cover a partial region of the first doped semiconductor portion 12, and the second doped semiconductor portion 13 and the first doped semiconductor portion 12 are at least spaced apart along the thickness direction of the semiconductor substrate 11 to prevent short circuit.

[0092] In terms of materials, when at least one of the first doped semiconductor portion and the second doped semiconductor portion is a doped semiconductor layer disposed on the first surface, the material of the doped semiconductor layer may include any semiconductor material such as silicon, silicon germanium, germanium, or gallium arsenide. In terms of the arrangement form of the substances, the crystal phase of the doped semiconductor layer may be amorphous, microcrystalline, nanocrystalline, single crystal, or polycrystalline, etc. Among them, when both the first doped semiconductor portion and the second doped semiconductor portion are doped semiconductor layers disposed on the first surface, the materials of the first doped semiconductor portion and the second doped semiconductor portion may be the same or different. For example: The materials of the first doped semiconductor portion and the second doped semiconductor portion may both be doped polysilicon. Another example: The materials of the first doped semiconductor portion and the second doped semiconductor portion may both include at least one of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon. Another example: The material of the first doped semiconductor portion may be doped polysilicon, and the material of the second doped semiconductor portion may include at least one of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon.

[0093] Secondly, as Figure 1 and Figure 2 shown, when at least one of the first doped semiconductor portion 12 and the second doped semiconductor portion 13 is a doped semiconductor layer disposed on the first surface, the doped semiconductor layer may be directly disposed on the semiconductor substrate 11. Or, as Figure 3 and Figure 5 shown, the back contact battery may further include an interface passivation layer 23, and the interface passivation layer 23 is at least disposed between the doped semiconductor layer and the semiconductor substrate 11. In this case, the passivation contact structure composed of the interface passivation layer 23 and the doped semiconductor layer has excellent interface passivation effect, and can realize the selective collection of carriers, reduce the carrier recombination rate on the surface of the corresponding region in the first surface of the semiconductor substrate 11, and further improve the photoelectric conversion efficiency of the back contact battery. The material and thickness of the interface passivation layer 23 may be set according to the material of the doped semiconductor layer and actual requirements, and are not specifically limited here. For example: When the material of the doped semiconductor layer is doped polysilicon, the interface passivation layer is a tunneling passivation layer. Another example: When the material of the doped semiconductor layer includes at least one of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon, the interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon layer, or a mixed layer of the above three.

[0094] Among them, when both the first doped semiconductor portion and the second doped semiconductor portion are doped semiconductor layers disposed on the first surface, an interface passivation layer may be disposed only between the first doped semiconductor portion and the semiconductor substrate. Or, as Figure 3 shown, an interface passivation layer 23 may also be disposed only between the second doped semiconductor portion 13 and the semiconductor substrate 11. Or, as Figure 5As shown, an interface passivation layer 23 may be provided between the first doped semiconductor portion 12 and the semiconductor substrate 11, and between the second doped semiconductor portion 13 and the semiconductor substrate 11; in this case, the type of the first selective contact structure formed by the first doped semiconductor portion 12 and the interface passivation layer 23 may be the same as or different from the type of the second selective contact structure formed by the second doped semiconductor portion 13 and the interface passivation layer 23.

[0095] Optionally, the first selective contact structure and the second selective contact structure may both be tunnel passivation contact structures.

[0096] In terms of surface morphology, the surface morphology of the first doped semiconductor part away from the semiconductor substrate and the surface morphology of the second doped semiconductor part away from the semiconductor substrate will affect the surface reflectivity of the side away from the semiconductor substrate. The surface reflectivity is inversely proportional to the specific surface area. The larger the specific surface area, the higher the surface light trapping effect and the lower the surface reflectivity. Secondly, the specific surface area is proportional to the surface roughness. The larger the specific surface area, the higher the surface roughness. Moreover, under the same conditions, the deposition film thickness of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer is inversely proportional to the roughness of the deposited surface. Based on this, the surface morphology and surface reflectivity of the first doped semiconductor part away from the semiconductor substrate and the surface morphology and surface reflectivity of the second doped semiconductor part away from the semiconductor substrate can be determined according to the thickness requirements of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer in the actual application scenario, and the actual manufacturing process of the back contact battery.

[0097] Specifically, the surface reflectivity of the first doped semiconductor portion facing away from the semiconductor substrate can be equal to the surface reflectivity of the second doped semiconductor portion facing away from the semiconductor substrate; at this time, different film thicknesses can be obtained by adjusting the condition parameters when manufacturing the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer.

[0098] Alternatively, the surface reflectivity of the first doped semiconductor portion on the side facing away from the semiconductor substrate may also be greater than that of the second doped semiconductor portion on the side facing away from the semiconductor substrate. In this case, the surface roughness of the first doped semiconductor portion on the side facing away from the semiconductor substrate is small, and the surface roughness of the second doped semiconductor portion on the side facing away from the semiconductor substrate is large. As described above, under the same conditions, the film deposition thickness of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer is inversely proportional to the roughness of the surface on which it is deposited. Therefore, when the surface roughness of the first doped semiconductor portion on the side facing away from the semiconductor substrate is small, it is beneficial to form a first sub-passivation layer included in the first dielectric passivation layer with a relatively large thickness on the side of the first doped semiconductor portion facing away from the semiconductor substrate when manufacturing the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer under the same process conditions, improving the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer, and forming a first sub-passivation layer included in the second dielectric passivation layer with a relatively small thickness on the side of the second doped semiconductor portion facing away from the semiconductor substrate, reducing the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer, and narrowing the degree of differentiation in the comprehensive passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the battery. And when the surface roughness of the second doped semiconductor portion on the side facing away from the semiconductor substrate is large, it is beneficial to form a first sub-passivation layer included in the second dielectric passivation layer with a relatively small thickness on the side of the second doped semiconductor portion facing away from the semiconductor substrate, reducing the influence of the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer on the carrier collection efficiency of the second doped semiconductor portion. As for the difference in the surface reflectivity between the first doped semiconductor portion and the second doped semiconductor portion on the side facing away from the semiconductor substrate, it can be determined according to the difference in the thickness of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer, and no specific limitation is made here.

[0099] Secondly, the surface topography of the first doped semiconductor portion on the side facing away from the semiconductor substrate may be the same as the surface topography of the second doped semiconductor portion on the side facing away from the semiconductor substrate; in this case, different film thicknesses can be obtained by adjusting the condition parameters when manufacturing the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer.

[0100] Alternatively, the surface topography of the first doped semiconductor portion on the side facing away from the semiconductor substrate may also be different from the surface topography of the second doped semiconductor portion on the side facing away from the semiconductor substrate. Based on this, as Figure 6 and Figure 7As shown in the figure, on one side surface of the first doped semiconductor portion 12 facing away from the semiconductor substrate, there may be a first texture structure 16, and on one side surface of the second doped semiconductor portion 13 facing away from the semiconductor substrate, there may be a second texture structure 17. The one-dimensional dimension of the first texture structure 16 is different from that of the second texture structure 17, and / or the types of the first texture structure 16 and the second texture structure 16 are different. Among them, the types of the first texture structure 16 and the second texture structure 17 can be set according to actual needs. For example: The first texture structure and the second texture structure can be a texture structure similar to a tower base. The bottom surface of this texture structure similar to a tower base can be a regular or irregular polygon, a bottom surface with an arc-shaped contour, etc. The specific meaning of the above one-dimensional dimension can be determined according to the types of the first texture structure and the second texture structure. For example, when the first texture structure and / or the second texture structure is a texture structure similar to a tower base, the one-dimensional dimension can be the height, side length, diagonal length, or perimeter of the texture structure similar to a tower base, etc.

[0101] The following gives three examples of the surface morphologies of the first doped semiconductor portion and the second doped semiconductor portion on the side facing away from the semiconductor substrate. However, these three examples are only used to explain the present invention and are not used to limit the present invention.

[0102] Exemplarily, such as Figure 6 and Figure 7As shown, the surface of the first doped semiconductor portion 12 facing away from the semiconductor substrate may have a first tower-base-like texture structure, and the surface of the second doped semiconductor portion 13 facing away from the semiconductor substrate may have a second tower-base-like texture structure. Among them, the side length of the first tower-base-like texture structure may be greater than the side length of the second tower-base-like texture structure, and / or the height of the first tower-base-like texture structure may be less than the height of the second tower-base-like texture structure. In this case, when the side length of the first tower-base-like texture structure is greater than the side length of the second tower-base-like texture structure, and when the height of the first tower-base-like texture structure is less than the height of the second tower-base-like texture structure, the reflectivity of the surface of the first doped semiconductor portion 12 with the first tower-base-like texture structure facing away from the semiconductor substrate 11 is greater, and its surface roughness is lower, which is conducive to forming a relatively thick first sub-passivation layer 21 included in the first dielectric passivation layer on the side of the first doped semiconductor portion 12 facing away from the semiconductor substrate, improving the field passivation effect of the first sub-passivation layer 21 included in the first dielectric passivation layer, forming a relatively thin first sub-passivation layer 21 included in the second dielectric passivation layer 15 on the side of the second doped semiconductor portion 13 facing away from the semiconductor substrate, reducing the field passivation effect of the first sub-passivation layer 21 included in the second dielectric passivation layer 15, and narrowing the degree of difference in the comprehensive passivation effect between the part corresponding to the first doped semiconductor portion 12 and the part corresponding to the second doped semiconductor portion 13 on the backlight side of the battery. Moreover, the reflectivity of the surface of the second doped semiconductor portion 13 with a second tower-base-like texture structure having a smaller side length and / or a greater height facing away from the semiconductor substrate is smaller, and its surface roughness is higher, which is conducive to forming a relatively thin first sub-passivation layer 21 included in the second dielectric passivation layer 15 on the side of the second doped semiconductor portion 13 facing away from the semiconductor substrate, reducing the influence of the field passivation effect of the first sub-passivation layer 21 included in the second dielectric passivation layer 15 on the carrier collection efficiency of the second doped semiconductor portion 13. As for the side length and height of the first tower-base-like texture structure, and the side length and height of the second tower-base-like texture structure, they can be determined according to the difference in the thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer and the first sub-passivation layer 21 included in the second dielectric passivation layer 15, and no specific limitation is made here.

[0103] Exemplarily, the surface of the first doped semiconductor portion facing away from the semiconductor substrate may have a tower-base-like texture structure, and the surface of the second doped semiconductor portion facing away from the semiconductor substrate may have a pyramid-shaped textured surface.

[0104] Exemplarily, one side surface of the above-mentioned first doped semiconductor portion facing away from the semiconductor substrate may have a first pyramid-shaped matte structure, and one side surface of the second doped semiconductor portion facing away from the semiconductor substrate may have a second pyramid-shaped matte structure. Among them, the side length of the first pyramid-shaped matte structure may be less than the side length of the second pyramid-shaped matte structure, and / or the height of the first pyramid-shaped matte structure may be less than the height of the second pyramid-shaped texture structure.

[0105] As for the doping concentration and thickness of the dopant in the first doped semiconductor portion and the second doped semiconductor portion, they can be set according to actual requirements. As described above, the first sub-passivation layer included in the first dielectric passivation layer may form a superposition field at the first doped semiconductor portion, improving the carrier collection efficiency of the first doped semiconductor portion. However, the first sub-passivation layer included in the second dielectric passivation layer will form a reverse field at the second doped semiconductor portion, affecting the carrier collection efficiency of the second doped semiconductor portion. Moreover, the doping concentration and thickness of the dopant in the first doped semiconductor portion and the second doped semiconductor portion will affect the level of their own field passivation effect. Therefore, the doping concentration and thickness of the dopant in the first doped semiconductor portion and the second doped semiconductor portion can be determined according to the requirements for the level of the field passivation effect of the first doped semiconductor portion and the second doped semiconductor portion in the actual application scenario.

[0106] Exemplarily, the doping concentration of the dopant in the above-mentioned first doped semiconductor portion may be less than or equal to the doping concentration of the dopant in the second doped semiconductor portion. Among them, when the doping concentration of the dopant in the second doped semiconductor portion is relatively large, the electric field intensity formed by the second doped semiconductor portion itself is greater, which can compensate for the difference in carrier collection ability between the second doped semiconductor portion and the first doped semiconductor portion caused by the inhibitory effect of the reverse field formed by the field passivation function of the first sub-passivation layer included in the second dielectric passivation layer, facilitating the uniform collection of carriers of different conduction types.

[0107] Exemplarily, the doping concentration of the dopant in the first doped semiconductor portion may be 6E19 cm -3 to 7E19 cm -3 ; and / or, the doping concentration of the dopant in the second doped semiconductor portion may be 5E20 cm -3 to 6E20 cm -3 .

[0108] Exemplarily, such as Figure 4As shown, the thickness of the first doped semiconductor portion 12 described above may be greater than or equal to the thickness of the second doped semiconductor portion 13. Among them, when the thickness of the first doped semiconductor portion 12 is greater than the thickness of the second doped semiconductor portion 13, it is beneficial to increase the field passivation effect of the first doped semiconductor portion 12 on the surface of the corresponding region of the semiconductor substrate 11, and the ratio of the PL brightness values of the portion corresponding to the first doped semiconductor portion 12 and the portion corresponding to the second doped semiconductor portion 13 on the backlight side of the battery can be further reduced, and the degree of difference in passivation can be reduced.

[0109] Exemplarily, the thickness of the first doped semiconductor portion may be 200 nm to 400 nm; and / or, the thickness of the second doped semiconductor portion may be 100 nm to 300 nm.

[0110] For the above-mentioned first dielectric passivation layer and second dielectric passivation layer, in terms of materials, the materials of the first sub-passivation layer included in the first dielectric passivation layer and the materials of the first sub-passivation layer included in the second dielectric passivation layer can be determined according to the conduction type of the fixed charges therein. As long as the conduction type of the first doped semiconductor portion is opposite to the conduction type of the fixed charges of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer respectively, and the first sub-passivation layer has at least a field passivation function. Among them, the materials of the first sub-passivation layer included in the first dielectric passivation layer and the materials of the first sub-passivation layer included in the second dielectric passivation layer may include single-layer materials or laminated materials, as long as at least one layer has the same type of fixed charges to ensure that the fixed charge types of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are the same.

[0111] Exemplarily, the materials of the first sub-passivation layer or the second sub-passivation layer may include at least one of materials such as aluminum oxide, silicon nitride, silicon oxide, and silicon oxynitride.

[0112] Exemplarily, the first sub-passivation layer included in the first dielectric passivation layer or the second dielectric passivation layer may include: a negatively charged dielectric passivation layer such as alumina, and the second sub-passivation layer includes a stacked combination of one or more of materials such as silicon nitride, silicon oxide, silicon oxynitride, etc., as long as it satisfies that both the first dielectric passivation layer and the second dielectric passivation layer have chemical passivation and field passivation functions. Specifically, the first sub-passivation layer included in the first dielectric passivation layer and / or the first sub-passivation layer included in the second passivation layer may also be a stacked structure composed of multiple passivation layers. A certain passivation layer in this stacked structure may have both chemical passivation and field passivation functions, or some passivation layers in the stacked structure only have chemical passivation functions or only have field passivation functions. Taking the first sub-passivation layer included in the first dielectric passivation layer as an example for illustration: when the first doped semiconductor portion is a P-type doped semiconductor portion, the first sub-passivation layer included in the first dielectric passivation layer may include an alumina layer, and the second sub-passivation layer includes silicon nitride provided on the side of the alumina layer facing away from the semiconductor substrate; another example: when the first doped semiconductor portion is a P-type doped semiconductor portion, the first sub-passivation layer included in the first dielectric passivation layer may include an alumina layer, and the second sub-passivation layer includes silicon oxynitride provided on the side of the alumina layer facing away from the semiconductor substrate. Another example: when the first doped semiconductor portion is a P-type doped semiconductor portion, the first sub-passivation layer included in the first dielectric passivation layer may include an alumina layer, and the second sub-passivation layer may include a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer stacked in sequence along the cell thickness direction. Another example: when the first doped semiconductor portion is a P-type doped semiconductor portion, the first sub-passivation layer included in the first dielectric passivation layer may include a silicon oxide layer and an alumina layer stacked in sequence along the cell thickness direction, and the second sub-passivation layer may include a silicon nitride layer stacked in sequence along the cell thickness direction.

[0113] In addition, the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer may be the same or different, and different selections can be made according to the different conduction types of the first doped semiconductor portion. Specifically, when the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are the same, for example, the materials of these two first sub-passivation layers may both include materials with negative fixed charges such as aluminum oxide, or may both include at least one of materials with positive fixed charges such as silicon oxide, silicon nitride, and silicon oxynitride. Secondly, when the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are different, if the conduction type of the first doped semiconductor portion is P-type, then these two first sub-passivation layers can be of different material types and both have materials with negative fixed charges; at this time, the second sub-passivation layer, whose material can be selected from at least one of materials with positive fixed charges such as silicon oxide, silicon nitride, and silicon oxynitride, can compensate for the weakening effect of the negative fixed charge material on the field passivation effect of the second doped semiconductor portion, and at the same time can also provide better chemical passivation for the first doped semiconductor portion and the second doped semiconductor portion. If the conduction type of the first doped semiconductor portion is N-type, then these two first sub-passivation layers can be of different material types and both have materials with positive fixed charges, which can not only play a field passivation role, but also provide better chemical passivation for the first doped semiconductor portion and the second doped semiconductor portion, and at this time the material of the second sub-passivation layer can be selected from materials with negative fixed charges such as aluminum oxide, and in this case the second sub-passivation layer can compensate for the weakening effect of the positive fixed charge material on the field passivation effect of the second doped semiconductor portion.

[0114] Among them, when the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are the same, it is beneficial to reduce the types of materials for manufacturing different structures of the back-contact battery, improve the compatibility between different structures, and improve the yield of the back-contact battery.

[0115] Secondly, such as Figure 5As shown, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15 can also be integrally continuous. In this case, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15 can be formed simultaneously based on the same material and in the same step, which can improve the manufacturing efficiency of the back-contact battery and is beneficial to reducing the manufacturing cost of the back-contact battery. Of course, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15 can also be manufactured separately in different operation steps, as long as the conductivity types of the first doped semiconductor portion 12 are opposite to the conductivity types of the fixed charges of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15 respectively, and the thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 is greater than the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15.

[0116] Exemplarily, the first sub-passivation layer included in the first dielectric passivation layer and / or the first sub-passivation layer included in the second dielectric passivation layer includes a hydrogen-containing passivation layer to achieve chemical passivation of the corresponding doped semiconductor portion by means of hydrogen passivation, reducing the number of defects on the side of the corresponding doped semiconductor portion facing away from the semiconductor substrate. For example: the first sub-passivation layer included in the first dielectric passivation layer and / or the first sub-passivation layer included in the second dielectric passivation layer can include at least one of film layers such as an aluminum oxide layer, a silicon oxide layer, a silicon nitride layer, and a silicon oxynitride layer.

[0117] Specifically, in the first dielectric passivation layer and the second dielectric passivation layer, only the first sub-passivation layer included in the first dielectric passivation layer can be a hydrogen passivation layer, only the first sub-passivation layer included in the second dielectric passivation layer can be a hydrogen passivation layer, or both the first sub-passivation layers included in the first dielectric passivation layer and the second dielectric passivation layer can be hydrogen passivation layers.

[0118] Exemplarily, a local region of the hydrogen-containing passivation layer can have a microstructure. Among them, as Figure 8 and Figure 9 shown, at least one microstructure 18 can be a bulging structure in a direction away from the semiconductor substrate 11; and / or, as Figure 10As shown, at least one microstructure 18 can be a microstructure 18 with a concave or convex middle part and a cyclone-shaped edge. In this case, when at least one microstructure 18 is a convex structure in the direction away from the semiconductor substrate 11, there is a containing space surrounded by the bulge between the hydrogen-containing passivation layer with the microstructure 18 and the corresponding doped semiconductor part. There is hydrogen gas that generates the convex structure in this containing space. At this time, it indicates that the hydrogen ion content in the hydrogen-containing passivation layer is sufficient, making the hydrogen passivation effect on the corresponding doped semiconductor layer higher, and further reducing the surface defects of the corresponding doped semiconductor layer. Secondly, the hydrogen gas in the convex structure can continuously provide hydrogen ions during the subsequent manufacturing process or the battery operation process, realizing continuous hydrogen passivation of the corresponding doped semiconductor layer, which is beneficial to improving the yield of the battery and extending the service life of the battery. In addition, when at least one microstructure 18 is a microstructure 18 with a concave or convex middle part and a cyclone-shaped edge, it indicates that the hydrogen content in the hydrogen-containing passivation layer is higher, so that the content of hydrogen ions that have not been used for hydrogen passivation is sufficient, and after escaping from the hydrogen-containing passivation layer, the microstructure 18 undergoes film bursting. Based on this, when the hydrogen-containing passivation layer includes such a microstructure 18, the hydrogen-containing passivation layer has a higher hydrogen passivation effect on the corresponding doped semiconductor layer. And after the film bursting occurs, an uneven microstructure 18 can be formed on the side of the hydrogen-containing passivation layer away from the semiconductor substrate 11, which is beneficial to reducing the reflectivity of the side of the hydrogen-containing passivation layer away from the semiconductor substrate 11 and improving its light trapping effect.

[0119] Specifically, when only the first sub-passivation layer included in the first dielectric passivation layer among the first dielectric passivation layer and the second dielectric passivation layer includes a hydrogen-containing passivation layer, a local area of the first sub-passivation layer included in the first dielectric passivation layer may have the above-mentioned microstructure or may not have the above-mentioned microstructure. When only the first sub-passivation layer included in the second dielectric passivation layer among the first dielectric passivation layer and the second dielectric passivation layer includes a hydrogen-containing passivation layer, a local area of the first sub-passivation layer included in the second dielectric passivation layer may have the above-mentioned microstructure or may not have the above-mentioned microstructure. When the first sub-passivation layers included in both the first dielectric passivation layer and the second dielectric passivation layer include a hydrogen-containing passivation layer, only the first sub-passivation layer included in the first dielectric passivation layer may have the above-mentioned microstructure, or only the first sub-passivation layer included in the second dielectric passivation layer may have the above-mentioned microstructure, or the first sub-passivation layers included in both the first dielectric passivation layer and the second dielectric passivation layer may have the above-mentioned microstructure, or the first sub-passivation layers included in both the first dielectric passivation layer and the second dielectric passivation layer may not have the above-mentioned microstructure.

[0120] Exemplarily, when the first sub-passivation layer included in both the first dielectric passivation layer and the second dielectric passivation layer includes a hydrogen-containing passivation layer, in order to meet the passivation requirements of the two doping regions, the thickness of the first sub-passivation layer included in the first dielectric passivation layer is thicker than the thickness of the first sub-passivation layer included in the second dielectric passivation layer. At this time, a local region of the first sub-passivation layer included in the first dielectric passivation layer has the above-mentioned microstructure, and the first sub-passivation layer included in the second dielectric passivation layer may or may not have the above-mentioned microstructure.

[0121] It can be understood that when the thickness of the hydrogen-containing passivation layer is larger and / or the density is higher, its own hydrogen content is higher, and it is more likely to form the above-mentioned microstructure due to hydrogen escape after being heated. Therefore, the distribution density of the microstructure in itself can be determined according to whether the first sub-passivation layer included in the first dielectric passivation layer and the second dielectric passivation layer includes a hydrogen-containing passivation layer, as well as their thicknesses and densities, and no specific limitation is made here.

[0122] Exemplarily, as Figure 6 and Figure 7 shown, in the first dielectric passivation layer 14 and the second dielectric passivation layer 15, when at least a local region of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 has the microstructure 18, the distribution density of the microstructure 18 in the first sub-passivation layer 21 included in the first dielectric passivation layer 14 can be greater than the distribution density of the microstructure 18 in the first sub-passivation layer 21 included in the second dielectric passivation layer 15. In this case, it is beneficial to make the first sub-passivation layer 21 included in the first dielectric passivation layer 14 have a greater thickness and / or a higher film density (compared with the first sub-passivation layer 21 included in the second dielectric passivation layer 15) to ensure that the first sub-passivation layer 21 included in the first dielectric passivation layer 14 has a higher field passivation effect on the first doped semiconductor layer. At the same time, it is beneficial to make the first sub-passivation layer 21 included in the second dielectric passivation layer 15 have a smaller thickness and / or a lower film density to reduce the influence of the field passivation function of the first sub-passivation layer 21 included in the second dielectric passivation layer 15 on the carrier collection efficiency of the second doped semiconductor layer and ensure that the back contact battery has a higher working efficiency.

[0123] Regarding the size and height of the microstructure, since the above-mentioned microstructure exists in the hydrogen-containing passivation layer, it indicates that the hydrogen ion content in the hydrogen-containing passivation layer is sufficient, making it have a higher chemical passivation effect on the corresponding doped semiconductor layer. And the existence of the above-mentioned microstructure will also cause at least part of the region of the hydrogen-containing passivation layer at the microstructure to be unable to contact the corresponding doped semiconductor layer, that is, at least part of the region of the hydrogen-containing passivation layer at the microstructure cannot passivate the corresponding doped semiconductor layer. Therefore, it can be determined according to the requirements for the passivation effect of the hydrogen-containing passivation layer, the thickness and density of the hydrogen-containing passivation layer in the actual application scenario, and no specific limitation is made here.

[0124] Exemplarily, the size of at least one microstructure can be greater than or equal to 10 μm and less than or equal to 20 μm. For example, the size of the microstructure can be 10 μm, 11 μm, 12 μm, 14 μm, 16 μm, 18 μm, 20 μm, etc. In this case, as described above, based on this, when the size of the microstructure is within the above range, it can prevent the hydrogen content in the hydrogen-containing passivation layer itself from being small due to the small size; secondly, it can also prevent the effective contact area between the hydrogen-containing passivation layer and the corresponding doped semiconductor layer from being small due to the large size, ensuring that the hydrogen-containing passivation layer has a high passivation effect on the corresponding doped semiconductor layer. In addition, it can also prevent the thickness of the first sub-passivation layer included in the second dielectric passivation layer from being large due to the large size of the microstructure in the first sub-passivation layer included in the second dielectric passivation layer, which affects the carrier collection efficiency of the second doped semiconductor portion.

[0125] Exemplarily, the height of at least one microstructure can be greater than or equal to 0.1 μm and less than or equal to 0.5 μm. For example, the height of at least one microstructure can be 0.1 μm, 0.15 μm, 0.2 μm, 0.25 μm, 0.3 μm, 0.4 μm, 0.5 μm, etc. The application principle of the beneficial effects in this case is similar to the application principle of the beneficial effects of the size of the microstructure being greater than or equal to 10 μm and less than or equal to 20 μm described above, and will not be elaborated here.

[0126] Exemplarily, as Figure 11As shown, in the above-mentioned first doped semiconductor portion 12 and / or second doped semiconductor portion 13, an uneven antireflection structure 19 (such as the area with slightly higher brightness in the figure) is formed at the position corresponding to the microstructure 18. Specifically, when there is a microstructure 18 in a local area of the first doped semiconductor portion 12, an antireflection structure 19 can be formed at the position of the first doped semiconductor portion 12 corresponding to the microstructure 18. And / or, when there is a microstructure 18 in a local area of the second doped semiconductor portion 13, an antireflection structure 19 can be formed at the position of the second doped semiconductor portion 13 corresponding to the microstructure 18. The above antireflection structure 19 may affect the surface morphology of the part corresponding to the microstructure 18 in the first doped semiconductor portion 12 and / or second doped semiconductor portion 13 under the extrusion of hydrogen in the case where hydrogen escapes from the corresponding passivation layer with the microstructure 18. In this case, the reflectivity on the side of the first doped semiconductor portion 12 and / or second doped semiconductor portion 13 away from the semiconductor substrate 11 is reduced, which is conducive to making more light refract into the semiconductor substrate 11 through the first doped semiconductor portion 12 and / or second doped semiconductor portion 13, and improving the bifaciality of the battery. As for the specific morphology of the above antireflection structure 19, it can be determined according to the actual manufacturing process and is not specifically limited here. For example: the antireflection structure 19 can be a pit structure with a surface recessed into the corresponding doped semiconductor portion, etc.

[0127] As for the specific thicknesses of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer, they can be determined according to the types of their materials, as well as the requirements for field passivation and chemical passivation of the first dielectric passivation layer and the requirements for chemical passivation of the second dielectric passivation layer in the actual application scenario, and are not specifically limited here. Optionally, the thicknesses of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer can be selected within the range of greater than or equal to 2 nm and less than or equal to 15 nm. Secondly, the first sub-passivation layer can be an alumina layer. In this case, the thickness of the alumina layer formed by atomic layer deposition is usually relatively uniform. However, since there may be alumina material overplating at the battery edge, 1 to 2 points can be selected for testing in the middle area of the battery, corresponding to the positions of the first doped semiconductor portion and the second doped semiconductor portion, and the thicknesses of the alumina layers formed on the two first doped semiconductor portions and the second doped semiconductor portions are compared.

[0128] Exemplarily, the thickness of the first sub-passivation layer included in the above-mentioned first dielectric passivation layer may be greater than or equal to 4 nm and less than or equal to 15 nm. For example, the thickness of the first sub-passivation layer included in the first dielectric passivation layer may be 4 nm, 5 nm, 6 nm, 6.2 nm, 6.5 nm, 6.8 nm, 7 nm, 7.2 nm, 7.5 nm, 7.8 nm, 8 nm, 10 nm, 12 nm, or 15 nm, etc. In this case, the thickness of the first sub-passivation layer included in the first dielectric passivation layer is relatively large, which can further enhance the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer on the first doped semiconductor portion, facilitating further reduction of the degree of difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the back contact battery, and further improving the working performance of the back contact battery.

[0129] Exemplarily, the thickness of the first sub-passivation layer included in the above-mentioned second dielectric passivation layer may be greater than or equal to 2 nm and less than or equal to 8 nm. For example, the thickness of the first sub-passivation layer included in the second dielectric passivation layer may be 2 nm, 4 nm, 4.2 nm, 4.5 nm, 4.8 nm, 5 nm, 5.2 nm, 5.5 nm, 5.8 nm, 6 nm, 7 nm, or 8 nm, etc. In this case, the thickness of the first sub-passivation layer included in the second dielectric passivation layer is within the above range, which is conducive to preventing the overall passivation effect of the first sub-passivation layer included in the second dielectric passivation layer on the second doped semiconductor portion from being too low due to the small thickness of the first sub-passivation layer, ensuring that there are fewer surface defects on the side of the second doped semiconductor portion away from the semiconductor substrate; in addition, it is also conducive to preventing the electric field of the second doped semiconductor portion from being weakened too much by the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer due to the large thickness of the first sub-passivation layer, ensuring that the second doped semiconductor portion has a high carrier collection efficiency.

[0130] Regarding the second sub-passivation layer included in the first dielectric passivation layer and the second dielectric passivation layer, in terms of materials, the material of the second sub-passivation layer included in the first dielectric passivation layer may be any passivation material different from the first sub-passivation layer included in the first dielectric passivation layer. The second sub-passivation layer included in the first dielectric passivation layer may be a passivation layer with only chemical passivation function, or a passivation layer with both chemical passivation and field passivation functions. Secondly, the material of the second sub-passivation layer included in the second dielectric passivation layer may be any passivation material different from the first sub-passivation layer included in the second dielectric passivation layer. The first sub-passivation layer included in the second dielectric passivation layer may be a passivation layer with only chemical passivation function, or a passivation layer with both chemical passivation and field passivation functions.

[0131] In addition, the materials of the second sub-passivation layers included in the above-mentioned first dielectric passivation layer and the materials of the second sub-passivation layers included in the second dielectric passivation layer may be the same or different. Among them, when the materials of the second sub-passivation layers included in the first dielectric passivation layer and the second sub-passivation layers included in the second dielectric passivation layer are the same, it is beneficial to reduce the types of materials for different structures of the back-contact battery, improve the compatibility between different structures, and improve the yield of the back-contact battery. Or, the materials of the second sub-passivation layers included in the first dielectric passivation layer may also be different from the materials of the second sub-passivation layers included in the second dielectric passivation layer.

[0132] Secondly, as Figure 5 shown, the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 may also be integrally continuous. In this case, the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 can be formed simultaneously based on the same material and in the same step, which improves the manufacturing efficiency of the back-contact battery and is beneficial to reducing the manufacturing cost of the back-contact battery.

[0133] In terms of thickness, the thickness of the second sub-passivation layer included in the first dielectric passivation layer and the thickness of the second sub-passivation layer included in the second dielectric passivation layer can be determined according to their respective material types and the requirements for the passivation effects of different second sub-passivation layers in the actual application scenario, and no specific limitation is made here.

[0134] Exemplarily, the thickness of the second sub-passivation layer included in the first dielectric passivation layer may be equal to the thickness of the second sub-passivation layer included in the second dielectric passivation layer. Or, as Figure 4 shown, the thickness of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 may also be less than the thickness of the second sub-passivation layer 22 included in the second dielectric passivation layer 15. In this case, the second sub-passivation layer 22 included in the second dielectric passivation layer 15 with a larger thickness (relative to the second sub-passivation layer 22 included in the first dielectric passivation layer 14) is disposed on the first sub-passivation layer 21 included in the second dielectric passivation layer 15 with a smaller thickness (relative to the first sub-passivation layer 21 included in the first dielectric passivation layer 14), which is beneficial to making up for the weakening of the field passivation effect of the first sub-passivation layer 21 included in the second dielectric passivation layer 15 on the side of the second doped semiconductor portion 13 away from the semiconductor substrate 11 by the second sub-passivation layer 22 with a larger thickness, further reducing the number of surface defects on the side of the second doped semiconductor portion 13 away from the semiconductor substrate 11, and being beneficial to reducing the difference in passivation effects between the portion corresponding to the first doped semiconductor portion 12 and the portion corresponding to the second doped semiconductor portion 13 on the backlight side of the back-contact battery, and improving the working performance of the back-contact battery.

[0135] In the actual manufacturing process, asFigure 5 As shown, when the thickness of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 is less than the thickness of the second sub-passivation layer 22 included in the second dielectric passivation layer 15, and the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 are integrally continuous, different deposition thicknesses of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 can be achieved according to the different doping concentrations of the dopants in the first doped semiconductor portion 12 and the second doped semiconductor portion 13. For example: Taking the case where the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 are both silicon nitride layers as an example: When the doping concentration of the dopant in the first doped semiconductor portion 12 is less than the doping concentration of the dopant in the second doped semiconductor portion 13, when using processes such as plasma chemical vapor deposition and forming the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 simultaneously in the same step based on the same material, due to the different electric field strengths corresponding to the first doped semiconductor portion 12 and the second doped semiconductor portion 13, the thickness of the second sub-passivation layer 22 included in the formed first dielectric passivation layer 14 is smaller, and the thickness of the second sub-passivation layer 22 included in the second dielectric passivation layer 15 is larger.

[0136] Of course, it is also possible to manufacture the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer in different operation steps and by adjusting different manufacturing parameters, as long as the thickness of the second sub-passivation layer included in the first dielectric passivation layer is less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer.

[0137] As for the specific thicknesses and thickness differences of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer, they can be determined according to the requirements for the PL brightness values of the portions corresponding to the first doped semiconductor portion and the second doped semiconductor portion on the backlight side of the back contact battery in the actual application scenario, and no specific limitations are made here.

[0138] Exemplarily, the difference in the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer can be greater than or equal to 0.5 nm and less than or equal to 5 nm. For example, the difference in the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer can be 0.5 nm, 0.7 nm, 0.9 nm, 1 nm, 2 nm, 3 nm, 4 nm or 5 nm, etc. In this case, when the difference in the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer is within the above range, it can prevent the chemical passivation effects of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer from being substantially the same due to the small difference, ensuring that the difference in the field passivation effect between the parts corresponding to the first doped semiconductor part and the second doped semiconductor part on the backlight side can be compensated by the second sub-passivation layer included in the second dielectric passivation layer. It can also prevent the passivation effect of the second sub-passivation layer included in the first dielectric passivation layer from being too low due to the too small thickness of the second sub-passivation layer included in the first dielectric passivation layer when the difference is large, or prevent the consumption of materials from being too high due to the too large thickness of the second sub-passivation layer included in the second dielectric passivation layer, which is beneficial to controlling the manufacturing cost of the battery.

[0139] Exemplarily, the thickness of the second sub-passivation layer can be greater than or equal to 50 nm and less than or equal to 160 nm. For example, the thickness of the second sub-passivation layer can be 50 nm, 55 nm, 60 nm, 65 nm, 67 nm, 70 nm, 71 nm, 73 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 135 nm, 136 nm, 142 nm, 145 nm, 146 nm, 148 nm, 150 nm, 152 nm, 156 nm, 158 nm or 160 nm, etc. In this case, when the thickness of the second sub-passivation layer is within the above range, it is beneficial to prevent the passivation effect of the second sub-passivation layer itself from being weak due to the small thickness of the second sub-passivation layer, ensuring a low carrier recombination rate on the backlight side of the back-contact battery and improving the working performance of the back-contact battery. In addition, it can also prevent the consumption of materials of the second sub-passivation layer itself from being large due to the large thickness of the second sub-passivation layer, which is beneficial to controlling the manufacturing cost of the back-contact battery. Among them, when the thickness of the second sub-passivation layer included in the first dielectric passivation layer is less than the thickness of the second sub-passivation layer of the second dielectric passivation layer, the specific values of the thicknesses of the second sub-passivation layers corresponding to the two doped semiconductor parts can be set according to actual requirements and the description methods in the previous text.

[0140] Exemplarily, the thickness of the first sub-passivation layer can be greater than or equal to 2 nm and less than or equal to 15 nm; meanwhile, the thickness of the second sub-passivation layer can be greater than or equal to 50 nm and less than or equal to 160 nm. In this case, the first sub-passivation layer and the second sub-passivation layer are used in combination within the above thickness range, so that the second sub-passivation layer can better match the difference in the field passivation effect brought by the first sub-passivation layer between the two doped semiconductor parts, and reduce the difference in the passivation effect between the two doped semiconductor parts.

[0141] Exemplarily, the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer can be greater than or equal to 0.9 and less than or equal to 1.1; and / or, the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer can be greater than or equal to 52 nm and less than or equal to 175 nm.

[0142] For example: the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer can be 0.9, 0.92, 0.95, 0.96, 1, 1.02, 1.05, 1.08 or 1.1, etc.

[0143] For example: the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer can be 52 nm, 55 nm, 60 nm, 70 nm, 75 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 165 nm, 170 nm or 175 nm, etc.

[0144] In the case of adopting the above technical solution, when the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1, the thickness of the first dielectric passivation layer disposed on the side of the first doped semiconductor part away from the semiconductor substrate is substantially the same as the thickness of the second dielectric passivation layer disposed on the side of the second doped semiconductor part away from the semiconductor substrate, which is beneficial to making the first dielectric passivation layer and the second dielectric passivation layer have substantially the same comprehensive passivation effect, thereby facilitating further reducing the difference in the passivation effect between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery. In addition, when the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is within the above range, the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is appropriate to prevent the passivation effect of the first dielectric passivation layer and / or the second dielectric passivation layer from being weak due to the small thickness value, and can also prevent the distribution density of the microstructures in the first dielectric passivation layer and / or the second dielectric passivation layer from being large or the consumption of materials being high due to the large thickness, ensuring that the back contact battery has a high working efficiency while facilitating the control of the manufacturing cost of the battery.

[0145] Regarding the thicknesses of the first dielectric passivation layer and the second dielectric passivation layer, the thickness of the first dielectric passivation layer may be equal to the thickness of the second dielectric passivation layer. Alternatively, the thickness of the first dielectric passivation layer may also be less than the thickness of the second dielectric passivation layer. Among them, since the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the second sub-passivation layer included in the second dielectric passivation layer, when the thickness of the first dielectric passivation layer is less than the thickness of the second dielectric passivation layer, it is beneficial to make the thickness of the second sub-passivation layer included in the first dielectric passivation layer less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer. Based on this, the application principle of the beneficial effect that the thickness of the first dielectric passivation layer is less than the thickness of the second dielectric passivation layer can refer to the application principle of the beneficial effect that the thickness of the second sub-passivation layer included in the first dielectric passivation layer is less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer described above, and will not be elaborated here. In addition, the difference in the thicknesses of the first dielectric passivation layer and the second dielectric passivation layer can be determined according to the difference in the thicknesses of the first sub-passivation layer and the second sub-passivation layer included in the two, and no specific limitation is made here.

[0146] In addition, in the case where the thickness of the second sub-passivation layer included in the second dielectric passivation layer is greater than the thickness of the second sub-passivation layer included in the first dielectric passivation layer, it is beneficial to make the thicknesses of the first dielectric passivation layer and the second dielectric passivation layer substantially the same. In addition, it is also beneficial to make the refractive indices of the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part in the backlight surface of the back-contact battery substantially the same, which is beneficial to achieve uniform light absorption. Based on this, the thicknesses of the first dielectric passivation layer and the second dielectric passivation layer can also be determined according to the requirements for the refractive indices of different regions on the backlight surface side in the actual application scenario. As for the magnitudes of the refractive indices of the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part in the backlight surface of the back-contact battery, they can be determined according to actual needs and the types of materials of the first dielectric passivation layer and the second dielectric passivation layer.

[0147] Exemplarily, the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer may be greater than or equal to 0.9 and less than or equal to 1.1; and / or, the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer may be greater than or equal to 2.0 and less than or equal to 2.2.

[0148] For example: the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer may be 0.9, 0.92, 0.95, 0.96, 1, 1.02, 1.05, 1.08, or 1.1, etc.

[0149] For example: the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer may be 2.0, 2.01, 2.02, 2.03, 2.05, 2.08, 2.1, 2.12, 2.15, 2.18, or 2.2, etc.

[0150] In the case of adopting the above technical solution, when the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1, the refractive indices of the first dielectric passivation layer and the second dielectric passivation layer are substantially the same, which is conducive to making the light refraction effects of the part corresponding to the first dielectric passivation layer and the part corresponding to the second dielectric passivation layer on the backlight side of the back-contact battery substantially the same, conducive to achieving uniform light absorption, and conducive to ensuring the balance of electrons and holes. Secondly, when the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer is within the above range, the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer has a high refraction effect on light, which is conducive to making more light be refracted into the semiconductor substrate through the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer, and improving the bifaciality of the battery.

[0151] Exemplarily, the difference between the refractive index of the second sub-passivation layer included in the second dielectric passivation layer and the refractive index of the second sub-passivation layer included in the first dielectric passivation layer can be greater than or equal to 0.01 and less than or equal to 0.1. For example: the difference between the refractive index of the second sub-passivation layer included in the second dielectric passivation layer and the refractive index of the second sub-passivation layer included in the first dielectric passivation layer can be 0.01, 0.02, 0.03, 0.05, 0.06, 0.08 or 0.1, etc. The application principle of the beneficial effects in this case can refer to the application principle of the beneficial effects that the refractive indices of the first dielectric passivation layer and the second dielectric passivation layer are substantially the same as described above, and will not be elaborated here.

[0152] In the actual application process, since the PL luminance value refers to the light luminance emitted by the battery under light illumination conditions, the magnitude of this PL luminance value is related to the passivation performance of the test part, and represents the comprehensive passivation effect of all the film layers at the position corresponding to the first doped semiconductor part or the position corresponding to the second doped semiconductor part, such as including the tunneling passivation layer, the doped semiconductor part, and the comprehensive passivation effect of the dielectric passivation layer. Specifically, under the same test conditions, the larger the PL luminance value, the higher the passivation performance of this part, and the smaller the PL luminance value, the lower the passivation performance of this part. Based on this, it can be determined according to the requirements for the passivation effects of the first dielectric passivation layer and the second dielectric passivation layer in the actual application scenario. Under the same test conditions, the PL luminance value corresponding to the part corresponding to the second doped semiconductor part on the backlight side of the back-contact battery, and the PL luminance value corresponding to the part corresponding to the first doped semiconductor part, which are not specifically limited here.

[0153] Exemplarily, under the same test conditions, the PL luminance value corresponding to the part corresponding to the second doped semiconductor part 13 on the backlight side of the back-contact battery can be greater than the PL luminance value corresponding to the part corresponding to the first doped semiconductor part 12.

[0154] It should be noted that the embodiments of the present invention do not specifically limit the conditions for testing the PL luminance value. As for the test position of the PL luminance value, it can be tested on the finished battery. Specifically, the corresponding film layers located on the outermost sides around the corresponding interconnection parts (such as main grids or pad points, etc.) provided above the first doped semiconductor part and the second doped semiconductor part in the finished battery are respectively selected for testing (for example: when the first dielectric passivation layer and the second dielectric passivation layer in the back contact battery are the outermost film layers on one side of the first surface, it is necessary to test the areas adjacent to the corresponding interconnection parts on the side of the first dielectric passivation layer and the second dielectric passivation layer away from the semiconductor substrate. Alternatively, the test position of the PL luminance value can also be on the corresponding outermost film layer after removing the conductive electrodes in the finished battery. Or the PL luminance value can also be specially sampled by the method of double-sided symmetric sampling of the battery, such as symmetrically arranging the entire surface of the first doped semiconductor part and the first dielectric passivation layer on both sides of the battery, or arranging the entire surface of the second doped semiconductor part and the second dielectric passivation layer, and then performing PL testing.

[0155] In the case of adopting the above technical solution, when the PL luminance value corresponding to the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery is greater than the PL luminance value corresponding to the part corresponding to the first doped semiconductor part, the passivation performance of the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery provided by the embodiments of the present invention is higher than the passivation performance of the part corresponding to the first doped semiconductor part. In the above case, at the same time, the PL luminance values of the two regions reflect the comprehensive effects of field passivation and chemical passivation, and can also indirectly reflect the other passivation effects of the other film layers except the first sub-passivation layer, that is, the other passivation effects including the second dielectric passivation layer are greater than the other passivation effects including the first dielectric passivation layer. By passivating the other film layers, the comprehensive passivation effect corresponding to the second doped semiconductor part is enhanced, and the difference in passivation effects between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery is reduced. At the same time, the passivation requirements of the two doped semiconductor parts of different conduction types are realized, so as to facilitate making the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery both have a lower carrier recombination rate and a higher carrier separation ability, and improving the working performance of the back contact battery. Refer to Figure 13 , the figure shows the PL luminance test diagram of the finished structure of the back contact battery provided by the embodiments of the present invention. Among them, the thick solid line and the dotted line respectively enclose the regions corresponding to the first doped semiconductor part and the second doped semiconductor part. It can be seen from the attached drawing that the PL luminance values corresponding to these two regions on the back side of the finished battery are approximately the same, and at this time, the passivation effects corresponding to these two regions on the back side of the finished battery are approximately the same.

[0156] In addition, it can be understood that when the structure and material of the first sub-passivation layer included in the first dielectric passivation layer are different from those of the first sub-passivation layer included in the second dielectric passivation layer, the passivation effects of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer may be different. As a result, under the same test conditions, in the backlight side of the back-contact battery, the PL brightness values corresponding to the part of the second doped semiconductor part and the PL brightness values corresponding to the part of the first doped semiconductor part may also be different. Therefore, the PL brightness values corresponding to the above two parts in the backlight side can be determined according to the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer, as well as the structure of the back-contact battery, and no specific limitation is made here.

[0157] Exemplarily, the first sub-passivation layer included in the first dielectric passivation layer is an alumina layer. Under the test conditions of an exposure time of 0.2 s and a light intensity of 1 sun, the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer facing away from the semiconductor substrate can be greater than or equal to 5000. For example, when the first sub-passivation layer included in the first dielectric passivation layer is an alumina layer and under the test conditions of an exposure time of 0.2 s and a light intensity of 1 sun, the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer facing away from the semiconductor substrate can be 5000, 5500, 5800, 6000, 6500, 7000, 7500, 8000, 9000, etc. In this case, the alumina layer contains a large number of oxygen anions, which can form a relatively dense fixed negative charge at the interface between itself and the first doped semiconductor part, forming a built-in electric field that shields minority carriers, improving the carrier collection efficiency of the first doped semiconductor part and enhancing the carrier separation ability of the first doped semiconductor part. Secondly, under the test conditions of an exposure time of 0.2 s and a light intensity of 1 sun, when the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer facing away from the semiconductor substrate is greater than or equal to 5000, the presence of the first sub-passivation layer with a relatively large thickness in the first dielectric passivation layer improves the field passivation effect on the first doped semiconductor part, which is beneficial to further reducing the difference in passivation effects between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back-contact battery.

[0158] Exemplarily, the first sub-passivation layer included in the second dielectric passivation layer is an aluminum oxide layer, and under the test conditions of an exposure time of 0.2s and a light intensity of 1sun, the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer away from the semiconductor substrate may be greater than or equal to 16500. For example: the first sub-passivation layer included in the second dielectric passivation layer is an aluminum oxide layer, and under the test conditions of an exposure time of 0.2s and a light intensity of 1sun, the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer away from the semiconductor substrate may be 16500, 16800, 17000, 18000, 20000, 22000, 24000, 28000 or 30000, etc. In this case, chemical passivation through the first sub-passivation layer included in the second dielectric passivation layer can minimize the impact of its own field passivation function on the carrier collection efficiency of the second doped semiconductor part, ensuring that the second doped semiconductor part has a higher carrier separation ability, which is beneficial to further reduce the difference in passivation effect between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery.

[0159] Exemplarily, when the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are both aluminum oxide layers (under the same test conditions), the ratio between the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer away from the semiconductor substrate and the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer away from the semiconductor substrate may be greater than or equal to 2.5 and less than or equal to 3.4. For example, the above ratio may be 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3 or 3.4, etc. In this case, when the ratio of the PL brightness value corresponding to the side of the second doped semiconductor portion away from the semiconductor substrate to the PL brightness value corresponding to the side of the first doped semiconductor portion away from the semiconductor substrate (approximately greater than or equal to 3 and less than or equal to 4), the ratio of the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer away from the semiconductor substrate to the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer away from the semiconductor substrate is greater than or equal to 2.5 and less than or equal to 3.4, the ratio between the above PL brightness values ​​is smaller, that is, the presence of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer is beneficial to reducing the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the back contact battery, which is beneficial to achieving uniform passivation.

[0160] In addition, define the ratio of the PL luminance value corresponding to the side of the second dielectric passivation layer facing away from the semiconductor substrate to the PL luminance value corresponding to the side of the first dielectric passivation layer facing away from the semiconductor substrate under the same test conditions as PL1. And define the ratio of the PL luminance value of the fifth passivation layer on the side facing away from the semiconductor substrate to the PL luminance value of the fourth passivation layer on the side facing away from the semiconductor substrate under the same test conditions as PL2, and PL2 is less than PL1. In this case, by setting the fourth passivation layer and the fifth passivation layer with different thicknesses, the difference in passivation effects between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery is further reduced.

[0161] It can be understood that when the structures and materials of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are different, the passivation effects of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer may be different. As a result, under the same test conditions, the PL luminance values corresponding to the part of the backlight side of the back contact battery corresponding to the second doped semiconductor part and the PL luminance value corresponding to the part of the first doped semiconductor part may also be different. Therefore, the PL luminance values corresponding to the above two parts on the backlight side can be determined according to the materials of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer, and the structure of the back contact battery, and no specific limitation is made here.

[0162] Exemplarily, when the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are both silicon nitride layers, PL2 can be greater than or equal to 1.62 and less than or equal to 1.9. For example, PL2 can be 1.62, 1.65, 1.7, 1.75, 1.8, 1.85 or 1.9, etc. In this case, when the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are formed, the ratio of the PL luminance values of the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the battery can be further reduced, and the degree of difference in passivation is reduced.

[0163] Optionally, under the test conditions of an exposure time of 0.2 s and a light intensity of 1 sun, the PL luminance value corresponding to the part of the backlight side of the back contact battery corresponding to the first doped semiconductor part can be greater than or equal to 8000 and less than or equal to 25000.

[0164] Optionally, under the test conditions of an exposure time of 0.2 s and a light intensity of 1 sun, the PL luminance value corresponding to the part of the backlight side of the back contact battery corresponding to the first doped semiconductor part can be greater than or equal to 20000 and less than or equal to 45000.

[0165] As a possible implementation, as Figure 12 shown, the above-mentioned back-contact battery may further include a third passivation layer 20 disposed on the second surface, and the thickness of the third passivation layer 20 is greater than the thickness of the portion of the first sub-passivation layer 21 included in the first dielectric passivation layer 14. In this case, the second surface side of the semiconductor substrate 11 can be well chemically passivated by the third passivation layer 20 with a higher thickness, reducing the number of surface defects and the carrier recombination rate on the second surface side.

[0166] Wherein, in the embodiments of the present invention, the material and thickness of the third passivation layer are not specifically limited, as long as the thickness of the third passivation layer is greater than the thickness of the first dielectric passivation layer. For example: the material of the third passivation layer may include at least one of alumina, silica, silicon nitride, and aluminum nitride.

[0167] In a second aspect, as Figure 14 shown, the embodiments of the present invention provide a photovoltaic module, which includes the back-contact battery provided by the first aspect and its various implementation manners.

[0168] Specifically, since the type of the battery included in the photovoltaic module provided by the embodiments of the present invention is a back-contact battery, the positive and negative connectors for realizing the interconnection of different batteries in the photovoltaic module are both disposed on the back side of the battery. In addition, the photovoltaic module may include a transparent cover plate, a first encapsulation film, a back-contact battery layer, a circuit interconnection layer, a second encapsulation film, and a backplane disposed in sequence.

[0169] Among them, the material of the transparent cover plate may include at least one of tempered glass, high-transparency plastic, and silicone rubber. The materials of the first encapsulation film and the second encapsulation film may be POE, EVA, PVB, or other materials, etc. The back-contact battery layer may include a plurality of back-contact batteries distributed in an array, and the plurality of back-contact batteries are connected through the circuit interconnection layer. The above-mentioned circuit interconnection layer may be electrically connected to different back-contact batteries through in-series interconnecting members such as solder tapes, or the above-mentioned circuit interconnection layer may also be a conductive backplane, which includes a conductive circuit layer and an insulating material layer located between the conductive circuit layer and the back-contact battery layer. A conductive window is opened in the insulating material layer, and the interconnection structure of the back-contact battery is interconnected with the patterned conductive circuit layer through the conductive window. As for the above-mentioned backplane, the material of the backplane may be TPC, PET, TPT, CPC, or other materials, etc., to prevent the circuit interconnection layer from reacting in the external environment and extend the service life of the photovoltaic module.

[0170] For the beneficial effects of the second aspect and its various implementation manners in the embodiments of the present invention, reference may be made to the analysis of the beneficial effects in the first aspect and its various implementation manners, which will not be elaborated here.

[0171] In the above description, no detailed explanations are given for the technical details such as the composition and etching of each layer. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of the desired shapes. Additionally, in order to form the same structure, those skilled in the art can also design methods that are not exactly the same as the methods described above. Moreover, although the embodiments are described separately above, this does not mean that the measures in each embodiment cannot be used advantageously in combination.

[0172] The embodiments of the present invention have been described above. However, these embodiments are only for a clearer illustration and not for limiting the scope of the present invention. The scope of the present invention is defined by the appended claims and their equivalents. Without departing from the scope of the present invention, those skilled in the art can make various substitutions and modifications, and all these substitutions and modifications should fall within the scope of the present invention.

Claims

1. A back-contact battery, characterized in that, Comprising: A semiconductor substrate, a first doped semiconductor portion, a second doped semiconductor portion, a first dielectric passivation layer, and a second dielectric passivation layer; The first doped semiconductor portion and the second doped semiconductor portion have opposite conduction types; Both the first dielectric passivation layer and the second dielectric passivation layer include a first sub-passivation layer having a field passivation function; the conduction type of the first doped semiconductor portion is opposite to the conduction type of the fixed charges of the first sub-passivation layer; Wherein, the semiconductor substrate has opposite first and second surfaces; along a direction parallel to the first surface, the first doped semiconductor portion and the second doped semiconductor portion are alternately distributed on the first surface; The first dielectric passivation layer covers the side of the first doped semiconductor portion facing away from the semiconductor substrate, and the second dielectric passivation layer covers the side of the second doped semiconductor portion facing away from the semiconductor substrate; the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the first sub-passivation layer included in the second dielectric passivation layer; Both the first dielectric passivation layer and the second dielectric passivation layer further include a second sub-passivation layer having a chemical passivation function; the second sub-passivation layer is disposed on the side of the first sub-passivation layer facing away from the semiconductor substrate; the material of the second sub-passivation layer included in the first dielectric passivation layer is different from the material of the first sub-passivation layer included in the first dielectric passivation layer; the material of the second sub-passivation layer included in the second dielectric passivation layer is different from the material of the first sub-passivation layer included in the second dielectric passivation layer.

2. The back-contact battery according to claim 1, characterized in that, Under the same test conditions, in the backlight side of the back contact battery, the PL brightness value corresponding to the portion corresponding to the second doped semiconductor portion is greater than the PL brightness value corresponding to the portion corresponding to the first doped semiconductor portion.

3. The back-contact battery according to claim 1, wherein The thickness of the first sub-passivation layer is greater than or equal to 2 nm and less than or equal to 15 nm.

4. The back-contact battery according to claim 1, characterized in that, The thickness of the second sub-passivation layer included in the first dielectric passivation layer is less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer.

5. The back-contact battery according to claim 1, characterized in that, The difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer is greater than or equal to 0.5 nm and less than or equal to 5 nm.

6. The back-contact battery according to claim 1, characterized in that, The thickness of the second sub-passivation layer is greater than or equal to 50 nm and less than or equal to 160 nm.

7. The back-contact battery according to claim 1, characterized in that, The thickness of the first dielectric passivation layer is less than the thickness of the second dielectric passivation layer.

8. The back-contact battery according to claim 1, wherein The ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.

1.

9. The back contact battery according to claim 1, characterized in that, The thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is greater than or equal to 52 nm and less than or equal to 175 nm.

10. The back contact battery according to claim 1, characterized in that, The first sub-passivation layer is an alumina layer, and under the test conditions of an exposure time of 0.2 s and a light intensity of 1 sun, The PL luminance value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer facing away from the semiconductor substrate is greater than or equal to 5000; and / or, the PL luminance value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer facing away from the semiconductor substrate is greater than or equal to 16500.

11. The back-contact battery according to claim 1, characterized in that, The first sub-passivation layer is an alumina layer, and under the test conditions of an exposure time of 0.2 s and a light intensity of 1 sun, the ratio between the PL luminance value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer facing away from the semiconductor substrate and the PL luminance value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer facing away from the semiconductor substrate is greater than or equal to 2.5 and less than or equal to 3.

4.

12. The back-contact battery according to claim 1, characterized in that, The surface reflectivity of the side of the first doped semiconductor portion facing away from the semiconductor substrate is greater than the surface reflectivity of the side of the second doped semiconductor portion facing away from the semiconductor substrate.

13. The back-contact battery according to claim 12, characterized in that, The side surface of the first doped semiconductor portion facing away from the semiconductor substrate has a first texture structure, and the side surface of the second doped semiconductor portion facing away from the semiconductor substrate has a second texture structure; the one-dimensional size of the first texture structure is different from the one-dimensional size of the second texture structure.

14. The back-contact battery according to claim 1, wherein, In the case where the first doped semiconductor portion is a P-type doped semiconductor portion and the second doped semiconductor portion is an N-type doped semiconductor portion, The doping concentration of the dopant in the first doped semiconductor portion is less than the doping concentration of the dopant in the second doped semiconductor portion; and / or, the thickness of the first doped semiconductor portion is greater than the thickness of the second doped semiconductor portion.

15. The back-contact battery according to claim 1, wherein, The first sub-passivation layer included in the first dielectric passivation layer includes a hydrogen-containing passivation layer, and a local region of the hydrogen-containing passivation layer has a microstructure.

16. The back-contact battery according to claim 15, wherein In the case where both the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer include the hydrogen-containing passivation layer, The distribution density of the microstructures in the first sub-passivation layer included in the first dielectric passivation layer is greater than the distribution density of the microstructures in the first sub-passivation layer included in the second dielectric passivation layer.

17. The back contact battery according to claim 15, wherein The size of at least one of the microstructures is greater than or equal to 10 μm and less than or equal to 20 μm; and / or, the height of at least one of the microstructures is greater than or equal to 0.1 μm and less than or equal to 0.5 μm.

18. The back-contact battery according to any one of claims 1 to 17, characterized in that, The materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are the same; and / or, the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are integrally continuous.

19. The back-contact battery according to claim 1, characterized in that, Under the same test conditions, the ratio of the PL luminance value of the side of the first sub-passivation layer included in the second dielectric passivation layer facing away from the semiconductor substrate to the PL luminance value of the side of the first sub-passivation layer included in the first dielectric passivation layer facing away from the semiconductor substrate is PL1; Under the same test conditions, the ratio of the PL luminance value on the side of the second sub-passivation layer included in the second dielectric passivation layer away from the semiconductor substrate to the PL luminance value on the side of the second sub-passivation layer included in the first dielectric passivation layer away from the semiconductor substrate is PL2, and PL2 is less than PL1.

20. The back-contact battery according to claim 19, wherein When the second sub-passivation layer is a silicon nitride layer, PL2 is greater than or equal to 1.62 and less than or equal to 1.

9.

21. The back-contact battery according to claim 1, characterized in that, The material of the second sub-passivation layer included in the first dielectric passivation layer is the same as the material of the second sub-passivation layer included in the second dielectric passivation layer; and / or, the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are integrally continuous.

22. A photovoltaic module, characterized in that, Including the back-contact battery according to any one of claims 1 to 21.

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