Ultrasonic transceiver system and electronic equipment

Abstract

The present application provides an ultrasonic transceiver system and an electronic device, wherein the ultrasonic transceiver system includes a signal generating circuit and an ultrasonic sensor chip. The signal generating circuit is composed of discrete devices and includes a pulse generating circuit and a resonant circuit. The pulse generating circuit receives a control signal output by the ultrasonic sensor chip, and generates a first pulse voltage signal and a second pulse voltage signal in opposite phases according to the control signal. The resonant circuit receives the first pulse voltage signal and the second pulse voltage signal in opposite phases and generates a driving signal under the action thereof. The ultrasonic sensor chip receives the driving signal and generates an ultrasonic signal according to the driving signal. When generating the driving signal, the voltage value of the driving signal can be increased by the first pulse voltage signal and the second pulse voltage signal in opposite phases without the need for a boost operation, thereby overcoming the circuit complexity problem caused by the boost and the problem of poor driving effect caused by the low voltage value. The circuit structure is simple, easy to implement and control, and has a good boost effect.

Description

[0001] This application is a divisional application. The application number of the original application is 202211733544.X, and the original application date is December 30, 2022. The entire contents of the original application are incorporated into this application by reference. Technical Field

[0002] The present application relates to the field of fingerprint detection technology, and in particular to an ultrasonic transceiver system and an electronic device. Background Art

[0003] With the development and progress of science and technology, fingerprint detection technology is increasingly used in smart terminal devices such as mobile phones and computers, thereby improving people's experience in using smart terminal devices.

[0004] In the solution of ultrasonic fingerprint detection technology, it is usually necessary to generate a sine wave signal, and then use the sine wave signal as a driving signal to generate an ultrasonic signal for fingerprint detection. Among them, in some implementations of generating a sine wave signal, it is usually necessary to use a complex circuit structure to achieve multiple boosts, resulting in a large system architecture size, complex circuits and high costs. In some implementations that can generate a sine wave signal with a single boost, because the voltage value of the sine wave signal is relatively low, there is a problem of poor driving effect of the sine wave signal as a driving signal. Summary of the invention

[0005] The present application provides an ultrasonic transceiver system and an electronic device, which are used to solve the technical problems that the generation of a sine wave signal in ultrasonic fingerprint detection technology has a complex circuit structure and its driving effect as a driving signal is poor.

[0006] In a first aspect, the present application provides an ultrasonic transceiver system, comprising: a signal generating circuit and an ultrasonic sensor chip;

[0007] The signal generating circuit is composed of discrete devices and includes: a pulse generating circuit and a resonant circuit, wherein the pulse generating circuit is used to receive a control signal output by the ultrasonic sensor chip and generate a first pulse voltage signal and a second pulse voltage signal in anti-phase according to the control signal, and the resonant circuit is used to receive the first pulse voltage signal and the second pulse voltage signal in anti-phase and generate a driving signal according to the first pulse voltage signal and the second pulse voltage signal in anti-phase;

[0008] The ultrasonic sensor chip is used to receive the driving signal and generate an ultrasonic signal according to the driving signal;

[0009] The signal generating circuit also includes a brake circuit for absorbing the signal energy generated by the resonant circuit when the resonant circuit stops generating the drive signal; the brake circuit includes a damping resistor, one end of which is connected to the first pulse output end of the pulse generating circuit; the first pulse output end is used for the first pulse voltage signal; the resistance value of the damping resistor is related to the characteristic impedance of the resonant circuit.

[0010] In one possible design, the resonant circuit includes a resonant inductor and a resonant capacitor;

[0011] One end of the resonant inductor is connected to the first pulse output end of the pulse generating circuit, and the other end of the resonant inductor, one end of the resonant capacitor and the input end of the ultrasonic sensor chip are connected;

[0012] The other end of the resonant capacitor is connected to the second pulse output end of the pulse generating circuit, and the second pulse output end is used to output the second pulse voltage signal;

[0013] The resonant inductor and the resonant capacitor resonate under the action of the first pulse voltage signal and the second pulse voltage signal to generate a sinusoidal wave driving signal.

[0014] In one possible design, the resistance value of the damping resistor is between 0.8 and 2 times of the characteristic impedance, or is 1.4 times of the characteristic impedance. In one possible design, the pulse generating circuit generates the first pulse voltage signal according to the control signal, and generates a second pulse voltage signal which is in antiphase with the first pulse voltage signal according to a signal generated by an inverter through the control signal.

[0015] In one possible design, the pulse generating circuit includes a first half-bridge circuit, a second half-bridge circuit, a first inverter and a second inverter;

[0016] The input end of the first half-bridge circuit is connected to the first output end and the second output end of the ultrasonic sensor chip, and the output end of the first half-bridge circuit is the first pulse output end of the pulse generating circuit;

[0017] The input end of the second half-bridge circuit is connected to the output end of the first inverter and the output end of the second inverter, and the output end of the second half-bridge circuit is the second pulse output end of the pulse generating circuit;

[0018] The input end of the first inverter is connected to the first output end of the ultrasonic sensor chip, and the input end of the second inverter is connected to the second output end of the ultrasonic sensor chip.

[0019] In a possible design, the first output end and the second output end of the ultrasonic sensor chip are used to output a first pulse control signal and a second pulse control signal respectively, and the control signal includes the first pulse control signal and the second pulse control signal.

[0020] In a possible design, the first half-bridge circuit includes a first PMOS transistor and a first NMOS transistor;

[0021] The gate of the first PMOS tube is connected to the second output terminal of the ultrasonic sensor chip, and the source of the first PMOS tube is connected to the power input terminal of the pulse generating circuit;

[0022] The drain of the first PMOS tube is connected to the drain of the first NMOS tube and is the output end of the first half-bridge circuit, the gate of the first NMOS tube is connected to the first output end of the ultrasonic sensor chip, and the source of the first NMOS tube is grounded.

[0023] In a possible design, the second half-bridge circuit includes a second PMOS transistor and a second NMOS transistor;

[0024] The gate of the second PMOS tube is connected to the output end of the first inverter, and the source of the second PMOS tube is connected to the power input end of the pulse generating circuit;

[0025] The drain of the second PMOS tube is connected to the drain of the second NMOS tube and is the output end of the second half-bridge circuit, the gate of the second NMOS tube is connected to the output end of the second inverter, and the source of the second NMOS tube is grounded.

[0026] In one possible design, the ultrasonic transceiver system further includes a main control module;

[0027] The main control module includes a power supply, and the power supply is used to supply power to the signal generating circuit and the ultrasonic sensor chip.

[0028] In one possible design, the main control module also includes an SPI interface;

[0029] The SPI interface is used for communication between the main control module and the ultrasonic sensor.

[0030] In a possible design, the first pulse voltage signal is also input into the ultrasonic sensor chip as a synchronization signal of the driving signal.

[0031] In one possible design, the driving signal is a sinusoidal wave driving signal, and the ultrasonic sensor chip includes an ultrasonic transducer;

[0032] The sinusoidal wave driving signal is used to drive the ultrasonic transducer to generate the ultrasonic signal.

[0033] In a second aspect, the present application provides an electronic device, comprising: a cover plate, and any possible ultrasonic transceiver system provided in the first aspect;

[0034] The cover plate is used to receive pressure from a user's finger, and the ultrasonic transceiver system is disposed below the cover plate to detect the fingerprint of the user's finger pressed on the cover plate.

[0035] In a possible design, the electronic device further includes: a display screen, the cover plate is arranged above the display screen, and the ultrasonic transceiver system is arranged below the display screen.

[0036] The present application provides an ultrasonic transceiver system and an electronic device, wherein the ultrasonic transceiver system includes a signal generating circuit and an ultrasonic sensor chip. The signal generating circuit is composed of discrete devices and includes a pulse generating circuit and a resonant circuit. The pulse generating circuit can receive a control signal output by the ultrasonic sensor chip, and generate a first pulse voltage signal and a second pulse voltage signal in opposite phases according to the control signal. The resonant circuit can receive the first pulse voltage signal and the second pulse voltage signal in opposite phases and generate a driving signal under the action thereof. The brake circuit absorbs the excess signal energy generated by the resonant circuit, so that the resonant energy returns to zero quickly, reducing the interference of the excess resonant energy; the ultrasonic sensor chip receives the driving signal and generates an ultrasonic signal according to the driving signal. The ultrasonic transceiver system provided by the present application does not need to boost the voltage when generating the driving signal, but on the other hand, it increases the voltage value of the driving signal through the first pulse voltage signal and the second pulse voltage signal in opposite phases, which can overcome the circuit complexity problem caused by boosting and the problem of poor driving effect caused by low voltage value. The circuit structure is simple, easy to implement and control, and has a good boosting effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0038] Figure 1 A schematic diagram of the structure of an ultrasonic transceiver system provided in an embodiment of the present application;

[0039] Figure 2 A waveform diagram provided for an embodiment of the present application;

[0040] Figure 3 A circuit diagram of another ultrasonic transceiver system provided in an embodiment of the present application;

[0041] Figure 4 Another waveform diagram provided for an embodiment of the present application;

[0042] Figure 5 A circuit diagram of another ultrasonic transceiver system provided in an embodiment of the present application. DETAILED DESCRIPTION

[0043] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of methods and devices consistent with some aspects of the present application as detailed in the appended claims.

[0044] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein, for example. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0045] In the solution of ultrasonic fingerprint detection technology, it is usually necessary to generate a sine wave signal, and then use the sine wave signal as a driving signal to generate an ultrasonic signal for fingerprint detection. Among them, in some implementations of generating a sine wave signal, it is usually necessary to use a complex circuit structure to achieve multiple boosts, resulting in a large system architecture size, complex circuits and high costs. In some implementations that can generate a sine wave signal with a single boost, because the voltage value of the sine wave signal is relatively low, there is a problem of poor driving effect of the sine wave signal as a driving signal.

[0046] In view of the above problems existing in the prior art, the present application provides an ultrasonic transceiver system and an electronic device. The inventive concept of the ultrasonic transceiver system provided by the present application is: an ultrasonic transceiver system including a signal generating circuit and an ultrasonic sensor chip is provided, wherein the signal generating circuit is composed of discrete devices and includes a pulse generating circuit and a resonant circuit. The ultrasonic sensor chip outputs a control signal to the pulse generating circuit, and the pulse generating circuit can generate a first pulse voltage signal and a second pulse voltage signal in opposite phases under the action of the control signal, and the resonant circuit receives the first pulse voltage signal and the second pulse voltage signal in opposite phases, and resonates under the action of the first pulse voltage signal and the second pulse voltage signal to generate a driving signal. The ultrasonic sensor chip receives the driving signal and generates an ultrasonic signal under the action of the driving signal, and the ultrasonic signal can be used for fingerprint detection. In the implementation method of generating the driving signal, the embodiment of the present application does not need to be boosted, and the pulse generating signal can generate a first pulse voltage signal and a second pulse voltage signal in opposite phases, so the driving signal generated under the action of the first pulse voltage signal and the second pulse voltage signal in opposite phases will have a doubled voltage value compared to the driving signal generated by one pulse voltage signal, thereby increasing the voltage value of the driving signal and improving the driving effect. The circuit complexity problem caused by voltage boost in the prior art and the problem of poor driving effect caused by low voltage value can be overcome. The circuit structure is simple, easy to implement and control and has a good voltage boost effect.

[0047] The technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems are described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0048] Figure 1 This is a schematic diagram of the structure of an ultrasonic transceiver system provided in an embodiment of the present application. Figure 1 As shown, the ultrasonic transceiver system 100 provided in the embodiment of the present application includes: a signal generating circuit 101 and an ultrasonic sensor chip 102 .

[0049] The signal generating circuit 101 is composed of discrete devices and includes: a pulse generating circuit 1011 and a resonance circuit 1012 .

[0050] The pulse generating circuit 1011 is used for receiving the control signal output by the ultrasonic sensor chip 102 and generating a first pulse voltage signal and a second pulse voltage signal in opposite phases according to the control signal.

[0051] Optionally, when generating a first pulse voltage signal and a second pulse voltage signal in anti-phase, the pulse generating circuit 1011 is specifically used to: generate a first pulse voltage signal according to a control signal output by the ultrasonic sensor chip 102, and generate a second pulse voltage signal in anti-phase with the first pulse voltage signal according to a signal obtained by an inverter based on the control signal output by the ultrasonic sensor chip 102.

[0052] The resonant circuit 1012 is used for receiving the first pulse voltage signal and the second pulse voltage signal in opposite phases, and generating a driving signal according to the first pulse voltage signal and the second pulse voltage signal in opposite phases.

[0053] The ultrasonic sensor chip 102 is used to receive a driving signal and generate an ultrasonic signal according to the driving signal.

[0054] Among them, the signal generating circuit 101 can be a circuit structure composed of discrete devices, not set as a chip, so as to reduce the manufacturing cost. Therefore, compared with the "dual chip" architecture, the ultrasonic fingerprint detection device 200 provided in the embodiment of the present application only includes one ultrasonic fingerprint sensor chip 220, and the overall manufacturing cost will be greatly reduced.

[0055] Specifically, the pulse generating circuit 1011 can receive the control signal provided by the ultrasonic sensor chip 102, and generate the first pulse voltage signal and the second pulse voltage signal in anti-phase under the action of the control signal. The resonant circuit 1012 is connected to the pulse generating circuit 1011, and the first pulse voltage signal and the second pulse voltage signal in anti-phase generated by the pulse generating circuit 1011 can be input to the resonant circuit 1012, and the resonant circuit 1012 receives the first pulse voltage signal and the second pulse voltage signal in anti-phase, and generates a driving signal under the action of the first pulse voltage and the second pulse voltage signal in anti-phase. The resonant circuit 1012 is also connected to the ultrasonic sensor chip 102, and the driving signal generated by the resonant circuit 1012 can be output to the ultrasonic sensor chip 102, and the ultrasonic sensor chip 102 receives the driving signal and generates an ultrasonic signal under the action of the driving signal, and the ultrasonic signal can be used for fingerprint detection, for example.

[0056] Optionally, the signal generating circuit 101 and the ultrasonic sensor chip 102 may share an input power supply, and the input power supply may provide the same voltage value for both of them. For example, the voltage value provided by the input power supply may be between 3V and 4.5V.

[0057] Optionally, the ultrasonic transceiver system 100 may further include a main control module 103 . The main control module 103 may include a power supply VDD. The power supply VDD may be used as an input power supply to provide power to the signal generating circuit 101 and the ultrasonic sensor chip 103 .

[0058] In some embodiments, the main control module 103 may be provided with a control chip of an electronic device of the ultrasonic transceiver system 100, and the electronic device may be a terminal device such as a mobile phone or a tablet computer. The power supply VDD included in the main control module 103 may be the power supply of the terminal device, so that no additional power supply is required, which can save the overall power consumption of the ultrasonic transceiver system 100.

[0059] Optionally, the main control module 103 may further include a serial peripheral interface (SPI) interface, and the SPI interface may be used for communication between the main control module 103 and the ultrasonic sensor chip 102 .

[0060] The pulse generating circuit 1011 can generate a first pulse voltage signal and a second pulse voltage signal in anti-phase under the action of the control signal, and the driving signal generated by the resonant circuit 1012 under the action of the first pulse voltage signal and the second pulse voltage signal in anti-phase will have a doubled voltage value compared to the driving signal generated by a single pulse voltage signal. It can be seen that the driving signal generated by the signal generating circuit 101 in the ultrasonic transceiver system 100 provided in the embodiment of the present application does not require a boost operation to obtain a driving signal with a higher voltage value, which can overcome the circuit complexity caused by the boost operation required in the prior art and the problem of poor driving effect caused by the low driving signal voltage value, and the circuit structure is simple, easy to implement and control, and has a good boost effect.

[0061] In one possible design, the resonant circuit 1012 includes a resonant inductor L and a resonant capacitor C.

[0062] Reference Figure 1 As shown, one end of the resonant inductor L is connected to the first pulse output end of the pulse generating circuit 1011, and the other end of the resonant inductor L, one end of the resonant capacitor C and the input end of the ultrasonic sensor chip 102 are connected. The first pulse output end of the pulse generating circuit 1011 is used to output a first pulse voltage signal.

[0063] The other end of the resonant capacitor C is connected to the second pulse output end of the pulse generating circuit 1011, and the second pulse output end of the pulse generating circuit 1011 is used to output a second pulse voltage signal. The first pulse voltage signal and the second pulse voltage signal are in anti-phase.

[0064] The resonant inductor L and the resonant capacitor C resonate under the action of the first pulse voltage signal and the second pulse voltage signal to generate a sinusoidal wave drive signal V TX The driving signal described above includes the sine wave driving signal V TX .

[0065] For example, by controlling the first pulse voltage signal and the second pulse voltage signal output by the pulse generating circuit 1011, the resonant circuit 1012 can resonate to generate a sinusoidal wave drive signal V under the action of the first pulse voltage signal and the second pulse voltage signal. TX .

[0066] For ease of understanding, Figure 2 The first pulse voltage signal, the second pulse voltage signal and the sine wave drive signal V provided in the embodiment of the present application are shown. TX A waveform diagram of .

[0067] like Figure 2 As shown, the working states of the signal generating circuit 101 include: a waiting stage, an excitation stage and an inversion stage.

[0068] In the waiting stage of the signal generating circuit 101, the resonant circuit 1012 does not generate resonance, the first pulse voltage signal output by the pulse generating circuit 1011 can be 0 or high impedance, and the second pulse voltage signal output by the pulse generating circuit 1011 can be 0, 1 or high impedance. Among them, 0 means that the output voltage is 0, that is, a low level, 1 means that the output voltage is the power supply voltage VDD, that is, a high level, and the high impedance state means that there is no output voltage in a high resistance state. Figure 2 In the waiting stage, the first pulse voltage signal and the second pulse voltage signal are shown as outputting 0 as an example. Accordingly, the driving signal V TX That is low level.

[0069] In the excitation stage of the signal generating circuit 101, the first pulse voltage signal and the second pulse voltage signal output by the pulse generating circuit 1011 are in anti-phase relationship, so that the first pulse voltage signal and the second pulse voltage signal are alternately transformed between high level and low level, and the resonant inductor L and the resonant capacitor C in the resonant circuit 1012 are further resonated under the action of the first pulse voltage signal and the second pulse voltage signal in anti-phase that alternately transform between high level and low level, thereby generating a sinusoidal wave driving signal V TX .

[0070] When it is necessary to stop outputting the sine wave drive signal V TX When, for example, the first pulse voltage signal and the second pulse voltage signal can be output as a low level or a high impedance state to pass through the equivalent resistance R ( Figure 1 However, in fact, since the energy of the resonant circuit 1012 oscillation cannot disappear immediately, the sinusoidal wave drive signal V TXTherefore, before the first pulse voltage signal and the second pulse voltage signal are output as a low level or a high impedance state, an inverted driving method can be adopted, that is, the first pulse voltage signal and the second pulse voltage signal are both inverted for output, thereby accelerating the resonance energy of the resonance circuit 1012 to return to zero.

[0071] Specifically, the first pulse voltage signal and the second pulse voltage signal are respectively inverted, and are output alternately at a low level and a high level to generate an inverted first pulse voltage signal and an inverted second pulse voltage signal, such as Figure 2 The phase of the first pulse voltage signal in the inversion phase is inverted to the phase of the first pulse voltage signal in the excitation phase, and the phase of the second pulse voltage signal in the inversion phase is inverted to the phase of the second pulse voltage signal in the excitation phase. The inverted first pulse voltage signal and the inverted second pulse voltage signal act on the resonant circuit 1012 to generate a sinusoidal wave drive signal V in the inversion phase. TX . Figure 2 It can be seen that the sinusoidal wave drive signal V TX The resonant energy is lower than the sine wave drive signal V in the excitation stage. TX The resonance energy.

[0072] Since the oscillation energy of the resonant circuit 1012 cannot disappear immediately and there is a residual vibration phenomenon, in some embodiments, the signal generating circuit 101 may further include a brake circuit 1013 .

[0073] Continue to refer to Figure 1 As shown, the brake circuit 1013 may include a damping resistor R1.

[0074] One end of the damping resistor R1 is connected to the first pulse output end of the pulse generating circuit 1011, and the other end of the damping resistor R1 is grounded. A brake circuit 1013 including the damping resistor R1 is added to the signal generating circuit 101, and the resonant circuit 1012 is expected to stop outputting the sinusoidal wave drive signal V TX When the resonant circuit 1012 generates excess signal energy, the resonant circuit 1012 can be absorbed, thereby improving the sine wave drive signal V output by the resonant circuit 1012. TX The residual vibration increases the sine wave drive signal V TX quality.

[0075] The equivalent resistance R of the resonant inductor L in the resonant circuit 1012 can act together with the damping resistor R1 to damp the resonance. Figure 2In the damping braking stage of the working state of the signal generating circuit 210 shown, the first pulse voltage signal and the second pulse voltage signal are controlled to be low level, and the damping resistor R1 in the brake circuit 1013 can continue to play a damping "brake" role on the resonance of the resonant circuit 1012, thereby quickly reducing the resonant energy of the resonant circuit 1012 and making the resonance return to zero quickly. Optionally, in the damping braking stage, the second pulse voltage signal can also be high level.

[0076] The resistance value of the damping resistor R1 is related to the characteristic impedance Z of the resonant circuit 1012. In order to achieve a better damping "brake" effect, in some embodiments, the resistance value of the damping resistor R1 may be between 0.8*Z and 2*Z.

[0077] The characteristic impedance Z and the values ​​of the resonant inductor L and the resonant capacitor C in the resonant circuit 1012 satisfy the following formula (1):

[0078]

[0079] L1 and C1 are the values ​​of the resonant inductor L and the resonant capacitor C in the resonant circuit 1012 respectively.

[0080] Optionally, the resistance value of the damping resistor R1 includes but is not limited to 1.4*Z.

[0081] It is understandable that the above Figure 1 and Figure 2 For illustration only and not limitation, the circuit structure of the resonant circuit 1012 and the pulse generating circuit 1011 and the corresponding signal waveform diagram under an embodiment are shown. In some alternative implementations, the resonant circuit 1012 and the pulse generating circuit 1011 may also adopt other circuit structures, so that the two can cooperate to achieve the effect of resonant boosting of the input power supply. The embodiment of the present application does not limit the specific circuit structure of the resonant circuit 1012 and the pulse generating circuit 1011.

[0082] In addition, Figure 2 In the waveform diagram shown below, the excitation stage only shows two cycles of the first pulse voltage signal and the second pulse voltage signal. The two-cycle signal is only for illustration. The excitation stage can also be a signal of any other number of cycles. The embodiment of the present application does not limit the number of cycles of the signal in the excitation stage.

[0083] The ultrasonic transceiver system provided in the embodiment of the present application includes a signal generating circuit and an ultrasonic sensor chip. The signal generating circuit is composed of discrete devices and includes a pulse generating circuit and a resonant circuit. The pulse generating circuit can receive the control signal output by the ultrasonic sensor chip, and generate a first pulse voltage signal and a second pulse voltage signal in anti-phase according to the control signal. The resonant circuit can receive the first pulse voltage signal and the second pulse voltage signal in anti-phase and generate a driving signal under the action thereof. The ultrasonic sensor chip receives the driving signal and generates an ultrasonic signal according to the driving signal. When generating the driving signal, on the one hand, there is no need for boosting, but on the other hand, the voltage value of the driving signal is increased by the first pulse voltage signal and the second pulse voltage signal in anti-phase, which can overcome the circuit complexity caused by boosting and the problem of poor driving effect caused by low voltage value. The circuit structure is simple, easy to implement and control, and has a good boosting effect.

[0084] Optionally, the first pulse voltage signal can also be input into the ultrasonic sensor chip 102 as a synchronization signal of the above-mentioned driving signal to synchronize the driving signal. It can be understood that the driving signal includes a sine wave driving signal V TX .

[0085] In some embodiments, the ultrasonic sensor chip 102 may include an ultrasonic transducer 1021. The ultrasonic transducer 1021 can generate an ultrasonic signal under the action of a driving signal provided by the signal generating circuit 1012. For example, when the ultrasonic transceiver system 100 is used for fingerprint detection, the ultrasonic transducer 1021 can generate an ultrasonic signal under the action of a driving signal, and can receive an echo signal reflected by the ultrasonic signal through the user's finger to generate an electrical signal, and then the electrical signal can be detected by other detection circuits in the ultrasonic sensor chip 102, such as an echo detection circuit, to achieve fingerprint detection.

[0086] Optionally, the ultrasonic transducer 1021 may include a piezoelectric layer and upper and lower electrode layers. For example, the piezoelectric material in the piezoelectric layer includes but is not limited to polyvinylidene fluoride (PVDF), polyvinylidene fluoride-trifluoroethylene (PVDF-TrFE) copolymer, etc. When the piezoelectric layer is subjected to a high-voltage driving signal from the upper and lower electrode layers, it converts electrical energy into mechanical energy, thereby generating an ultrasonic signal. Correspondingly, the piezoelectric layer can also convert the returned ultrasonic echo signal from mechanical energy into electrical energy, thereby generating an electrical signal corresponding to the echo signal.

[0087] Since the ultrasonic transducer 1021 is a capacitive load, assuming that its capacitance value is C0, C0 and the capacitance value C1 of the resonant capacitor C can satisfy C1 ≥ C0 to obtain the best output voltage amplitude. At the same time, the inductance value L1 of the resonant inductor L, the capacitance value C0 of the ultrasonic transducer 1021, the capacitance value C1 of the resonant capacitor C and the pulse frequency f need to satisfy the following formula (2):

[0088]

[0089] In some embodiments, the ultrasonic sensor chip 102 in the ultrasonic transceiver system 100 further includes: a control module 1022 , a transducer module, and a detection module.

[0090] The control module 1022 is used to provide a control signal to the signal generating circuit 101 to control the signal generating circuit 101 to generate a driving signal. The transducer module is used to receive the driving signal to generate an ultrasonic signal, and use the ultrasonic signal to generate an echo signal. The transducer module is also used to convert the echo signal into an electrical signal. The transducer module may include an ultrasonic transducer 1021. The detection module is used to detect the electrical signal to achieve a corresponding function, such as detecting the electrical signal to achieve fingerprint detection. The detection module is not shown in the drawings of the embodiments of the present application.

[0091] The control module 1022 can be understood as a controller of the ultrasonic sensor chip 102, which can be connected to the above-mentioned transducer module and detection module and control the operation of the transducer module and detection module. In addition, the control module 1022 can also be used to receive a synchronization signal.

[0092] Optionally, the detection module may include a receiving module, a detection module and a signal accumulation module. The receiving module is used to receive multiple electrical signals. The detection module is used to detect the amplitudes of the multiple electrical signals. The signal accumulation module is used to accumulate the amplitudes of the multiple electrical signals to obtain a signal accumulation value, which is used to be averaged to achieve corresponding related functions, such as transmitting the digital signal of fingerprint data to an external device so that the digital signal is averaged to detect the fingerprint of the user's finger.

[0093] Optionally, the signal accumulation module may be an analog signal accumulator or an integrator, or may be other types of circuit structures or devices, which are not specifically limited in the embodiments of the present application.

[0094] Optionally, the ultrasonic sensor chip 102 may further include a readout module 1023 , an analog-to-digital conversion module 1024 and an interface module 1025 .

[0095] The readout module 1023 can read the signal accumulation value generated by the signal accumulation module to the analog-to-digital conversion module 1024. The analog-to-digital conversion module 1024 converts the signal accumulation value into a digital signal. The interface module 1025 can transmit the digital signal to an external device so that the digital signal is averaged to achieve the corresponding related functions.

[0096] Optionally, the readout module 1023 may be a readout circuit. The analog-to-digital conversion module 1024 may be an analog-to-digital converter (ADC). The interface module 1025 includes but is not limited to an SPI interface.

[0097] Optionally, in some alternative implementations, the readout module 1023 , the analog-to-digital conversion module 1024 and the interface module 1025 may not be integrated into the ultrasonic sensor chip 102 , but may be disposed outside the ultrasonic sensor chip 102 , thereby reducing the installation space required for the ultrasonic sensor chip 102 .

[0098] Furthermore, the ultrasonic sensor chip 102 may also include a pixel array (Pixel Array), which is composed of a plurality of pixel units (Pixel Cell). The control module 1022 is connected to the pixel array. Each pixel unit may include: an upper electrode, a piezoelectric layer, and a lower electrode. The upper electrodes of the plurality of pixel units may be interconnected to form an overall upper electrode, and the overall upper electrode point may be electrically connected to a TX interface, and the TX interface may receive a driving signal VTX generated by the signal generating circuit 101. Optionally, when the ultrasonic transceiver system 100 is used for fingerprint detection, the pixel array is used for ultrasonic fingerprint imaging.

[0099] The lower electrodes of the plurality of pixel units may be arranged separately from each other, that is, the lower electrodes of the plurality of pixel units may form a lower electrode array, and the plurality of lower electrodes in the lower electrode array have the same structure and are arranged in the same plane. The lower electrode in the pixel unit may also be referred to as a pixel electrode. In each pixel unit, the combination of the upper electrode, the piezoelectric layer, and the lower electrode may form an ultrasonic transducer unit, and the plurality of ultrasonic transducer units of the plurality of pixel units may form a transducer module, which may be used to generate an ultrasonic transducer when the driving signal V TX An ultrasonic signal is generated under the action of, and an echo signal of the ultrasonic signal can also be received to generate a corresponding electrical signal.

[0100] Based on the above embodiments, Figure 3 This is a circuit diagram of another ultrasonic transceiver system provided in an embodiment of the present application. Figure 3As shown, the pulse generating circuit 1011 in the ultrasonic transceiver system 100 provided in the embodiment of the present application includes: a first half-bridge circuit 10111, a second half-bridge circuit 10112, a first inverter S1 and a second inverter S2.

[0101] Among them, the input end of the first half-bridge circuit 10111 is connected to the first output end and the second output end of the ultrasonic sensor chip 102, and the output end of the first half-bridge circuit 10111 is the first pulse output end of the pulse generating circuit 102, and the first pulse output end of the pulse generating circuit 1011 is used to output a first pulse voltage signal.

[0102] The first output terminal and the second output terminal of the ultrasonic sensor chip 102 are used to output the control signal described above. Specifically, the control signal may include a first pulse control signal (DRN) and a second pulse control signal (DRP), for example, the first output terminal is used to output the first pulse control signal, and the second output terminal is used to output the second pulse control signal.

[0103] The input end of the second half-bridge circuit 10112 is connected to the output end of the first inverter S1 and the output end of the second inverter S2. The output end of the second half-bridge circuit 10112 is the second pulse output end of the pulse generating circuit 1011. The second pulse output end of the pulse generating circuit 1011 is used to output a second pulse voltage signal.

[0104] The input end of the first inverter S1 is connected to the first output end of the ultrasonic sensor chip 102, and the input end of the second inverter S2 is connected to the second output end of the ultrasonic sensor chip 102. The first inverter S1 and the second inverter S2 are used to invert the signals passing through them. Figure 3 As shown, since the input end of the first inverter S1 is connected to the first output end of the ultrasonic sensor chip 102, when the first pulse control signal outputted from the first output end of the ultrasonic sensor chip 102 is at a low level, the first pulse control signal will become a high level after passing through the first inverter S1. When the first pulse control signal outputted from the first output end of the ultrasonic sensor chip 102 is at a high level, the first pulse control signal will become a low level after passing through the first inverter S1. The second inverter S2 is similar to the first inverter S1, except that the input end of the second inverter S2 is connected to the second output end of the ultrasonic sensor chip 102.

[0105] The pulse generating circuit in the ultrasonic transceiver system provided in the embodiment of the present application includes a first half-bridge circuit, a second half-bridge circuit, and a first inverter and a second inverter. The first inverter and the second inverter can be provided to realize the inversion control of the first pulse control signal and the second pulse control signal. The first half-bridge circuit and the second half-bridge circuit can be provided to enable the pulse generating circuit to generate the inverted first pulse voltage signal and the second pulse voltage signal under the action of the control signal. Thus, the voltage value of the driving signal can be increased by the inverted first pulse voltage signal and the second pulse voltage signal without boosting, overcoming the circuit complexity caused by boosting and the problem of poor driving effect caused by low voltage value. The circuit structure is simple, easy to implement and control, and has a good boosting effect.

[0106] Continue to refer to Figure 3 As shown, the first half-bridge circuit 10111 may include a first PMOS transistor Q1 and a first NMOS transistor Q2.

[0107] The gate of the first PMOS transistor Q1 is connected to the second output terminal of the ultrasonic sensor chip 102, and is used to input the second pulse control signal (DRP) to the first PMOS transistor Q1. The source of the first PMOS transistor Q1 is connected to the power input terminal of the pulse generating circuit 1011, and the power input terminal is used to input the power provided by the power supply VDD.

[0108] The drain of the first PMOS transistor Q1 is connected to the drain of the first NMOS transistor Q2, and is used to output the first pulse voltage signal as the output end of the first half-bridge circuit 10111. The gate of the first NMOS transistor Q2 is connected to the first output end of the ultrasonic sensor chip 102, and is used to input the first pulse control signal (DRN) to the first NMOS transistor Q2, and the source of the first NMOS transistor Q2 is grounded.

[0109] When the first pulse control signal and the second pulse control signal are output at a high level, the first PMOS tube Q1 is turned off, the first NMOS tube Q2 is turned on, and the first pulse voltage signal output by the first half-bridge circuit 10111 is at a high level. When the first pulse control signal and the second pulse control signal are output at a low level, the first PMOS tube Q1 is turned on, the first NMOS tube Q2 is turned off, and the first pulse voltage signal output by the first half-bridge circuit 10111 is at a low level. It can be seen that by controlling the level state of the first pulse control signal and the second pulse control signal, the level state of the first pulse voltage signal can be controlled under the action of the first PMOS tube Q1 and the first NMOS tube Q2.

[0110] Continue to refer to Figure 3 As shown, the second half-bridge circuit 10112 includes a second PMOS transistor Q3 and a second NMOS transistor Q4.

[0111] The gate of the second PMOS transistor Q3 is connected to the output end of the first inverter S1, and is used to input the inverted first pulse control signal to the second PMOS transistor Q3. The source of the second PMOS transistor Q3 is connected to the power input end of the pulse generating circuit 1011, and the power input end is used to input the power provided by the power supply VDD.

[0112] The drain of the second PMOS tube Q3 is connected to the drain of the second NMOS tube Q4, and is used to output the second pulse voltage signal as the output end of the second half-bridge circuit 10112. The gate of the second NMOS tube Q4 is connected to the output end of the second inverter S2, and is used to input the inverted second pulse control signal to the second NMOS tube Q4. The source of the second NMOS tube Q4 is grounded.

[0113] When the first pulse control signal and the second pulse control signal are output at a high level, since the first pulse control signal is inverted by the first inverter S1 and input to the second PMOS tube Q3, the second PMOS tube Q3 is turned on, and the second pulse control signal is inverted by the second inverter S2 and input to the second NMOS tube Q4, so the second NMOS tube Q4 is turned off, and the second pulse voltage signal output by the second half-bridge circuit 10112 is a low level. When the first pulse control signal and the second pulse control signal are output at a low level, since the first pulse control signal is inverted by the first inverter S1 and input to the second PMOS tube Q3, the second PMOS tube Q3 is turned off, and the second pulse control signal is inverted by the second inverter S2 and input to the second NMOS tube Q4, so the second NMOS tube Q4 is turned on, and the second pulse voltage signal output by the second half-bridge circuit 10112 is a high level. It can be seen that by controlling the level states of the first pulse control signal and the second pulse control signal, the level state of the second pulse voltage signal can be controlled under the action of the first inverter S1, the second inverter S2, the second PMOS tube Q3 and the second NMOS tube Q4.

[0114] In summary, it can be known that under the action of the first half-bridge circuit 10111 and the second half-bridge circuit 10112 and the first inverter S1 and the second inverter S2, when the first pulse control signal and the second pulse control signal are output at a low level, the first NMOS tube Q2 and the second PMOS tube Q3 are turned off, the first PMOS tube Q1 and the second NMOS tube Q4 are turned on, the first pulse voltage signal is output at a low level, and the second pulse voltage signal is output at a high level, and the two are in anti-phase. When the first pulse control signal and the second pulse control signal are output at a high level, the first NMOS tube Q2 and the second PMOS tube Q3 are closed, the first PMOS tube Q1 and the second NMOS tube Q4 are turned off, the first pulse voltage signal is output at a high level, and the second pulse voltage signal is output at a low level, and the two are in anti-phase.

[0115] In some embodiments, by controlling the level states of the first pulse control signal and the second pulse control signal, Figure 3 The pulse generating circuit 1011 shown can output a first pulse voltage signal and a second pulse voltage signal in opposite phases. Figure 2 On the basis of Figure 4 The level states of the first pulse control signal and the second pulse control signal are shown, and the corresponding control signals are Figure 3 The working state of the signal generating circuit 101 under the action of the pulse generating circuit 1011 is shown. Figure 4 The signal-related technical solutions for each stage of the working state shown in the figure can be combined with the above Figure 2 The various stages in the illustrated embodiment are similar, and the specific implementation can be found in the above description, which will not be elaborated here.

[0116] The pulse generating circuit in the ultrasonic transceiver system provided in the embodiment of the present application can control the level state of the first pulse control signal and the second pulse control signal under the action of the first half-bridge circuit composed of the first PMOS tube and the first NMOS tube, the second half-bridge circuit composed of the second PMOS tube and the second NMOS tube, the first inverter and the second inverter, so that the pulse generating circuit outputs the first pulse voltage signal and the second pulse voltage signal which are in opposite phases. Therefore, the voltage value of the driving signal can be increased by the first pulse voltage signal and the second pulse voltage signal which are in opposite phases without boosting, overcoming the circuit complexity problem caused by boosting and the problem of poor driving effect caused by low voltage value, and the circuit structure is simple, easy to implement and control and has a good boosting effect.

[0117] Optionally, the pulse generating circuit 1011 may be provided with a plurality of input / output ports. Figure 4 As shown in , port K1 can be a power input terminal, port K2 is used to input a first pulse control signal, and port K3 is used to input a second pulse control signal. Port K4 is used to output a first pulse voltage signal, and port K5 is used to output a second pulse voltage signal. Port K6 is used to ground the pulse generating circuit 1011.

[0118] Based on the above embodiments, Figure 4 The ultrasonic sensor chip 102 shown in the figure also includes: a control module 1022, a transducer module, a detection module and a pixel array, wherein the implementation method, principle and technical effect of the control module 1022, the transducer module, the detection module and the pixel array are the same as those of FIG. Figure 1 The control module 1022, transducer module, detection module and pixel array shown in FIG. 1 are similar and will not be described in detail here.

[0119] Further, in Figure 4 On the basis of Figure 5The ultrasonic transceiver system 100 also schematically shows a block diagram of each pixel unit.

[0120] When the signal generating circuit 101 outputs the driving signal V TX , the first switch CK1 is turned on, the transducer module is in the transmitting state, and emits ultrasonic waves. After the transmission is completed, the first switch CK1 is turned off, and the echo signal is received after a period of time. When the echo signal reaches the transducer module, the second switch CK2 is closed, and the transducer module converts the echo signal into an electrical signal. The electrical signal is transmitted to the receiving module 301 and the detection module 302 through the second switch CK2 to complete the reception and detection of the echo signal, and is transmitted to the signal accumulation module 303.

[0121] Optionally, the first switch CK1 and the second switch CK2 may be controlled by a cycle control module 10221 , so as to control the operation state of the energy conversion module. The control module 1022 includes a cycle control module 10221 .

[0122] Optionally, in some embodiments, in each pixel unit, a corresponding receiving module 301 and a detection module 302 may be provided. Alternatively, in other embodiments, the same receiving module 301 and detection module 302 may be provided for the ultrasonic transducer units of multiple pixel units.

[0123] The embodiment of the present application also provides an electronic device, including a cover plate and an ultrasonic transceiver system 100 in any of the above embodiments. The cover plate is used to provide a pressing interface for a user's finger and receive the pressing of the user's finger. The ultrasonic transceiver system 100 is arranged under the cover plate and is used to detect the fingerprint of the user's finger pressing on the cover plate.

[0124] In some possible implementations, the electronic device further includes a display screen, wherein the cover plate is disposed above the display screen, and correspondingly, the ultrasonic transceiver system 100 is disposed below the display screen to implement an under-screen ultrasonic fingerprint recognition function of the electronic device.

[0125] It can be understood that in the embodiment of the present application, the ultrasonic signal generated by the ultrasonic transceiver system 100 can penetrate the display screen to reach the cover plate, and the ultrasonic signal can propagate at the cover plate and form an echo signal through reflection of the user's finger pressed on the cover plate, and the echo signal can penetrate the display screen to reach the ultrasonic transceiver system 100 to enable it to realize the fingerprint detection function.

[0126] Optionally, the electronic device includes but is not limited to a mobile terminal device, such as a mobile phone, a laptop computer, a tablet computer, and the like.

[0127] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the claims.

[0128] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. An ultrasonic transceiver system, characterized in that: include: Signal generating circuit and ultrasonic sensor chip; The signal generating circuit is composed of discrete devices and includes: a pulse generating circuit and a resonant circuit, wherein the pulse generating circuit is used to receive a control signal output by the ultrasonic sensor chip and generate a first pulse voltage signal and a second pulse voltage signal in anti-phase according to the control signal, and the resonant circuit is used to receive the first pulse voltage signal and the second pulse voltage signal in anti-phase and generate a driving signal according to the first pulse voltage signal and the second pulse voltage signal in anti-phase; The ultrasonic sensor chip is used to receive the driving signal and generate an ultrasonic signal according to the driving signal; The signal generating circuit also includes: a braking circuit, which is used to absorb the signal energy generated by the resonant circuit when the resonant circuit stops generating the driving signal; the braking circuit includes a damping resistor, one end of which is connected to the first pulse output end of the pulse generating circuit; the first pulse output end outputs the first pulse voltage signal; the resistance value of the damping resistor is related to the characteristic impedance of the resonant circuit.

2. The ultrasonic transceiver system according to claim 1, characterized in that: The resonant circuit includes a resonant inductor and a resonant capacitor; One end of the resonant inductor is connected to the first pulse output end of the pulse generating circuit, and the other end of the resonant inductor, one end of the resonant capacitor and the input end of the ultrasonic sensor chip are connected; The other end of the resonant capacitor is connected to the second pulse output end of the pulse generating circuit, and the second pulse output end is used to output the second pulse voltage signal; The resonant inductor and the resonant capacitor resonate under the action of the first pulse voltage signal and the second pulse voltage signal to generate a sinusoidal wave driving signal.

3. The ultrasonic transceiver system according to claim 1, characterized in that: The resistance value of the damping resistor is between 0.8 and 2 times of the characteristic impedance, or is 1.4 times of the characteristic impedance.

4. The ultrasonic transceiver system according to claim 1, characterized in that: The pulse generating circuit generates the first pulse voltage signal according to the control signal, and generates a second pulse voltage signal which is in anti-phase with the first pulse voltage signal according to a signal obtained by an inverter through the control signal.

5. The ultrasonic transceiver system according to claim 1, characterized in that: The pulse generating circuit comprises a first half-bridge circuit, a second half-bridge circuit, a first inverter and a second inverter; The input end of the first half-bridge circuit is connected to the first output end and the second output end of the ultrasonic sensor chip, and the output end of the first half-bridge circuit is the first pulse output end of the pulse generating circuit; The input end of the second half-bridge circuit is connected to the output end of the first inverter and the output end of the second inverter, and the output end of the second half-bridge circuit is the second pulse output end of the pulse generating circuit; The input end of the first inverter is connected to the first output end of the ultrasonic sensor chip, and the input end of the second inverter is connected to the second output end of the ultrasonic sensor chip.

6. The ultrasonic transceiver system according to claim 5, characterized in that: The first output terminal and the second output terminal of the ultrasonic sensor chip are used to output a first pulse control signal and a second pulse control signal respectively, and the control signal includes the first pulse control signal and the second pulse control signal.

7. The ultrasonic transceiver system according to claim 5, characterized in that: The first half-bridge circuit includes a first PMOS tube and a first NMOS tube; The gate of the first PMOS tube is connected to the second output terminal of the ultrasonic sensor chip, and the source of the first PMOS tube is connected to the power input terminal of the pulse generating circuit; The drain of the first PMOS tube is connected to the drain of the first NMOS tube and is the output end of the first half-bridge circuit, the gate of the first NMOS tube is connected to the first output end of the ultrasonic sensor chip, and the source of the first NMOS tube is grounded.

8. The ultrasonic transceiver system according to claim 5, characterized in that: The second half-bridge circuit includes a second PMOS transistor and a second NMOS transistor; The gate of the second PMOS tube is connected to the output end of the first inverter, and the source of the second PMOS tube is connected to the power input end of the pulse generating circuit; The drain of the second PMOS tube is connected to the drain of the second NMOS tube and is the output end of the second half-bridge circuit, the gate of the second NMOS tube is connected to the output end of the second inverter, and the source of the second NMOS tube is grounded.

9. The ultrasonic transceiver system according to any one of claims 1 to 8, characterized in that: The ultrasonic transceiver system also includes a main control module; The main control module includes a power supply, and the power supply is used to supply power to the signal generating circuit and the ultrasonic sensor chip.

10. The ultrasonic transceiver system according to claim 9, characterized in that: The main control module also includes an SPI interface; The SPI interface is used for communication between the main control module and the ultrasonic sensor.

11. The ultrasonic transceiver system according to any one of claims 1 to 8, characterized in that: The first pulse voltage signal is also input to the ultrasonic sensor chip as a synchronization signal of the drive signal.

12. The ultrasonic transceiver system according to any one of claims 1 to 8, characterized in that: The driving signal is a sinusoidal wave driving signal, and the ultrasonic sensor chip includes an ultrasonic transducer; The sinusoidal wave driving signal is used to drive the ultrasonic transducer to generate the ultrasonic signal.

13. An electronic device, characterized in that: Includes: Cover, and The ultrasonic transceiver system according to any one of claims 1 to 12; The cover plate is used to receive pressure from a user's finger, and the ultrasonic transceiver system is disposed below the cover plate to detect the fingerprint of the user's finger pressed on the cover plate.

14. The electronic device according to claim 13, characterized in that: The electronic device further comprises: a display screen, the cover plate is arranged above the display screen, and the ultrasonic transceiver system is arranged below the display screen.

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