Apparatus for inert anode plating bath
By improving the anode chamber design in semiconductor electroplating equipment, the electrolyte is forced to directly reach the chip through the anode, which solves the problem of low electrolyte flow rate during the electroplating process, and improves the wafer yield and bath life.
Patent Information
- Application Number
- CN202411925429.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2018-10-03
- Filing Date
- 2019-10-02
- Publication Date
- 2025-04-04
AI Technical Summary
In the existing semiconductor electroplating technology, the design of the inert anode plating tank has the problem of low electrolyte flow rate, which leads to limited oxidation/regeneration of degraded components generated on the wafer surface, affecting the wafer yield and bath life.
By removing the conventional bath film and tank inlets and anode chamber outlets in the electroplating device, all bath flow is forced through the anode and directly to the wafer, increasing the anode area and flow to improve wafer yield and bath life.
The irrigation effect of the anode is improved, the exposed area of the anode is increased, the area of wafer defects is significantly reduced, and the life of the electroplating bath is extended.
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Figure CN119753790A_ABST
Abstract
Description
This application is a divisional application of the invention patent application with application number 201980065942.9, application date October 2, 2019, and invention name “Device for inert anode plating tank”. Priority claim
[0001] This patent application claims priority to U.S. Provisional Application Serial No. 62 / 740,845, filed on October 3, 2018, entitled “FLOW DISTRIBUTION APPARATUS FOR AN INERT ANODE PLATING CELL,” the disclosure of which is hereby incorporated by reference in its entirety. Technical Field
[0002] The present disclosure generally relates to electroplating (plating) systems and methods for semiconductor manufacturing. In particular, the present disclosure relates to methods and apparatus for electroplating one or more materials onto a substrate. In many cases, the material is a metal and the substrate is a semiconductor wafer, but the disclosed embodiments are not limited thereto. Summary of the invention
[0003] The background description provided here is for the purpose of generally presenting the context of the present disclosure. The work of the presently designated inventors is neither explicitly nor implicitly admitted to be prior art against the present disclosure to the extent that it is described in this background section and in aspects of the specification that were not determined to be prior art at the time the application was filed.
[0004] In modern integrated circuit processing, electrochemical deposition processes are well established. In the early 21st century, the evolution of interconnects from aluminum to copper metal lines necessitated increasingly sophisticated electrodeposition processes and plating tools. A number of complex problems arose in response to the demand for smaller current-carrying lines in device metallization layers. These copper lines are formed by electroplating metal into very fine, high aspect ratio trenches and vias in a process generally referred to as "damascene processing" (prepassivation metallization).
[0005] Electrochemical deposition is now poised to meet commercial demand for complex packaging and multi-chip interconnect technologies, commonly and colloquially known as wafer-level packaging (WLP) and through-silicon via (TSV) electrical connection technologies. Due in part to the typically larger feature sizes (compared to front-end-of-line (FEOL) interconnects) and high aspect ratios, these technologies present very significant challenges of their own.
[0006] Depending on the type and application of the package feature (e.g., die-to-die connection TSV, interconnect redistribution routing, or die-to-board or die-to-die soldering, such as flip-chip pillars), plated features in current technology are generally larger than about 2 μm and typically have a major dimension of about 5-100 μm (e.g., a copper pillar can be about 50 μm). For some on-chip structures such as power buses, the features to be plated can be larger than 100 μm. The aspect ratio of WLP features is generally about 1:1 (height to width) or less, but can range up to about 2:1, while TSV structures can have very high aspect ratios (e.g., in the vicinity of about 20:1). Summary of the invention
[0007] The disclosed embodiments relate to methods and apparatus for controlling electrolyte fluid dynamics during electroplating. More specifically, the methods and apparatus described herein are particularly advantageous for plating metal onto semiconductor wafer substrates, such as through-resist plating of small micro-bump features having a width of less than, for example, about 50 um, and gold through-silicon via (TSV) features.
[0008] In some examples, an electroplating apparatus for electroplating a wafer includes: a wafer holder for holding a wafer during an electroplating operation; a plating tank configured to contain an electrolyte during the electroplating operation; an anode chamber disposed within the plating tank; a feed plate disposed within the anode chamber; and an anode positioned above the feed plate within the anode chamber.
[0009] In some examples, the anode chamber is a membraneless anode chamber. In some examples, the electroplating apparatus further comprises a flow shaping plate or CIRP disposed between the wafer held in the wafer holder and the anode during the electroplating operation. In some examples, a portion of the feed plate is sealed to the wall of the plating tank. In some examples, the anode is a composite anode and comprises a plurality of anode layers. In some examples, each of the plurality of anode layers is staggered relative to each other to define openings or different pores of the mesh structure of the anode.
[0010] In some examples, the anode is supported above the feed plate by a plurality of gap pins. In some examples, the height of the plurality of gap pins defines a gap between the anode and the feed plate, wherein the height is in the range of 0.39 to 0.59 inches. In some examples, the feed plate includes a plurality of holes formed therein, wherein each hole has a diameter in the range of 0.03 to 0.05 inches and is distributed in a grid pattern, the grid pattern having a grid spacing in the range of 0.4 to 0.7 inches. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] Some embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings:
[0012] Figure 1 A cross-sectional view of a plating apparatus is shown according to an exemplary embodiment.
[0013] FIG. 2 shows a schematic cross-sectional view of a conventional plating apparatus according to an exemplary embodiment.
[0014] Figure 3A and 3B A schematic cross-sectional view of a plating apparatus is shown according to an exemplary embodiment.
[0015] Figure 4 A cross-sectional view of a plating apparatus is shown according to an exemplary embodiment.
[0016] Figure 5 A cross-sectional view of a standoff pin is shown according to an exemplary embodiment.
[0017] Figure 6 A top view of an anode is shown according to an exemplary embodiment.
[0018] Figure 7 A graph showing test results of certain exemplary embodiments.
[0019] Figures 8A-8D A feed plate distribution pattern is shown according to an exemplary embodiment.
[0020] Fig. 9 Porosity and hole (opening) spacing values for an exemplary portion of a feed plate are shown according to an exemplary embodiment.
[0021] Fig.10 Exemplary operations in a method are described according to an exemplary embodiment.
[0022] Fig.11 is a block diagram illustrating an example of a machine on which one or more exemplary embodiments may be implemented or by which one or more exemplary embodiments may be controlled. DETAILED DESCRIPTION
[0023] The following description includes systems, methods, techniques, instruction sequences, and computing machine program products that implement exemplary embodiments of the present invention. In the following description, for the purpose of explanation, many specific details are provided to provide a thorough understanding of the exemplary embodiments. However, it is apparent to those skilled in the art that embodiments of the present invention may be practiced without these specific details.
[0024] A portion of the disclosure of this patent document contains material that is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by any person of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all copyright rights whatsoever. The following notice applies to any data as described below and in the drawings that form a part of this document: Copyright Owner LAM Research Corporation, 2018. All Rights Reserved.
[0025] As a general background, semiconductors typically start as wafer slices of purified semiconductor material. These wafers are typically produced by heating the material, shaping it, and processing it to cut and grind it into small, smooth wafers. In the deposition phase, the prepared wafers are cleaned, heated, and exposed to pure oxygen in a diffusion furnace. This causes a reaction that produces a uniform silicon dioxide film on the surface of the wafer. In the masking phase (also known as photolithography or photo-masking), the process protects one area of the wafer while another area is operated on. After a photosensitive film is applied to a portion of the wafer, a strong light is then projected onto it through a mask, exposing the film through the mask pattern. In the etching phase, the manufacturer bakes the wafer to harden the remaining film pattern, and then exposes it to a chemical solution to etch away the areas not covered by the hardened film. After this step, the film is removed and the wafer is inspected to ensure proper image transfer.
[0026] In the doping stage, atoms with one less or one more electron than the material are introduced into the exposed wafer area to change the electrical properties of the silicon. For silicon, these atoms are boron and phosphorus. Adding an atom with one more electron is called "N-type doping" because it adds free electrons to the silicon lattice, giving the material a negative charge. Adding an atom with one less electron is called "P-type doping" because the added atoms create holes in the silicon lattice where the silicon electrons have nothing to bond to. This creates a positive charge. Both doping types make semiconductors excellent conductors. Manufacturers then repeat these steps (deposition to doping) several times until the final layer is completed and all active circuits are formed.
[0027] More relevant to this application is the dielectric deposition and plating stage. After completing the internal portion of the semiconductor, manufacturers connect the device by adding metal and insulator layers. This both protects these circuits and creates a connection between the internal workings of the semiconductor and the outside world. A final insulating layer is added to protect the circuits from damage and contamination. Openings are etched into the film to allow access to the top metal plate. Plating is one of the final steps in the semiconductor manufacturing process, but plays an important role as a protective shell and an interaction layer between the internal circuitry of the semiconductor and the outside world.
[0028] Manufacturers typically plate semiconductors using a process called electroplating. The process, also known as electrodeposition, deposits a thin layer of metal onto the surface of a workpiece, called a substrate. The plated metal is connected to a positively charged electrode of a circuit. This electrode is called an anode. The workpiece, or substrate, is placed at a negatively charged electrode, called a cathode. Both the plated metal and the substrate are immersed in an electrolyte solution called a bath. After immersion, a DC current is supplied to the anode to oxidize the atoms of the plated metal and dissolve them into the bath. At the cathode, the negative charge reduces the atoms, causing them to plate the substrate.
[0029] In the case of gold electroplating, the plated metal is not used as an anode. An inert anode is used where the generation of oxygen (or oxidation of the sulfite in the case of a sulfite-containing bath) completes the circuit. Gold ions are provided as a soluble component of the plating bath and are regenerated by applying gold ions to the bath. In the case of gold electroplating, direct current or pulsed current may be used.
[0030] Current semiconductor electroplating is done on a much smaller scale than the average electroplating process. The chip in question is typically less than an inch in diameter, and the circuitry within it may consist of tiny wires or structures that are only nanometers in size. Any misstep, such as cracks or dust particles introduced into the semiconductor, could result in a defective product. Therefore, semiconductor electroplating involves many extra precautions and considerations to ensure the quality of the finished product.
[0031] As described above, the inventors of this case have confirmed that the instability of the Au plating bath is related to the reduction of the bath components located at the cathode (wafer surface) during plating. In the plating bath, the cumulative cost of these reduced substances is extremely high because these substances can cause wafer defects, affecting wafer yield and bath life. Specifically, the expensive Au plating bath is susceptible to this degradation. In some embodiments of the present case, when a highly or frequently exposed electroplating bath is provided, the bath degradation products produced are reoxidized to a stable state at the anode. The result may include substantial elimination of wafer defects and extended bath life. Certain embodiments improve wafer yield and bath life by removing the separation of the anode chamber and the cathode chamber and forcing all flows to cross the anode to provide improved irrigation (irrigation) to the anode. Specific embodiments in this regard are further described below.
[0032] Some conventional devices for inert anode plating use a membrane disposed between the anode and the wafer to prevent oxygen bubbles generated at the anode from reaching the wafer. The anode chamber is not really isolated from the cathode electrolyte because the two return to the bath and mix in the bath. The tank flow is split between the anode chamber and the plating tank, and for plating uniformity, most of the flow moves to the plating tank to maximize the shear flow at the wafer. Therefore, the bath solution flow rate in the anode chamber is very low. Low anode chamber flow rate can cause limited oxidation / regeneration of the degradation components generated on the wafer surface.
[0033] In certain embodiments of the present invention, all bath flows are forced through the anode before moving to the wafer. More specifically, in one embodiment, conventional bath membranes are removed, and the standard tank inlet and anode chamber outlet are removed so that all bath flows pass through the anode and directly reach the wafer. Since the sulfite-based Au bath does not produce oxygen bubbles (at the anode, the sulfite is directly oxidized to sulfate, rather than producing O2 from H2O), a membrane is not necessary. The bath solution flows through the anode and reaches the wafer cross-flow area. In some examples described herein, a reconfigured inlet manifold and anode are provided to maximize irrigation and simultaneously increase the anode area by at least 3 times to maximize anode exposure. Another embodiment includes configuring the anode closer to the wafer and using tank cross-flow to irrigate the anode, and removing the conventional tank inlet and outlet.
[0034] Figure 1 A cross section of the general components of a plating apparatus 100 for plating a metal onto a wafer 110, which is held in place by a wafer cup 120, is depicted. The apparatus 100 includes a plating tank 130, which is a dual chamber tank having an anode chamber 135 containing a metal (e.g., copper Cu or gold Au) anode 140 and an anolyte 150. In some examples of Au electroplating, a metal anode is not used. Instead, the anode 140 includes an inert mesh anode (e.g., coated with lead Pt or iridium oxide IrO x The anode 140 is a catalytic site for direct oxidation of the electrolyte. In some examples, the anode 140 oxidizes the local H2O to O2+H + , but in the case of a sulfite-based Au bath, the anode 140 catalyzes an oxidation reaction that converts the sulfite to sulfate. In some examples, the anode 140 comprises a mesh wire "plate."
[0035] Anode 140 may be configured on the bottom surface of anode chamber 135 as shown, or suspended in the form of a plate in anolyte 150. In some examples, anode chamber 135 and cathode chamber 145 are in fluid communication with each other, but are regionally separated by membrane 160, which may be supported by a support member or membrane frame 170. In the case of a gold plating system or other hardware using an inert anode, the membrane is not an ionic membrane. It is a porous membrane that is not ion selective and serves only as a structural element for blocking bubbles and restricting flow.
[0036] The plating apparatus 100 includes a flow-shaping plate 180. The flow-shaping plate 180 may also be referred to as an "ion-resistive plate with channels" (CIRP) 180 or an "ion-resistive element with channels". During plating, the CIRP 180 is positioned between the working electrode (i.e., the wafer 110 or substrate) and the counter electrode (i.e., the anode 140) in order to shape the electric field and control the flow characteristics of the electrolytes (anolyte and catholyte).
[0037] Flow diverter 190 is arranged on the top of CIRP 180, and helps to produce lateral shear flow.Via flow port 105, catholyte is imported into cathode chamber 145 (above film 160).These flow ports 105 can be arranged at different heights in plating equipment 100.Cathode electrolyte passes through CIRP 180 upwards from flow port 105 and produces the impact flow on the lower side plating surface of wafer 110.Except catholyte flow port 105, extra flow port 115 also imports catholyte at its outlet located at position 125, and this position is located at the far side of vent or gap 135 of flow diverter 190.In this example, the outlet of flow port 115 is formed as the passage in CIRP 180. One functional result is that in order to enhance lateral flow across the wafer surface and thereby normalize the flow vector across the wafer 110 (and CIRP 180), the catholyte flow is directed into a virtual chamber formed between the CIRP 180 and the wafer plating surface.
[0038] Fig. 2 depicts a cross section of the general components of a conventional plating apparatus 200 for plating Au onto a wafer 210, which is held in place by a wafer cup 220. The apparatus 200 includes a plating tank 230, which is a dual chamber tank having an anode chamber 235 containing a mesh inert anode 240 and an anolyte. The anode chamber 235 is in fluid communication with the cathode chamber 245, but is regionally separated by a membrane 260. The plating apparatus 200 includes a CIRP 280, which is disposed between a working electrode (i.e., wafer 210) and a counter electrode (i.e., anode 240) in order to shape the electric field and control the flow characteristics of the electrolyte (anolyte and catholyte) during plating.
[0039] Plating equipment 200 has wafer flow inlet 212 and anode chamber inlet 214. Plating equipment 200 also comprises wafer flow outlet 216 and anode chamber outlet 224. The electrolyte stream 218 that shunts and introduces between anode chamber inlet 214 (2lpm) and wafer flow inlet 212 (14lpm upper stream, 4lpm lower stream), that is, most electrolyte streams 218 eventually move to wafer 210. Flow from inlet 214 through anode chamber 235 is shown by dotted arrow 226. By inlet 212 and 214 and arrive at the example flow rate of the electrolyte of outlet 216 and 224, as shown in the figure, it is represented with liter / minute (lpm).
[0040] In some embodiments of the present invention, for example Figure 3A-3B As shown in the cross-sectional view of FIG. 2 , inlets 212 and 214 and outlets 216 and 224 have been removed or modified. Components similar to those shown in FIG. 2 are labeled accordingly. Figure 3A As shown, all electrolyte flow 318 (20 lpm) enters anode chamber 335, passes through inert anode 340, and then flows upward to wafer 310 at 342. Figure 3B As illustrated, the membrane 365 (shown in Figure 3A , but not shown in Figure 3B ) indicates that there is no obstruction and this has no effect on flow 342. In some examples, if membrane 360 is provided, membrane 360 may include a polypropylene mesh. The material of membrane 360 may include a fabric or non-woven fabric with 120 μm openings. The membrane material is selected to provide little (if any) resistance to fluid flow.
[0041] Figure 4A cross section of the common components of another example of a plating apparatus 400 of the present disclosure is depicted. This example can plate Au onto a wafer (not shown). The apparatus 400 includes an upper side plug 420 for CIRP. The plug 420 can seal the flow to some extent when the cup (holding the wafer) is lowered into place during the plating operation. The apparatus 400 includes a plating tank 430, which is a dual chamber tank having an anode chamber 435 containing a mesh inert anode 440, which is placed above a feed plate 455 having holes and is secured by gap pins 500 (shown in more detail in FIG. 1 ). Figure 5 (in the middle) is fixed to the feed plate.
[0042] Anode chamber 435 also contains an anolyte. In some examples, anode chamber 435 and cathode chamber 445 are in fluid communication with each other but may be regionally separated by a filter or mesh (not shown) which, when in use, may be supported by downwardly tapered membrane frame 470. The filter or mesh allows fluid flow but may filter out certain particles. In some embodiments, no membrane and membrane frame 470 are provided (e.g., as described above). Figure 3B shown).
[0043] The plating apparatus 400 includes a flow shaping plate or CIRP 480. During plating, in order to shape the electric field and control the flow characteristics of the electrolytes (anolyte and catholyte), the CIRP 480 is positioned between the working electrode and the counter electrode (i.e., the anode 440). A walled ring 485 can be provided with the CIRP 480, which allows the electrolyte solution to flow through the walls of the ring during operation so that the liquid level of the solution is maintained at that height.
[0044] The electrolyte enters the plating apparatus 400 via inlets 414A and 416A, which are in fluid communication with conduits labeled 414B and 416B, and flows upward in the direction of arrow 442 toward the wafer through the holes of the feed plate 455 and the mesh anode 440. The conduits 414B and 416B may be integrally formed as a circular path below the feed plate 455.
[0045] The absence of membrane and membrane frame 470 can maximize flow 442 from anode 440 to wafer. Feed plate 455 can be sealed to the dual chamber tank near its outer perimeter at 482 to promote complete and uniform flow of electrolyte from conduits 414B and 416B to anode 440. The electrolyte flow cannot leak near the edge of feed plate 455. Anode gap pins 500 allow the flow to meet in the space between feed plate 455 and anode 440 and enhance anode irrigation.
[0046] refer to Figure 5, gap pin 500 comprises head 504, rod 506 and foot 508.Rod 506 passes through the hole of appropriate size in anode 440, and foot 508 is maintained in the hole of appropriate size in feed plate 455.The length of gap pin 500 or " rise (rise) " 510 can play an important role when promoting the uniform flow distribution in plating equipment 400.The rise 510 of gap pin 500 can be designed or adjusted, to regulate the distance 502 of anode to plate (anode-to-plate) between anode 440 and feed plate 455, anode 440 is supported above the feed plate by gap pin 500.According to the geometry of feed plate, the height of a plurality of gap pins is limited in the gap between anode and feed plate, and wherein this height is in the scope of 0.39 to 0.59 inch.
[0047] refer to Figure 6 In some examples of plating apparatus, an exemplary anode 440 may include a composite anode comprising multiple layers, and in some examples, each layer has the same or different anode properties. Figure 6 As shown, three inert anode layers 440A, 440B, and 440C are stacked on top of each other to form a structure having, for example, Figure 5 4. A composite anode in cross-section as shown. Each layer is slightly offset relative to the other layer to define openings 602 or different shapes in the multi-layer mesh structure of the anode 440. The holes 602 can allow for increased electrolyte flow through the layers. In this view, the top of the gap pin 500 can be seen, and in this case, the position of the gap pin 500 has been moved to an opening 602 that is large enough to accommodate it.
[0048] In some examples, the exposed surface of the anode 440, such as a composite anode, increased anode exposure by up to three times in testing. In some examples, the flow (arrow 442, Figure 4 ) is increased by up to twenty times. In some examples, the increase in anode exposure, combined with the increase in irrigation flow through the anode, improves the plated structure by up to sixty times.
[0049] Anode 440 (or 140, or 340, or a layer thereof) may include iridium oxide (IrO2) as an exemplary anode material. Lead (Pt) and gold (Au) anode materials are also feasible. In this regard, Figure 7 The results of linear sweep voltammetry tests for sample anodes containing Pt, Au, and Ir materials are shown. These test results show that in the test cell, an anodic current (mA) exists at negative voltammetric values (region 702). The anodic reaction may include an oxidation reaction of sulfite to sulfate material, such as SO3 2- +2OH - →SO4 2- +2H+ These test results also show a linear current ramp for each anode sample at 704 until an inflection point 706 representing further oxidation of sulfite to sulfate. In further testing, current densities as high as 23.4 A for a single anode, or equivalent values of >70 A for a tri-stack anode, have been obtained without the formation of O2 bubbles.
[0050] In some examples, increasing the inert anode area can significantly reduce the area of wafer defects. For example, a single 300 mm anode (mesh) layer (e.g., anode layer 440A) provides approximately 116 in. 2 The surface of IrO2 that can be exposed to the electrolyte. This area includes the top surface, bottom surface, and side surface of a given layer. In some examples of composite anode 440, top anode layer 440A exposes approximately 33in. 2 The bottom anode layer 440C is also exposed to the electrolyte for about 33 inches. 2 The exposed surface area of the composite anode 440 is provided by the sides of the layers 440A-C of the composite anode 440. Considering the overlapping area when the three anode layers 440A, 440B, and 440C of the composite anode 440 are stacked together to form a mesh structure with holes, the ratio of the exposed mesh anode area to the cathode area is in the range of 0.6-0.7 based on the top anode surface area. In some examples, the ratio of the exposed mesh anode area to the cathode area is in the range of 1.8-21.1 based on the total anode surface area. Other means for increasing or maximizing the surface area of the anode are feasible. For example, a single high porosity layer can be used to replace multiple layers so that the wall with a large number of holes is used to increase the useful area.
[0051] Figures 8A-8D Feed plate distribution patterns are shown for respective anode-to-plate distances 502 of zero inches (ie, anode 440 located at plate 455), 0.2 inches, 0.39 inches, and 0.59 inches. Figure 8C The uniformity of the feed plate pattern shown in Figure 4-D indicates that flow through the anode 440 positioned above the feed plate 455 can be more evenly distributed at anode-to-plate distances (or heights of gap pins 500) in the range of about 0.39 inches to 0.59 inches. In some examples, the optimal gap pin height (or anode-to-plate distance 502) for maximum improved uniformity of anode flow is about 0.55 inches.
[0052] Fig. 9The porosity and hole (opening) spacing values of an exemplary portion of the feed plate 455 are shown. In some examples, the diameter of the hole 902 is 0.040 inches, and in some examples, about 348 holes 902 are provided in the feed plate 455. The holes 902 are distributed in an exemplary grid pattern with 0.60 inch spacing between grid lines as shown. Other hole sizes and distribution patterns are feasible. In some examples, the holes 902 can be reduced in number or size to more evenly distribute the flow through the feed plate 455. In some examples, the feed plate 455 includes a plurality of holes 902 formed therein, and each hole 902 has a diameter in the range of 0.03 to 0.05 inches and is distributed in a grid pattern with a grid spacing in the range of 0.4 to 0.7 inches.
[0053] The present disclosure also includes exemplary methods. In one example, reference Fig.10 , the electroplating method 1000 includes: at 1002, passing an electrolyte solution through an electroplating apparatus, the electroplating apparatus including a wafer holder for holding a wafer during an electroplating operation and a plating tank configured to contain the electrolyte solution during the electroplating operation; at 1004, providing a membraneless anode chamber configured in the plating tank; and at 1006, energizing an anode configured in the membraneless anode chamber during the electroplating operation.
[0054] The method 1000 may further include providing a feed plate within the membraneless anode chamber, and in some examples, sealing a portion of the feed plate to a wall of the plating tank. The method 1000 may further include positioning the anode a distance D away from the feed plate, wherein the distance D is in the range of 0.39 to 0.59 inches. In some examples, the step of positioning the anode a distance D away from the feed plate includes providing a plurality of gap pins between the anode and the feed plate, and each gap pin has a height equivalent to the distance D or is capable of maintaining the distance D.
[0055] In some examples, the step of providing a feed plate within the membraneless anode chamber includes providing a feed plate having a plurality of holes therein, and each hole has a size or diameter in a range of 0.03 to 0.05 inches and is distributed in a grid pattern having a grid spacing in a range of 0.4 to 0.7 inches.
[0056] In some examples, method 1000 further includes positioning a flow shaping plate or CIRP between a wafer held in a wafer support and the anode during the electroplating operation.
[0057] In some examples, method 1000 further includes providing an anode in the anode chamber in the form of a composite anode, the composite anode including a plurality of anode layers. Method 1000 may also include arranging the layers of the composite anode in a staggered or offset form relative to each other to define openings or different pores of the mesh structure of the anode.
[0058] In some examples, a non-transitory machine-readable medium, as further described below, includes instructions 1124 that, when read by the machine 1100, cause the machine to control operations in the method, including at least the non-limiting example operations outlined above.
[0059] Fig.11 1 is a block diagram illustrating an example of a machine 1500, on which one or more exemplary processing embodiments described herein may be implemented, or one or more exemplary processing embodiments described herein may be controlled by a machine. In alternative embodiments, the machine 1100 may operate as a standalone device or may be connected (e.g., networked) to other machines. In a networked deployment, the machine 1100 may operate in a server-client network environment with the capabilities of a server machine, a client machine, or both a server machine and a client machine. In an example, the machine 1100 may act as a peer in a peer-to-peer (P2P) (or other distributed) network environment. In addition, although only a single machine 1100 is described, the term "machine" should also be considered to include a collection of any machines that individually or collectively execute a set (or multiple sets) of instructions to perform any one or more of the methods discussed herein, such as via cloud computing, software as a service (SaaS), or other computer cluster configurations.
[0060] Examples as described herein may include logic, multiple components or mechanisms, or may be operated by logic, multiple components or mechanisms. A circuit system is a collection of circuits implemented in a tangible entity, including hardware (e.g., simple circuits, gates, logic, etc.). Circuit system qualifications may be flexible over time and with potential hardware variability. A circuit system includes components that can perform specified operations individually or in combination when operating. In one example, the hardware of the circuit system may be designed to perform specific operations (e.g., hardwired) invariably. In one example, the hardware of the circuit system may include variably connected physical components (e.g., execution units, transistors, simple circuits, etc.), which include computer-readable media modified by physical properties (e.g., magnetic, electrical, movable placement of unchanged clustered particles, etc.) to encode instructions for specific operations. In terms of connecting physical components, the potential electrical properties of hardware components are changed (e.g., from insulators to conductors, or vice versa). Instructions enable embedded hardware (e.g., execution units or loading mechanisms) to establish components of the circuit system in hardware via variable connections to perform partial specific operations when operating. Thus, when the device is operating, the computer readable medium is communicatively coupled to other components of the circuit system. In one example, any of the physical components can be used in more than one component of more than one circuit system. For example, in an operational state, an execution unit can be used in a first circuit of a first circuit system at one point in time and reused by a second circuit in the first circuit system, or by a third circuit in the second circuit system at a different time.
[0061] The machine (e.g., computer system) 1100 may include a hardware processor 1102 (e.g., a central processing unit (CPU), a hardware processor core, or any combination thereof), a graphics processing unit (GPU) 1103, a main memory 1104, and a static memory 1106, some or all of which may communicate with each other via an interconnection link (e.g., a bus) 1108. The machine 1100 may also include a display device 1110, an alphanumeric input device 1112 (e.g., a keyboard), and a user interface (UI) navigation device 1114 (e.g., a mouse). In one example, the display device 1110, the alphanumeric input device 1112, and the UI navigation device 1114 may be a touch screen display. The machine 1100 may additionally include a mass storage device (e.g., a drive unit) 1116, a signal generating device 1118 (e.g., a speaker), a network interface device 1120, and one or more sensors 1121 (such as a global positioning system (GPS) sensor, a compass, an accelerometer, or another sensor). The machine 1100 may include an output controller 1128, such as a serial (e.g., universal serial bus (USB)), parallel, or other wired or wireless (e.g., infrared (IR), near field communication (NFC), etc.) connection to communicate with or control one or more peripheral devices (e.g., a printer, a card reader, etc.).
[0062] The mass storage device 1116 may include a machine-readable medium 1122 on which is stored one or more sets of data structures or instructions 1124 (e.g., software) embodied or utilized by any one or more of the techniques or functions described herein. The instructions 1124 may also reside, completely or at least partially, within the main memory 1104, within the static memory 1106, within the hardware processor 1102, or within the GPU 1103 during execution thereof by the machine 1100. In an example, one or any combination of the hardware processor 1102, the GPU 1103, the main memory 1104, the static memory 1106, or the mass storage device 1116 may constitute the machine-readable medium 1122.
[0063] Although the machine-readable medium 1122 is illustrated as a single medium, the term "machine-readable medium" may include a single medium or multiple media (e.g., a centralized or distributed database, and / or associated caches and servers) configured to store one or more instructions 1124.
[0064] The term "machine-readable medium" may include any medium that can store, encode, or carry instructions 1124 for execution by the machine 1100 and cause the machine 1100 to perform any one or more of the techniques of the present disclosure, or that can store, encode, or carry data structures used by or associated with the instructions 1124. Non-limiting examples of machine-readable media may include solid-state memory, and optical and magnetic media. In one example, the clustered machine-readable medium includes a machine-readable medium 1122 having a plurality of particles, the particles having a constant (e.g., stationary) mass. Therefore, the clustered machine-readable medium is not a transient propagating signal. Specific examples of clustered machine-readable media may include non-volatile memory, such as semiconductor memory devices (e.g., electrically programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM)) and flash memory devices; magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks. The instructions 1124 may also be transmitted or received over the communication network 1126 via the network interface device 1120 using a transmission medium.
[0065] Although the embodiments have been described with reference to specific exemplary embodiments, it is obvious that various modifications and changes can be made to these embodiments without departing from the broader scope of the subject matter of the present invention. Therefore, the description and the drawings should be regarded as illustrative rather than restrictive. The drawings forming a part of this article show specific embodiments by way of illustration and not limitation, in which the subject matter can be implemented. The illustrated embodiments are described in sufficient detail to enable those skilled in the art to practice the teachings disclosed herein. Other embodiments can be used and derived therefrom, so that structural and logical substitutions and changes can be made without departing from the scope of the present disclosure. Therefore, this detailed description should not be regarded as having a limiting meaning, and the scope of the various embodiments is limited only by the attached claims, the complete scope of the equivalent schemes given with these claims.
[0066] Such embodiments of the subject matter of the present invention may be referred to herein individually and / or collectively by the term "invention" for convenience only, and if more than one invention or inventive concept is in fact disclosed, it is not intended to automatically limit the scope of the present application to any single invention or inventive concept. Therefore, although specific embodiments have been illustrated and described herein, it should be understood that any configuration calculated to achieve the same purpose may replace the specific embodiments shown. The present disclosure is intended to cover all adaptations or variations of the various embodiments. Upon reviewing the above description, the combination of the above embodiments with other embodiments not specifically described herein will be apparent to those skilled in the art.
Claims
1. An electroplating device for electroplating a wafer, the electroplating device comprising: a wafer holder for holding the wafer during the electroplating operation; a plating tank configured to contain an electrolyte during said electroplating operation; a feed plate having holes; as well as A mesh anode is placed above the feed plate having holes; and A membraneless anode chamber holds the mesh anode and the feed plate with holes, wherein the membraneless anode chamber is disposed within the plating tank and is configured to allow all bath flow to flow upward toward the wafer through the feed plate with holes and the mesh anode.
2. The electroplating apparatus according to claim 1, further comprising: A plurality of anode-to-feed plate gap pins extend through the electrolyte, wherein the mesh anode is supported above and secured to the perforated feed plate by the plurality of anode-to-feed plate gap pins.
3. The electroplating apparatus of claim 2, wherein a portion of each gap pin includes a riser to provide a selected anode to feed plate distance for the electroplating operation.
4. The electroplating apparatus of claim 3, wherein the raised portions of the plurality of anode to feed plate gap pins provide the selected anode to feed plate distance in the range of 0.39 to 0.59 inches.
5. The electroplating apparatus of claim 1 further comprising a flow shaping plate or CIRP disposed between a wafer held in the wafer holder and the mesh anode during the electroplating operation.
6. The electroplating apparatus according to claim 1, wherein a portion of the feed plate having the hole is sealed with a wall of the plating tank.
7. The electroplating apparatus according to claim 1, wherein the mesh anode is a composite anode and comprises a plurality of anode layers.
8. The electroplating apparatus of claim 7, wherein each of the plurality of anode layers is offset relative to one another to define openings or distinct pores of the mesh structure of the mesh anode.
9. The electroplating apparatus of claim 1, wherein the feed plate having holes includes a plurality of holes formed therein, wherein each hole has a diameter in the range of 0.03 to 0.05 inches and is distributed in a grid pattern, the grid pattern having a grid spacing in the range of 0.4 to 0.7 inches.
10. The electroplating apparatus of claim 1, wherein the mesh anode is a composite anode comprising a three-layer mesh structure, and each of the three layers of the mesh structure are offset relative to each other to define irregularly shaped pores extending therethrough.
11. A method for electroplating a wafer, the method comprising: An electroplating device is provided, the electroplating device comprising: Wafer holder, Plating tank, A feed plate with holes, a mesh anode, which is placed above the feed plate having holes, and a membraneless anode chamber that holds the mesh anode and the feed plate with holes, placing the membraneless anode chamber within the plating tank; containing an electrolyte within the plating tank during the electroplating operation; and allowing all bath flow to flow upward toward the wafer through the feed plate with holes and the mesh anode.
12. The method of claim 11 further comprising supporting the mesh anode above and securing the perforated feed plate to the perforated feed plate using a plurality of anode to feed plate gap pins extending through the electrolyte.
13. The method according to claim 12, further comprising: The riser portion of each gap pin is utilized to provide a selected anode to feed plate distance for the electroplating operation.
14. The method of claim 13, wherein the selected anode to feed plate distance is in the range of 0.39 to 0.59 inches.
15. The method according to claim 11, further comprising: During the electroplating operation, a flow shaping plate or CIRP is positioned between the wafer held in the wafer holder and the mesh anode.
16. The method according to claim 11, further comprising: A portion of the feed plate having holes is sealed to a wall of the plating tank.
17. The method of claim 11, wherein the mesh anode is a composite anode comprising a plurality of anode layers, the method further comprising offsetting each of the plurality of anode layers relative to each other to define openings or different pores in the mesh structure of the mesh anode.
18. The method according to claim 11, further comprising: A plurality of holes formed in the feed plate having holes, each hole having a diameter in the range of 0.03 to 0.05 inches and distributed in a grid pattern having a grid spacing in the range of 0.4 to 0.7 inches.
19. The method of claim 11, wherein the mesh anode is a composite anode comprising a three-layer mesh structure, the method further comprising offsetting each of the three-layer mesh structure relative to each other to define irregularly shaped pores extending therethrough.
20. The method of claim 11, further comprising: The exposed surface area of the mesh anode is increased to enhance irrigation flow through the mesh anode and improve plating structure.