On-chip metasurface and design method thereof

Abstract

The invention belongs to the technical field of micro-nano optics, and discloses an on-chip metamaterial surface and a design method thereof. The unit structure of the on-chip metasurface comprises a substrate layer, a waveguide layer and a nano column arranged on the working face of the waveguide layer, the long axis and the short axis of the nano column are parallel to the x axis and the y axis respectively, and the heights of all the nano columns contained in the on-chip metasurface are the same; a plurality of nano columns contained in the on-chip meta-structure surface form one or more groups of nano column arrays, the geometric sizes of all the nano columns contained in each group of nano column arrays are the same, and the geometric sizes of the nano columns contained in different groups of nano column arrays are different; for each group of nano-column arrays, light is incident from the waveguide layer in a transverse magnetic mode, and the geometric dimensions of the nano-columns in the group of nano-column arrays are determined by taking the highest extraction efficiency of a certain target wavelength in emergent light and the lowest extraction efficiency of other wavelengths as an optimization target. According to the invention, selective extraction of a certain wavelength range or multiple groups of wavelength ranges can be realized.

Description

Technical Field

[0001] The present invention belongs to the field of micro-nano optical technology, and more specifically, relates to an on-chip metasurface and a design method thereof. Background Art

[0002] Metasurface is an artificially designed periodic structure at the micro-nano level that can finely control electromagnetic waves by adjusting the shape and size of the surface structure, the physical properties of the material, and other factors. By utilizing the control ability of metasurfaces, light fields can be manipulated, thereby achieving high-resolution holographic imaging and encrypted transmission. The compact structure and relatively low processing difficulty of metasurfaces make them show great application potential in many optical fields, such as dynamic holographic display, optical communication, and optical information encryption. Recently, the integration of metasurfaces into optical waveguides has become a compact platform for nanoscale waveguide operations, facilitating on-chip light manipulation functions such as optical coupling / decoupling, focusing, and complex light field engineering, including applications such as nanoprinting and metaholography. It is worth noting that on-chip displays based on metasurfaces benefit from the advantage of no zero-order diffraction, which enhances image contrast and fidelity, making them very promising in advanced display technologies.

[0003] Although the modulation capabilities of on-chip metasurfaces have been widely studied, such as phase modulation, intensity modulation, and polarization modulation, most on-chip metasurfaces to date exhibit broadband responses, providing similar optical performance at different wavelengths, making it difficult to achieve wavelength-selective extraction. Summary of the invention

[0004] The present invention solves the problem in the prior art that it is difficult to achieve wavelength selective extraction on a chip metasurface by providing an on-chip metasurface and a design method thereof.

[0005] The present invention provides a method for designing an on-chip metasurface, comprising the following steps:

[0006] Constructing a unit structure of an on-chip metasurface, the unit structure comprising a base layer, a waveguide layer located above the base layer, and a nanocolumn arranged on a working surface of the waveguide layer; taking directions parallel to two sides of the working surface as the x-axis and the y-axis respectively, the major axis and the minor axis of the nanocolumn are parallel to the x-axis and the y-axis respectively, and all the nanocolumns included in the on-chip metasurface have the same height; the plurality of nanocolumns included in the on-chip metasurface constitute one or more groups of nanocolumn arrays, all the nanocolumns included in each group of nanocolumn arrays have the same geometric size, and nanocolumns included in nanocolumn arrays of different types have different geometric sizes;

[0007] The target wavelength of the on-chip metasurface is set; for each group of nanocolumn arrays, light is incident from the waveguide layer in a transverse magnetic mode, and the geometric dimensions of the nanocolumns in the group of nanocolumn arrays are determined with the highest extraction efficiency of a certain target wavelength in the output light and the lowest extraction efficiency for other wavelengths as the optimization goal.

[0008] Preferably, when the plurality of nanopillars included in the on-chip metasurface constitute multiple groups of nanopillar arrays, multiple nanopillar arrays of different types are horizontally cascaded, and the on-chip metasurface selectively extracts guided waves of different wavelengths from different spatial positions into free space.

[0009] Preferably, the design method of the on-chip metasurface further comprises: setting a target emission angle of the on-chip metasurface; adjusting the geometric dimensions P of the working surface of the waveguide layer in the unit structure along the x-axis and the y-axis. x and P y As a period parameter; for each group of nanorod arrays, the period parameter of the group of nanorod arrays is determined according to a certain target emission angle.

[0010] Preferably, when determining the periodic parameters of the group of nanorod arrays, the goal is to ensure that the emission angle of the -1st order light extracted by the group of nanorod arrays is within the angle range that can be received by the microscope used for observation, and the periodic parameters of the group of nanorod arrays are obtained according to the grating formula and momentum superposition calculation.

[0011] Preferably, the on-chip metasurface comprises a plurality of nanocolumn arrays of different groups that are horizontally cascaded, and the design method of the on-chip metasurface further comprises: acquiring a target color nanoprinting image, and determining a final arrangement of a plurality of nanocolumns contained in the on-chip metasurface according to the intensity distribution of a binary target image of the target color nanoprinting image under different wavelength channels.

[0012] Preferably, each nanocolumn included in the on-chip metasurface is located at the center of its corresponding working surface.

[0013] Preferably, the design method of the on-chip metasurface also includes: acquiring a target holographic image, obtaining a phase distribution required for the on-chip metasurface using a GS algorithm according to the target holographic image, taking each of the unit structures as a pixel point, taking a nanocolumn that is close to the left edge of the working surface in the x-axis direction and located at the midpoint of the working surface in the y-axis direction as an initial position, making a one-to-one correspondence between the phase calculated and restored for each pixel point and the displacement of each nanocolumn along the x-axis direction, determining the displacement of each nanocolumn along the x-axis direction, and obtaining a final arrangement of the plurality of nanocolumns contained in the on-chip metasurface.

[0014] Preferably, the displacement of each nanorod along the x-axis is determined in combination with the detour phase, and the on-chip metasurface extracts the detour phase of light. The displacement Δx along the x-axis of the nanopillar satisfies the following equation: Where Λ represents the period, Λ=P x , P x is the geometric dimension of the working surface of the waveguide layer in the unit structure along the x-axis.

[0015] Preferably, the displacements of the nanopillars in the on-chip metasurface along the y-axis direction are all set to 0; or, the displacements of the nanopillars in odd-numbered columns among the nanopillars in the on-chip metasurface along the y-axis direction are all set to 0, and the displacements of the nanopillars in even-numbered columns among the nanopillars in the on-chip metasurface along the y-axis direction are all set to P. y Half of P y is the geometric dimension of the working surface of the waveguide layer in the unit structure along the y-axis.

[0016] On the other hand, the present invention provides an on-chip metasurface, which is obtained by using the above-mentioned on-chip metasurface design method.

[0017] One or more technical solutions provided in the present invention have at least the following technical effects or advantages:

[0018] (1) The unit structure of the on-chip metasurface provided by the present invention comprises a base layer, a waveguide layer located above the base layer, and a nanocolumn arranged on a working surface of the waveguide layer; the directions parallel to the two sides of the working surface are respectively used as the x-axis and the y-axis, the major axis and the minor axis of the nanocolumn are respectively parallel to the x-axis and the y-axis, and the heights of all the nanocolumns contained in the on-chip metasurface are the same; the plurality of nanocolumns contained in the on-chip metasurface constitute one or more groups of nanocolumn arrays, and the geometric dimensions of all the nanocolumns contained in each group of nanocolumn arrays are the same, and the geometric dimensions of the nanocolumns contained in different groups of nanocolumn arrays are different; for each group of nanocolumn arrays, light is incident from the waveguide layer in a transverse magnetic mode, and the geometric dimensions of the nanocolumns in the group of nanocolumn arrays are determined with the optimization goal of maximizing the extraction efficiency of a certain target wavelength in the output light and minimizing the extraction efficiency of other wavelengths. The present invention can achieve selective extraction of a certain wavelength range or multiple groups of wavelength ranges by adjusting the geometric dimensions of the nanocolumn array. The present invention utilizes the precise light manipulation capability of the on-chip metasurface to achieve wavelength selective extraction, and realizes wavelength division multiplexing and wavelength selective extraction when multiple different groups of nanocolumn arrays contained in the on-chip metasurface are horizontally cascaded.

[0019] (2) In order to further ensure that the correct color can be observed after wavelength selective extraction is achieved, the present invention also sets a target emission angle of the on-chip metasurface, and for each group of nanopillar arrays, determines the periodic parameters of the group of nanopillar arrays according to a certain target emission angle.

[0020] (3) When the on-chip metasurface provided by the present invention includes multiple nanopillar arrays of different groups and types, and is horizontally cascaded, after determining the geometrical dimensions of the nanopillars, the present invention can further determine the final arrangement of the several nanopillars included in the on-chip metasurface according to the intensity distribution of the binary target image of the target color nanoprinting image under different wavelength channels. That is, the present invention can also set the arrangement of the nanopillar array to a specific target image, and the extracted light can form a color nanoprinting image, and the on-chip metasurface can realize a high-performance color near-field nanoprinting image function.

[0021] (4) After determining the geometric size of the nanopillars, the present invention can further use the GS algorithm to obtain the phase distribution required by the on-chip metasurface according to the target holographic image, and take each of the unit structures as a pixel point to obtain the final arrangement of the nanopillars contained in the on-chip metasurface. That is, the present invention can also achieve high-performance far-field holographic images and AR displays. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a functional schematic diagram of the on-chip metasurface provided by the present invention;

[0023] Figure 2 is a schematic diagram of a unit structure in an on-chip metasurface provided by the present invention;

[0024] Figure 3 is a graph showing the experimental results of the relationship between the geometric dimensions of the nanorods and the wavelength selectivity in Example 1 of the present invention;

[0025] Figure 4 is an experimental result diagram of the relationship between the period parameter and wavelength selectivity of the unit structure in Example 1 of the present invention;

[0026] Figure 5 This is a schematic diagram of the experimental test light path of the color nano-printing image provided by Example 3 of the present invention;

[0027] Figure 6 It is a local scanning electron microscope image of the structure corresponding to the nano-printed image with different wavelength selectivity manufactured in Example 3 of the present invention and the corresponding spectrum of the structure;

[0028] Figure 7 is an experimental result diagram of a near-field color nanoprinting image implemented in Example 3 of the present invention;

[0029] Figure 8 is a flow chart of designing a nanorod array using a four-step circuitous phase according to Embodiment 5 of the present invention;

[0030] Fig. 9 is a local scanning electron microscope image of the on-chip metasurface manufactured in Example 5 of the present invention;

[0031] Fig.10 This is a schematic diagram of an experimental optical path for a far-field color holographic display function provided by Example 5 of the present invention;

[0032] Fig.11 is a diagram showing the experimental results of the two-wavelength color holographic display implemented in Example 5 of the present invention;

[0033] Fig.12 Schematic diagram of an experimental device for AR display shooting according to Embodiment 5 of the present invention;

[0034] Fig.13 This is a diagram of the AR display implementation result achieved in Example 5 of the present invention. DETAILED DESCRIPTION

[0035] In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0036] The functional schematic diagram of the on-chip metasurface provided by the present invention is as follows Figure 1 As shown, wavelength selective extraction, wavelength division multiplexing, color routing nano-printing and holographic images can be realized.

[0037] Embodiment 1:

[0038] Embodiment 1 provides a method for designing an on-chip metasurface, comprising the following steps:

[0039] Step 1: Construct the unit structure of the on-chip metasurface.

[0040] See also Figure 2 The unit structure includes a base layer, a waveguide layer located above the base layer, and a nanocolumn arranged on a working surface of the waveguide layer; the directions parallel to the two sides of the working surface are respectively used as the x-axis and the y-axis, the major axis L and the minor axis W of the nanocolumn are respectively parallel to the x-axis and the y-axis, and the height H of all the nanocolumns included in the on-chip metasurface is the same; the several nanocolumns included in the on-chip metasurface constitute one or more groups of nanocolumn arrays, and the geometric dimensions of all the nanocolumns included in each group of nanocolumn arrays are the same, and the geometric dimensions of the nanocolumns included in different groups of nanocolumn arrays are different.

[0041] Step 2: Use electromagnetic simulation tools to optimize the parameters of the unit structure of the on-chip metasurface.

[0042] The target wavelength of the on-chip metasurface is set; for each group of nanocolumn arrays, light is incident from the waveguide layer in a transverse magnetic mode, and the geometric dimensions of the nanocolumns in the group of nanocolumn arrays are determined with the highest extraction efficiency of a certain target wavelength in the output light and the lowest extraction efficiency for other wavelengths as the optimization goal.

[0043] Wherein, when the plurality of nanopillars included in the on-chip metasurface form a plurality of nanopillar arrays, a plurality of nanopillar arrays of different types are horizontally cascaded, and the on-chip metasurface selectively extracts guided waves of different wavelengths from different spatial positions into free space, see Figure 1 .

[0044] In addition, in order to further ensure that the correct color can be observed after wavelength selective extraction is achieved, the design method of the on-chip metasurface may further include:

[0045] Step 3: Set the target emission angle of the on-chip metasurface; adjust the geometric dimensions P of the working surface of the waveguide layer in the unit structure along the x-axis and the y-axis. x and P y As a period parameter, see Figure 2 ; For each group of nanorod arrays, the period parameters of the group of nanorod arrays are determined according to a certain target emission angle.

[0046] Specifically, when determining the periodic parameters of the group of nanocolumn arrays, the target is that the exit angle of the -1 order light extracted by the group of nanocolumn arrays is within the angle range that can be received by the microscope used for observation, and the periodic parameters of the group of nanocolumn arrays are obtained according to the grating formula and momentum superposition calculation. That is, the periodic parameters are mainly determined according to the exit angle, and the period of the working surface of the unit structure is determined by calculating the structural period corresponding to the intensity of the scattered light observed within the set observation angle range.

[0047] The substrate layer may be a fused silica substrate layer (i.e., a SiO2 substrate layer), the waveguide layer may be a silicon nitride waveguide layer (i.e., a Si3N4 waveband layer), and the nanopillars may be micro-nano silicon nanopillars, which may be prepared by techniques such as electron beam exposure, thermal evaporation, and reactive ion etching. That is, the on-chip metasurface is composed of a structural layer, a waveguide layer, and a substrate layer from top to bottom, and the entire substrate layer and the entire waveguide layer are divided into a plurality of periodic unit structures of the same size, and the entire structural layer includes a plurality of nanopillars. All the nanopillars contained in the on-chip metasurface have the same height, for example, may be 350nm to 380nm.

[0048] The length, width and period parameters of the nanocolumns in the on-chip metasurface provided in Example 1 can be designed, and nanocolumn arrays corresponding to different size parameters have different wavelength selectivities, and can realize the demultiplexing function of wavelength division multiplexing.

[0049] Specifically, Figure 3 FIG. 1 is an experimental result diagram of the relationship between the geometric dimensions and wavelength selectivity of the nanorods actually manufactured in Example 1, wherein Figure 3 The left picture in the figure is an optical image of the structural color change corresponding to the change in the length and width of the nanocolumns. Figure 3 The right figure in the figure shows the corresponding spectra of four selected structures that are selective for different wavelengths.

[0050] Figure 4 Graph showing the experimental results of the relationship between the periodic parameters and wavelength selectivity of the unit structure in Example 1, wherein Figure 4 (a) is the period of changing the x-axis direction (i.e. P x ) corresponds to the spectrum of the structure, Figure 4 (b) is the period of changing the y-axis direction (i.e. P y ) corresponds to the spectrum of the structure, Figure 4 (c) is the optical image of the structure with periods from small to large in the x-axis direction under simultaneous incidence of red and green wavelengths. Figure 4 (d) is the optical image of the structure with a period from small to large in the y-axis direction under the simultaneous incidence of red and green wavelengths.

[0051] In summary, the on-chip metasurface provided in Example 1 can realize the selective extraction of waveguides of different wavelength components and wavelength division multiplexing of visible light after the incident transverse magnetic mode beam. That is, under the incident waveguide of the transverse magnetic mode, the wavelength selectivity generated by the micro-nanostructure layer of the on-chip metasurface realizes the specific extraction of different wavelength components. By cascading (i.e., horizontally cascading) micro-nanostructures with different size parameters, the demultiplexing function of wavelength division multiplexing can be realized.

[0052] Embodiment 2:

[0053] Embodiment 2 provides an on-chip metasurface, which is obtained by using the design method of the on-chip metasurface provided in Embodiment 1.

[0054] On the basis of Example 1, by designing the arrangement of the nanocolumn array as a specific target image, the extracted light will form a nano-printed image when observed within a specific range of observation angles; the circuitous phase encoding can be used to achieve holographic image display and enhanced display (Augmented Reality, AR). For example, when observing with a microscope, the numerical aperture NA of the microscope is used as the observation angle, and when designing the on-chip metasurface, ensure that the nanocolumn array extracts the -1st order light within the angle range that the microscope can receive, so as to ensure that the correct color can be observed. The following is an explanation of Examples 3 to 6.

[0055] Embodiment 3:

[0056] Embodiment 3 provides a design method for an on-chip metasurface. The on-chip metasurface in Embodiment 3 includes a plurality of nanocolumn arrays of different groups that are horizontally cascaded. The design method provided in Embodiment 3, based on Embodiment 1, also includes: acquiring a target color nanoprinting image, and determining a final arrangement of a plurality of nanocolumns included in the on-chip metasurface according to the intensity distribution of a binary target image of the target color nanoprinting image under different wavelength channels.

[0057] Specifically, the binary value in the binary target image means that each color image has only two intensities, 0 and 1, and does not involve the grayscale design of the image. 0 and 1 correspond to whether the position is set with a nanocolumn, that is, in Example 3, a nanocolumn is placed at the position corresponding to intensity 1, and a nanocolumn is not placed at the position corresponding to intensity 0. The area where the nanocolumn is placed constitutes the target color nanoprinting image.

[0058] That is, the design method of the on-chip metasurface provided in Example 3 includes: constructing a unit structure of the on-chip metasurface, optimizing parameters of the unit structure of the on-chip metasurface, determining periodic parameters, and determining whether to place a nanocolumn in the unit structure of each pixel point according to the target color nanoprinting image.

[0059] Wherein, each nanocolumn included in the on-chip metasurface is located at the center of its corresponding working surface.

[0060] A laser and a polarizer are sequentially arranged in front of the on-chip metasurface provided in Example 3, and the target color nano-printed image can be observed using a microscope. For example, Figure 5 Schematic diagram of the experimental test light path of near-field nanoprinting images. Light beams of red and green wavelengths are incident from the laser to the waveguide layer of the on-chip metasurface, and the on-chip metasurface is observed using a microscope system (consisting of an objective lens, a lens, and a CCD camera).

[0061] Figure 6 The local scanning electron microscope images and the corresponding spectra of the three nanocolumn structures corresponding to the nanoprinted images with different wavelength selectivities manufactured by the present invention; wherein, Figure 6 The first row corresponds to the designed red structure (corresponding to a wavelength of 650nm). Figure 6 The second row corresponds to the designed green structure (corresponding to wavelength 575nm), Figure 6 The third row corresponds to the traditional structure without wavelength selectivity (this structure is used as a comparison structure. This structure does not have specific wavelength selectivity. It is used to indicate that the spectral response of the common structure design is broadband. The broadband response corresponds to the simultaneous extraction of red and green wavelengths, and the corresponding orange image will be obtained); Figure 6 The left image of each row in is a local scanning electron microscope image of the structure. Figure 6 The right image of each row in is the spectrum of the structure.

[0062] Figure 7 This is a diagram of the experimental results of the near-field color nanoprinting image achieved by the present invention, with a scale of 40 μm; Figure 7 The first row of corresponds to the target image, Figure 7 The second row of corresponds to the experimental images, Figure 7 The displayed nanoprinted images show good on-chip wavelength division multiplexing effects: (1) Under green light alone, the green leaves and flower pot patterns show strong extraction, while the red flowers show weak extraction and dim brightness; (2) Under red light alone, the red flowers and flower pot patterns are bright, while the green leaves are dark; (3) Under simultaneous illumination of green and red light, the resulting image reconstructs an image combination of red flowers, green leaves, and orange pots.

[0063] The above experimental results confirm the application and good effect of the on-chip metasurface provided by the present invention in nano-printing image display.

[0064] Embodiment 4:

[0065] Embodiment 4 provides an on-chip metasurface, which is obtained by using the design method of the on-chip metasurface provided in Embodiment 3.

[0066] Embodiment 5:

[0067] Embodiment 5 provides a method for designing an on-chip metasurface, which, based on Embodiment 1, also includes: acquiring a target holographic image, using a GS algorithm according to the target holographic image to obtain a phase distribution required for the on-chip metasurface, taking each of the unit structures as a pixel point, taking a nanocolumn that is close to the left edge of the working surface in the x-axis direction and located at the midpoint of the working surface in the y-axis direction as an initial position, making a one-to-one correspondence between the phase calculated and restored for each pixel point and the displacement of each nanocolumn along the x-axis direction, determining the displacement of each nanocolumn along the x-axis direction, and obtaining a final arrangement of the plurality of nanocolumns contained in the on-chip metasurface.

[0068] The detour phase is combined to determine the displacement of each nanocolumn along the x-axis, and the on-chip metasurface extracts the detour phase of light. The displacement Δx along the x-axis of the nanopillar satisfies the following equation: Where Λ represents the period, Λ=P x , P x is the geometric dimension of the working surface of the waveguide layer in the unit structure along the x-axis.

[0069] In addition, the displacements of several nanorods included in the on-chip metasurface along the y-axis direction can be set to 0.

[0070] Alternatively, the displacement of the nanopillars in odd-numbered columns among the plurality of nanopillars included in the on-chip metasurface along the y-axis direction may be set to 0, and the displacement of the nanopillars in even-numbered columns among the plurality of nanopillars included in the on-chip metasurface along the y-axis direction may be set to P. y Half of P y is the geometric dimension of the working surface of the waveguide layer in the unit structure along the y-axis. This design method can avoid the adhesion of nanorods in actual processing.

[0071] That is, the design method of the on-chip metasurface provided in Example 5 includes: constructing a unit structure of the on-chip metasurface, optimizing parameters of the unit structure of the on-chip metasurface, determining periodic parameters, and determining the displacement of each nanocolumn according to the target holographic image.

[0072] For example, the present invention successfully realizes wavelength-selective far-field holography at incident wavelengths of 520nm and 620nm by utilizing the encoding freedom provided by the on-chip detour phase. The detour phase of the light extracted by the on-chip metasurface can be expressed as Where Δx represents the relative displacement of the nanorod within a period Λ, and at this time, let Λ=P x =P y =380nm. Design the target image and use the Gerchberg-Saxton (GS) algorithm to calculate the phase design of the metasurface. Determine the structural size of the nanopillars according to the target color, and according to the obtained phase distribution, make the phase calculated and restored at each pixel point correspond to the relative displacement of the center position of the nanopillar in the unit structure, realize the four-step circuitous phase design, and obtain the final arrangement of the nanopillars, see Figure 8 .

[0073] Fig. 9 A local scanning electron microscope image of an on-chip metasurface holographic display structure with different wavelength selectivity manufactured by the present invention, wherein Fig. 9 The left image in the figure is a local scanning electron microscope image of the designed green structure. Fig. 9 The right image in the figure is a local scanning electron microscope image of the designed red structure.

[0074] Fig.10 This is a schematic diagram of the experimental optical path of the far-field color holographic display function provided by the present invention. Combining lasers, apertures, polarizers, lenses, and receiving screens (for example, placing a mobile phone in the far field to record the displayed holographic image) can achieve far-field color holographic display. Among them, the polarized laser is coupled into the waveguide in an end-fire manner, and the projected holographic image is directly captured using the mobile phone camera.

[0075] When the sample is illuminated with green and red light simultaneously, the target images of the designed "cactus" and "sun" holograms are as follows Fig.11 As shown. Fig.11The experimental results of the two-wavelength color holographic display achieved by the present invention are shown in Figure 2. And due to the all-dielectric structure with high transparency and zero-order diffraction characteristics, the on-chip metasurface provided by the present invention can be integrated with wearable devices for AR display. The scene of capturing a virtual image floating in the real world through a mobile phone camera can be seen in Fig.12 , Fig.12 It also includes an experimental setup for AR display shooting. Fig.13 This is a diagram of the AR display implementation result achieved by the present invention, from Fig.13 The "cactus" floating on the desert background or the "sun" floating on the mountain background can be clearly observed, showing discernible image lines and color contrast.

[0076] The above experimental results confirm the application and good effect of the on-chip metasurface provided by the present invention in holographic image display and enhanced display.

[0077] Embodiment 6:

[0078] Example 6 provides an on-chip metasurface, which is obtained by using the design method of the on-chip metasurface provided in Example 5.

[0079] In summary, the present invention utilizes the precise light manipulation capability of the on-chip metasurface to achieve wavelength selective extraction of the on-chip metasurface, and also inherits the performance of easy integration and no zero-order diffraction interference of the on-chip metasurface, achieving high-performance color near-field nano-printed images, far-field holographic images and AR displays. The present invention also solves the shortcomings of low energy utilization efficiency in color display of wavelength multiplexing achieved by traditional free-space devices through spatial multiplexing, and achieves better energy utilization and allocation strategies. The on-chip cascade wavelength selection method provided by the present invention provides a new paradigm for the research of photonic integrated circuits, wearable micro-displays and next-generation wavelength division multiplexing devices, and provides a basis for these studies. The on-chip wavelength division multiplexing and wavelength selective meta-optical platform provided by the present invention with the advantages of miniaturization and integration is expected to be widely used in various application fields such as the next generation of wearable display devices, multi-channel information multiplexing and routing, and intelligent integrated photonic systems.

[0080] Finally, it should be noted that the above specific implementation methods are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to examples, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the spirit and scope of the technical solution of the present invention, which should be included in the scope of the claims of the present invention.

Claims

1. A design method for an on-chip metasurface, characterized in that: The following steps are involved: Constructing a unit structure of an on-chip metasurface, the unit structure comprising a base layer, a waveguide layer located above the base layer, and a nanocolumn arranged on a working surface of the waveguide layer; taking directions parallel to two sides of the working surface as the x-axis and the y-axis respectively, the major axis and the minor axis of the nanocolumn are parallel to the x-axis and the y-axis respectively, and all the nanocolumns included in the on-chip metasurface have the same height; the plurality of nanocolumns included in the on-chip metasurface constitute one or more groups of nanocolumn arrays, all the nanocolumns included in each group of nanocolumn arrays have the same geometric size, and nanocolumns included in nanocolumn arrays of different types have different geometric sizes; The target wavelength of the on-chip metasurface is set; for each group of nanocolumn arrays, light is incident from the waveguide layer in a transverse magnetic mode, and the geometric dimensions of the nanocolumns in the group of nanocolumn arrays are determined with the highest extraction efficiency of a certain target wavelength in the output light and the lowest extraction efficiency for other wavelengths as the optimization goal.

2. The method for designing an on-chip metasurface according to claim 1, characterized in that: When the plurality of nanopillars included in the on-chip metasurface form multiple groups of nanopillar arrays, multiple nanopillar arrays of different types are horizontally cascaded, and the on-chip metasurface selectively extracts guided waves of different wavelengths from different spatial positions into free space.

3. The method for designing an on-chip metasurface according to claim 1, characterized in that: The on-chip metasurface design method further includes: setting a target emission angle of the on-chip metasurface; changing the geometric dimensions P of the working surface of the waveguide layer in the unit structure along the x-axis and the y-axis. x and P y As a period parameter; for each group of nanorod arrays, the period parameter of the group of nanorod arrays is determined according to a certain target emission angle.

4. The method for designing an on-chip metasurface according to claim 3, characterized in that: When determining the periodic parameters of the group of nanocolumn arrays, the goal is to ensure that the output angle of the -1st order light extracted by the group of nanocolumn arrays is within the angle range that the microscope used for observation can receive, and the periodic parameters of the group of nanocolumn arrays are calculated based on the grating formula and momentum superposition.

5. The method for designing an on-chip metasurface according to claim 2, characterized in that: The on-chip metasurface comprises a plurality of nanopillar arrays of different groups and is horizontally cascaded, and the design method of the on-chip metasurface further comprises: A target color nano-printing image is acquired, and a final arrangement of a plurality of nano-pillars included in the on-chip metasurface is determined according to the intensity distribution of the binary target image of the target color nano-printing image in different wavelength channels.

6. The method for designing an on-chip metasurface according to claim 5, characterized in that: Each nanocolumn included in the on-chip metasurface is located at the center of its corresponding working surface.

7. The method for designing an on-chip metasurface according to claim 1, characterized in that: The design method of the on-chip metasurface also includes: A target holographic image is acquired, and the phase distribution required by the on-chip metasurface is obtained by using the GS algorithm according to the target holographic image, each of the unit structures is taken as a pixel point, and the nanocolumn is close to the left edge of the working surface in the x-axis direction and located at the midpoint of the working surface in the y-axis direction as the initial position, and the phase calculated and restored for each pixel point is corresponded one by one with the displacement of each nanocolumn along the x-axis direction, and the displacement of each nanocolumn along the x-axis direction is determined to obtain the final arrangement of the plurality of nanocolumns included in the on-chip metasurface.

8. The method for designing an on-chip metasurface according to claim 7, characterized in that: Combined with the detour phase to determine the displacement of each nanopillar along the x-axis, the on-chip metasurface extracts the detour phase of light The displacement Δx along the x-axis of the nanopillar satisfies the following equation: Where Λ represents the period, Λ=P x , P x is the geometric dimension of the working surface of the waveguide layer in the unit structure along the x-axis.

9. The method for designing an on-chip metasurface according to claim 7, characterized in that: The displacements of the nanopillars in the on-chip metasurface along the y-axis direction are all set to 0; or, the displacements of the nanopillars in the odd-numbered columns of the nanopillars in the on-chip metasurface along the y-axis direction are all set to 0, and the displacements of the nanopillars in the even-numbered columns of the nanopillars in the on-chip metasurface along the y-axis direction are all set to P. y Half of P y is the geometric dimension of the working surface of the waveguide layer in the unit structure along the y-axis.

10. On-chip metasurface, characterized in that: The method is obtained by using the on-chip metasurface design method as described in any one of claims 1 to 9.

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