Three-dimensional miniature integrated silicon-based magnetic core power inductor and design and preparation method thereof

By adopting a new structure of three-dimensional three-dimensional micro-integrated silicon-based core power inductors in MEMS devices, using MEMS technology and penetrating silicon through-hole technology, combined with tin-silver eutectic bonding, the problem of difficult inductor devices with high current capacity but compact physical size in the existing technology is solved, and micro-inductor devices with high inductance density and high quality factors are achieved.

CN119764012APending Publication Date: 2025-04-04CHONGQING UNIV OF POSTS & TELECOMM +1
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Patent Information

Application Number
CN202411861417.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-17
Publication Date
2025-04-04

AI Technical Summary

Technical Problem

In existing MEMS devices, inductor devices with high current capacity but compact physical size are difficult to implement, especially in the fields of high-frequency circuits and sensors.

Method used

Using a new structure of three-dimensional three-dimensional micro integrated silicon-based magnetic core power inductor, the inductor coil is divided into two layers, and the MEMS process and penetrating silicon through-hole technology is used, combined with tin-silver eutectic bonding, high inductance density and high quality factor are achieved.

Benefits of technology

It realizes small size, high inductance density, high quality factor and integrated micro-inductor devices, suitable for high frequency response and high current conditions, reducing the requirements of bond flatness and alignment accuracy.

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Abstract

The invention discloses a three-dimensional miniature integrated silicon-based magnetic core power inductor and a design and preparation method thereof, and belongs to the field of microelectronics, the inductor comprises a top layer and a bottom layer, the top layer is internally provided with a plurality of through-silicon-via structures serving as spiral coils and a top layer rewiring layer; wherein a magnetic material is filled between the through silicon via structures; a plurality of through silicon via structures serving as spiral coils and a bottom rewiring layer are arranged in the bottom layer; wherein a magnetic material is filled between the through silicon via structures; a magnetic material is filled between the top layer and the bottom layer, and the through-silicon-via structure of the top layer and the through-silicon-via structure of the bottom layer are bonded through tin-silver eutectic. The three-dimensional miniature integrated silicon-based magnetic core power inductor which is small in size, high in inductor density, high in quality factor and capable of being integrated is manufactured in the mode that a group of coils is divided into an upper part and a lower part to be manufactured and then eutectic bonding with tin silver as solder is carried out.
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Description

Technical Field

[0001] The present invention relates to the field of microelectronics, and in particular to a three-dimensional micro-integrated silicon-based magnetic core power inductor and a design and preparation method thereof. Background Art

[0002] In recent years, with the rapid development of the micro-electromechanical systems (MEMS) industry, micro-inductor devices have been widely used in wireless communications, power management and energy conversion, sensors, biomedicine and other fields, especially in high-frequency circuits, sensors and energy management. However, as MEMS devices become more and more compact, they require inductors with high current capacity but compact physical size. These needs can be met by integrating all power electronic components into one chip; higher integration will reduce costs, reduce the required space, and increase power density. Among them, power inductors that can be integrated on-chip can improve chip space utilization, which makes them easier to integrate with other micro devices, and have higher quality factors, higher inductance density and lower losses than planar spiral inductors. Therefore, the development of power inductors that can be integrated on-chip is particularly important for improving the integration of MEMS devices. Summary of the invention

[0003] The purpose of the present invention is to propose a new structure of a three-dimensional micro-integrated silicon-based magnetic core power inductor and a design and preparation method thereof, by dividing a group of coils into an upper and lower part and then performing eutectic bonding with tin-silver as solder, to achieve the production of a three-dimensional micro-integrated silicon-based magnetic core power inductor with a small size, high inductance density, high quality factor and integrability.

[0004] The objective of the present invention is achieved through the following technical solutions:

[0005] In a first aspect, a three-dimensional micro-integrated silicon-based magnetic core power inductor is provided, comprising:

[0006] A top layer, in which a plurality of through-silicon via structures used as spiral coils and a top redistribution layer are provided; wherein magnetic materials are filled between the through-silicon via structures;

[0007] A bottom layer, in which a plurality of through-silicon via structures used as spiral coils and a bottom redistribution layer are provided; wherein magnetic materials are filled between the through-silicon via structures;

[0008] A magnetic material is filled between the top layer and the bottom layer, and the through silicon via structure of the top layer and the through silicon via structure of the bottom layer are bonded by tin-silver eutectic bonding.

[0009] In the second aspect, a design method for a three-dimensional micro-integrated silicon-based magnetic core power inductor is provided, which uses MEMS technology and through-silicon-via (TSV) technology to realize a small and integrable micro-inductor device, including:

[0010] The inductor coil is prepared by dividing it into two layers, the upper and lower layers. Each layer is formed into multiple spiral coils by through-silicon via technology. The upper and lower layers are bonded by tin-silver eutectic bonding. The multiple spiral coils are filled with magnetic materials.

[0011] The number of turns of the spiral coil and the thickness of the wire are changed as needed.

[0012] Preferably, the plurality of spiral coils in each layer are distributed in groups.

[0013] In a third aspect, a method for preparing a three-dimensional micro-integrated silicon-based magnetic core power inductor is provided, comprising the following steps:

[0014] S1, cleaning the silicon wafer;

[0015] S2, using photolithography and deep reactive ion etching to etch blind holes on the surface of the silicon wafer to obtain the required size, and then cleaning the photoresist;

[0016] S3, placing the silicon wafer on a tray or culture dish, using a rubber-tipped dropper to absorb an appropriate amount of polymer solution, and evenly applying it on the surface of the silicon wafer, so that the surface of the silicon wafer is covered with a uniform layer of polymer solution, and then performing vacuuming, coating, and curing treatments in sequence;

[0017] S4, using magnetron sputtering to sputter a titanium copper seed layer on the front side of the cleaned silicon wafer, then using a chemical copper plating process to prepare a copper seed layer in the TSV hole, and finally using an electroplating copper process to complete the copper column filling in the TSV hole;

[0018] S5. Grinding the surface of the silicon wafer using chemical mechanical polishing technology until the TSV hole copper pillar is exposed;

[0019] S6. The cleaned wafer is transferred to a rapid annealing furnace for annealing;

[0020] S7. Grinding the surface of the silicon wafer using chemical mechanical polishing technology until the copper pillars protruding from the TSV holes are removed;

[0021] S8. Using a plasma enhanced chemical vapor deposition process to grow a wet etching protection layer on the front and back surfaces of the cleaned silicon wafer;

[0022] S9. Use photolithography and reactive ion etching to etch a designated area on the surface of the silicon wafer to obtain the required pattern, and then clean the photoresist;

[0023] S10. Etching the designated area using a wet etching process to complete the preparation of the groove filled with the magnetic material;

[0024] S11. Place the silicon wafer on a tray or a culture dish, use a rubber-tipped dropper to absorb an appropriate amount of a magnetic material solution with a solid content in the range of 15%-25%, and evenly apply it to the grooves after etching the silicon wafer, so that the grooves are covered with a uniform layer of polymer solution, and then vacuumize, spread the glue, and cure in sequence;

[0025] S12. Grinding the front and back surfaces by chemical mechanical polishing technology until the TSV hole copper pillar is exposed;

[0026] S13. After the silicon wafer is cleaned, a photosensitive PI is used to prepare an insulating layer for the field regions on both sides of the silicon wafer, and a photolithography process is used to reserve vias to complete the connection between the TSV holes and the subsequent redistribution layer and the pads, and then the wafer is cured;

[0027] S14. Using photolithography technology to prepare designated redistribution layer areas and pad areas on both sides of the silicon wafer;

[0028] S15. Using a nickel plating process, a layer of nickel is plated on the redistribution layer area and the pad area on both sides of the silicon wafer, and then a layer of gold is plated on the redistribution layer wiring and pad area on both sides of the silicon wafer using a gold evaporation process;

[0029] S16. Using a photolithography process and a nickel-tin-silver electroplating process to complete the tin-silver preparation of the pad area, and then annealing-reflow to form a spherical tin-silver bump;

[0030] S17. Perform eutectic bonding of the two silicon wafers that have completed the above process using tin-silver as solder;

[0031] S18. Place the bonded silicon wafers on a tray or culture dish, use a rubber-tipped dropper to absorb an appropriate amount of magnetic material solution with a solid content in the range of 15%-25%, and evenly apply it to the gap between the two silicon wafers after bonding, so that the gap is filled with the polymer solution; then perform glue spreading and curing treatment in sequence to obtain a magnetic core power inductor.

[0032] Preferably, in step S1, the silicon wafer is cleaned according to RCA standards.

[0033] Preferably, the step S3 sequentially performs vacuuming, glue spreading and curing, including:

[0034] Carefully transfer the tray or culture dish to a vacuum oven for 7 to 9 minutes of vacuum treatment; after the vacuum treatment, quickly transfer the silicon wafer from the tray or culture dish to the glue spreader, turn on the vacuum to adsorb the silicon wafer, and rotate it at a speed of 2000 to 6000 rpm for 20 to 60 seconds; after the glue spread is completed, quickly transfer the silicon wafer to a hot plate for pre-curing, and the pre-curing time is controlled to be more than 20 minutes; after the pre-curing is completed, transfer the wafer to the oven and set the oven program, and place it in an oven filled with nitrogen for 7.5 hours for complete curing; after the program is completed and the oven temperature is naturally cooled to below 50°C, the silicon wafer can be taken out of the oven.

[0035] Preferably, the annealing treatment in step S6 includes:

[0036] Place the wafer in a rapid annealing furnace filled with nitrogen for 30 minutes for annealing. When the process is finished and the temperature of the annealing furnace naturally drops below 50°C, the wafer can be taken out of the rapid annealing furnace.

[0037] Preferably, the step S11 sequentially performs vacuuming, glue spreading and curing, including:

[0038] Carefully transfer the tray or culture dish to a vacuum oven for 1 to 3 minutes of vacuum treatment; after the vacuum treatment, quickly transfer the silicon wafer from the tray or culture dish to the glue-spreading table, turn on the vacuum to adsorb the silicon wafer, and rotate it at a speed of 500 to 1000 rpm for 20 to 60 seconds; after the glue-spreading is completed, quickly transfer the silicon wafer to a hot plate for pre-curing, and the pre-curing time is controlled to be more than 20 minutes; after the pre-curing is completed, let it stand at room temperature for 10 to 12 hours and wait for it to be completely cured.

[0039] Preferably, curing the wafer in step S13 includes:

[0040] Transfer the wafer to the oven and set the oven program. Place it in a nitrogen-filled oven for 8 hours for complete curing. When the program is finished and the oven temperature naturally drops to below 50°C, the silicon wafer can be taken out of the oven.

[0041] Preferably, the step S18 of sequentially performing the coating and curing processes to obtain the magnetic core power inductor comprises:

[0042] Transfer the silicon wafer from the tray or culture dish to the glue-spreading table, turn on the vacuum to adsorb the silicon wafer, and rotate it at a speed of 500-1000rpm for 20-60s; after the glue-spreading is completed, quickly transfer the silicon wafer to the hot plate for pre-curing, and the pre-curing time is controlled to be more than 20mins; after the pre-curing is completed, let it stand at room temperature for 10-12h, and wait for it to be completely cured to complete the preparation of the core power inductor.

[0043] It should be further explained that the technical features corresponding to the above options can be combined or replaced with each other to form a new technical solution if there is no conflict.

[0044] Compared with the prior art, the present invention has the following beneficial effects:

[0045] (1) The present invention uses MEMS technology and through-silicon via technology to realize a small and integrable micro-inductor device; by dividing the inductor coil into an upper and lower layer for preparation, the number of turns of the coil and the thickness of the wire can be changed as needed, and finally a eutectic bonding method using tin-silver as solder is performed to realize a micro-inductor device with high inductance density, high quality factor, better high-frequency response and lower loss; by grouping and distributing multiple through-silicon via structures, the inductor coil can withstand a larger current, thereby achieving a larger inductance value; at the same time, the tin-silver eutectic bonding method is used to reduce the requirements for bonding flatness and alignment accuracy.

[0046] (2) The present invention utilizes through silicon via technology and uses TSV and RDL as inductor coils to achieve better high frequency response while carrying a larger current.

[0047] (3) The present invention uses a three-dimensional silicon-based embedded inductor structure, which can save on-chip area while achieving a higher quality factor, thereby improving the power density and efficiency of the inductor device.

[0048] (4) The present invention uses a tin-silver eutectic bonding method, which reduces the requirements for bonding flatness and alignment accuracy.

[0049] (5) The present invention uses magnetic materials to fill the middle slot of the inductor, which can increase the magnetic permeability; the soft magnetic powder in the magnetic core can provide a larger relative magnetic permeability, thereby increasing the inductance value. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 It is a basic structural schematic diagram of the three-dimensional micro-integrated silicon-based magnetic core power inductor of the present invention;

[0051] Figure 2 It is a top view schematic diagram of the three-dimensional micro-integrated silicon-based magnetic core power inductor structure of the present invention;

[0052] Figure 3 It is a side view schematic diagram of the three-dimensional micro-integrated silicon-based magnetic core power inductor structure of the present invention;

[0053] Figure 4 It is a schematic diagram of the structure of the bottom layer of the three-dimensional micro-integrated silicon-based magnetic core power inductor of the present invention;

[0054] Figure 5It is a schematic diagram of the structure of the Top layer in the three-dimensional micro-integrated silicon-based magnetic core power inductor of the present invention;

[0055] Figure 6 Schematic diagram of two wafers used for manufacturing three-dimensional micro-integrated silicon-based magnetic core power inductor according to the present invention;

[0056] Figure 7 A schematic diagram of etching a TSV blind hole structure on a silicon wafer according to the present invention;

[0057] Figure 8 A schematic diagram of preparing an insulating layer at the bottom and sidewall of a TSV blind hole according to the present invention;

[0058] Fig. 9 It is a schematic diagram of copper filling in TSV blind vias according to the present invention.

[0059] Fig.10 It is a schematic diagram of removing copper from the field area by using chemical mechanical polishing technology in the present invention;

[0060] Fig.11 It is a schematic diagram of annealing the copper pillar in the TSV hole according to the present invention;

[0061] Fig.12 It is a schematic diagram of removing the copper pillars bulging out after annealing by using chemical mechanical polishing technology in the present invention;

[0062] Fig.13 A schematic diagram of growing a wet etching protection layer on a wafer surface according to the present invention;

[0063] Fig.14 A schematic diagram of a groove pattern filled with magnetic material etched on the surface of a wafer according to the present invention;

[0064] Fig.15 A schematic diagram of etching a groove on the wafer surface required for filling the magnetic material in the present invention;

[0065] Fig.16 A schematic diagram of filling a groove with a magnetic material according to the present invention;

[0066] Fig.17 It is a schematic diagram of removing excess magnetic material in the wafer field area and silicon at the bottom of the wafer by using chemical mechanical polishing technology in the present invention;

[0067] Fig.18 The figure is a schematic diagram of the preparation of insulating layers in the field regions on the front and back sides of a wafer according to the present invention.

[0068] Fig.19 A schematic diagram of the preparation of the wafer front side pad area and the back side RDL area according to the present invention;

[0069] Fig. 20A schematic diagram of preparing nickel-gold on the surface of the wafer front pad area and the back RDL area according to an embodiment of the present invention;

[0070] Fig.21 A schematic diagram of preparing a nickel-tin-silver solder ball in a pad area of ​​a wafer 1 according to the present invention;

[0071] Fig. 22 A schematic diagram of eutectic bonding of wafer 1 and wafer 2 according to the present invention;

[0072] Fig.23 This is a schematic diagram of filling the gap between wafer 1 and wafer 2 with a magnetic material according to the present invention.

[0073] Figures 1 to 23 The meanings of the numbers are as follows: 1-1, Bottom structure of three-dimensional micro-integrated silicon-based magnetic core power inductor; 1-2, Top structure of three-dimensional micro-integrated silicon-based magnetic core power inductor; 1-3, TSV structure of spiral coil; 1-4, eutectic bonding area of ​​Top structure and Bottom structure; 1-5, magnetic material filling between Top structure and Bottom structure; 2-1, RDL area in Top structure; 2-2, current input; 2-3, current output; 3-2, RDL area in Bottom structure; 4-1, tin-silver solder ball for eutectic bonding in Bottom structure; 4-2, TSV structure used as part of spiral coil in Bottom structure; 4-3 is Bottom structure. Magnetic material filling in the structure; 5-1. Nickel-gold pads for eutectic bonding in the Top structure; 5-2. TSV structure used as a part of the spiral coil in the Top structure; 5-3. Magnetic material filling in the Top structure; 1. Wafer 1 (Bottom structure); 2. Wafer 2 (Top structure); 3. TSV blind holes with a diameter of 50μm and a depth of 220μm; 4. Polyimide solution with a ratio of 3:1; 5. Copper pillars in TSV holes; 6. SiNx wet etching protection layer; 7. Etching pattern; 8. Grooves filled with magnetic materials; 9. Magnetic material solution; 10. PSPI insulating layer; 11. RDL area; 12. Pad area; 13 / 15. Nickel; 14. Gold; 16. Tin-silver alloy; 17. Magnetic material solution. DETAILED DESCRIPTION

[0074] The technical solution of the present invention is clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. The components of the embodiments of the present application described and shown in the accompanying drawings can be arranged and designed in various configurations. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0075] It should be noted that the defects existing in the solutions in the above-mentioned prior art are the results obtained by the inventor after practice and careful research. Therefore, the discovery process of the above-mentioned problems and the solutions proposed in the embodiments of the present application for the above-mentioned problems below should all be the contributions made by the inventor to the present application in the process of invention and creation, and should not be understood as technical contents known to technical personnel in this field.

[0076] In view of the technical problems pointed out in the background technology, the embodiments provided by the present invention are as follows:

[0077] In an exemplary embodiment, referring to Figure 1-Figure 5 , providing a three-dimensional micro-integrated silicon-based magnetic core power inductor, wherein Figure 1 In the figure, 1-1 represents the Bottom structure (bottom layer) of the three-dimensional micro-integrated silicon-based magnetic core power inductor, 1-2 represents the Top structure (top layer) of the three-dimensional micro-integrated silicon-based magnetic core power inductor, 1-3 represents the TSV structure used as a spiral coil, 1-4 represents the eutectic bonding area of ​​the Top structure and the Bottom structure, and 1-5 represents the magnetic material filling between the Top structure and the Bottom structure. Figure 2 2-1 represents the RDL area (top redistribution layer) in the Top structure, 2-2 represents the current input, and 2-3 represents the current output. Figure 3 3-2 represents the RDL area (bottom redistribution layer) in the Bottom structure. Figure 4 4-1 is a tin-silver solder ball used for eutectic bonding in the Bottom structure, 4-2 represents a TSV structure used as a part of a spiral coil in the Bottom structure, and 4-3 is a magnetic material filling in the Bottom structure. Figure 5 5-1 in the figure is the nickel-gold pad used for eutectic bonding in the Top structure, 5-2 represents the TSV structure used as a part of the spiral coil in the Top structure, and 5-3 is the magnetic material filling in the Top structure. During operation, current is first input from pad 2-2, and then passes through Figure 1 The direction of the arrow passes through the coil, forming a magnetic field in the coil, and finally the current is output from the pad 2-3.

[0078] Specifically, the working principle of the three-dimensional micro-integrated silicon-based magnetic core power inductor is as follows: when current flows through the power inductor, a magnetic field is generated around the coil, and the electrical energy is converted into magnetic energy and stored in the inductor. When the circuit current changes or is disconnected, the inductor will release the energy in the magnetic field to provide current to the circuit and keep the current stable. Secondly, because the TSV structure is prepared using MEMS process and through-silicon via technology, the device size can be effectively reduced, so that the number of turns of the coil can be increased and the thickness of the wire can be changed as needed, so the power inductor has a higher inductance value, and the structure is filled with magnetic core materials in three places between the Top structure and the Bottom structure, the Bottom structure and the Top structure respectively. The soft magnetic powder in the magnetic core can provide a larger relative magnetic permeability, so that the inductance value increases. Therefore, under high current or power conditions, it can effectively resist the sudden change of current. Through the self-inductance effect of the inductor, when the current tries to increase or decrease sharply, the electromotive force generated by the power inductor will resist it, thereby smoothing the current fluctuations. Then, the power inductor uses the tin-silver eutectic bonding method, which reduces the requirements for bonding flatness and alignment accuracy. In addition, when designing the TSV structure (4-2 and 5-2 in the figure), the power inductor has a larger wire diameter and better heat dissipation performance by grouping multiple TSVs to support high current without overheating or damage. Finally, due to magnetic saturation, the inductance value will drop sharply, thus losing the current suppression ability. The core material selected for this power inductor has a higher magnetic saturation point, which can ensure that the core does not saturate prematurely at high currents.

[0079] In another exemplary embodiment, a preparation process of the above three-dimensional micro-integrated silicon-based magnetic core power inductor is provided, and the specific steps are as follows:

[0080] Step S1. Figure 1 As shown, in this embodiment, a 6-inch wafer 1 (Bottom structure) and a 6-inch wafer 2 (Top structure) are selected as silicon wafers for manufacturing a three-dimensional micro-integrated silicon-based magnetic core power inductor. Wafer 1 and wafer 2 are cleaned according to the "RCA" standard to remove organic matter, natural oxide layer, metal, particulate matter and other contaminants on the surface of wafer 1 and wafer 2.

[0081] Step S2: Use deep reactive ion etching to etch out TSV blind holes 3 with a diameter of 50 μm and a depth of 220 μm, and then use acetone, isopropanol, anhydrous ethanol and deionized water to clean the photoresist. Figure 2 shown.

[0082] Step S3. Spin-coat the polyimide solution 4 with a ratio of 3:1 onto the surface of wafer 1 and wafer 2 to ensure that the solution evenly covers the entire wafer surface. Transfer the coated wafer 1 and wafer 2 to a vacuum box and perform a high vacuum treatment for 5 minutes to assist the polyimide solution to completely fill the entire TSV blind hole 3. Transfer the wafer 1 and wafer 2 that have completed the vacuum treatment to the glue-spinning table and spin the glue at a speed of 3500rpm for 30 seconds. After the glue-spinning is completed, quickly transfer wafer 1 and wafer 2 to the hot plate at a temperature of 100°C for pre-curing for 20 minutes. After the pre-curing is completed, transfer wafer 1 and wafer 2 to the oven and set the oven program to 320°C. Place them in an oven filled with nitrogen for 7.5 hours for complete curing. After the program ends and the oven temperature naturally drops to below 50°C, the wafer can be taken out of the oven. Figure 3 shown.

[0083] Step S4. Use magnetron sputtering to sputter a titanium-copper seed layer (titanium is 50nm, copper is 300nm) on the front of the two cleaned wafers, then use chemical copper plating process to prepare the copper seed layer in the TSV hole, and finally use electroplating copper process to complete the filling of copper pillars 5 in the TSV hole. Figure 4 shown.

[0084] Step S5. After cleaning the wafer 1 and the wafer 2, the surfaces are polished using chemical mechanical polishing technology until the TSV hole copper pillars are exposed. Figure 5 shown.

[0085] Step S6. Transfer the two cleaned wafers to the rapid annealing furnace and set the rapid annealing furnace program, set the temperature to 300°C, and place them in the rapid annealing furnace filled with nitrogen for 30 minutes for annealing. After the program is completed and the annealing furnace temperature naturally drops to below 50°C, wafer 1 and wafer 2 can be taken out of the rapid annealing furnace. Figure 6 shown.

[0086] Step S7. Then, the surfaces of wafer 1 and wafer 2 are ground for the second time using chemical mechanical polishing technology until the copper pillars protruding from the TSV holes are ground off. Figure 7 shown.

[0087] Step S8. Using a plasma enhanced chemical vapor deposition process, a 300 nm thick SiNx layer is grown on the front and back surfaces of the cleaned wafers 1 and 2 as a wet etching protection layer 6. Figure 8 shown.

[0088] Step S9. Use photolithography and reactive ion etching to etch the designated areas on the surfaces of wafers 1 and 2 to obtain the required pattern 7, and then use acetone, isopropanol, anhydrous ethanol and deionized water to clean the photoresist. Fig. 9 shown.

[0089] Step S10. Use a wet etching process to etch the designated areas of the two wafers, and use BOE (solution ratio is NH4F:HF=7:1) as the corrosive agent to complete the preparation of the groove 8 filled with magnetic material. Fig.10 shown.

[0090] Step S11. Place two wafers on a tray or culture dish, use a rubber-tipped dropper to absorb an appropriate amount of magnetic material solution 9 with a solid content in the range of 15%-25%, and evenly apply it to the grooves after etching the silicon wafer, so that the grooves are covered with a uniform layer of polymer solution. Carefully transfer the tray or culture dish to a vacuum oven for 3 minutes of vacuum treatment. After the vacuum treatment, quickly transfer the two wafers from the tray or culture dish to the glue-spreading table, turn on the vacuum to adsorb the silicon wafer, and rotate at a speed of 1000 rpm for 30 seconds. After the glue is finished, quickly transfer the wafer to the hot plate for pre-curing. The temperature is set to 80°C and the time is 20 minutes. After the pre-curing is completed, let it stand at room temperature for 12 hours and wait for it to be completely cured. Fig.11 shown.

[0091] Step S12: Use chemical mechanical polishing technology to polish the front and back sides of wafer 1 and wafer 2 until the TSV hole copper pillars are exposed. Fig.12 shown.

[0092] Step S13. After cleaning wafer 1 and wafer 2, use PSPI to prepare the insulating layer 10 of the front and back fields of the wafer with a thickness of 10μm, and use the photolithography process to reserve vias to complete the TSV holes and the subsequent RDL and pad area connections. Transfer the wafer to the oven and set the oven program. The heating method is step heating with a heating rate of 2℃ / min. Start heating from room temperature and keep warm for 30mins every 50℃ when the temperature reaches 50℃. Finally, heat to 350℃ and keep warm for 30mins. After the program ends and the oven temperature naturally drops to below 50℃, the wafer can be taken out of the oven. Fig.13 shown.

[0093] Step S14. Use photolithography to prepare designated RDL areas and pad areas on the front and back sides of wafer 1 and wafer 2. Then use magnetron sputtering to sputter a titanium-copper seed layer (titanium is 50nm, copper is 300nm) on the front and back sides of the two wafers, and then use double-sided copper electroplating process to complete the preparation of RDL area 11 and pad area 12 on the front and back sides of the two wafers, and then use acetone, isopropyl alcohol, anhydrous ethanol and deionized water to clean the photoresist. Then use copper etchant to remove the copper seed layer on the surface of the field area on the front and back sides of the wafer, and finally use titanium etchant to remove the titanium adhesion layer on the surface of the field area on the front and back sides of the wafer. Fig.14 shown.

[0094] Step S15. Use a nickel plating process to plate a layer of nickel on the RDL area and the pad area on both sides of wafer 1 and wafer 2 (the area corresponding to number 13 in the figure), and then use a gold evaporation process to plate a layer of gold 14 on the RDL area and the pad area on both sides of wafer 1 and wafer 2. Fig.15 shown.

[0095] Step S16: Use photolithography and nickel-tin-silver electroplating to complete the preparation of nickel (the area corresponding to number 15 in the figure) and tin-silver alloy 16 in the pad area on the wafer 1, such as Fig.16 shown.

[0096] Step S17. Align wafer 1 and wafer 2 to complete eutectic bonding. Fig.17 shown.

[0097] Step S18. Place the bonded wafer on a tray or culture dish, use a rubber-tipped dropper to absorb an appropriate amount of magnetic material solution 17 with a solid content in the range of 15%-25%, and evenly apply it to the gap between the two silicon wafers after bonding, so that the gap is filled with polymer solution. Transfer the wafer from the tray or culture dish to the glue-spinning table, turn on the vacuum to adsorb the silicon wafer, and rotate it at a speed of 1000 rpm for 30 seconds. After the glue is finished, quickly transfer the wafer to the hot plate for pre-curing, set the temperature to 80°C, and the time is 20 minutes. After the pre-curing is completed, let it stand at room temperature for 12 hours, wait for it to be completely cured, and finally complete the preparation of the core inductor.

[0098] The above specific implementation methods are detailed descriptions of the present invention. It cannot be determined that the specific implementation methods of the present invention are limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions and substitutions can be made without departing from the concept of the present invention, which should be regarded as belonging to the protection scope of the present invention.

Claims

1. A three-dimensional micro-integrated silicon-based magnetic core power inductor, characterized in that: include: A top layer, in which a plurality of through-silicon via structures used as spiral coils and a top redistribution layer are provided; wherein magnetic materials are filled between the through-silicon via structures; A bottom layer, in which a plurality of through-silicon via structures used as spiral coils and a bottom redistribution layer are provided; wherein magnetic materials are filled between the through-silicon via structures; A magnetic material is filled between the top layer and the bottom layer, and the through silicon via structure of the top layer and the through silicon via structure of the bottom layer are bonded by tin-silver eutectic bonding.

2. A design method for a three-dimensional micro-integrated silicon-based magnetic core power inductor, characterized in that: include: The inductor coil is prepared by dividing it into two layers, each layer is formed into multiple spiral coils by through-silicon via technology, and the upper and lower layers are bonded by tin-silver eutectic bonding; The plurality of spiral coils are filled with magnetic materials; The number of turns of the spiral coil and the thickness of the wire are changed as needed.

3. The design method of the three-dimensional micro-integrated silicon-based magnetic core power inductor according to claim 2 is characterized in that: Multiple spiral coils in each layer are grouped and distributed.

4. A method for preparing a three-dimensional micro-integrated silicon-based magnetic core power inductor, characterized in that: The following steps are involved: S1, cleaning the silicon wafer; S2, using photolithography and deep reactive ion etching to etch blind holes on the surface of the silicon wafer to obtain the required size, and then cleaning the photoresist; S3, placing the silicon wafer on a tray or culture dish, using a rubber-tipped dropper to absorb an appropriate amount of polymer solution, and evenly applying it on the surface of the silicon wafer, so that the surface of the silicon wafer is covered with a uniform layer of polymer solution, and then performing vacuuming, coating, and curing treatments in sequence; S4, using magnetron sputtering to sputter a titanium copper seed layer on the front side of the cleaned silicon wafer, then using a chemical copper plating process to prepare a copper seed layer in the TSV hole, and finally using an electroplating copper process to complete the copper column filling in the TSV hole; S5. Grinding the surface of the silicon wafer using chemical mechanical polishing technology until the TSV hole copper pillar is exposed; S6. The cleaned wafer is transferred to a rapid annealing furnace for annealing; S7. Grinding the surface of the silicon wafer using chemical mechanical polishing technology until the copper pillars protruding from the TSV holes are removed; S8. Using a plasma enhanced chemical vapor deposition process to grow a wet etching protection layer on the front and back surfaces of the cleaned silicon wafer; S9. Use photolithography and reactive ion etching to etch a designated area on the surface of the silicon wafer to obtain the required pattern, and then clean the photoresist; S10. Etching the designated area using a wet etching process to complete the preparation of the groove filled with the magnetic material; S11. Place the silicon wafer on a tray or a culture dish, use a rubber-tipped dropper to absorb an appropriate amount of a magnetic material solution with a solid content in the range of 15%-25%, and evenly apply it to the grooves after etching the silicon wafer, so that the grooves are covered with a uniform layer of polymer solution, and then vacuumize, spread the glue, and cure in sequence; S12. Grinding the front and back surfaces by chemical mechanical polishing technology until the TSV hole copper pillar is exposed; S13. After the silicon wafer is cleaned, a photosensitive PI is used to prepare an insulating layer for the field regions on both sides of the silicon wafer, and a photolithography process is used to reserve vias to complete the connection between the TSV holes and the subsequent redistribution layer and the pads, and then the wafer is cured; S14. Using photolithography technology to prepare designated redistribution layer areas and pad areas on both sides of the silicon wafer; S15. Using a nickel plating process, a layer of nickel is plated on the redistribution layer area and the pad area on both sides of the silicon wafer, and then a layer of gold is plated on the redistribution layer wiring and pad area on both sides of the silicon wafer using a gold evaporation process; S16. Using a photolithography process and a nickel-tin-silver electroplating process to complete the tin-silver preparation of the pad area, and then annealing-reflow to form a spherical tin-silver bump; S17. Perform eutectic bonding of the two silicon wafers that have completed the above process using tin-silver as solder; S18. Place the bonded silicon wafers on a tray or culture dish, use a rubber-tipped dropper to absorb an appropriate amount of magnetic material solution with a solid content in the range of 15%-25%, and evenly apply it to the gap between the two silicon wafers after bonding, so that the gap is filled with the polymer solution; then perform glue spreading and curing treatment in sequence to obtain a magnetic core power inductor.

5. The method for preparing a three-dimensional micro-integrated silicon-based magnetic core power inductor according to claim 4, characterized in that: In the step S1, the silicon wafer is cleaned according to the RCA standard.

6. The method for preparing a three-dimensional micro-integrated silicon-based magnetic core power inductor according to claim 4, characterized in that: The step S3 sequentially performs vacuuming, glue spreading and curing, including: Carefully transfer the tray or culture dish to a vacuum oven for 7 to 9 minutes of vacuum treatment; after the vacuum treatment, quickly transfer the silicon wafer from the tray or culture dish to the glue spreader, turn on the vacuum to adsorb the silicon wafer, and rotate it at a speed of 2000 to 6000 rpm for 20 to 60 seconds; after the glue spread is completed, quickly transfer the silicon wafer to a hot plate for pre-curing, and the pre-curing time is controlled to be more than 20 minutes; after the pre-curing is completed, transfer the wafer to the oven and set the oven program, and place it in an oven filled with nitrogen for 7.5 hours for complete curing; after the program is completed and the oven temperature is naturally cooled to below 50°C, the silicon wafer can be taken out of the oven.

7. The method for preparing a three-dimensional micro-integrated silicon-based magnetic core power inductor according to claim 4, characterized in that: The annealing treatment in step S6 includes: Place the wafer in a rapid annealing furnace filled with nitrogen for 30 minutes for annealing. When the process is finished and the temperature of the annealing furnace naturally drops below 50°C, the wafer can be taken out of the rapid annealing furnace.

8. The method for preparing a three-dimensional micro-integrated silicon-based magnetic core power inductor according to claim 4, characterized in that: The step S11 sequentially performs vacuuming, coating and curing, including: Carefully transfer the tray or culture dish to a vacuum oven for 1 to 3 minutes of vacuum treatment; after the vacuum treatment, quickly transfer the silicon wafer from the tray or culture dish to the glue-spreading table, turn on the vacuum to adsorb the silicon wafer, and rotate it at a speed of 500 to 1000 rpm for 20 to 60 seconds; after the glue-spreading is completed, quickly transfer the silicon wafer to a hot plate for pre-curing, and the pre-curing time is controlled to be more than 20 minutes; after the pre-curing is completed, let it stand at room temperature for 10 to 12 hours and wait for it to be completely cured.

9. The method for preparing a three-dimensional micro-integrated silicon-based magnetic core power inductor according to claim 4, characterized in that: The step S13 of curing the wafer includes: Transfer the wafer to the oven and set the oven program. Place it in the oven filled with nitrogen for 8 hours for complete curing. When the program is finished and the oven temperature naturally drops to below 50°C, the silicon wafer can be taken out of the oven.

10. The method for preparing a three-dimensional micro-integrated silicon-based magnetic core power inductor according to claim 4, characterized in that: The step S18, in which the coating and curing processes are performed in sequence to obtain a magnetic core power inductor, includes: Transfer the silicon wafer from the tray or culture dish to the glue-spreading table, turn on the vacuum to adsorb the silicon wafer, and rotate it at a speed of 500-1000rpm for 20-60s; after the glue-spreading is completed, quickly transfer the silicon wafer to the hot plate for pre-curing, and the pre-curing time is controlled to be more than 20mins; after the pre-curing is completed, let it stand at room temperature for 10-12h, and wait for it to be completely cured to complete the preparation of the core power inductor.