Method for measuring thickness of dielectric layer

Abstract

The invention provides a method for measuring the thickness of a dielectric layer, and the method comprises the following steps: providing a semiconductor structure which comprises a first pattern region and a second pattern region, and forming a thinned dielectric layer on the first pattern region and the second pattern region; measuring the thickness of the dielectric layer on the first pattern area to obtain a first thickness, and measuring the thickness difference of the dielectric layer between the first pattern area and the second pattern area to obtain a step thickness; and obtaining the thickness of the dielectric layer on the second pattern area based on the difference between the first thickness and the step thickness. According to the dielectric layer thickness measurement method provided by the invention, the problems that the measurement result is not accurate and adverse effects can be caused on the circuit in the existing measurement scheme are solved.

Description

Technical Field

[0001] The invention belongs to the technical field of integrated circuit manufacturing, and in particular relates to a method for measuring the thickness of a dielectric layer. Background Art

[0002] In the manufacturing process of integrated circuits (especially superconducting integrated circuits), chemical mechanical polishing (CMP) is a key technology used to achieve planarization of the dielectric layer; precise control of the remaining thickness of the dielectric layer after CMP is crucial to ensure circuit performance and reliability. Excessive polishing may cause short circuits between layers, while insufficient polishing will result in insufficient step coverage.

[0003] Generally, the polishing rate of CMP is affected by the size and distribution of the metal pattern below the dielectric layer, resulting in different residual thicknesses of the dielectric layer above different metal patterns. For example, the smaller the size of the metal pattern and the more uneven the distribution, the faster the polishing rate when CMP is performed on the dielectric layer above it, and the smaller the residual thickness. Conversely, the larger the size of the metal pattern and the more uniform the distribution, the slower the polishing rate when CMP is performed on the dielectric layer above it, and the larger the residual thickness.

[0004] With the miniaturization of integrated circuits, the size of metal patterns in the circuit part is getting smaller and smaller. The geometric shapes of many areas are complex and unevenly distributed, making the surface of the dielectric layer above it rough after CMP. Traditional optical measurement tools, such as film thickness meters and ellipsometers, require a sufficiently large uniform area below the measurement point to achieve effective reflection and interference of the optical path. At this time, the traditional optical measurement tools are used to directly measure the remaining thickness of the dielectric layer above the metal pattern of the circuit part, which has the problem of inaccurate measurement results. In addition, the traditional optical measurement tools directly act on the circuit part, which may have adverse effects on the circuit part. It can be seen that proposing a method that has no adverse effects on the circuit part and can accurately measure the remaining thickness of the dielectric layer above the small-sized metal pattern is of great significance for optimizing the manufacturing process and improving the circuit performance.

[0005] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present invention and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because these solutions are described in the background technology section of the present invention. Summary of the invention

[0006] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a method for measuring the thickness of a dielectric layer, so as to solve the problem that the existing measurement scheme has inaccurate measurement results and may cause adverse effects on the circuit.

[0007] To achieve the above object and other related objects, the present invention provides a method for measuring the thickness of a dielectric layer, the method comprising:

[0008] A semiconductor structure is provided, comprising a first graphic region and a second graphic region, wherein a dielectric layer which has been thinned is formed on the first graphic region and the second graphic region;

[0009] Measuring the thickness of the dielectric layer on the first graphic area to obtain a first thickness, and measuring the thickness difference of the dielectric layer between the first graphic area and the second graphic area to obtain a step thickness;

[0010] Based on the difference between the first thickness and the step thickness, the thickness of the dielectric layer on the second graphic area is obtained.

[0011] Optionally, the method for obtaining the semiconductor structure includes:

[0012] Providing a semiconductor substrate, and defining a circuit area and a non-circuit area on the semiconductor substrate;

[0013] Forming a functional metal pattern in the circuit area of ​​the semiconductor substrate to make a module circuit, and forming a first metal pattern and at least one second metal pattern in the non-circuit area of ​​the semiconductor substrate;

[0014] forming a dielectric layer on the semiconductor substrate and each metal pattern, and performing a thinning process on the dielectric layer;

[0015] The area where the first metal pattern is located is the first pattern area, and the area where the second metal pattern is located is the second pattern area.

[0016] Optionally, the method of forming the first metal pattern and the second metal pattern includes:

[0017] forming the first metal pattern in the non-circuit area of ​​the semiconductor substrate based on a preset size;

[0018] Extracting size information and density information of the functional metal pattern in the module circuit, and forming at least one second metal pattern in a non-circuit area of ​​the semiconductor substrate based on the extracted information;

[0019] Wherein, the size of the first metal pattern is greater than that of the second metal pattern.

[0020] Optionally, at least one of the second metal patterns corresponding to the functional metal pattern in the module circuit is regarded as a monitoring pattern as a whole. When at least two functional metal patterns are formed in the circuit area of ​​the semiconductor substrate to produce at least two module circuits, at least two monitoring patterns are also formed in the non-circuit area of ​​the semiconductor substrate, wherein each functional metal pattern corresponds one-to-one to each monitoring pattern, and each monitoring pattern corresponds to the same first metal pattern.

[0021] Optionally, the shapes of the first projection of the first metal pattern in the horizontal direction and the second projection of the second metal pattern in the horizontal direction are both rectangles, the first projection has a first side length and a second side length, the second projection has a third side length and a fourth side length, and the first side length is less than or equal to the second side length, and the third side length is less than or equal to the fourth side length, wherein the first side length is greater than or equal to 100 μm, and the fourth side length is less than 100 μm.

[0022] Optionally, the distance between the first metal pattern and the monitoring pattern is less than or equal to the fourth side length, and / or the fourth side length is less than 10 μm.

[0023] Optionally, the dielectric layer is thinned by a chemical mechanical polishing process.

[0024] Optionally, the method for measuring the first thickness includes: setting at least two measuring points on the dielectric layer of the first graphic area, measuring thickness data corresponding to each measuring point by an optical measuring instrument, and processing each thickness data to obtain the first thickness.

[0025] Optionally, the optical measuring instrument includes: a film thickness meter, an ellipsometer, and an X-ray reflectometer.

[0026] Optionally, the method for measuring the step thickness includes: setting at least two measurement points on the dielectric layer of the second graphic area, scanning from the first graphic area to each measurement point or from each measurement point to the first graphic area by a step meter, measuring the step data corresponding to each measurement point, and processing each step data to obtain the step thickness.

[0027] Optionally, before measuring the first thickness and the step thickness, the measurement method further includes: a step of cleaning the semiconductor structure.

[0028] As described above, the method for measuring the thickness of the dielectric layer of the present invention, through the design of the first graphic area and the second graphic area, utilizes the thickness difference of the dielectric layer between the two and the thickness of the dielectric layer on the first graphic area, indirectly measures the thickness of the dielectric layer on the second graphic area, and realizes the accurate measurement of the residual thickness of the dielectric layer in the complex small graphic area; the present invention accurately reflects the functional metal pattern of the module circuit through the second metal pattern in the second graphic area, without directly using the module circuit, avoiding the adverse effect of the measuring instrument on the module circuit. The measurement method provided by the present invention is efficient and accurate, and is of great significance to improving circuit performance and optimizing manufacturing processes. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 Shown is a flow chart of a measurement method in an embodiment of the present invention.

[0030] Figure 2 Shown is a flow chart of a method for obtaining a semiconductor structure in an embodiment of the present invention.

[0031] Figure 3 Shown is a schematic diagram of a semiconductor structure according to an embodiment of the present invention.

[0032] Figure 4 Shown is a schematic diagram of the horizontal projection of the functional metal pattern in an embodiment of the present invention.

[0033] Figure 5 It is a schematic diagram showing the horizontal projection of the first metal pattern and the second metal pattern in an embodiment of the present invention.

[0034] Component number description

[0035] 100 Semiconductor Structure

[0036] 101 Semiconductor Substrate

[0037] 102 Circuit Area

[0038] 103 Non-circuit area

[0039] 104 Functional Metal Graphics

[0040] 105 First Metal Graphics

[0041] 106 Second Metal Graphics

[0042] 107 Dielectric layer

[0043] 108 First Graphic Area

[0044] 109 Second Graphic Area DETAILED DESCRIPTION

[0045] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0046] See also Figures 1 to 5 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the form, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0047] like Figure 1 As shown, this embodiment provides a method for measuring the thickness of a dielectric layer, including step S1, step S2 and step S3. Furthermore, step S1-2 is further included between step S1 and step S2.

[0048] In step S1 , a semiconductor structure 100 is provided, comprising a first graphic region 108 and a second graphic region 109 , wherein a dielectric layer 107 which has been thinned is formed on the first graphic region 108 and the second graphic region 109 .

[0049] In one embodiment, if Figure 2 As shown, the method for obtaining the semiconductor structure 100 includes step S11, step S12 and step S13.

[0050] Step S11, combining Figure 2 Also see Figure 3 , a semiconductor substrate 101 is provided, and a circuit area 102 and a non-circuit area 103 are defined on the semiconductor substrate 101. In one example, the semiconductor substrate 101 is a silicon substrate. Of course, other substrate materials that can be used to manufacture integrated circuits (especially superconducting integrated circuits) are also feasible and are not limited to this. It should be noted that in actual applications, the size of the circuit area 102 is much larger than the size of the non-circuit area 103. Figure 3 The relative position relationship between the circuit area 102 and the non-circuit area 103 is simply illustrated, and no specific limitation is imposed on the sizes of the two areas.

[0051] Step S12, combining Figure 2 Also see Figure 3 A functional metal pattern 104 is formed in a circuit region 102 of a semiconductor substrate 101 to manufacture a module circuit, and a first metal pattern 105 and at least one second metal pattern 106 are formed in a non-circuit region 103 of the semiconductor substrate 101 .

[0052] Specifically, a functional metal pattern 104 is first formed in the circuit area 102 of the semiconductor substrate 101, and then a first metal pattern 105 and at least one second metal pattern 106 are formed in the non-circuit area 103 of the semiconductor substrate 101; and the size of the second metal pattern 106 is equal to the size of the functional metal pattern 104, and the size of the first metal pattern 105 is larger than the size of the second metal pattern 106. Wherein:

[0053] The method for forming the functional metal pattern 104 includes: forming the functional metal pattern 104 in the circuit region 102 of the semiconductor substrate 101 based on a specific circuit function. In practical applications, the functional metal pattern 104 usually includes a plurality of small patterns, such as Figure 4 As shown, by arranging the small graphics according to specific rules and electrically connecting them to form a module circuit to achieve a specific circuit function; wherein the small graphics are usually regular shapes, such as rectangles, etc., of course, there are also the possibility of irregular shapes, and in addition, the sizes of the small graphics can be the same or different. In order to achieve circuit miniaturization, taking the small graphics as rectangles as an example, the maximum side length of each small graphic does not exceed 100μm, usually does not exceed 10μm.

[0054] The method for forming the first metal pattern 105 includes: forming the first metal pattern 105 in the non-circuit area 103 of the semiconductor substrate 101 based on a preset size. Figure 5 As shown, the shape of the first projection of the first metal pattern 105 in the horizontal direction is a rectangle, wherein the first projection has a first side length L1 and a second side length L2, and the first side length L1 is less than or equal to the second side length L2; as an optional solution, the shape of the first projection is a square, in which case the first side length L1 is equal to the second side length L2. In practical applications, the first side length L1 can be made greater than or equal to 100 μm to achieve a preset size design for the first metal pattern 105, thereby ensuring that the preset size is within the measurement range of the optical measuring instrument, so that the remaining thickness of the dielectric layer 107 on the first metal pattern 105 can be accurately measured by the optical measuring instrument later.

[0055] The method for forming the second metal pattern 106 includes: extracting size information and density information of the functional metal pattern 104 in the module circuit, and forming at least one second metal pattern 106 in the non-circuit area 103 of the semiconductor substrate 101 based on the extracted information; treating the at least one second metal pattern 106 corresponding to the functional metal pattern 104 in the module circuit as a monitoring pattern (such as Figure 5The monitoring pattern is the same size and density as the functional metal pattern 104, so that the monitoring pattern can accurately reflect the actual condition of the module circuit, thereby truly reflecting the remaining thickness of the dielectric layer above the module circuit after thinning. In addition, by replacing the functional metal pattern 104 in the module circuit with the monitoring pattern for thickness measurement, the adverse effects of optical measuring instruments on the module circuit can be avoided. In one example, Figure 5 As shown, the shape of the second projection of the second metal pattern 106 in the horizontal direction is a rectangle, wherein the second projection has a third side length L3 and a fourth side length L4, and the third side length L3 is less than or equal to the fourth side length L4; as an optional solution, the shape of the second projection is a square, in which case the third side length L3 is equal to the fourth side length L4. In practical applications, the fourth side length L4 can be made less than 100μm, and further, the fourth side length L4 can be made less than 10μm. In addition, in order to reduce the scanning time of the subsequent step meter, the distance between the monitoring pattern and the first metal pattern 105 should not be too far, and the distance is usually less than or equal to the fourth side length L4.

[0056] Regarding the size information and density information of the functional metal pattern 104, in this embodiment, the small patterns arranged according to a specific rule in the functional metal pattern 104 are regarded as an overall pattern (eg Figure 4 The size information of the overall graphic is the size information of the functional metal graphic 104. Taking the overall graphic as a rectangle as an example, the size information generally includes the information of the length of each side. The ratio of the sum of the areas of each small graphic to the area of ​​the overall graphic is defined as the density information of the functional metal graphic 104. It should be noted that when forming a monitoring graphic based on the density information of the functional metal graphic 104, it is sufficient to ensure that the density of the monitoring graphic is the same as the density of the functional metal graphic 104. It is not required that each second metal graphic 106 in the monitoring graphic completely corresponds to each small graphic in the functional metal graphic 104. In fact, a slight difference is also feasible, but the difference should not be too large as much as possible to avoid failing to accurately reflect the actual status of the module circuit.

[0057] This step is an example of forming a functional metal pattern 104 in the circuit area 102 of the semiconductor substrate 101 to make a module circuit. In practical applications, two or more functional metal patterns 104 can be formed in the circuit area 102 of the semiconductor substrate 101 to make multiple module circuits, thereby making an integrated circuit, such as a superconducting integrated circuit; at this time, it is also necessary to form a corresponding number of monitoring patterns in the non-circuit area 103 of the semiconductor substrate 101, wherein each functional metal pattern corresponds to a monitoring pattern, and multiple monitoring patterns can correspond to the same first metal pattern 105. It should be noted that when there are multiple monitoring patterns, each monitoring pattern is formed based on the size information and density information of its corresponding functional metal pattern 104, so as to accurately reflect the actual status of each module circuit.

[0058] Step S13, combining Figure 2 Also see Figure 3 , a dielectric layer 107 is formed on the semiconductor substrate 101 and each metal pattern, and the dielectric layer 107 is thinned to obtain a semiconductor structure 100; in the semiconductor structure 100, the area where the first metal pattern 105 is located is the first pattern area 108, and the area where the second metal pattern 106 is located is the second pattern area 109. Specifically, the dielectric layer 107 is formed by a chemical vapor deposition process, and the dielectric layer 107 is thinned by a chemical mechanical polishing process. In an example, the dielectric layer 107 includes one of silicon dioxide (SiO2) and silicon nitride (SiNx). Of course, it is also feasible for the dielectric layer 107 to be other materials with good insulation properties, and there is no limitation on this.

[0059] Step S1-2, cleaning the semiconductor structure 100 to ensure that the surface of the semiconductor structure 100 is clean and flat, so as to reduce the possibility of subsequent measurement errors. In practical applications, when chemical mechanical polishing is performed, the polishing machine usually performs a cleaning step after polishing. At this time, the cleaning of this step can be considered to be omitted.

[0060] Step S2 , measuring the thickness of the dielectric layer 107 on the first graphic region 108 to obtain a first thickness H1 , and measuring the thickness difference of the dielectric layer 107 between the first graphic region 108 and the second graphic region 109 to obtain a step thickness ΔH.

[0061] In one embodiment, the method for measuring the first thickness H1 includes: setting at least two measuring points on the dielectric layer 107 of the first graphic area 108, measuring the thickness data corresponding to each measuring point by an optical measuring instrument, and processing each thickness data to obtain the first thickness H1; for example, five measuring points are set in the upper, lower, left, right, and middle directions of the dielectric layer 107 in the first graphic area 108, and five thickness data corresponding to the five measuring points are measured by an optical measuring instrument, and the first thickness H1 is obtained by taking the median of the five thickness data. Of course, data processing is not limited to taking the median, and other methods such as taking the mean are also feasible. In one example, the optical measuring instrument includes but is not limited to one of a film thickness meter, an ellipsometer, and an X-ray reflectometer (XRR); since the size of the first metal graphic 105 is large enough, after the dielectric layer 107 is thinned by a chemical mechanical polishing process, the dielectric layer 107 in the first graphic area 108 can provide a measurement area with sufficient size and uniformity, which meets the technical specifications and measurement requirements of the optical measuring instrument and ensures the accuracy and consistency of the measurement data.

[0062] In one embodiment, the method for measuring the step thickness ΔH includes: setting at least two measuring points on the dielectric layer 107 of the second graphic area 109, scanning from the first graphic area 108 to each measuring point or scanning from each measuring point to the first graphic area 108 by a step meter, to measure the step data corresponding to each measuring point, and processing each step data to obtain the step thickness; for example, five measuring points are set in the upper, lower, left, right, and middle directions of the dielectric layer 107 in the second graphic area 109, and five step data are measured by scanning from the first graphic area 108 to the five measuring points by a step meter, and the step thickness ΔH is obtained by taking the median of the five step data. Of course, data processing is not limited to taking the median, and other methods such as taking the mean are also feasible. In practical applications, a high-resolution step meter is usually used to scan the morphology of the relevant graphic area at a uniform speed to ensure that the height change can be accurately captured, thereby obtaining accurate and reliable step data. It should be noted that when performing topographic scanning using a step meter, it is not necessary to scan the entire first graphic area 108. Scanning part of the first graphic area 108 is also feasible as long as the height change can be captured. In addition, the number of measurement points in the second graphic area 109 can be the same as or different from the number of measurement points in the first graphic area 108 without any substantial impact.

[0063] Step S3, based on the difference between the first thickness H1 and the step thickness ΔH, the thickness of the dielectric layer 107 on the second graphic area 109 is obtained; the thickness of the dielectric layer 107 on the second graphic area 109 is recorded as the second thickness H2, which satisfies the formula H2=H1-ΔH. Since the size of the second metal pattern 106 in the second graphic area 109 is small, the second thickness H2 cannot be directly measured due to the accuracy limitation of the optical measuring instrument, or the directly measured second thickness H2 is inaccurate. By indirectly measuring with the above formula, the accurate second thickness H2 can be obtained, thereby realizing the accurate measurement of the remaining thickness of the dielectric layer above the module circuit, and avoiding adverse effects on the module circuit.

[0064] In summary, a method for measuring the thickness of a dielectric layer of the present invention, through the design of the first graphic area and the second graphic area, utilizes the thickness difference of the dielectric layer between the two and the thickness of the dielectric layer on the first graphic area, indirectly measures the thickness of the dielectric layer on the second graphic area, and realizes the accurate measurement of the remaining thickness of the dielectric layer in the complex small graphic area; the present invention accurately reflects the functional metal pattern of the module circuit through the second metal pattern in the second graphic area, without directly using the module circuit, avoiding the adverse effect of the measuring instrument on the module circuit. The measurement method provided by the present invention is efficient and accurate, and is of great significance to improving circuit performance and optimizing manufacturing processes. Therefore, the present invention effectively overcomes the various shortcomings in the prior art and has a high industrial utilization value.

[0065] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for measuring the thickness of a dielectric layer, characterized in that: The measuring method comprises: A semiconductor structure is provided, comprising a first graphic region and a second graphic region, wherein a dielectric layer which has been thinned is formed on the first graphic region and the second graphic region; Measuring the thickness of the dielectric layer on the first graphic area to obtain a first thickness, and measuring the thickness difference of the dielectric layer between the first graphic area and the second graphic area to obtain a step thickness; Based on the difference between the first thickness and the step thickness, the thickness of the dielectric layer on the second graphic area is obtained.

2. The method for measuring the thickness of a dielectric layer according to claim 1, characterized in that: The method for obtaining the semiconductor structure comprises: Providing a semiconductor substrate, and defining a circuit area and a non-circuit area on the semiconductor substrate; Forming a functional metal pattern in the circuit area of ​​the semiconductor substrate to make a module circuit, and forming a first metal pattern and at least one second metal pattern in the non-circuit area of ​​the semiconductor substrate; forming a dielectric layer on the semiconductor substrate and each metal pattern, and performing a thinning process on the dielectric layer; The area where the first metal pattern is located is the first pattern area, and the area where the second metal pattern is located is the second pattern area.

3. The method for measuring the thickness of a dielectric layer according to claim 2, characterized in that: The method of forming the first metal pattern and the second metal pattern includes: forming the first metal pattern in the non-circuit area of ​​the semiconductor substrate based on a preset size; Extracting size information and density information of the functional metal pattern in the module circuit, and forming at least one second metal pattern in a non-circuit area of ​​the semiconductor substrate based on the extracted information; Wherein, the size of the first metal pattern is greater than that of the second metal pattern.

4. The method for measuring the thickness of a dielectric layer according to claim 3, characterized in that: At least one of the second metal patterns corresponding to the functional metal pattern in the module circuit is regarded as a monitoring pattern as a whole. When at least two functional metal patterns are formed in the circuit area of ​​the semiconductor substrate to make at least two module circuits, at least two monitoring patterns are also formed in the non-circuit area of ​​the semiconductor substrate, wherein each functional metal pattern corresponds to each monitoring pattern one by one, and each monitoring pattern corresponds to the same first metal pattern.

5. The method for measuring the thickness of a dielectric layer according to claim 3 or 4, characterized in that: The shapes of the first projection of the first metal pattern in the horizontal direction and the second projection of the second metal pattern in the horizontal direction are both rectangles, the first projection has a first side length and a second side length, the second projection has a third side length and a fourth side length, and the first side length is less than or equal to the second side length, and the third side length is less than or equal to the fourth side length, wherein the first side length is greater than or equal to 100 μm, and the fourth side length is less than 100 μm.

6. The method for measuring the thickness of a dielectric layer according to claim 5, characterized in that: The distance between the first metal pattern and the monitoring pattern is less than or equal to the fourth side length, and / or the fourth side length is less than 10 μm.

7. The method for measuring the thickness of a dielectric layer according to claim 1, characterized in that: The dielectric layer is thinned by a chemical mechanical polishing process.

8. The method for measuring dielectric layer thickness according to claim 1, characterized in that: The method for measuring the first thickness includes: setting at least two measuring points on the dielectric layer of the first graphic area, measuring the thickness data corresponding to each measuring point by an optical measuring instrument, and processing each thickness data to obtain the first thickness.

9. The method for measuring the thickness of a dielectric layer according to claim 8, characterized in that: The optical measuring instrument comprises: one of a film thickness meter, an ellipsometer, and an X-ray reflectometer.

10. The method for measuring dielectric layer thickness according to claim 1, characterized in that: The method for measuring the step thickness includes: setting at least two measurement points on the dielectric layer of the second graphic area, scanning from the first graphic area to each measurement point or from each measurement point to the first graphic area by a step meter, measuring the step data corresponding to each measurement point, and processing each step data to obtain the step thickness.

11. The method for measuring dielectric layer thickness according to claim 1, characterized in that: Before measuring the first thickness and the step thickness, the measurement method further includes: a step of cleaning the semiconductor structure.

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