Silicon through hole forming method and image sensor

Abstract

The invention provides a silicon through hole forming method, which comprises the following steps of: forming an isolating layer on the periphery of a through hole area on a first side surface of a semiconductor substrate before forming a grid electrode; in a subsequent second side surface thinning process, isolating the through hole region from the semiconductor substrate; and etching in the through hole region to form a silicon through hole. According to the invention, the process similar to that of the pixel region is adopted in the through hole region, and the substrate in the through hole region is floated by isolating the polycrystalline silicon and / or the dielectric layer from the outside. Meanwhile, before the silicon through hole is filled with the metal material, dielectric isolation does not need to be carried out on the side wall of the through hole, the side wall dielectric deposition and bottom etching process is simplified, and a process window can be increased.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a through silicon via forming method and an image sensor. Background Art

[0002] In the process of forming semiconductor devices, through silicon via technology is usually involved. Through silicon vias can achieve vertical conduction between chips and wafers, and achieve vertical electrical connection by filling metal materials such as copper and tungsten or conductive materials such as polysilicon. In the process of image sensors, through silicon vias are also an indispensable structural component.

[0003] In a conventional through silicon via formation process, dielectric isolation is required on the sidewall of the through silicon via before the metal material is filled in the through silicon via. The process is relatively complicated and the cost is high. Summary of the invention

[0004] The object of the present invention is to provide a method for forming a through silicon via, comprising: Before forming the gate, forming an isolation layer around the through hole region on the first side of the semiconductor substrate; In a subsequent second side thinning process, the through hole region is isolated from the semiconductor substrate; A through silicon via is formed by etching in the through hole region.

[0005] Furthermore, the isolation layer at least includes a polycrystalline semiconductor layer and a first dielectric layer.

[0006] Further, it is used to form an image sensor, wherein the isolation layer and the isolation structure between the pixel units of the image sensor are formed simultaneously.

[0007] Further, the etching in the through-hole region to form a through-silicon via comprises: forming access points and metal wiring on the first side of the semiconductor substrate; Thinning the second side surface of the semiconductor substrate to expose the isolation layer; depositing a second dielectric layer on the second side; According to a preset photolithography pattern, the second dielectric layer and the semiconductor substrate are etched to the access point and the metal wiring to form the through silicon via, and a metal material is filled on the surface of the through silicon via.

[0008] Furthermore, after thinning the second side surface of the semiconductor substrate and before depositing the second dielectric layer on the second side surface, the method further includes the following steps: Etching the through hole region on the second side to form a shallow trench; A pinning layer is formed on the surface of the shallow trench.

[0009] Furthermore, after the metal material is filled on the surface of the through silicon via, the method further comprises: The metal material on the second side is etched back.

[0010] Further, forming the isolation layer comprises: According to a preset photolithography pattern, etching the semiconductor substrate to form a first trench; Forming an epitaxial layer on the surface of the first trench by an epitaxial process; forming the first dielectric layer on the surface of the epitaxial layer; A polycrystalline semiconductor is filled on the surface of the first dielectric layer to form the polycrystalline semiconductor layer.

[0011] Furthermore, the epitaxial layer at least includes a sub-epitaxial layer having a doping type opposite to that of the semiconductor substrate.

[0012] Furthermore, forming an epitaxial layer on the surface of the first trench by an epitaxial process includes: By epitaxially growing an intrinsic semiconductor on the surface of the first trench through an epitaxial process, forming a first sub-epitaxial layer; A semiconductor material having a doping type opposite to that of the semiconductor substrate is epitaxially grown on the surface of the first sub-epitaxial layer through an epitaxial process to form a second sub-epitaxial layer.

[0013] Furthermore, the method further includes: applying a negative voltage to the isolation layer to form a reverse bias voltage to enhance the isolation of the isolation layer from the through hole region.

[0014] The present invention further provides an image sensor, wherein the through silicon via is formed by using the above-mentioned through silicon via forming method in the process of forming the image sensor.

[0015] The present invention proposes a through silicon via formation method and an image sensor through the above scheme, wherein the through hole region adopts a process similar to that of the pixel region, and is isolated from the outside by polysilicon and / or a dielectric layer, so that the substrate in the through hole region is floated. At the same time, before the metal material is filled in the through silicon via, it is not necessary to perform dielectric isolation on the side wall of the through hole, which simplifies the side wall dielectric deposition and bottom etching process, and can increase the process window. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Other features, objects and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings.

[0017] Figure 1 , Figure 3 , Figure 6 , Figure 7 , Figure 8 , Fig.10 , Fig.11 A schematic diagram of the structure of a side section during the formation of an image sensor of the present invention; Figure 2 , Figure 4 , Figure 5 , Fig. 9 The present invention is a schematic diagram of the structure of a cross section during the formation of an image sensor.

[0018] In the drawings, the same or similar reference numerals denote the same or similar devices (modules) or steps throughout different drawings. Implementation

[0019] The object of the present invention is to provide a method for forming a through silicon via, specifically, comprising the following steps: Step S100: Before forming the gate, an isolation layer 200 is formed around the through hole region 110 of the first side surface A of the semiconductor substrate 100. Figure 2 As shown; Step S200: in a subsequent second side B thinning process, isolating the through hole region 110 from the semiconductor substrate 100; Step S300 : etching the through-silicon via 120 in the through-hole region 110 .

[0020] In order to achieve the isolation effect, preferably, the isolation layer 200 at least includes a polycrystalline semiconductor layer 210 and a first dielectric layer 220. On this basis, in an optional embodiment of the present invention, the through silicon via formation process can be used to form an image sensor, and preferably, the isolation layer 200 can be formed simultaneously with the isolation structure between the pixel units of the image sensor.

[0021] In an optional embodiment, the isolation layer may be formed in step S100 by the following steps: Step S110: etching the semiconductor substrate 100 according to a preset photolithography pattern to form a first trench 150; Step S120: forming an epitaxial layer 151 on the surface of the first trench 150 through an epitaxial process; Step S130: forming the first dielectric layer 220 on the surface of the epitaxial layer 151; Step S140: Filling the surface of the first dielectric layer 220 with polycrystalline semiconductor to form the polycrystalline semiconductor layer 210. Figure 1 The figure shows the side cross-section of the structure. Figure 2 Shown is a cross-sectional view.

[0022] Preferably, the epitaxial layer 151 formed in step S120 includes at least a sub-epitaxial layer having a doping type opposite to that of the semiconductor substrate 100 , thereby forming a lateral PN junction structure.

[0023] On this basis, if Figure 1 As shown, in step S120, the epitaxial layer 151 can also be formed by the following preferred steps: Step S121: epitaxially grow an intrinsic semiconductor on the surface of the first trench 150 through an epitaxial process to form a first sub-epitaxial layer 1511; Step S122 : epitaxially grow a semiconductor material having a doping type opposite to that of the semiconductor substrate 100 on the surface of the first sub-epitaxial layer 1511 through an epitaxial process to form a second sub-epitaxial layer 1512 .

[0024] Specifically, in step S300, the through silicon via 120 may be formed by etching in the through hole region 110 through the following steps: Step S310: Figure 3 As shown, an access point 130 is formed on the first side surface A of the semiconductor substrate 100 ( Figure 4 ) and metal wiring 140 ( Figure 5 ) as shown; Step S320: thinning the second side surface B of the semiconductor substrate 100 to expose the isolation layer 200. Figure 6 , Figure 7 As shown; Step S330: depositing a second dielectric layer (not shown in the figure) on the second side surface B; Step S340: according to a preset photolithography pattern, the second dielectric layer and the semiconductor substrate 100 are etched to the access point 130 and the metal wiring 140 to form the through silicon via 120. Figure 8 , Fig. 9 As shown, the metal material 121 is then filled on the surface of the through silicon via 120, as shown in FIG. Fig.10 shown.

[0025] Preferably, after thinning the second side surface B of the semiconductor substrate 100 in step S320 and before depositing the second dielectric layer in step S330, the pinning layer 112 may be formed by the following steps: Step S321: etching the through hole region 110 on the second side surface B to form a shallow trench 111, such as Figure 8 As shown; Step S322: forming a pinning layer 112 on the surface of the shallow trench 111, such as Figure 8 , Fig. 9 shown.

[0026] On this basis, after the surface of the through silicon via 120 is filled with metal material in step S340, the metal material on the second side surface B may be etched back, such as Fig.11 shown.

[0027] In an optional embodiment, the method further includes: applying a negative voltage to the isolation layer 200 to form a reverse bias to enhance the isolation of the through-hole region 110 by the isolation layer 200 .

[0028] The present invention further provides an image sensor, wherein the through silicon via is formed by using the above-mentioned through silicon via forming method in the process of forming the image sensor.

[0029] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, in any case, the embodiments should be considered exemplary and non-restrictive. In addition, it is clear that the term "comprising" does not exclude other elements and steps, and the wording "a" does not exclude the plural. Multiple elements stated in a device claim may also be implemented by one element. The terms first, second, etc. are used to indicate names and do not indicate any particular order.

Claims

1. A method for forming a through silicon via, characterized in that: include: Before forming the gate, forming an isolation layer around the through hole region on the first side of the semiconductor substrate; In a subsequent second side thinning process, the through hole region is isolated from the semiconductor substrate; A through silicon via is formed by etching in the through hole region.

2. The through silicon via forming method according to claim 1, wherein: The isolation layer at least includes a polycrystalline semiconductor layer and a first dielectric layer.

3. The through silicon via forming method according to claim 1, wherein: Used to form an image sensor, wherein the isolation layer and the isolation structure between the pixel units of the image sensor are formed simultaneously.

4. The through silicon via forming method according to claim 1, wherein: The etching to form a through silicon via in the through hole region comprises: forming access points and metal wiring on the first side of the semiconductor substrate; Thinning the second side surface of the semiconductor substrate to expose the isolation layer; depositing a second dielectric layer on the second side; According to a preset photolithography pattern, the second dielectric layer and the semiconductor substrate are etched to the access point and the metal wiring to form the through silicon via, and a metal material is filled on the surface of the through silicon via.

5. The through silicon via forming method according to claim 4, wherein: After thinning the second side of the semiconductor substrate and before depositing the second dielectric layer on the second side, the step further includes: Etching the through hole region on the second side to form a shallow trench; A pinning layer is formed on the surface of the shallow trench.

6. The through silicon via forming method according to claim 4, wherein: After the metal material is filled on the surface of the through silicon via, the method further comprises: The metal material on the second side is etched back.

7. The through silicon via forming method according to claim 2, wherein: The forming of the isolation layer comprises: According to a preset photolithography pattern, etching the semiconductor substrate to form a first trench; Forming an epitaxial layer on the surface of the first trench by an epitaxial process; forming the first dielectric layer on the surface of the epitaxial layer; A polycrystalline semiconductor is filled on the surface of the first dielectric layer to form the polycrystalline semiconductor layer.

8. The method for forming a through silicon via according to claim 6, wherein: The epitaxial layer at least includes a sub-epitaxial layer having a doping type opposite to that of the semiconductor substrate.

9. The through silicon via forming method according to claim 7, wherein: The forming of an epitaxial layer on the surface of the first trench by an epitaxial process comprises: By epitaxially growing an intrinsic semiconductor on the surface of the first trench through an epitaxial process, forming a first sub-epitaxial layer; A semiconductor material having a doping type opposite to that of the semiconductor substrate is epitaxially grown on the surface of the first sub-epitaxial layer through an epitaxial process to form a second sub-epitaxial layer.

10. The through silicon via forming method according to claim 1, wherein: Also includes: A negative voltage is applied to the isolation layer to form a reverse bias, so as to enhance the isolation of the isolation layer from the through-hole region.

11. An image sensor, characterized in that: In the process of forming the image sensor, the through silicon via is formed by using the through silicon via forming method as described in claims 1 to 10.

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