A semiconductor package and a manufacturing method thereof

Abstract

The present invention discloses a semiconductor package and a manufacturing method thereof, including an EMI shielding layer. The beneficial effects of the present invention are as follows: By providing connecting bumps and conductive copper bars between the EMI shielding layer and the support mold, a stable support structure is provided for the welding wires. This design effectively prevents the offset or desoldering of the welding wires during the packaging process, significantly improving the yield and reliability of the package. The use of conductive copper bars and conductive bumps not only enhances the mechanical connection but also ensures good electrical connection, thereby improving the stability and performance of the overall circuit. By introducing the design of a sealing filling groove and a closed groove in the packaging structure, the sealing space formed by injection molding effectively prevents the intrusion of harmful substances such as external moisture and dust. The tight fit of the support bottom frame with the outer closed frame and the closed bottom frame, as well as the filling of the sealing material, together constitute an efficient sealing system, providing comprehensive protection for the circuits and components inside the package.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor packaging, and specifically to a semiconductor package and a manufacturing method thereof. Background Art

[0002] Semiconductor packaging refers to the process of processing wafers that have passed testing into independent chips according to product models and functional requirements, that is, the process of placing the fabricated semiconductor devices into plastic, ceramic, or metal casings with support and protection, and connecting them to external driving circuits and other electronic components. Semiconductor packaging is the process of encapsulating semiconductor chips in microelectronic devices with specific casings, usually including connecting the chips to a packaging base or substrate and covering them with packaging materials (such as plastic, ceramic, or metal). The main purpose of packaging is to protect the chips from mechanical, chemical, or environmental damage and provide electrical connections for them. However, the existing semiconductor packaging technology has the following main problems: Lack of support for bonding wires: The bonding wire components are prone to offset or de-welding due to the lack of a support structure during the packaging process, affecting the packaging yield and reliability, and it is difficult to ensure the safety and stability of the internal circuits of the package; Insufficient sealing performance: The package does not have a sealant groove, and the sealing effect of the package is not good. Harmful substances such as external moisture and dust are likely to invade, causing damage to the circuits and components and shortening the service life. These problems limit the performance and stability of semiconductor devices, and there is an urgent need to develop new packaging technologies to improve their reliability and service life. Summary of the Invention

[0003] The purpose of the present invention is to provide a semiconductor package and a manufacturing method thereof to solve the following main problems in the existing semiconductor packaging technology mentioned in the above background art: Lack of support for bonding wires: The bonding wire components are prone to offset or de-welding due to the lack of a support structure during the packaging process, affecting the packaging yield and reliability, and it is difficult to ensure the safety and stability of the internal circuits of the package; Insufficient sealing performance: The package does not have a sealant groove, and the sealing effect of the package is not good. Harmful substances such as external moisture and dust are likely to invade, causing damage to the circuits and components and shortening the service life. These problems limit the performance and stability of semiconductor devices, and there is an urgent need to develop new packaging technologies to improve their reliability and service life.

[0004] To achieve the above object, the present invention provides the following technical solutions: A semiconductor package includes an EMI shielding layer. A first support mold is fixedly connected to the top of the EMI shielding layer. A second support mold is fixedly connected to the top of the first support mold. A semiconductor substrate is fixedly connected to the top of the second support mold. A plurality of connecting bumps are fixedly connected at equal intervals inside the EMI shielding layer. A first conductive bump is fixedly connected to the bottom of the connecting bump. The top of the first conductive bump is fixedly connected to the EMI shielding layer. A connecting component is arranged inside the first support mold. The connecting component is connected to the connecting bump. A conductive component is arranged inside the semiconductor substrate. The conductive component is connected to the connecting component. Top conductive blocks are arranged at equal intervals on the top of the conductive component. A top metal plate is fixedly connected to the top of the top conductive block. A first conductive block is fixedly connected to the top of the top metal plate. A metal trace is arranged on the top of the first conductive block. A plurality of second conductive blocks are arranged at equal intervals on the top of the metal trace. A packaging metal plate is arranged on the top of the second conductive block. A first die is arranged on the top of the semiconductor substrate. A second die is arranged on the top of the first die. A third die is arranged on the top of the second die. A plurality of first connection points are arranged at equal intervals inside the first die. A plurality of second connection points are arranged at equal intervals on the top of the third die. The first connection point and the metal trace are connected by welding with a wire. The bottom of the packaging metal plate is connected to the second connection point. An outer shell is arranged above the third die. A packaging fixing component is arranged inside the outer shell for fixing the packaging positions of the first conductive block, the metal trace, the second conductive block, and the packaging metal plate. An outer closed frame is fixedly connected to the outside of the outer shell. A closed bottom frame is fixedly connected to the bottom of the outer closed frame. A first sealing filling groove is opened at the bottom of the outer closed frame. A support bottom frame is arranged at the bottom of the EMI shielding layer.

[0005] Preferably, the connecting component includes conductive copper bars. A plurality of conductive copper bars are fixedly connected at equal intervals to the top of the connecting bump. The conductive copper bars are fixedly connected to the first support mold. A second conductive bump is fixedly connected to the top end of the conductive copper bar. The second conductive bump is fixedly connected to the second support mold. The second conductive bump is connected to the conductive component.

[0006] Preferably, the conductive component includes a first metal wire pattern. A plurality of first metal wire patterns are fixedly connected at equal intervals inside the semiconductor substrate. The bottom of the first metal wire pattern is fixedly connected to the second conductive bump. A conductive support block is fixedly connected to the top of the first metal wire pattern. A second metal wire pattern is arranged on the top of the conductive support block. The top of the second metal wire pattern is fixedly connected to the top conductive block.

[0007] Preferably, the encapsulation and fixing component includes a second encapsulation inner support frame. The outer sides of the metal trace and the second conductive block are fixedly connected to the second encapsulation inner support frame. The outer side of the second encapsulation inner support frame is fixedly connected to the inner side of the housing. The outer sides of the second conductive block and the encapsulation metal plate are fixedly connected to a first encapsulation inner support frame. The outer side of the first encapsulation inner support frame is fixedly connected to the inner side of the housing. The bottom of the first encapsulation inner support frame is fixedly connected to the second encapsulation inner support frame.

[0008] Preferably, a plurality of encapsulation support bodies are fixedly connected equidistantly inside the housing. The bottom of the encapsulation support body is fixedly connected to the first encapsulation inner support frame.

[0009] Preferably, a plurality of connection grooves adapted to the first conductive bumps are provided equidistantly at the top of the support bottom frame. A plurality of third conductive bumps connected to the connection grooves are provided equidistantly at the bottom of the support bottom frame.

[0010] Preferably, a second sealing filling groove adapted to the first sealing filling groove is provided at the top of the support bottom frame. A closing groove adapted to the closing bottom frame is provided inside the second sealing filling groove.

[0011] Preferably, a second electronic device is provided at the bottom of the first support mold. The second electronic device is fixedly connected to the EMI shielding layer.

[0012] Preferably, a first electronic device adapted to the second electronic device is installed inside the support bottom frame.

[0013] A manufacturing method of a semiconductor package includes the following steps:

[0014] S1. Connect the first conductive bumps to the bottom of the EMI shielding layer through conductive adhesive, install the first support mold on the top of the EMI shielding layer through adhesive, and install the second support mold on the top of the first support mold through adhesive to ensure the electrical and mechanical connections between all parts;

[0015] S2. Install a plurality of connection bumps equidistantly and embedded inside the EMI shielding layer. The bottom of each connection bump is electrically connected to the first conductive bump through conductive material. At the top of the connection bumps, a plurality of conductive copper bars are installed equidistantly through welding. The conductive copper bars pass through the holes reserved in the first support mold. At the top of the conductive copper bars, the second conductive bumps are installed through welding again to ensure a certain electrical connection between the second conductive bumps and the second support mold;

[0016] S3. Install multiple first metal wire patterns embedded inside the semiconductor substrate. The bottom of each first metal wire pattern is electrically connected to the second conductive bump through a conductive material. Install a conductive support block on the top of the first metal wire pattern by welding, and set a second metal wire pattern on the top of the conductive support block. Electrically connect the top of the second metal wire pattern to the top conductive block through a conductive material to construct a complete conductive path;

[0017] S4. Install a top metal plate on the top of the top conductive block through a conductive material, and install a first conductive block on the top of the top metal plate again through a conductive material;

[0018] S5. Form a metal trace by electroplating on the top of the first conductive block, set multiple second conductive blocks equidistantly on the top of the metal trace, and achieve electrical connection with the metal trace through a conductive material;

[0019] S6. Install a package metal plate on the top of the second conductive block through a conductive material to provide protection for subsequent packaging and testing. Stack a first die, a second die and a third die on the top of the semiconductor substrate in sequence through an adhesive to form a multi-layer circuit structure;

[0020] S7. Electrically connect the first connection point inside the first die to the corresponding point on the metal trace through wire welding. At the same time, electrically connect the bottom of the package metal plate to the second connection point on the top of the third die through a conductive material;

[0021] S8. Install a housing above the third die through an adhesive. Inside the housing, install a first package inner support frame and a second package inner support frame by injection molding. They support and fix the first conductive block, the metal trace, the second conductive block and the package metal plate through a reserved structure;

[0022] S9. Install an outer closed frame on the outside of the housing through an adhesive, and install a closed bottom frame at the bottom of the outer closed frame to form the external frame of the packaging structure;

[0023] S10. Inject and form a first sealing filling groove at the bottom of the outer closed frame. Similarly, inject and form a second sealing filling groove matching the first sealing filling groove at the top of the support bottom frame. Inject and form a closed groove matching the closed bottom frame inside the second sealing filling groove to provide a sealed space for packaging;

[0024] S11. At the top of the support bottom frame, a plurality of connection grooves for mating with the first conductive bumps are equidistantly opened through the reserved space, and a plurality of third conductive bumps connected to the connection grooves are equidistantly arranged at the bottom of the support bottom frame. At the bottom of the first support mold, the second electronic device is installed through an adhesive, and it is ensured that there is a certain electrical connection between the second electronic device and the EMI shielding layer. Inside the support bottom frame, the first electronic device for mating with the second electronic device is installed through the reserved space, ensuring the electrical and mechanical connections between all parts;

[0025] S12. Use appropriate sealing materials to fill the first sealing filling groove and the second sealing filling groove, and ensure the sealing of the whole package through the perfusion method to prevent the interference of the external environment;

[0026] S13. Conduct final inspection and testing on the manufactured semiconductor package, including functional testing, performance testing, and reliability testing, to ensure that its functions and performance meet the design requirements, providing reliable guarantee for subsequent packaging and applications.

[0027] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure.

[0028] Compared with the prior art, the beneficial effects of the present invention are as follows: By arranging connection bumps and conductive copper bars between the EMI shielding layer and the support mold, a stable support structure is provided for the welding wires. This design effectively prevents the offset or de-welding of the welding wires during the packaging process, significantly improving the yield and reliability of the package. The use of conductive copper bars and conductive bumps not only enhances the mechanical connection but also ensures good electrical connection, thus improving the stability and performance of the overall circuit; By introducing the design of sealing filling grooves and closed grooves in the packaging structure, the sealed space formed by injection molding effectively prevents the intrusion of harmful substances such as external moisture and dust. The tight fit of the support bottom frame with the outer closed frame and the closed bottom frame, as well as the filling of the sealing material, jointly constitute an efficient sealing system, providing all-round protection for the circuits and components inside the package and extending the service life; The packaging structure adopts a full-encapsulation design, that is, all key components are tightly wrapped by the outer shell and the support frame, forming a complete protection system, which not only improves the anti-corrosion and anti-oxidation capabilities of the package but also extends the service life of the package. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only exemplary, and for those of ordinary skill in the art, other implementation drawings can be obtained by extension based on the provided drawings without creative efforts.

[0030] Figure 1 Schematic diagram of the internal structure of the present invention;

[0031] Figure 2 Schematic diagram of the encapsulated metal plate structure of the present invention;

[0032] Figure 3 Schematic diagram of the structure of the first encapsulated inner support frame and the second encapsulated inner support frame of the present invention;

[0033] Figure 4 Schematic diagram of the overall internal structure of the present invention;

[0034] Figure 5 Schematic diagram of the internal structure of the semiconductor substrate of the present invention;

[0035] Figure 6 Schematic diagram of the internal structure of the third die of the present invention;

[0036] Figure 7 Schematic diagram of the support bottom frame structure of the present invention;

[0037] Figure 8 Schematic diagram of the semiconductor substrate structure of the present invention;

[0038] Figure 9 Schematic diagram of the overall structure of the present invention.

[0039] In the figure: 1. EMI shielding layer; 2. First support mold; 3. Second support mold; 4. Semiconductor substrate; 5. First conductive bump; 6. Connection bump; 7. Conductive copper bar; 8. Second conductive bump; 9. First metal wire pattern; 10. Conductive support block; 11. Second metal wire pattern; 12. Top conductive block; 13. Top metal plate; 14. First die; 15. First connection point; 16. Second die; 17. Third die; 18. Second connection point; 19. Outer shell; 20. Outer enclosure frame; 21. Enclosure bottom frame; 22. First sealing filling groove; 23. Support bottom frame; 24. Third conductive bump; 25. Second sealing filling groove; 26. Enclosure groove; 27. First electronic device; 28. Connection groove; 29. Second electronic device; 30. First conductive block; 31. Metal trace; 32. Second conductive block; 33. Encapsulated metal plate; 34. First encapsulated inner support frame; 35. Second encapsulated inner support frame; 36. Encapsulated support body. Detailed implementation manners

[0040] Exemplary embodiments will be described in detail herein, and examples thereof are shown in the accompanying drawings. When the following description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. On the contrary, they are merely examples of devices consistent with some aspects of the present disclosure as detailed in the appended claims.

[0041] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without making creative efforts shall fall within the protection scope of the present invention.

[0042] See Figures 1 to 9As shown in the figure, a semiconductor package according to an embodiment of the present invention includes an EMI shielding layer 1. A first support mold 2 is fixedly connected to the top of the EMI shielding layer 1. A second support mold 3 is fixedly connected to the top of the first support mold 2. A semiconductor substrate 4 is fixedly connected to the top of the second support mold 3. A plurality of connecting bumps 6 are fixedly connected equidistantly inside the EMI shielding layer 1. A first conductive bump 5 is fixedly connected to the bottom of the connecting bump 6. The top of the first conductive bump 5 is fixedly connected to the EMI shielding layer 1. A connecting component is arranged inside the first support mold 2, and the connecting component is connected to the connecting bump 6. A conductive component is arranged inside the semiconductor substrate 4, and the conductive component is connected to the connecting component. Top conductive blocks 12 are arranged equidistantly on the top of the conductive component. A top metal plate 13 is fixedly connected to the top of the top conductive block 12. A first conductive block 30 is fixedly connected to the top of the top metal plate 13. A metal trace 31 is arranged on the top of the first conductive block 30. A plurality of second conductive blocks 32 are arranged equidistantly on the top of the metal trace 31. A packaging metal plate 33 is arranged on the top of the second conductive block 32. A first die 14 is arranged on the top of the semiconductor substrate 4. A second die 16 is arranged on the top of the first die 14. A third die 17 is arranged on the top of the second die 16. A plurality of first connection points 15 are arranged equidistantly inside the first die 14. A plurality of second connection points 18 are arranged equidistantly on the top of the third die 17. The first connection points 15 are connected to the metal trace 31 by wire welding. The bottom of the packaging metal plate 33 is connected to the second connection points 18. An outer shell 19 is arranged above the third die 17. A packaging fixing component is arranged inside the outer shell 19 for fixing the packaging positions of the first conductive block 30, the metal trace 31, the second conductive block 32, and the packaging metal plate 33. An outer closed frame 20 is fixedly connected to the outside of the outer shell 19. A closed bottom frame 21 is fixedly connected to the bottom of the outer closed frame 20. A first seal filling groove 22 is opened at the bottom of the outer closed frame 20. A support bottom frame 23 is arranged at the bottom of the EMI shielding layer 1. A semiconductor package with a complete structure and distinct levels is provided. Through the fixed connection of each component, good electromagnetic shielding of the EMI shielding layer 1 and the support effects of the first support mold 2 and the second support mold 3 are achieved, ensuring the stability and reliability of the semiconductor package.

[0043] Among them, the connecting component includes conductive copper rods 7. A plurality of conductive copper rods 7 are fixedly connected equidistantly to the top of the connecting bump 6. The conductive copper rods 7 are fixedly connected to the first support mold 2. A second conductive bump 8 is fixedly connected to the top of the conductive copper rod 7. The second conductive bump 8 is fixedly connected to the second support mold 3. The second conductive bump 8 is connected to the conductive component. By introducing the conductive copper rods 7 and the second conductive bumps 8, the electrical signals between the EMI shielding layer 1 and the semiconductor substrate 4 are effectively connected, improving the conductive performance and signal transmission efficiency of the package.

[0044] Among them, the conductive component includes a first metal wire pattern 9. A plurality of first metal wire patterns 9 are fixedly connected at equal intervals inside the semiconductor substrate 4. The bottom of the first metal wire pattern 9 is fixedly connected to the second conductive bump 8. The top of the first metal wire pattern 9 is fixedly connected to a conductive support block 10. The top of the conductive support block 10 is provided with a second metal wire pattern 11. The top of the second metal wire pattern 11 is fixedly connected to the top conductive block 12. By using the first metal wire pattern 9 and the second metal wire pattern 11, a conductive path inside the semiconductor substrate 4 is constructed, providing a reliable basis for signal transmission and distribution.

[0045] Among them, the encapsulation and fixing component includes a second encapsulation inner support frame 35. The outer sides of the metal trace 31 and the second conductive block 32 are fixedly connected to the second encapsulation inner support frame 35. The outer side of the second encapsulation inner support frame 35 is fixedly connected to the inner side of the housing 19. The outer sides of the second conductive block 32 and the encapsulation metal plate 33 are fixedly connected to a first encapsulation inner support frame 34. The outer side of the first encapsulation inner support frame 34 is fixedly connected to the inner side of the housing 19. The bottom of the first encapsulation inner support frame 34 is fixedly connected to the second encapsulation inner support frame 35. By the fixed connection of the first encapsulation inner support frame 34 and the second encapsulation inner support frame 35, key components such as the metal trace 31, the second conductive block 32, and the encapsulation metal plate 33 are effectively fixed, improving the stability and durability of the encapsulation.

[0046] Among them, a plurality of encapsulation support bodies 36 are fixedly connected at equal intervals inside the housing 19. The bottom of the encapsulation support body 36 is fixedly connected to the first encapsulation inner support frame 34. The setting of the encapsulation support body 36 further enhances the overall structure of the encapsulation, improving the protection and support effects on the internal components.

[0047] Among them, a plurality of connection grooves 28 matching the first conductive bumps 5 are provided at equal intervals on the top of the support bottom frame 23. A plurality of third conductive bumps 24 connected to the connection grooves 28 are provided at equal intervals on the bottom of the support bottom frame 23. Through the design of the connection grooves 28 and the third conductive bumps 24, an effective connection between the bottom of the encapsulation and the external circuit is achieved, improving the scalability and flexibility of the encapsulation.

[0048] Among them, a second sealing filling groove 25 matching the first sealing filling groove 22 is provided on the top of the support bottom frame 23. A closing groove 26 matching the closing bottom frame 21 is provided on the inner side of the second sealing filling groove 25. The provision of the second sealing filling groove 25 and the closing groove 26 provides additional sealing and protection for the encapsulation, effectively preventing interference and damage from the external environment.

[0049] Among them, a second electronic device 29 is provided at the bottom of the first support mold 2. The second electronic device 29 is fixedly connected to the EMI shielding layer 1. By providing the second electronic device 29 at the bottom of the first support mold 2 and fixedly connecting it to the EMI shielding layer 1, additional electronic functions are provided for the encapsulation, while ensuring the electromagnetic shielding effect through the isolation of the EMI shielding layer 1.

[0050] Among them, a first electronic device 27 that cooperates with the second electronic device 29 is installed inside the support bottom frame 23. Installing the first electronic device 27 that cooperates with the second electronic device 29 inside the support bottom frame 23 realizes the complementarity and collaborative work of the internal electronic components of the package. The first electronic device 27 and the second electronic device 29 are electrically connected through a circuit to achieve functional complementarity, improving the overall performance and functional diversity.

[0051] A manufacturing method of a semiconductor package, characterized by including the following steps:

[0052] S1. Connect the first conductive bumps 5 to the bottom of the EMI shielding layer 1 through conductive adhesive, and install the first support mold 2 on the top of the EMI shielding layer 1 through an adhesive. Install the second support mold 3 on the top of the first support mold 2 through an adhesive to ensure the electrical and mechanical connections between all parts;

[0053] S2. Embedded and equidistantly installed multiple connection bumps 6 inside the EMI shielding layer 1. The bottom of each connection bump 6 is electrically connected to the first conductive bumps 5 through a conductive material. On the top of the connection bumps 6, multiple conductive copper bars 7 are equidistantly installed through welding. The conductive copper bars 7 pass through the holes reserved in the first support mold 2. At the top of the conductive copper bars 7, the second conductive bumps 8 are installed through welding again to ensure a certain electrical connection between the second conductive bumps 8 and the second support mold 3;

[0054] S3. Embedded and installed multiple first metal wire patterns 9 inside the semiconductor substrate 4. The bottom of each first metal wire pattern 9 is electrically connected to the second conductive bumps 8 through a conductive material. A conductive support block 10 is installed on the top of the first metal wire pattern 9 through welding, and a second metal wire pattern 11 is set on the top of the conductive support block 10. The top of the second metal wire pattern 11 is electrically connected to the top conductive block 12 through a conductive material to build a complete conductive path;

[0055] S4. Install the top metal plate 13 on the top of the top conductive block 12 through a conductive material, and install the first conductive block 30 on the top of the top metal plate 13 through a conductive material again;

[0056] S5. Form a metal trace 31 on the top of the first conductive block 30 by electroplating. Multiple second conductive blocks 32 are equidistantly set on the top of the metal trace 31 and are electrically connected to the metal trace 31 through a conductive material;

[0057] S6. Install the encapsulation metal plate 33 on the top of the second conductive blocks 32 through a conductive material to provide protection for subsequent encapsulation and testing. Stack the first die 14, the second die 16, and the third die 17 on the top of the semiconductor substrate 4 through an adhesive in sequence to form a multi-layer circuit structure;

[0058] S7. Electrically connect the first connection point 15 inside the first die 14 to the corresponding point on the metal trace 31 through wire bonding. At the same time, electrically connect the bottom of the encapsulation metal plate 33 to the second connection point 18 on the top of the third die 17 through a conductive material;

[0059] S8. Install the outer shell 19 above the third die 17 through an adhesive. Inside the outer shell 19, install the first encapsulation inner support frame 34 and the second encapsulation inner support frame 35 through injection molding. They support and fix the first conductive block 30, the metal trace 31, the second conductive block 32, and the encapsulation metal plate 33 through the reserved structure;

[0060] S9. Install the outer closed frame 20 outside the outer shell 19 through an adhesive. Install the closed bottom frame 21 at the bottom of the outer closed frame 20 to form the external frame of the encapsulation structure;

[0061] S10. Inject and form the first sealing filling groove 22 at the bottom of the outer closed frame 20. Similarly, inject and form the second sealing filling groove 25 that matches the first sealing filling groove 22 at the top of the support bottom frame 23. Inject and form the closed groove 26 that matches the closed bottom frame 21 inside the second sealing filling groove 25 to provide a sealed space for the encapsulation;

[0062] S11. Open a plurality of connection grooves 28 that match the first conductive bumps 5 at equal intervals through the reserved space at the top of the support bottom frame 23, and arrange a plurality of third conductive bumps 24 that are connected to the connection grooves 28 at equal intervals at the bottom of the support bottom frame 23. Install the second electronic device 29 at the bottom of the first support mold 2 through an adhesive, and ensure that there is a certain electrical connection between the second electronic device 29 and the EMI shielding layer 1. Install the first electronic device 27 that matches the second electronic device 29 through the reserved space inside the support bottom frame 23 to ensure the electrical and mechanical connections between all parts;

[0063] S12. Fill the first sealing filling groove 22 and the second sealing filling groove 25 with an appropriate sealing material, and ensure the sealing of the entire encapsulation through perfusion to prevent interference from the external environment;

[0064] S13. Conduct final inspection and testing on the manufactured semiconductor encapsulation, including functional testing, performance testing, and reliability testing, to ensure that its functions and performance meet the design requirements and provide reliable guarantee for subsequent encapsulation and application.

[0065] Specifically, during use, by firmly connecting the EMI shielding layer 1, the first support mold 2, the second support mold 3, and the semiconductor substrate 4, a stable and reliable encapsulation infrastructure is constructed. This design not only enhances the electromagnetic shielding performance but also significantly improves the support strength of the package, providing a solid foundation for subsequent installation of electronic components and signal transmission. Through the connection components of the first conductive bump 5, the connection bump 6, the conductive copper bar 7, and the second conductive bump 8, as well as the ingenious combination with the conductive components of the first metal wire pattern 9 and the second metal wire pattern 11, the present invention achieves efficient and stable transmission of electrical signals inside the package. This design not only improves the conductive performance of the package but also significantly enhances the signal transmission efficiency, ensuring the normal operation of electronic devices. The design of the conductive support block 10 and the layout of the first metal wire pattern 9 and the second metal wire pattern 11 inside the package provide a solid foundation for signal transmission and distribution. These conductive paths not only ensure stable and reliable electrical connections between components inside the package but also provide strong support for rapid signal transmission. The package fixing components, including the first inner package support frame 34 and the second inner package support frame 35, cooperate closely with the outer shell 19 to effectively fix key components such as the metal trace 31, the second conductive block 32, and the package metal plate 33. At the same time, the package support body 36 provided inside the outer shell further enhances the overall structure of the package, improving its durability and stability. The design of the support bottom frame 23, the connection groove 28, and the third conductive bump 24 enables effective connection between the bottom of the package and the external circuit. At the same time, the opening of the second sealing filling groove 25 and the closed groove 26 provides additional sealing and protection for the package, effectively preventing interference and damage from the external environment. The fixation of the second electronic device 29 at the bottom of the first support mold 2 to the EMI shielding layer 1, and the cooperation between the first electronic device 27 installed inside the support bottom frame 23 and the second electronic device 29 provide additional electronic functions for the package, such as signal processing and amplification. These additional electronic functions not only enrich the functional diversity of the package but also further improve the overall performance and reliability.

[0066] Although the embodiments of the present invention have been shown and described, for those of ordinary skill in the art, it can be understood that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

[0067] Other embodiments of the present disclosure will be readily apparent to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include known common knowledge or conventional technical means in the technical field not disclosed herein. The specification and examples are only to be considered exemplary, and the true scope of the present disclosure is pointed out by the following claims.

Claims

1. A semiconductor package, characterized in that: The invention comprises an EMI shielding layer (1), wherein the top of the EMI shielding layer (1) is fixedly connected to a No. 1 support mold (2), the top of the No. 1 support mold (2) is fixedly connected to a No. 2 support mold (3), the top of the No. 2 support mold (3) is fixedly connected to a semiconductor substrate (4), the interior of the EMI shielding layer (1) is fixedly connected to a plurality of connecting bumps (6) at equal intervals, the bottom of the connecting bumps (6) is fixedly connected to a No. 1 conductive bump (5), the top of the No. 1 conductive bump (5) is fixedly connected to the EMI shielding layer (1), and a connecting component is provided inside the No. 1 support mold (2), and the connecting component is connected to the No. 1 conductive bump (5). The semiconductor substrate (4) is connected to the connecting protrusion (6), and a conductive component is provided inside the semiconductor substrate (4), and the conductive component is connected to the connecting component. A top conductive block (12) is equidistantly provided on the top of the conductive component, and a top metal plate (13) is fixedly connected to the top of the top conductive block (12). A No. 1 conductive block (30) is fixedly connected to the top of the top metal plate (13), and a metal trace (31) is provided on the top of the No. 1 conductive block (30), and a plurality of No. 2 conductive blocks (32) are equidistantly provided on the top of the metal trace (31), and a packaging metal plate is provided on the top of the No. 2 conductive block (32). (33), a bare chip No. 1 (14) is provided on the top of the semiconductor substrate (4), a bare chip No. 2 (16) is provided on the top of the bare chip No. 1 (14), a bare chip No. 3 (17) is provided on the top of the bare chip No. 2 (16), a plurality of bare chip No. 1 connection points (15) are provided equidistantly inside the bare chip No. 1 (14), a plurality of bare chip No. 2 connection points (18) are provided equidistantly on the top of the bare chip No. 3 (17), the bare chip No. 1 (15) is connected to the metal trace (31) by wire welding, and the bottom of the package metal plate (33) is connected to the bare chip No. 2 (18). A housing (19) is provided above the third bare chip (17), and a packaging fixing assembly is provided on the inner side of the housing (19) for fixing the packaging positions of the first conductive block (30), the metal trace (31), the second conductive block (32), and the packaging metal plate (33). An outer sealing frame (20) is fixedly connected to the outer side of the housing (19), and a sealing bottom frame (21) is fixedly connected to the bottom of the outer sealing frame (20). A sealing filling groove (22) is provided at the bottom of the outer sealing frame (20), and a supporting bottom frame (23) is provided at the bottom of the EMI shielding layer (1).

2. The semiconductor package according to claim 1, wherein: The connecting assembly comprises a conductive copper rod (7), a plurality of conductive copper rods (7) are fixedly connected to the top of the connecting protrusion (6) at equal intervals, the conductive copper rod (7) is fixedly connected to the No. 1 support mold (2), the top end of the conductive copper rod (7) is fixedly connected to the No. 2 conductive protrusion (8), the No. 2 conductive protrusion (8) is fixedly connected to the No. 2 support mold (3), and the No. 2 conductive protrusion (8) is connected to the conductive assembly.

3. The semiconductor package according to claim 2, wherein: The conductive component comprises a No. 1 metal wire pattern (9), a plurality of No. 1 metal wire patterns (9) are fixedly connected at equal intervals inside the semiconductor substrate (4), the bottom of the No. 1 metal wire pattern (9) is fixedly connected to a No. 2 conductive bump (8), the top of the No. 1 metal wire pattern (9) is fixedly connected to a conductive support block (10), the top of the conductive support block (10) is provided with a No. 2 metal wire pattern (11), and the top of the No. 2 metal wire pattern (11) is fixedly connected to a top conductive block (12).

4. The semiconductor package according to claim 3, wherein: The package fixing assembly includes a No. 2 package inner support frame (35), the outer sides of the metal trace (31) and the No. 2 conductive block (32) are fixedly connected to the No. 2 package inner support frame (35), the outer side of the No. 2 package inner support frame (35) is fixedly connected to the inner side of the outer shell (19), the outer sides of the No. 2 conductive block (32) and the package metal plate (33) are fixedly connected to the No. 1 package inner support frame (34), the outer side of the No. 1 package inner support frame (34) is fixedly connected to the inner side of the outer shell (19), and the bottom of the No. 1 package inner support frame (34) is fixedly connected to the No. 2 package inner support frame (35).

5. The semiconductor package according to claim 4, wherein: A plurality of packaging supports (36) are fixedly connected at equal intervals inside the housing (19), and the bottoms of the packaging supports (36) are fixedly connected to a No. 1 packaging inner support frame (34).

6. The semiconductor package according to claim 5, wherein: The top of the supporting bottom frame (23) is provided with a plurality of connection grooves (28) that cooperate with the No. 1 conductive protrusion (5) at equal intervals, and the bottom of the supporting bottom frame (23) is provided with a plurality of No. 3 conductive protrusions (24) that connect with the connection grooves (28) at equal intervals.

7. The semiconductor package according to claim 6, wherein: A second sealing filling groove (25) cooperating with the first sealing filling groove (22) is provided on the top of the supporting bottom frame (23), and a closing groove (26) cooperating with the closing bottom frame (21) is provided on the inner side of the second sealing filling groove (25).

8. The semiconductor package according to claim 7, wherein: A second electronic device (29) is provided at the bottom of the first support mold (2), and the second electronic device (29) is fixedly connected to the EMI shielding layer (1).

9. The semiconductor package according to claim 8, wherein: A No. 1 electronic device (27) that cooperates with a No. 2 electronic device (29) is installed on the inner side of the supporting bottom frame (23).

10. The method for manufacturing a semiconductor package according to any one of claims 1 to 9, wherein: The following steps are involved: S1, connecting the No. 1 conductive bump (5) to the bottom of the EMI shielding layer (1) through a conductive adhesive, and installing the No. 1 support mold (2) on the top of the EMI shielding layer (1) through an adhesive, and installing the No. 2 support mold (3) on the top of the No. 1 support mold (2) through an adhesive, to ensure electrical and mechanical connection between the parts; S2. A plurality of connecting protrusions (6) are embedded and installed at equal intervals inside the EMI shielding layer (1). The bottom of each connecting protrusion (6) is electrically connected to the first conductive protrusion (5) through a conductive material. A plurality of conductive copper rods (7) are installed at equal intervals on the top of the connecting protrusion (6) by welding. The conductive copper rods (7) pass through the holes reserved in the first support mold (2). A second conductive protrusion (8) is installed on the top of the conductive copper rod (7) by welding again to ensure that a certain electrical connection is maintained between the second conductive protrusion (8) and the second support mold (3). S3. A plurality of No. 1 metal wire patterns (9) are embedded and installed inside the semiconductor substrate (4), the bottom of each No. 1 metal wire pattern (9) is electrically connected to the No. 2 conductive bump (8) through a conductive material, a conductive support block (10) is installed on the top of the No. 1 metal wire pattern (9) by welding, and a No. 2 metal wire pattern (11) is set on the top of the conductive support block (10), and the top of the No. 2 metal wire pattern (11) is electrically connected to the top conductive block (12) through a conductive material to construct a complete conductive path; S4. Installing a top metal plate (13) on top of the top conductive block (12) through a conductive material, and installing a No. 1 conductive block (30) on top of the top metal plate (13) through a conductive material again; S5. Forming a metal trace (31) on top of the No. 1 conductive block (30) by electroplating, arranging a plurality of No. 2 conductive blocks (32) at equal intervals on top of the metal trace (31), and achieving electrical connection with the metal trace (31) through a conductive material; S6. On top of the second conductive block (32), a packaging metal plate (33) is installed through a conductive material to provide protection for subsequent packaging and testing, and on top of the semiconductor substrate (4), a first bare chip (14), a second bare chip (16), and a third bare chip (17) are stacked in sequence through an adhesive to form a multi-layer circuit structure; S7, electrically connecting the No. 1 connection point (15) inside the No. 1 bare chip (14) to the corresponding point on the metal trace (31) by wire welding, and at the same time, electrically connecting the bottom of the packaging metal plate (33) to the No. 2 connection point (18) on the top of the No. 3 bare chip (17) by conductive material; S8. Installing a housing (19) above the third bare chip (17) by means of adhesive, and installing a first package inner support frame (34) and a second package inner support frame (35) on the inner side of the housing (19) by means of injection molding, wherein the first package inner support frame (34) and the second package inner support frame (35) support and fix the first conductive block (30), the metal trace (31), the second conductive block (32), and the package metal plate (33) through a reserved structure; S9, installing an outer sealing frame (20) on the outer side of the housing (19) by means of adhesive, and installing a sealing bottom frame (21) on the bottom of the outer sealing frame (20) to form an outer frame of the packaging structure; S10, a No. 1 sealing filling groove (22) is formed by injection molding at the bottom of the outer sealing frame (20), a No. 2 sealing filling groove (25) is formed by injection molding on the top of the supporting bottom frame (23) to match the No. 1 sealing filling groove (22), and a sealing groove (26) is formed by injection molding on the inner side of the No. 2 sealing filling groove (25) to match the sealing bottom frame (21), thereby providing a sealed space for packaging; S11. A plurality of connection grooves (28) cooperating with the No. 1 conductive bump (5) are equidistantly provided on the top of the supporting bottom frame (23) through the reserved space, and a plurality of No. 3 conductive bumps (24) connected to the connection grooves (28) are equidistantly provided on the bottom of the supporting bottom frame (23). A No. 2 electronic device (29) is installed on the bottom of the No. 1 supporting mold (2) through an adhesive, and a certain electrical connection is ensured between the No. 2 electronic device (29) and the EMI shielding layer (1). A No. 1 electronic device (27) cooperating with the No. 2 electronic device (29) is installed on the inner side of the supporting bottom frame (23) through the reserved space, and the electrical and mechanical connection between the various parts is ensured. S12, using appropriate sealing materials to fill the No. 1 sealing filling groove (22) and the No. 2 sealing filling groove (25), and ensuring the sealing of the entire package by pouring to prevent interference from the external environment; S13. Conduct final inspection and testing on the completed semiconductor package, including functional testing, performance testing, and reliability testing, to ensure that its functions and performance meet the design requirements and provide reliable protection for subsequent packaging and application.

Images