Isolated energy storage DC power conversion system, its control method and related devices

Abstract

This application belongs to a DC power conversion system. Aiming at the technical problems faced by the existing DC power conversion system, such as the impact current of the common bus short-circuit to the ground, the lack of balanced management of the battery module status, and the need for the whole machine to stop when an individual battery module or the corresponding BMS fails, an isolated energy storage DC power conversion system, its control method, and related devices are provided, including a DC access single-phase full bridge, a single-phase transformer, Nm battery-side single-phase full bridges, and Nm relay switches K1. The DC access single-phase full bridge is connected to both ends of the secondary side of the single-phase transformer and is connected to the positive and negative poles of the external common DC bus of the battery energy storage system. The battery-side single-phase full bridge is connected to both ends of the primary side of the single-phase transformer, and the AC sides of the Nm battery-side single-phase full bridges are connected in series to form a cascaded full bridge. A relay switch K1 is connected between the AC side terminal E1 and the AC side terminal E1 of the DC access single-phase full bridge.

Description

Technical Field

[0001] This application belongs to a DC power conversion system, and particularly relates to an isolated energy storage DC power conversion system, its control method, and related devices. Background Art

[0002] In an integrated system or microgrid with a common low-voltage DC bus and a battery energy storage system, most of the battery clusters in the battery energy storage system are composed of multiple battery modules connected in series or in parallel. The battery cluster is connected to the DC power conversion system (PCS) in the battery energy storage system, and the charging or discharging power of the battery cluster is controlled by the DC PCS.

[0003] However, the existing DC PCS faces the following problems in control: 1. To reduce losses and make the design more compact, the DC PCS generally uses a non-isolated boost or buck converter. When a ground short-circuit fault occurs in the common bus, if the battery energy storage system does not have a fast DC circuit breaker, a short-time huge current will be generated in the battery module, posing a safety hazard. 2. Due to the differences between battery modules, the charging and discharging depths of the battery energy storage system are limited by the few battery modules that are fully charged or discharged first, resulting in a short-board effect and reducing the actual utilization rate of the battery energy storage system. Therefore, it is necessary to perform equalization management on the states of the battery modules. 3. When an individual battery module or the battery management system (BMS) corresponding to an individual battery module fails, the entire battery energy storage system needs to be shut down. Summary of the Invention

[0004] In view of the technical problems faced by the existing DC power conversion system, such as the impact current of the common bus short-circuit to the ground, the lack of equalization management of the states of battery modules, and the need to shut down the entire machine when an individual battery module or the corresponding BMS fails, this application provides an isolated energy storage DC power conversion system, its control method, and related devices.

[0005] To achieve the above objectives, the present application adopts the following technical solutions:

[0006] In a first aspect, this application proposes an isolated energy storage DC power conversion system, including a DC access single-phase full-bridge, a single-phase transformer, Nm battery-side single-phase full-bridges, and Nm relay switches K1; Nm is the number of battery modules;

[0007] The DC-access single-phase full-bridge includes four power semiconductor relay switches, namely power semiconductor relay switch QB1 to power semiconductor relay switch QB4. Among them, an AC side terminal D1 is formed between power semiconductor relay switch QB1 and power semiconductor relay switch QB2, and an AC side terminal D2 is formed between power semiconductor relay switch QB3 and power semiconductor relay switch QB4. The positive pole of the DC side of the DC-access single-phase full-bridge is denoted as the positive DC side terminal D3, and the negative pole of the DC side is denoted as the negative DC side terminal D4. The positive DC side terminal D3 and the negative DC side terminal D4 are respectively connected to the positive and negative poles of the external common DC bus of the battery energy storage system. The AC side terminal D1 and the AC side terminal D2 are respectively connected to both ends of the secondary side of the single-phase transformer.

[0008] The battery-side single-phase full-bridge includes four power semiconductor relay switches, namely power semiconductor relay switch Q1 to power semiconductor relay switch Q4. Among them, an AC side terminal E1 is formed between power semiconductor relay switch Q1 and power semiconductor relay switch Q2, and an AC side terminal E2 is formed between power semiconductor relay switch Q3 and power semiconductor relay switch Q4. The positive pole of the DC side of the battery-side single-phase full-bridge is denoted as the positive DC side terminal E3, and the negative pole of the DC side is denoted as the negative DC side terminal E4. The positive DC side terminal E3 and the negative DC side terminal E4 are respectively connected to the positive and negative poles of a battery module. The AC sides of Nm battery-side single-phase full-bridges are connected in series to form a cascaded full-bridge. And the AC side terminal E1 of the first battery-side single-phase full-bridge and the AC side terminal E2 of the Nm-th battery-side single-phase full-bridge are respectively connected to both ends of the primary side of the single-phase transformer.

[0009] Both ends of the relay switch K1 are respectively connected to the AC side terminal E1 and the AC side terminal E2.

[0010] In a second aspect, the present application proposes a control method for the above-mentioned isolated energy storage DC power conversion system, which is characterized by including:

[0011] Controlling both the battery-side single-phase full-bridge and the DC-access single-phase full-bridge to be in a square-wave working state, so that the isolated energy storage DC power conversion system is in a single-phase phase-shift control mode.

[0012] Alternatively, controlling a part of the battery-side single-phase full-bridges to be in a zero-level working state, and the other part of the battery-side single-phase full-bridges to be in a square-wave working state, and the DC-access single-phase full-bridge to be in a PWM working state, so that the isolated energy storage DC power conversion system is in a phase-shift plus PWM working state.

[0013] Alternatively, controlling the relay switch K1 corresponding to one battery-side single-phase full-bridge to be disconnected, and the remaining battery-side single-phase full-bridges to be in a square-wave working state, and the DC-access single-phase full-bridge to be in a PWM working state, so that the isolated energy storage DC power conversion system is in a phase-shift plus PWM working state.

[0014] In a third aspect, the present application provides an electronic device, including: a memory and one or more processors; the memory is coupled to the processor; wherein, computer program code is stored in the memory, and the computer program code includes computer instructions. When the computer instructions are executed by the processor, the electronic device performs the steps of the control method of the above-mentioned isolated energy storage DC power conversion system.

[0015] In a fourth aspect, the present application provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of the control method of the above-mentioned isolated energy storage DC power conversion system are implemented.

[0016] Compared with the prior art, the present application has the following beneficial effects:

[0017] The present application provides an isolated energy storage DC power conversion system, including a DC access single-phase full-bridge, a single-phase transformer, Nm battery-side single-phase full-bridges, and Nm relay switches K1. The DC access single-phase full-bridge is connected to both ends of the secondary side of the single-phase transformer and is connected to the positive and negative poles of the external common DC bus of the battery energy storage system. The battery-side single-phase full-bridges are connected to both ends of the primary side of the single-phase transformer, and the AC sides of the Nm battery-side single-phase full-bridges are connected in series to form a cascaded full-bridge. A relay switch K1 is connected between the AC side terminal E1 and the AC side terminal E2 of the DC access single-phase full-bridge. While achieving electrical isolation between the battery modules and the common DC bus, the present application realizes soft switching of the switching devices, ensures system efficiency and low electromagnetic interference, and uses a modular topology to achieve SOC balance control of the battery modules by adopting a novel control method.

[0018] The present application also provides a control method of an isolated energy storage DC power conversion system, an electronic device, and a computer storage medium, which have all the advantages of the above-mentioned isolated energy storage DC power conversion system. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation of the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0020] Figure 1 It is a schematic diagram of an isolated energy storage DC power conversion system of the present application;

[0021] Figure 2 It is a schematic diagram of a battery-side single-phase full-bridge;

[0022] Figure 3 It is a schematic diagram of DC access to a single-phase full bridge;

[0023] Figure 4 In the embodiment of the present application, the duty cycle of the DC access to the single-phase full bridge along with schematic diagram of changes;

[0024] Figure 5 In the embodiment of the present application, the lower limit LLimitZVS of the soft-switching value range of the phase-shift angle dp during discharge schematic diagram of changes;

[0025] Figure 6 In the embodiment of the present application, when there are 8 battery modules and the corresponding single-phase full bridge on the battery side, and one group of the single-phase full bridge on the battery side is in the bypass state, and the turns ratio of the single-phase transformer is set according to the DC voltage turns ratio without bypass, the working waveform schematic diagram of each component;

[0026] Figure 7 In the embodiment of the present application, the schematic diagram of the process for realizing the SOC balancing control of the battery modules through the zero-level pipeline;

[0027] Figure 8 In the embodiment of the present application, the schematic diagram of the hysteresis judgment process of the range difference size flag Sign_LD;

[0028] Figure 9 In the embodiment of the present application, the schematic diagram of the inference process of the zero-level pipeline operation flag Sign_ZPP of the battery modules;

[0029] Figure 10 In the embodiment of the present application, the schematic diagram of the process for calculating the zero-level cycle number of the single-phase full bridge on the battery side corresponding to the active battery module;

[0030] Figure 11 In the embodiment of the present application, the schematic diagram of the process for performing zero-level pipeline processing on the single-phase full bridge on the battery side corresponding to the active battery module. Detailed implementation manners

[0031] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. Usually, the components of the embodiments of the present application described and shown in the accompanying drawings here can be arranged and designed in various different configurations.

[0032] Accordingly, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the claimed present application, but merely represents selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts fall within the scope of protection of the present application.

[0033] It should be noted that like reference numerals and letters denote like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.

[0034] In the description of the embodiments of the present application, it should be noted that if terms such as "upper", "lower", "horizontal", "inner", etc. are used to indicate the orientation or positional relationship, it is based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the inventive product is customarily placed during use. This is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation of the present application. In addition, terms such as "first", "second", etc. are only used for distinguishing descriptions and cannot be construed as indicating or implying relative importance.

[0035] In addition, if the term "horizontal" appears, it does not mean that the component is required to be absolutely horizontal, but it can be slightly inclined. For example, "horizontal" only means that its direction is more horizontal relative to "vertical", and does not mean that the structure must be completely horizontal, but it can be slightly inclined.

[0036] In the description of the embodiments of the present application, it should also be noted that unless otherwise clearly specified and limited, if terms such as "arranged", "installed", "connected", "coupled" are used, they should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0037] In an integrated system or microgrid architecture that includes a common low-voltage DC bus and battery energy storage devices, the battery energy storage system plays a crucial role. It can not only store excess electrical energy but also release electrical energy when demand increases, thus ensuring the stable operation of the battery energy storage system and optimizing energy utilization. The battery energy storage devices usually consist of multiple battery modules. These battery modules are carefully connected in series and parallel to form a larger-scale and higher-capacity battery cluster. Such a design aims to improve the overall energy density, power output capacity, reliability, and flexibility of the battery energy storage system. The battery cluster is not directly connected to the power grid or load but is interfaced through a DC power conversion system (DC PCS). The DC PCS is the core control unit of the battery energy storage system, responsible for monitoring the status of the battery cluster (such as voltage, current, temperature, etc.), and intelligently adjusting the charging or discharging power of the battery cluster according to the operating requirements of the battery energy storage system and the health status of the batteries. When there is excess electrical energy in the battery energy storage system, the DC PCS will direct the battery cluster to absorb this electrical energy at an appropriate rate and convert it into chemical energy for storage; while when the electrical energy in the battery energy storage system is insufficient or during peak demand, the DC PCS will control the battery cluster to discharge, converting the stored chemical energy back into electrical energy to supply the power grid or directly meet the load demand. In this way, the DC PCS not only achieves efficient management and scheduling of energy but also effectively balances the supply and demand relationship, enhancing the stability and self-sufficiency of the entire integrated system or microgrid.

[0038] In the above battery energy storage system: 1. To reduce losses and make the design more compact, the DC PCS generally uses a non-isolated boost converter or buck converter. When a ground short-circuit fault occurs in the common bus, if the battery energy storage device does not have a fast DC circuit breaker, the energy storage battery will generate a huge current for a short time, posing a safety hazard. However, a DC circuit breaker will bring a significant increase in cost, while an isolated converter is suitable for dealing with short-circuit faults and is worthy of consideration. 2. Due to the differences between batteries, the charge and discharge depth of the battery energy storage system is limited by the few batteries that are fully charged or discharged first, showing a short-board effect, which reduces the actual utilization rate of the battery energy storage system. Therefore, the ability to balance the states of battery modules is required. 3. When an individual battery or the battery management system corresponding to an individual battery fails, the entire energy storage device needs to be shut down. A more advanced solution can consider separately stopping the faulty module from working and bypassing it from the battery cluster, while the other modules continue to work, enabling the entire machine to continue operating.

[0039] For example, the Chinese invention patent with the publication number CN115622201B, the Chinese invention patent application with the publication number CN116345643A, and the Chinese invention patent application with the publication number CN116316971A all propose an isolated DC conversion system with an equalizing bus. Each battery module in the battery energy storage system is connected to the equalizing bus through an isolated bidirectional DC converter sub-module. The isolated bidirectional DC converter sub-module only processes a part of the module power used to equalize the state of the battery modules, and the equalizing bus and the external port can transmit power through a boost converter or can be not connected to the outside world. In this type of solution, compared with the charging and discharging power, only a small-power converter is used for equalization. If battery module bypass is considered, a bypass component can be integrated into the isolated bidirectional DC converter sub-module. However, this solution requires an additional converter outside the DC PCS, resulting in an increase in levels and a more complex system. The Chinese invention patent application with the publication number CN117913949A adds a low-voltage DC converter to the equalizing bus voltage. The output of the low-voltage DC converter is connected in series with the original battery cluster, so that the final series total voltage is increased and controllable. The Chinese invention patent application with the publication number CN116031979A proposes that each battery cell is connected to the equalizing bus through an equalizing sub-module to achieve the goal of cell-level equalization control. The hardware basis of the control strategy proposed by the Chinese invention patent application with the publication number CN116111619A is a modular isolated CLLC bidirectional converter output parallel system (CLLC is a specific circuit topology). The input of each CLLC bidirectional converter is connected to a battery module. The CLLC bidirectional converter undertakes all the charging and discharging power. The battery module is completely isolated from the main bus. The power switch device can achieve soft switching, and the device loss and interference are low. However, the number of CLLC bidirectional converters is equal to the number of battery modules, and the total number of transformers and LC resonant networks is large (the LC resonant network is a circuit structure composed of an inductor (L) and a capacitor (C)), which is not conducive to system integration. In addition, there are also papers proposing three-port and four-port active bridge DC-DC (Direct Current to Direct Current). If this type of solution is used for the energy storage DC PCS, each port can be connected to a battery module to achieve the equalization control of the battery module state. However, the power decoupling control of such CLLC bidirectional converters with more than three ports is very complex, and the research and development of the core high-power multi-winding medium-frequency transformer is difficult. If the same number of transformers as the battery modules is used, the number of transformers will increase, and the cost is difficult to control to an ideal level.

[0040] Based on the above situation, the present application proposes an isolated energy storage DC power conversion system, its control method, and related devices. The present application will be described in detail below with reference to the embodiments and the drawings.

[0041] As shown Figure 1 in the figure, it is a schematic diagram of an isolated energy storage DC power conversion system of the present application, which may include: a DC access single-phase full-bridge, a single-phase transformer, Nm battery-side single-phase full-bridges, and Nm relay switches K1; Nm is the number of battery modules. Figure 1 Among them, Y represents the common DC bus outside the battery energy storage system, and X1 to XNm represent Nm battery modules.

[0042] The DC access single-phase full-bridge includes four power semiconductor relay switches, namely power semiconductor relay switches QB1 to power semiconductor relay switches QB4; among them, an AC side terminal D1 is formed between power semiconductor relay switch QB1 and power semiconductor relay switch QB2, and an AC side terminal D2 is formed between power semiconductor relay switch QB3 and power semiconductor relay switch QB4; the positive pole of the DC side of the DC access single-phase full-bridge is denoted as the positive DC side terminal D3, and the negative pole of the DC side is denoted as the negative DC side terminal D4. The positive DC side terminal D3 and the negative DC side terminal D4 are respectively connected to the positive and negative poles of the common DC bus outside the battery energy storage system; the AC side terminal D1 and the AC side terminal D2 are respectively connected to both ends of the secondary side of the single-phase transformer. The DC access single-phase full-bridge is composed of four power semiconductor relay switches. By controlling the conduction or cut-off of these power semiconductor relay switches, the conversion between direct current and alternating current is realized. The positive DC side terminal D3 and the negative DC side terminal D4 are respectively connected to the positive and negative poles of the common DC bus outside the battery energy storage system, realizing the connection with the DC grid. The single-phase transformer plays the role of electrical isolation and voltage transformation, transmitting the alternating current generated by the access DC single-phase full-bridge to the battery side and realizing voltage matching at the same time.

[0043] The battery-side single-phase full-bridge includes four power semiconductor relay switches, namely power semiconductor relay switches Q1 to Q4; among them, an AC-side terminal E1 is formed between power semiconductor relay switch Q1 and power semiconductor relay switch Q2, and an AC-side terminal E2 is formed between power semiconductor relay switch Q3 and power semiconductor relay switch Q4; the positive pole of the DC side of the battery-side single-phase full-bridge is denoted as the positive terminal E3 of the DC side, and the negative pole of the DC side is denoted as the negative terminal E4 of the DC side. The positive terminal E3 of the DC side and the negative terminal E4 of the DC side are respectively connected to the positive and negative poles of a battery module; the AC sides of Nm battery-side single-phase full-bridges are connected in series to form a cascaded full-bridge; and the AC-side terminal E1 of the first battery-side single-phase full-bridge and the AC-side terminal E2 of the Nm-th battery-side single-phase full-bridge are respectively connected to both ends of the primary side of a single-phase transformer. Each battery-side single-phase full-bridge also includes four power semiconductor relay switches, which are used to convert the direct current of the battery module into alternating current or vice versa. The AC sides of Nm battery-side single-phase full-bridges are connected in series to form a cascaded full-bridge, and this structure can improve the voltage level and power handling capacity of the system. The AC-side terminal E1 of the first battery-side single-phase full-bridge and the AC-side terminal E2 of the Nm-th battery-side single-phase full-bridge are respectively connected to both ends of the primary side of the single-phase transformer to form a closed AC circuit.

[0044] Both ends of the relay switch K1 are respectively connected to the AC-side terminal E1 and the AC-side terminal E2. It is used to cut off or connect the circuit between the AC-side terminal E1 and the AC-side terminal E2 when needed, which is convenient for controlling the working state of the entire system.

[0045] As Figure 2 shown, it is a schematic diagram of a battery-side single-phase full-bridge. Among them, for power semiconductor relay switches Q1 to Q4, there is no limitation on what kind of switching device is used. Taking the use of power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) as an example, the connection is the same as that of the traditional single-phase full-bridge structure. The source of power semiconductor relay switch Q1 is connected to the drain of power semiconductor relay switch Q2 and is also connected to the AC-side terminal E1. The source of power semiconductor relay switch Q3 is connected to the drain of power semiconductor relay switch Q4 and is also connected to the AC-side terminal E2. The drain of power semiconductor relay switch Q1 is connected to the drain of power semiconductor relay switch Q3 and is also connected to the positive terminal E3 of the DC side. The source of power semiconductor relay switch Q2 is connected to the source of power semiconductor relay switch Q4 and is also connected to the negative terminal E4 of the DC side. Both ends of the relay switch K1 are respectively connected to the AC-side terminal E1 and the AC-side terminal E2. It should be noted that two capacitors can be connected in parallel to the line where the source of power semiconductor relay switch Q1 and power semiconductor relay switch Q2 are located, and the two capacitors are connected in series.

[0046] The positive terminal E3 and the negative terminal E4 of the DC side of each single-phase full-bridge on the battery side are respectively connected to the positive and negative electrodes of the battery module in correspondence. The AC side terminal E1 of the first single-phase full-bridge on the battery side is connected to the AC side terminal E2 of the second single-phase full-bridge on the battery side, and the AC side terminal E1 of the second single-phase full-bridge on the battery side is connected to the AC side terminal E2 of the third single-phase full-bridge on the battery side, and so on, so that the AC sides of all Nm single-phase full-bridges on the battery side are connected in series to form a cascaded full-bridge. The AC side terminal E1 of the first single-phase full-bridge on the battery side and the AC side terminal E2 of the Nm-th single-phase full-bridge on the battery side are reserved and become the terminal 1 and terminal 2 of the cascaded full-bridge. The terminal 1 and terminal 2 of the medium-high frequency single-phase transformer are respectively connected to the terminal 1 and terminal 2 of the cascaded full-bridge of the DC access single-phase full-bridge, and the terminal 3 and terminal 4 of the medium-high frequency single-phase transformer are respectively connected to the AC side terminal D1 and the AC side terminal D2 of the DC access single-phase bridge, and the terminal 1 and terminal 3 of the single-phase transformer are the same-named terminals. The positive terminal D3 and the negative terminal D4 of the DC side of the DC access single-phase full-bridge are respectively connected to the positive and negative electrodes of the external common DC bus of the battery energy storage system in correspondence.

[0047] As Figure 3 shown, it is a schematic diagram of a DC access single-phase full-bridge, and the power semiconductor relay switches QB1 to QB4 are not limited to any specific switching device. Taking the power semiconductor switching device as a power MOSFET as an example, the connection is the same as that of a traditional single-phase full-bridge. The source of the power semiconductor relay switch QB1 is connected to the drain of the power semiconductor relay switch QB2 and is also connected to the AC side terminal D1. The source of the power semiconductor relay switch QB3 is connected to the drain of the power semiconductor relay switch QB4 and is also connected to the AC side terminal D2. The drain of the power semiconductor relay switch QB1 is connected to the drain of the power semiconductor relay switch QB3 and is also connected to the positive terminal D3 of the DC side. The source of the power semiconductor relay switch QB2 is connected to the source of the power semiconductor relay switch QB4 and is also connected to the negative terminal D4 of the DC side. It should be noted that a capacitor can be connected in parallel to the line where the source of the power semiconductor relay switch QB3 and the power semiconductor relay switch QB4 are located.

[0048] Each single-phase full-bridge on the battery side has three working states:

[0049] (1) The first working state of the single-phase full-bridge on the battery side is the square-wave working state:

[0050] The corresponding relay switch K1 remains conducting, the power semiconductor relay switches Q1 and Q4 are simultaneously conducting or turned off, the power semiconductor relay switches Q2 and Q3 are simultaneously conducting or turned off, the switching states of the power semiconductor relay switches Q1 and Q2 are complementary, and the switching states of the power semiconductor relay switches Q3 and Q4 are complementary.

[0051] Let Ts denote the switching cycle time of the power semiconductor relay switch. Each power semiconductor device has one conversion from off to on and one conversion from on to off within one switching cycle time. Ignoring the conversion time, both the conduction time and the turn-off time account for 50% of Ts. The voltage between the AC side terminals E1 and E2 of the j-th single-phase full-bridge on the battery side at time t The waveform of is a voltage square wave with positive and negative levels each accounting for half of the time within Ts. Without considering the voltage drop of the power semiconductor device, the absolute value of the level is equal to the voltage Vm_j of the th battery module. Denote the start time of one switching cycle of the single-phase full-bridge on the battery side as tm0.

[0052]

[0053] Among them, represents the serial number of the single-phase full-bridge on the battery side, .

[0054] (2) The second working state of the single-phase full-bridge on the battery side is the zero-level working state:

[0055] It includes two redundant states, and both redundant states keep the relay switch K1 conducting. The first redundant state is that the power semiconductor relay switches Q1 and Q3 are conducting, and the power semiconductor relay switches Q2 and Q4 are off. The second redundant state is that the power semiconductor relay switches Q2 and Q4 are conducting, and the power semiconductor relay switches Q1 and Q3 are off.

[0056] (3) The third working state of the single-phase full-bridge on the battery side is the relay switch bypass state:

[0057] In this state, the power semiconductor relay switches Q1, Q2, Q3, and Q4 all remain off, and the relay switch K1 is conducting.

[0058] When the single-phase full-bridge on the battery side is in the zero-level working state or the relay switch bypass state, if the voltage drop of the switching device is not considered, the voltage between the AC side terminals E1 and E2 of the j-th single-phase full-bridge on the battery side at time t is equal to zero, that is:

[0059]

[0060] The DC-connected single-phase full-bridge has two working states:

[0061] (1) The first working state of the DC-connected single-phase full-bridge is the square-wave working state:

[0062] The power semiconductor relay switches QB1 and QB4 are turned on or off simultaneously, and the power semiconductor relay switches QB2 and QB3 are turned on or off simultaneously. The switching states of the power semiconductor relay switches QB1 and QB2 are complementary, and the switching states of the power semiconductor relay switches QB3 and QB4 are complementary. The switching cycle time of the power semiconductor switching devices of the DC-connected single-phase full-bridge is also Ts. Each power semiconductor relay switch has one conversion each from off to on and from on to off within one Ts. Ignoring the conversion time, the on-time and off-time each account for 50% of Ts. At this time, the voltage across the AC side terminals D1 and D2 of the DC-connected single-phase full-bridge at time t is a voltage square wave with a positive level and a negative level each occupying half of the time within the switching cycle time. Without considering the voltage drop of the switching devices, the absolute value of the level is equal to the common DC bus voltage .

[0063] (2) The second operating state of the DC-connected single-phase full-bridge is the PWM operating state:

[0064] Each switching cycle time is divided into a first half-cycle and a second half-cycle. The first half-cycle is further divided into a first sub-cycle and a second sub-cycle in chronological order. Let the ratio of the pulse time width to Ts / 2 be d. The first half-cycle is a positive-level pulse time tp1, which is equal to the product of d and Ts / 2. During this time, the power semiconductor relay switches QB1 and QB4 are turned on, and the power semiconductor relay switches QB2 and QB3 are turned off. It is equal to Vbus. The second half-cycle is a zero-level time tp0, which is equal to the product of (1 - d) and Ts / 2. During this time, the power semiconductor relay switches QB2 and QB4 are turned on, and the power semiconductor relay switches QB1 and QB3 are turned off. It is equal to 0. The voltage drop across the switching devices is ignored above.

[0065]

[0066] The second half-cycle is also divided into a third sub-cycle and a fourth sub-cycle in chronological order. The first half-cycle is a negative-level pulse time tn1, which is equal to the product of d and Ts / 2, i.e., dTs / 2. During this time, the power semiconductor relay switches QB2 and QB3 are turned on, and the power semiconductor relay switches QB1 and QB4 are turned off. Equal to -Vbus. The second half cycle is the zero - level time tn0, which is equal to the product of (1 - d) and Ts / 2, i.e., (1 - d)Ts / 2. During this time, the power semiconductor relay switches QB1 and QB3 are turned on, and the power semiconductor relay switches QB2 and QB4 are turned off. Equal to 0.

[0067]

[0068] Let the starting moment of a switching period of the DC - connected single - phase full - bridge be tB0, which is also the starting time of the first half cycle. During a switching period, the demarcation points of each time period are sequentially set as 、 and 。

[0069]

[0070] Considering that most battery energy storage systems use lithium iron phosphate batteries, and there is a long period of gentle voltage change during the charge - discharge process of lithium iron phosphate batteries, the turns ratio Nt of the single - phase transformer can be configured according to the ratio of the average value of the sum of the module voltages during the voltage - gentle period to the rated common - bus voltage when all battery modules are charged and discharged at their rated power.

[0071] Let the voltage of the j - th battery module during the voltage - gentle period when charging at its rated power be Vmrc_j, and the voltage of the j - th battery module during the voltage - gentle period when discharging at its rated power be Vmrd_j. Then the turns ratio of the single - phase transformer is:

[0072]

[0073] In some embodiments of the present application, the single - phase transformer can integrate an equivalent series inductance Lk to facilitate the cooperation between the battery - side single - phase full - bridge and the DC - connected single - phase full - bridge to work in the manner of a Dual Active Bridge (DAB).

[0074] Correspondingly, there are three overall operating modes for the isolated - type energy - storage DC - power conversion system:

[0075] Operating mode 1: Single - phase - shift control mode.

[0076] When there is no bypass or zero level for all battery modules, all battery - side single - phase full - bridges select the first operating state, i.e., the square - wave operating state. The working waveforms of the power semiconductor relay switches are synchronized, the switching - period time is Ts, and the starting moment of each switching - period time is tm0. The voltage V12_sum(t) between the 1 - end and 2 - end of the cascaded full - bridge at time t is:

[0077]

[0078] Meanwhile, the DC-connected single-phase full-bridge also operates in a square-wave state, with the switching period time being Ts, and the starting moment of a switching period is tB0.

[0079] Set the time difference tp between the leading time of tm0 of the battery-side single-phase full-bridge and tB0 of the DC-connected single-phase bridge, and the normalized phase-shift angle of the half-cycle of the overall phase-shift control of the isolated energy storage DC power conversion system is dp:

[0080]

[0081] Assume the discharging direction is the positive power direction, and the battery-side power PDAB of the overall isolated energy storage DC power conversion system is:

[0082]

[0083] Among them, Lk is the inductance value of the equivalent series inductance integrated on the side of the battery-side single-phase full-bridge of the single-phase transformer.

[0084] Due to the completely same switching states, the average current iavg of all battery modules is equal to:

[0085]

[0086] This average current iavg has nothing to do with the battery module state, and the charge change amounts of each battery module are equal within the same time.

[0087] The principle of operating mode 1 of the isolated energy storage DC power conversion system is similar to the single-phase-shift control of the traditional DAB (Dual Active Bridge). Let the current of the inductor Lk be iLk. Assume that the dead time of the upper and lower tubes of all bridge converters is small enough, and the parasitic output capacitance of the switching devices is small enough. Under the definition of the current power direction, as long as the zero-crossing point of the level of the battery-side single-phase full-bridge voltage V12_j(t) leads the zero-crossing point of the iLk trapezoidal current, and the zero-crossing point of the iLk trapezoidal current leads the DC-connected single-phase bridge voltage , then all switching devices can achieve zero-voltage turn-on and eliminate the reverse recovery loss of the anti-parallel diodes.

[0088] Operating mode 2: Comprehensive phase-shift control mode.

[0089] When Nb battery-side full-bridges are in the zero-level working state and the remaining Nm - Nb battery-side single-phase full-bridges are in the square-wave working state, the DC-connected single-phase full-bridge selects the second working state, that is, the PWM working state. Among them, 1 < Nb < Nm.

[0090] The switching waveforms of all the single-phase full-bridges on the battery side operating in the square-wave state are synchronized. The switching period is Ts, and the starting moment of each switching period is tm0. Ignoring the voltage drop of the switching devices, the voltage between terminals 1 and 2 of the cascaded full-bridge at time t is:

[0091]

[0092] where x is the serial number of the single-phase full-bridge on the battery side in the square-wave operating state, and Vm_x is the voltage of the x-th single-phase full-bridge on the battery side in the square-wave operating state.

[0093] Meanwhile, the DC-connected single-phase full-bridge is in the PWM operating state. The switching period is Ts, and the starting moment of a switching period is tB0.

[0094] Let the time of the positive-level center point of the single-phase full-bridge on the battery side be tmc, and the time of the positive-level center point of the DC-connected single-phase full-bridge be tBc. The relationship between the time of the positive-level center point tmc of the single-phase full-bridge on the battery side and the starting time of the period is:

[0095]

[0096] Set the time difference by which tmc leads tBc as tpc, and the normalized phase-shift angle of the half period for the overall phase-shift control of the converter is dpc. Generally, dpc is less than 0.5.

[0097]

[0098] Through Fourier series analysis and calculation, the DC input power Po1 and Po3 of the fundamental wave and the third harmonic in the switching period are obtained:

[0099]

[0100] where Fp1 is the fundamental power factor and Fp3 is the third-harmonic power factor.

[0101]

[0102] Among them, the fundamental power is the main component of the power. However, when the phase-shift angle is small (such as when dpc = 0.1 or 0.2), if only the fundamental power is considered, the total power error will be relatively obvious. The third-harmonic power should be added to the total power. In most cases, when the phase-shift angle is small, the relative error of the total power is below 0.1, and when the phase-shift angle is large, the relative error of the total power drops below 0.01.

[0103] From the perspective of fundamental wave analysis, when the fundamental wave of iLk lags behind the fundamental wave of V12_sum(t), the fundamental wave of iLk leads If the angle of the fundamental wave is greater than the angle corresponding to half of the zero-level time, full soft-switching can be achieved. Based on this, the relationship between the duty cycle d of the DC-access single-phase full-bridge and the equivalent voltage ratio can be obtained as follows:

[0104]

[0105] Among them, is the equivalent voltage ratio.

[0106] Since the zero level does not transfer power, if the zero-level time is too long for the same power, it will increase the peak value of the current waveform. Therefore, the zero-level time should be limited. As an embodiment, it can be made such that:

[0107]

[0108] As Figure 4 shown, it is a schematic diagram of the change of the duty cycle of the DC-access single-phase full-bridge with respect to in this embodiment.

[0109] At this time, the limit value of the aforementioned phase-shift angle dp can be simplified. The lower limit of the soft-switching value range of the phase-shift angle dp during discharge is :

[0110]

[0111] As Figure 5 shown, it is a schematic diagram of the change of the lower limit of the soft-switching value range of the phase-shift angle dp during discharge with respect to Kv .

[0112] The above soft-switching conditions are calculated based on the fundamental wave analysis during discharge. The calculation method under the charging condition is similar and will not be elaborated here.

[0113] Suppose there are 8 battery modules and the corresponding battery-side single-phase full-bridges, where 1 group is in the bypass state. The single-phase transformer ratio is set according to the DC voltage ratio without bypass. The working waveforms of each component are as Figure 6 shown. It should be noted that Figure 6 is the steady-state waveform drawn taking the discharge with a relatively heavy load as an example after being converted according to the single-phase transformer ratio. Among them, Figure 6The first waveform diagram from top to bottom shows the waveforms of the power semiconductor relay switches Q1 and Q4 in the battery-side single-phase full-bridge medium power semiconductor relay switch in the square-wave working state, and the power semiconductor relay switches QB1 and QB3 in the DC access single-phase full-bridge medium power semiconductor relay switch in the PWM working state; the second waveform diagram shows the voltage V12_sum(t) at time t between the 1 end and the 2 end of the cascaded full-bridge in the battery-side single-phase full-bridge in the square-wave working state, and the sum of the voltages at time t between the AC side terminal D1 and the AC side terminal D2 of the DC access single-phase full-bridge in the square-wave working state. The waveform diagram; the third waveform diagram shows the waveform of the current iLk of the equivalent series inductor; the fourth waveform diagram shows the waveforms of the DC terminal current i_in of the battery-side single-phase full-bridge in the square-wave working state and the DC terminal current i_out of the DC access single-phase full-bridge.

[0114] In the first waveform diagram, the high level of the waveform represents conduction and the low level represents turn-off. The specific values are meaningless. The power semiconductor relay switches Q1 and Q4 conduct simultaneously or turn off simultaneously. The switching state of the unshown power semiconductor relay switch Q2 is opposite to that of the power semiconductor relay switch Q1, and the switching state of the power semiconductor relay switch Q3 is opposite to that of the power semiconductor relay switch Q4; during discharge, the waveform phase of the switching state of the power semiconductor relay switch QB1 lags behind Q1 and the power semiconductor relay switch Q4, and the phase difference does not exceed 1 / 4 of the switching period; the power semiconductor relay switch QB3 lags behind the power semiconductor relay switch QB1 in phase, and the phase difference is between 1 / 2 of the switching period and 3 / 4 of the switching period; the switching state of the unshown power semiconductor relay switch QB2 is opposite to that of the power semiconductor relay switch QB1, and the switching state of the power semiconductor relay switch QB4 is opposite to that of the power semiconductor relay switch QB3. Due to the above switching state settings, in the second waveform diagram, V12_sum(t) is a square wave, is a symmetric stepped waveform, and two rising edges appear successively within the half-switching period after the rising edge of V12_sum(t), and two falling edges appear successively within the half-switching period after the falling edge of V12_sum(t). The difference between V12_sum(t) and acts on the equivalent series inductor Lk to produce the waveform change of iLk in the third waveform diagram. Through appropriate switching signal design, within the half-switching period, the zero-crossing point where iLk changes from negative to positive can lag behind the rising edge of V12_sum(t) but lead the rising edge of , and the zero-crossing point where iLk changes from positive to negative can lag behind the falling edge of V12_sum(t) but lead the The falling edge can enable all switching devices to turn on at zero voltage and eliminate the reverse recovery loss of the anti-parallel diodes.

[0115] In some embodiments of the present application, the SOC (State of Charge) equalization control of the battery module can also be realized through a zero-level pipeline. Specifically, the following method can be called at a fixed period for control. For example, the following control method can be executed once in each switching cycle of the single-phase full-bridge on the battery side, such as Figure 7 As shown, it is a schematic flow diagram for realizing the SOC equalization control of the battery module through a zero-level pipeline, which may include:

[0116] (1) Determine whether the switching cycle count value PC of the single-phase full-bridge on the battery side is 0. If so, execute step (2); otherwise, execute step (8);

[0117] (2) Set the zero-level pipeline processing flag of the single-phase full-bridge on the battery side to 0;

[0118] (3) Calculate the SOC range of the battery module; the SOC range is equal to the difference between the maximum SOC value and the minimum SOC value;

[0119] (4) Determine whether the SOC range is greater than the preset upper threshold of the SOC range. If so, set the range size flag Sign_LD to 1 and execute step (5); otherwise, determine whether the SOC range is less than the preset lower threshold of the SOC range. If so, reset the range size flag Sign_LD to 0 and execute step (5); otherwise, execute step (5); As Figure 8 shown, it is a schematic flow diagram of the hysteresis judgment of the range size flag Sign_LD; (step (4) here corresponds to Figure 7 sub-process 1 in.)

[0120] (5) Determine whether the range size flag Sign_LD is set to 1. If so, execute step (6); otherwise, execute step (8);

[0121] (6) Determine whether it is in the discharging state currently. If so, calculate the SOC differences between each battery module and the battery module with the maximum SOC respectively to obtain a set of first SOC differences; otherwise, calculate the SOC differences between each battery module and the battery module with the minimum SOC respectively to obtain a set of second SOC differences. Determine the battery modules corresponding to the first SOC differences and the second SOC differences that are greater than the lower threshold of the preset SOC range difference, and denote them as active battery modules. Denote the other battery modules as non-active battery modules, and denote the number of active battery modules as Nsb. Enable the battery-side single-phase full-bridge corresponding to the active battery modules to participate in the active state balancing, execute the zero-level pipelining operation, set the flag Sign_ZPP for participating in the zero-level pipelining operation to 1, and set the flag Sign_ZPP for the non-active battery modules participating in the zero-level pipelining operation to 0. It should be noted that the SOC of the battery module with the minimum SOC and the SOC of the battery module with the maximum SOC are both obtained within the same sampling time. As Figure 9 shown, it is a schematic diagram of the inference process of the zero-level pipelining operation flag Sign_ZPP of the battery module; (Step (6) here corresponds to Figure 7 sub-process 2 in.)

[0122] (7) Determine whether Nsb is equal to 1. If so, execute step (8); otherwise, execute steps (7-1) to (7-7):

[0123] (7-1) Calculate the sum of the first SOC differences and the second SOC differences of the active battery modules, and denote it as Sum_Dsox;

[0124] (7-2) Calculate the zero-level cycle numbers of the battery-side single-phase full-bridges corresponding to each active battery module according to the following formula:

[0125]

[0126] where, represents the zero-level cycle number of the battery-side single-phase full-bridge corresponding to the active battery module with the serial number , represents the first SOC difference or the second SOC difference of the th active battery module, Npp represents the total number of switching cycles in one working cycle of the zero-level pipelining, n represents the serial number of the active battery module among all battery modules, , j1 represents the serial number of the first main battery module among all battery modules, j2 represents the serial number of the second main battery module among all battery modules, and jNsb represents the serial number of the Nsbth main battery module among all battery modules;

[0127] Round Nz_n according to the rounding rule;

[0128] (7-3) Calculate the sum of Nz_n of all active battery modules, denoted as Sum_Nz;

[0129] (7-4) Determine whether Sum_Nz is greater than Npp. If so, execute step (7-5). Otherwise, execute step (7-6).

[0130] (7-5) Find the Sum_Nz-Npp active battery modules with the smallest Dsoxn value in the active battery modules, record them as small active battery modules, reduce Nz_n of the battery-side single-phase full bridge corresponding to the small active battery modules by 1, and execute step (8);

[0131] (7-6) Determine whether Sum_Nz is less than Npp. If so, execute step (7-7); otherwise, execute step (8);

[0132] (7-7) Find the Npp-Sum_Nz active battery modules with the largest Dsoxn value in the active battery modules, record them as large active battery modules, add 1 to the Nz_n of the battery-side single-phase full bridge corresponding to the large active battery module, and execute step (8); Figure 10 As shown, it is a flow chart of calculating the number of zero-level cycles of the single-phase full-bridge on the battery side corresponding to the active battery module; (step (7) here corresponds to Figure 7 Subprocess 3 in . )

[0133] (8) Determine whether the extreme difference size flag Sign_LD is set to 1. If so, execute step (9). Otherwise, make all battery-side single-phase full bridges in square wave working state, and then complete one SOC balancing control;

[0134] (9) Determine whether Nsb is equal to 1. If so, the battery side single-phase full bridge corresponding to the main battery module is in a zero-level working state, and the battery side single-phase full bridge corresponding to the non-main battery module is in a square wave working state, and execute step (10); otherwise, execute steps (9-1) to (9-8):

[0135] (9-1) Determine whether the switching cycle count value PC of the single-phase full-bridge on the battery side satisfies:

[0136]

[0137] in, is the number of zero-level cycles of the single-phase full-bridge on the battery side corresponding to the main battery module with serial number j1;

[0138] If yes, execute step (9-2); otherwise, execute step (9-3);

[0139] (9-2) Set the battery-side single-phase full-bridge corresponding to the main battery module with serial number j1 to the zero-level working state, and set the battery-side single-phase full-bridges corresponding to other main battery modules to the square-wave working state, then execute step (10);

[0140] (9-3) Let the variable m = 2; the variable m indicates that the size of PC will be judged for the mth time, and is used to determine which battery-side single-phase full-bridge corresponding to PC is in the zero-level working state;

[0141] (9-4) Judge whether m ≤ Nsb holds. If it does, execute step (9-5); otherwise, execute step (9-8);

[0142] (9-5) Judge whether the switching cycle count value PC of the battery-side single-phase full-bridge satisfies the following formula:

[0143]

[0144] If it does, execute step (9-6); otherwise, execute step (9-7);

[0145] (9-6) Set the battery-side single-phase full-bridge corresponding to the active battery module with serial number jm to the zero-level working state, and set the battery-side single-phase full-bridges corresponding to other active battery modules to the square-wave working state, then execute step (10);

[0146] (9-7) Let m = m + 1, and return to step (9-4);

[0147] (9-8) Report a counting fault, and execute step (10);

[0148] As Figure 11 shown, it is a schematic flow chart for zero-level pipelining processing of the battery-side single-phase full-bridge corresponding to the active battery module; it should be noted that after step (9-3), for Nsb > 1, there must be an m value in the interval [2, Nsb] such that the formula in step (9-5) holds. Otherwise, it indicates that there is a problem with the calculation, and an error can be reported accordingly, and step (9) can be ended; (step (9) here corresponds to Figure 7 sub-process 4 in.)

[0149] (10) Increment the switching cycle count value PC of the battery-side single-phase full-bridge by 1;

[0150] (11) Judge whether the switching cycle count value PC of the battery-side single-phase full-bridge satisfies:

[0151]

[0152] If it does, assign the switching cycle count value PC of the battery-side single-phase full-bridge to 0 to complete one SOC balancing control; otherwise, complete one SOC balancing control.

[0153] An embodiment of the present application further provides an electronic device, which may include one or more processors, a memory, and a communication interface.

[0154] Among them, the memory and the communication interface are coupled to the processor. For example, the memory, the communication interface, and the processor may be coupled together through a bus.

[0155] Among them, the communication interface is used for data transmission with other devices. Computer program code is stored in the memory. The computer program code includes computer instructions, and when the computer instructions are executed by the processor, the electronic device is caused to execute the steps of the control method of the above-mentioned isolated energy storage DC power conversion system.

[0156] Among them, the processor may be a processor or a controller. For example, it may be a central processing unit (CPU), a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It can implement or execute various exemplary logic blocks, modules, and circuits described in conjunction with the present disclosure. The processor may also be a combination that implements computing functions, such as a combination including one or more microprocessors, a combination of a DSP and a microprocessor, and so on. The processor can be used to support the electronic device to execute the method steps provided in the above embodiments. Among them, the bus may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The above bus may be divided into an address bus, a data bus, a control bus, etc.

[0157] A computer-readable storage medium provided by an embodiment of the present application, which calculates and executes various exemplary logic blocks, modules, and circuits described in conjunction with the present disclosure. The processor may also be a combination that implements computing functions, such as a combination including one or more microprocessors, a combination of a DSP and a microprocessor, and so on. The processor can be used to support the electronic device to execute the method steps provided in the above embodiments.

[0158] Among them, the bus can be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The above-mentioned bus can be divided into an address bus, a data bus, a control bus, and the like.

[0159] A computer program is stored in the machine-readable storage medium. When the computer program is executed by a processor, the steps of the control method of the above-mentioned isolated energy storage DC power conversion system are realized.

[0160] The computer-readable storage medium involved in this application includes a random access memory (RAM), an internal memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium well-known in the technical field.

[0161] The above are only the preferred embodiments of this application and are not used to limit this application. For those skilled in the art, this application can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of this application shall be included within the protection scope of this application.

Claims

1. A control method for an isolated energy storage DC power conversion system, characterized in that: The isolated energy storage DC power conversion system includes: a DC access single-phase full-bridge, a single-phase transformer, Nm battery-side single-phase full-bridges and Nm relay switches K1; Nm is the number of battery modules; The DC-access single-phase full-bridge includes four power semiconductor relay switches, namely power semiconductor relay switch QB1 to power semiconductor relay switch QB4; wherein, an AC side terminal D1 is formed between the power semiconductor relay switch QB1 and the power semiconductor relay switch QB2, and an AC side terminal D2 is formed between the power semiconductor relay switch QB3 and the power semiconductor relay switch QB4; the DC side positive pole of the DC-access single-phase full-bridge is recorded as the DC side positive terminal D3, and the DC side negative pole is recorded as the DC side negative terminal D4, and the DC side positive terminal D3 and the DC side negative terminal D4 are respectively connected to the positive pole and the negative pole of the common DC bus outside the battery energy storage system; the AC side terminal D1 and the AC side terminal D2 are respectively connected to the two ends of the secondary side of the single-phase transformer; The battery-side single-phase full bridge includes four power semiconductor relay switches, namely power semiconductor relay switch Q1 to power semiconductor relay switch Q4; wherein, an AC side terminal E1 is formed between the power semiconductor relay switch Q1 and the power semiconductor relay switch Q2, and an AC side terminal E2 is formed between the power semiconductor relay switch Q3 and the power semiconductor relay switch Q4; the DC side positive pole of the battery-side single-phase full bridge is recorded as the DC side positive terminal E3, and the DC side negative pole is recorded as the DC side negative terminal E4, and the DC side positive terminal E3 and the DC side negative terminal E4 are respectively connected to the positive pole and the negative pole of a battery module; the AC sides of Nm battery-side single-phase full bridges are connected in series to form a cascade full bridge; and the AC side terminal E1 of the first battery-side single-phase full bridge and the AC side terminal E2 of the Nm-th battery-side single-phase full bridge are respectively connected to the two ends of the primary side of the single-phase transformer; The two ends of the relay switch K1 are connected to the AC side terminal E1 and the AC side terminal E1 respectively; Control methods include: Control the battery-side single-phase full-bridge and the DC-access single-phase full-bridge to be in square wave working state, so that the isolated energy storage DC power conversion system is in single-phase shift control mode; Alternatively, a portion of the battery-side single-phase full-bridge is controlled to be in a zero-level working state, another portion of the battery-side single-phase full-bridge is controlled to be in a square wave working state, and the DC-access single-phase full-bridge is controlled to be in a PWM working state, so that the isolated energy storage DC power conversion system is in a phase-shift plus PWM working state; Alternatively, the relay switch K1 corresponding to a battery-side single-phase full-bridge is controlled to be disconnected, the remaining battery-side single-phase full-bridge is in a square wave working state, and the DC-access single-phase full-bridge is in a PWM working state, so that the isolated energy storage DC power conversion system is in a phase-shift plus PWM working state.

2. The control method of the isolated energy storage DC power conversion system according to claim 1, characterized in that: The single-phase transformer is located on one side of the battery-side single-phase full-bridge and is integrated with an equivalent series inductor.

3. The control method of the isolated energy storage DC power conversion system according to claim 1, characterized in that: The method for controlling the battery-side single-phase full-bridge to be in a square wave working state comprises: Keep the corresponding relay switch K1 turned on, the power semiconductor relay switch Q1 and the power semiconductor relay switch Q4 turned on or off at the same time, and the power semiconductor relay switch Q2 and the power semiconductor relay switch Q3 turned on or off at the same time; and the switching states of the power semiconductor relay switch Q1 and the power semiconductor relay switch Q2 are complementary, and the switching states of the power semiconductor relay switch Q3 and the power semiconductor relay switch Q4 are complementary; No. The AC side terminal E1 and the AC side terminal E2 of the battery side single-phase full bridge are connected. Voltage at the moment for: Wherein, j represents the serial number of the single-phase full bridge on the battery side, , Indicates Battery module voltage, Indicates the start time of a switching cycle of the single-phase full-bridge on the battery side. Indicates the switching cycle time of the power semiconductor relay switch.

4. The control method of the isolated energy storage DC power conversion system according to claim 1, characterized in that: The method for controlling the battery-side single-phase full-bridge to be in a zero-level working state comprises: Keep the corresponding relay switch K1 turned on, the power semiconductor relay switch Q1 and the power semiconductor relay switch Q3 turned on at the same time, and the power semiconductor relay switch Q2 and the power semiconductor relay switch Q4 turned off at the same time; Alternatively, the power semiconductor relay switch Q2 and the power semiconductor relay switch Q4 are turned on at the same time, and the power semiconductor relay switch Q1 and the power semiconductor relay switch Q3 are turned off at the same time; The voltage between the AC side terminal E1 and the AC side terminal E2 of the j-th battery side single-phase full bridge at time t is zero.

5. The control method of the isolated energy storage DC power conversion system according to claim 1, characterized in that: The method for controlling a DC-connected single-phase full-bridge to be in a square wave working state comprises: Make the power semiconductor relay switch QB1 and the power semiconductor relay switch QB4 turned on or off at the same time, and the power semiconductor relay switch QB2 and the power semiconductor relay switch QB3 turned on or off at the same time; and the switching states of the power semiconductor relay switch QB1 and the power semiconductor relay switch QB2 are complementary, and the switching states of the power semiconductor relay switch QB3 and the power semiconductor relay switch QB4 are complementary.

6. The control method of the isolated energy storage DC power conversion system according to claim 1, characterized in that: The method for controlling a DC-connected single-phase full-bridge to be in a PWM working state comprises: Define that the switching cycle of the power semiconductor relay switch includes a first half cycle and a second half cycle, and the first half cycle includes a first sub-cycle and a second sub-cycle, and the second half cycle includes a third sub-cycle and a fourth sub-cycle; The voltage between the AC side terminal D1 and the AC side terminal D2 of the DC-connected single-phase full bridge at time t for: in, represents the common DC bus voltage, Indicates the start time of a switching cycle of a single-phase full-bridge connected to DC. Indicates the start time of the second sub-cycle of the DC access single-phase full-bridge. Indicates the start time of the third sub-cycle of the DC access single-phase full-bridge. Indicates the start time of the fourth sub-cycle of the DC access single-phase full-bridge.

7. The control method of the isolated energy storage DC power conversion system according to claim 1, characterized in that: Also includes: Controlling the transformation ratio of a single-phase transformer satisfy: in, Indicates When a battery module is charged at rated power, the voltage of the battery module during the plateau period is Indicates The plateau voltage of the battery module when the battery module is discharged at rated power.

8. The control method of the isolated energy storage DC power conversion system according to claim 1, characterized in that: It also includes the SOC balancing control of the battery module through the zero-level pipeline: (1) Determine whether the switching cycle count value PC of the battery-side single-phase full-bridge is 0. If so, execute step (2); otherwise, execute step (8); (2) Set the zero-level pipeline processing flag of the single-phase full-bridge on the battery side to 0; (3) Calculating the SOC range of the battery module; the SOC range is equal to the difference between the maximum SOC value and the minimum SOC value; (4) Determine whether the SOC range is greater than a preset SOC range upper threshold. If so, set the range size flag Sign_LD to 1 and execute step (5); otherwise, determine whether the SOC range is less than a preset SOC range lower threshold. If so, reset the range size flag Sign_LD to 0 and execute step (5); otherwise, directly execute step (5); (5) Determine whether the range size flag Sign_LD is set to 1. If so, execute step (6); otherwise, execute step (8); (6) Determine whether the battery is currently in a discharging state. If so, calculate the SOC difference between each battery module and the battery module with the maximum SOC to obtain a set of first SOC differences; Otherwise, the SOC differences between each battery module and the battery module with the minimum SOC are calculated respectively to obtain a set of second SOC differences; Determine the battery module corresponding to the first SOC difference and the second SOC difference that is greater than the preset SOC extreme value lower threshold, record it as the active battery module, record the other battery modules as the inactive battery modules, and record the number of active battery modules as Nsb, so that the battery-side single-phase full bridge corresponding to the active battery module participates in active state balancing, performs zero-level pipeline operation, sets the zero-level pipeline operation flag Sign_ZPP to 1, and sets the zero-level pipeline operation flag Sign_ZPP of the inactive battery module to 0; (7) Determine whether Nsb is equal to 1. If so, execute step (8); otherwise, execute steps (7-1) to (7-7): (7-1) Calculate the sum of the first SOC difference and the second SOC difference of the active battery module, denoted as Sum_Dsox; (7-2) Calculate the number of zero-level cycles of the single-phase full-bridge on the battery side corresponding to each active battery module according to the following formula: in, Indicates the serial number The number of zero-level cycles of the single-phase full-bridge on the battery side corresponding to the active battery module, Indicates The first SOC difference or the second SOC difference of the active battery module is represented by Npp, which represents the total number of switching cycles in one working cycle of the zero-level pipeline, and n represents the sequence number of the active battery module in all battery modules. , j1 represents the sequence number of the first main battery module among all battery modules, j2 represents the sequence number of the second main battery module among all battery modules, and jNsb represents the sequence number of the Nsbth main battery module among all battery modules; Nz_n is rounded to the nearest integer according to the rounding rule; (7-3) Calculate the sum of Nz_n of all active battery modules, denoted as Sum_Nz; (7-4) Determine whether Sum_Nz is greater than Npp. If so, execute step (7-5). Otherwise, execute step (7-6). (7-5) Find the Sum_Nz-Npp active battery modules with the smallest Dsoxn value in the active battery modules, record them as small active battery modules, reduce Nz_n of the battery-side single-phase full bridge corresponding to the small active battery modules by 1, and execute step (8); (7-6) Determine whether Sum_Nz is less than Npp. If so, execute step (7-7); otherwise, execute step (8); (7-7) Find the Npp-Sum_Nz active battery modules with the largest Dsoxn value in the active battery modules, record them as large active battery modules, add 1 to the Nz_n of the battery-side single-phase full bridge corresponding to the large active battery module, and execute step (8); (8) Determine whether the extreme difference size flag Sign_LD is set to 1. If so, execute step (9). Otherwise, make all battery-side single-phase full bridges in square wave working state, and then complete one SOC balancing control; (9) Determine whether Nsb is equal to 1. If so, the battery side single-phase full bridge corresponding to the main battery module is in a zero-level working state, and the battery side single-phase full bridge corresponding to the non-main battery module is in a square wave working state, and execute step (10); otherwise, execute steps (9-1) to (9-8): (9-1) Determine whether the switching cycle count value PC of the single-phase full-bridge on the battery side satisfies: in, For serial number The number of zero-level cycles of the single-phase full-bridge on the battery side corresponding to the main battery module; If yes, execute step (9-2); otherwise, execute step (9-3); (9-2) Make the sequence number The battery side single-phase full bridge corresponding to the main battery module is in a zero-level working state, and the battery side single-phase full bridge corresponding to other main battery modules is in a square wave working state, and step (10) is executed; (9-3) Make the variable ; (9-4) Judgment Is it true? If so, execute step (9-5); otherwise, execute step (9-8); (9-5) Determine whether the switching cycle count value PC of the single-phase full-bridge on the battery side satisfies the following formula: If yes, execute step (9-6); otherwise, execute step (9-7); (9-6) Make the battery side single-phase full bridge corresponding to the active battery module with serial number jm in zero-level working state, and make the battery side single-phase full bridge corresponding to other active battery modules in square wave working state, and execute step (10); (9-7) Set m+1 and return to step (9-4); (9-8) Report counting failure and execute step (10); (10) Increase the switching cycle count value PC of the single-phase full-bridge on the battery side by 1; (11) Determine whether the switching cycle count value PC of the single-phase full-bridge on the battery side satisfies: If so, the switching cycle count value PC of the single-phase full-bridge on the battery side is assigned to 0, and an SOC balancing control is completed; otherwise, an SOC balancing control is completed.

9. An electronic device, characterized in that: include: A memory, one or more processors; the memory is coupled to the processor; wherein the memory stores computer program code, the computer program code includes computer instructions, and when the computer instructions are executed by the processor, the electronic device executes the steps of the control method of the isolated energy storage DC power conversion system as described in any one of claims 1-8.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the control method of the isolated energy storage DC power conversion system as claimed in any one of claims 1 to 8 are implemented.

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