Adaptive dummy load device
By designing an adaptive fake load device in the power supply system and adjusting the fake load power using multiple control circuits, the problem of unstable output of high and low voltage power supplies is solved, the power efficiency is improved and noise is reduced.
Patent Information
- Application Number
- CN202411962346.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2025-04-04
AI Technical Summary
In the prior art, pure resistors as fake loads lead to an increase in heating power consumption when high output voltage, affecting power efficiency; they basically fail to work when low output voltage, resulting in fluctuations in the output voltage and are incompatible with high and low voltage power output designs.
An adaptive fake load device is designed, including the first, second and third control circuits and the fake load power regulation circuit. The signals output by these control circuits are used to adjust the power of the fake load to ensure that the output voltage is stable in each voltage segment.
The stability of output oscillation in each voltage segment is achieved, maintaining the fake load at a low operating level, thereby improving power efficiency, reducing heat generation, and reducing fan noise.
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Figure CN119765913A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of power supply, and in particular to an adaptive dummy load device. Background Art
[0002] In the related art, a resistor is directly connected to the output end of the power supply as a dummy load. The above resistor has two functions. First, when the power output is turned off, the above resistor is used to discharge the energy on the capacitor. Second, the switching power supply adopts pulse modulation technology. In the case of no-load, connecting a dummy load can solve the problems of power supply oscillation, output overshoot, and loss of control, thus ensuring the reliability of the normal operation of the power supply system.
[0003] However, the circuit using pure resistance as the dummy load has the following problems: First, when the power supply output voltage is high, the dummy load cannot be controlled to be turned on and off, and the dummy load will generate a large amount of heat and power consumption, which will affect the efficiency of the power supply on the one hand, and on the other hand, due to power loss, the fan speed needs to be increased for heat dissipation. At the same time, increasing the speed will also increase the fan noise, and the customer experience will deteriorate; second, when the power supply outputs a low voltage, it basically does not work, which will cause fluctuations in the output voltage, and after the power supply is turned off, the output capacitance is large and the discharge time is particularly long, which is not compatible with high and low voltage power supply output designs.
[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention
[0005] In view of at least one of the above technical problems, the present application provides an adaptive dummy load device.
[0006] The present application provides an adaptive dummy load device, comprising:
[0007] A first control circuit, configured to output a first control signal;
[0008] A second control circuit, used for outputting a second control signal;
[0009] A third control circuit, used for outputting a third control signal;
[0010] The dummy load power regulating circuit is used to change the power of the dummy load according to the first control signal, the second control signal and the third control signal, so as to maintain the output voltage stable.
[0011] One of the above technical solutions has at least one of the following advantages or beneficial effects: the present application can solve unstable factors such as output oscillation in each voltage segment, and can also keep the dummy load at a lower operating level, thereby improving power supply efficiency.
[0012] In some possible implementations, the dummy load power regulation circuit includes: a fifth operational amplifier, a second field effect transistor, a thirty-seventh resistor, a power regulation resistor and a first node, the first node is connected in common with the first control circuit, the second control circuit, the third control circuit and the thirty-seventh resistor, the first end of the fifth operational amplifier is connected to the first node, the second end of the fifth operational amplifier is connected to the third end of the second field effect transistor, the third end of the fifth operational amplifier is connected to the second end of the second field effect transistor, the first end of the second field effect transistor is connected to the output voltage end, the first end of the power regulation resistor is connected in common with the second end of the fifth operational amplifier and the third end of the second field effect transistor, and the second end of the power regulation resistor is grounded.
[0013] In some possible implementations, the first control circuit includes: a first adjustment unit and a first differential output circuit, the first end of the first differential output circuit is connected to the first adjustment unit, the second end of the first differential output circuit is connected to the output voltage attenuation signal end, the third end of the first differential output circuit is connected to the first node, and the first differential output circuit is used to output a first control signal.
[0014] In some possible implementations, the first adjustment unit includes: a twenty-first resistor and a twenty-third resistor, the first end of the twenty-third resistor is connected to the five-volt voltage terminal, the second end of the twenty-third resistor is connected to the second end of the first differential output circuit, the first end of the twenty-first resistor is grounded, and the second end of the twenty-first resistor is connected to the second end of the twenty-third resistor.
[0015] In some possible implementations, the second control circuit includes: a second adjustment unit and a second differential output circuit, the first end of the second differential output circuit is connected to the second adjustment unit, the second end of the second differential output circuit is connected to the output voltage attenuation signal end, the third end of the second differential output circuit is connected to the first node, and the second differential output circuit is used to output a second control signal.
[0016] In some possible implementations, the second adjustment unit includes: a thirty-first resistor and a thirty-second resistor, the first end of the thirty-second resistor is connected to the five-volt voltage terminal, the second end of the thirty-second resistor is connected to the second end of the second differential output circuit, the first end of the thirty-first resistor is grounded, and the second end of the thirty-first resistor is connected to the second end of the thirty-second resistor.
[0017] In some possible implementations, the third control circuit includes: a twenty-eighth resistor, a first end of the twenty-eighth resistor is connected to the five-volt voltage terminal, and a second end of the twenty-eighth resistor is connected to the first node.
[0018] In some possible implementations, the adaptive dummy load device also includes: a large current control circuit; the large current control circuit includes: a 40th resistor and a second diode, the first end of the 40th resistor is connected to the output current attenuation signal end, the second end of the 40th resistor is connected to the first end of the second diode, and the second end of the second diode is connected to the second end of the fifth operational amplifier.
[0019] In some possible implementations, the adaptive dummy load device also includes: a voltage drop acceleration control circuit; the voltage drop acceleration control circuit includes: a differential circuit and a discharge circuit, the first end of the differential circuit is connected to the output voltage end, the third end of the discharge circuit is connected to the second end of the differential circuit, the first end of the discharge circuit is connected to the twelve volt voltage end, and the second end of the discharge circuit is connected to the first end of the fifth operational amplifier.
[0020] In some possible implementations, the differential circuit includes: a fourth operational amplifier, a seventh capacitor, a twenty-second resistor and a twenty-seventh resistor, the first end of the fourth operational amplifier is grounded through the twenty-seventh resistor, the second end of the fourth operational amplifier is connected to the output voltage end through the seventh capacitor, the third end of the fourth operational amplifier is connected to the second end of the fourth operational amplifier through the twenty-second resistor, and the third end of the fourth operational amplifier is connected to the third end of the discharge circuit.
[0021] The present application is further described below in conjunction with the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0023] Figure 1 It is a structural diagram of the adaptive dummy load device shown in an embodiment of the present application;
[0024] Figure 2 A circuit diagram of an adaptive dummy load device shown in an embodiment of the present application;
[0025] In the figure:
[0026] 100, first control circuit; 110, first adjustment unit; 120, first differential output circuit;
[0027] V1, first control signal; R21, twenty-first resistor; R23, twenty-third resistor;
[0028] U3B, the third operational amplifier; R25, the twenty-fifth resistor; R26, the twenty-sixth resistor; R24, the twenty-fourth resistor;
[0029] V3, third voltage; V2, second voltage;
[0030] 200, second control circuit; 210, second adjustment unit; 220, second differential output circuit;
[0031] V7, second control signal; R31, thirty-first resistor; R32, thirty-second resistor;
[0032] U1A, first operational amplifier; R34, thirty-fourth resistor; R38, thirty-eighth resistor; R33, thirty-third resistor;
[0033] V5, fifth voltage; V6, sixth voltage;
[0034] 300, third control circuit; V8, third control signal; R28, twenty-eighth resistor;
[0035] 400. Dummy load power regulation circuit;
[0036] U5A, fifth operational amplifier; Q2, second field effect transistor; R37, thirty-seventh resistor; RS1, power regulating resistor; A, first node;
[0037] V5A, 50th voltage; V6A, 60th voltage;
[0038] 500, high current control circuit; R40, the fortieth resistor; D2, the second diode;
[0039] 600, voltage drop acceleration control circuit; 610, differential circuit; 620, discharge circuit;
[0040] U4, fourth operational amplifier; C7, seventh capacitor; R22, twenty-second resistor; R27, twenty-seventh resistor;
[0041] VOUT+, output voltage terminal; V_READ, output voltage attenuation signal terminal; +5V, five-volt voltage terminal; I_READ, output current attenuation signal terminal; +12V, twelve-volt voltage terminal; DETAILED DESCRIPTION
[0042] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific embodiments of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.
[0043] like Figure 1 and Figure 2 As shown, this embodiment provides an adaptive dummy load device, including: a first control circuit 100, a second control circuit 200, a third control circuit 300, a dummy load power adjustment circuit 400, a large current control circuit 500 and a voltage drop acceleration control circuit 600.
[0044] Among them, the first control circuit 100 is used to output the first control signal V1; the second control circuit 200 is used to output the second control signal V7; the third control circuit 300 is used to output the third control signal V8; the dummy load power adjustment circuit 400 is used to change the power of the dummy load according to the first control signal V1, the second control signal V7 and the third control signal V8, so as to maintain the output voltage stable. The present application can solve the unstable factors such as the output oscillation of the output voltage in each voltage segment, and can also make the dummy load at a lower operating level, thereby improving the power supply efficiency.
[0045] The dummy load power regulating circuit 400 ensures that the dummy load is automatically adjusted when the power supply is output according to the first control signal V1, the second control signal V7 and the third control signal V8 to ensure the normal operation of the power supply. Specifically, when the output voltage is in the low voltage section, the dummy load power regulating circuit 400 calculates the dummy load power according to the first control signal V1, the second control signal V7 and the third control signal V8, so as to perform regulation. When the output voltage is in the medium voltage section, the dummy load power regulating circuit 400 calculates the dummy load power according to the second control signal V7 and the third control signal V8. When the output voltage is in the high voltage section, the dummy load power regulating circuit 400 calculates the dummy load power according to the third control signal V8. In this way, targeted load regulation is achieved for different voltage intervals, so that the power of the dummy load is maintained at a lower level, that is, the power supply efficiency is improved, and the heat generation is reduced at the same time. The power supply cooling fan does not need to run at a high speed, which greatly reduces the noise of the fan and provides a better experience for users.
[0046] like Figure 1 and Figure 2As shown, the dummy load power regulation circuit 400 may include but is not limited to: a fifth operational amplifier U5A, a second field effect transistor Q2, a thirty-seventh resistor R37, a power regulation resistor RS1 and a first node A, the first node A is connected in common with the first control circuit 100, the second control circuit 200, the third control circuit 300 and the thirty-seventh resistor R37, the first end of the fifth operational amplifier U5A is connected to the first node A, the second end of the fifth operational amplifier U5A is connected to the third end of the second field effect transistor Q2, the third end of the fifth operational amplifier U5A is connected to the second end of the second field effect transistor Q2, the first end of the second field effect transistor Q2 is connected to the output voltage terminal VOUT+, the first end of the power regulation resistor RS1 is connected in common with the second end of the fifth operational amplifier U5A and the third end of the second field effect transistor Q2, and the second end of the power regulation resistor RS1 is grounded.
[0047] The voltage at the first terminal of the fifth operational amplifier U5A is defined as a 50th voltage V5A, and the voltage at the second terminal of the fifth operational amplifier U5A is defined as a 60th voltage V6A.
[0048] like Figure 1 and Figure 2 As shown, the first control circuit 100 may include but is not limited to: a first regulating unit 110 and a first differential output circuit 120, the first end of the first differential output circuit 120 is connected to the first regulating unit 110, the second end of the first differential output circuit 120 is connected to the output voltage attenuation signal end V_READ, the third end of the first differential output circuit 120 is connected to the first node A, and the first differential output circuit 120 is used to output a first control signal V1.
[0049] Specifically, the first adjustment unit 110 may include but is not limited to: a twenty-first resistor R21 and a twenty-third resistor R23, the first end of the twenty-third resistor R23 is connected to the five-volt voltage terminal +5V, the second end of the twenty-third resistor R23 is connected to the second end of the first differential output circuit 120, the first end of the twenty-first resistor R21 is grounded, and the second end of the twenty-first resistor R21 is connected to the second end of the twenty-third resistor R23.
[0050] Specifically, the first differential output circuit 120 may include but is not limited to: a third operational amplifier U3B, a twenty-fifth resistor R25, a twenty-sixth resistor R26 and a twenty-fourth resistor R24, the first end of the third operational amplifier U3B is respectively connected to the twenty-first resistor R21 and the twenty-third resistor R23, the second end of the third operational amplifier U3B is connected to the output voltage attenuation signal end V_READ through the twenty-fifth resistor R25, the third end of the third operational amplifier U3B is connected to the second end of the third operational amplifier U3B through the twenty-sixth resistor R26, and the third end of the third operational amplifier U3B is connected to the first node A through the twenty-fourth resistor R24.
[0051] The voltage at the first terminal of the third operational amplifier U3B is defined as a third voltage V3, the voltage at the second terminal of the third operational amplifier U3B is defined as a second voltage V2, and the voltage at the third terminal of the third operational amplifier U3B is defined as a first control signal V1.
[0052] like Figure 1 and Figure 2 As shown, the second control circuit 200 may include but is not limited to: a second regulating unit 210 and a second differential output circuit 220, the first end of the second differential output circuit 220 is connected to the second regulating unit 210, the second end of the second differential output circuit 220 is connected to the output voltage attenuation signal end V_READ, the third end of the second differential output circuit 220 is connected to the first node A, and the second differential output circuit 220 is used to output a second control signal V7.
[0053] Specifically, the second adjustment unit 210 may include but is not limited to: a thirty-first resistor R31 and a thirty-second resistor R32, the first end of the thirty-second resistor R32 is connected to the five-volt voltage terminal +5V, the second end of the thirty-second resistor is connected to the second end of the second differential output circuit 220, the first end of the thirty-first resistor R31 is grounded, and the second end of the thirty-first resistor R31 is connected to the second end of the thirty-second resistor R32.
[0054] Specifically, the second differential output circuit 220 may include but is not limited to: a first operational amplifier U1A, a thirty-fourth resistor R34, a thirty-eighth resistor R38 and a thirty-third resistor R33, the first end of the first operational amplifier U1A is connected to the thirty-first resistor R31 and the thirty-second resistor R32, the second end of the first operational amplifier U1A is connected to the output voltage attenuation signal end V_READ through the thirty-fourth resistor R34, the third end of the first operational amplifier U1A is connected to the second end of the first operational amplifier U1A through the thirty-eighth resistor R38, and the third end of the first operational amplifier U1A is connected to the first node A through the thirty-third resistor R33.
[0055] The voltage at the first terminal of the first operational amplifier U1A is defined as a fifth voltage V5, the voltage at the first terminal of the first operational amplifier U1A is defined as a sixth voltage V6, and the voltage at the third terminal of the first operational amplifier U1A is defined as a second control signal V7.
[0056] like Figure 1 and Figure 2 As shown, the third control circuit 300 may include but is not limited to: a twenty-eighth resistor R28, a first end of the twenty-eighth resistor R28 is connected to the five-volt voltage terminal +5V, and a second end of the twenty-eighth resistor R28 is connected to the first node A.
[0057] The voltage at the second end of the twenty-eighth resistor R28 is defined as the third control signal V8.
[0058] The working process of the adaptive dummy load device is introduced as follows.
[0059] When the power supply is working at no load or light load, the first control signal V1, the second control signal V7, and the third control signal V8 are superimposed on the first end of the fifth operational amplifier U5A after voltage division. When the fifth operational amplifier U5A works in the linear region, according to the virtual short, the voltage of the first end of the fifth operational amplifier U5A is equal to the voltage of the second end of the fifth operational amplifier U5A, that is, the 50th voltage V5A is equal to the 60th voltage V6A, so the current flowing through the power regulating resistor RS1 is: I=U5A / RS1.
[0060] When the third operational amplifier U3B works in the linear region, according to the virtual short circuit, the second voltage V2 and the third voltage V3 can be obtained as follows: V2=V3=5*R21 / (R21+R23). In addition, since the currents flowing through the twenty-fifth resistor R25 and the twenty-sixth resistor R26 are the same, the first control signal V1 can be obtained as follows: V1=R26*(V3-V_READ) / R25.
[0061] Similarly, when the first operational amplifier U1A operates in the linear region, according to the virtual short circuit, the fifth voltage V5 and the sixth voltage V6 are obtained as follows: V6=V5=5*R31 / (R31+R32). Since the currents flowing through the thirty-fourth resistor R34 and the thirty-eighth resistor R38 are the same, the second control signal V7 is obtained as follows: V7=R38*(V5-V_READ) / R34.
[0062] In addition, the third control signal V8 is: V8=(5*R37) / (R28+R37).
[0063] Therefore, the fiftieth voltage V5A is the superposition of the first control signal V1, the second control signal V7 and the third control signal V8, and we can obtain: V5A=(V1*R37) / (R24+R37)+(5*R37) / (R28+R37)+(V7*R37) / (R33+R37).
[0064] The power of the dummy load is: P = VOUT*I = VOUT*U5A / RS1. Substituting the 50th voltage V5A, we get: P = VOUT*[(V1*R37) / (R24+R37)+(5*R37) / (R28+R37)+(V7*R37) / (R33+R37)] / RS1.
[0065] The above is an introduction to the dummy load power when the power supply is working at no load or light load. The following is an introduction to the dummy load power when the power supply is working at high voltage.
[0066] When the output voltage of the power supply is too large, the third operational amplifier U3B and the first operational amplifier U1A operate in the non-linear region, and the voltages at the inverting terminals of the two are greater than the voltages at the non-linear terminals, that is, the second voltage V2 is greater than the third voltage V3, and the sixth voltage V6 is greater than the fifth voltage V5. Since a single power supply is used, the voltages of the first control signal V1 and the second control signal V7 are zero.
[0067] Combined with the aforementioned calculation formula for the fiftieth voltage V5A, now only the voltage of the third control signal V8 is output to the first terminal of the fifth operational amplifier U5A, that is: V5A=(5*R37) / (R28+R37).
[0068] At this time, the power of the dummy load is: P = VOUT*[(5*R37) / (R28+R37)] / RS1.
[0069] The following description is given by taking the output voltage being in the low voltage segment as an example.
[0070] Assuming that the twenty-first resistor R21 is 2KΩ, the twenty-third resistor R23 is 100KΩ, the first terminal voltage of the third operational amplifier U3B, the third voltage V3 is: V3 = (5*R21) / (R21+R23) = 5*2 / 102 = 0.0980V.
[0071] Since the output signal attenuation ratio of the output voltage attenuation signal terminal V_READ is 1 / 60, when the output signal of the output voltage attenuation signal terminal V_READ is less than the third voltage V3, the third operational amplifier U3B operates in the linear region; when the output signal of the output voltage attenuation signal terminal V_READ is greater than the third voltage V3, the third operational amplifier U3B operates in the non-linear region, that is, when the output signal of the output voltage attenuation signal terminal V_READ is greater than the third voltage V3, the output voltage of the third operational amplifier U3B, that is, the first control signal V1 is 0, and it can be calculated that when the output voltage is VOUT=V3*60=5.88V, the V1 signal output is 0. It can be seen that the third voltage V3 controls the output voltage to a certain value and then sets the first control signal V1 to 0, and the third voltage V3 is controlled by the ratio of the twenty-first resistor R21 and the twenty-third resistor R23. Therefore, adjusting the ratio of the twenty-first resistor R21 and the twenty-third resistor R23 can modulate the voltage working range of the output voltage in the low voltage section, and adjusting the ratio of the twenty-fourth resistor R24, the twenty-fifth resistor R25, the twenty-sixth resistor R26 and the thirty-seventh resistor R37 can change the fiftieth voltage V5A. In other words, the power of the dummy load is controlled by adjusting the ratio of the twenty-fourth resistor R24, the twenty-fifth resistor R25, the twenty-sixth resistor R26 and the thirty-seventh resistor R37.
[0072] Similarly, the control principle of the second control circuit 200 is the same as the control principle of the first control circuit 100, and will not be described in detail herein.
[0073] From the above examples, it can be understood that in the low voltage or medium voltage section, by adjusting the ratio of the twenty-first resistor R21 to the twenty-third resistor R23, and the ratio of the thirty-first resistor R31 to the thirty-second resistor R32, the voltage operating range of the dummy load can be adjusted, that is, adjusted to the low voltage section or the medium voltage section. The output power of the dummy load is controlled by adjusting the twenty-fifth resistor R25, the twenty-sixth resistor R26, the thirty-fourth resistor R34, the thirty-eighth resistor R38, the twenty-fourth resistor R24, the twenty-eighth resistor R28, the thirty-third resistor R33, and the thirty-seventh resistor R37. In the high voltage section, as can be seen from the above, the first control signal V1 and the second control signal V7 are output as 0, and the third control signal V8 is a fixed value. When the output voltage continues to rise, the dummy load power increases linearly. The ratio of the twenty-eighth resistor R28 and the thirty-seventh resistor R37 can be adjusted to control the dummy load to remain at a lower power.
[0074] like Figure 1 and Figure 2As shown, in some embodiments, the adaptive dummy load device also includes: a large current control circuit 500; the large current control circuit 500 may include but is not limited to: a fortieth resistor R40 and a second diode D2, the first end of the fortieth resistor R40 is connected to the output current attenuation signal end I_READ, the second end of the fortieth resistor R40 is connected to the first end of the second diode D2, and the second end of the second diode D2 is connected to the second end of the fifth operational amplifier U5A.
[0075] Specifically, when it is detected that the current of the power supply is greater than a certain value, the second diode D2 will be turned on. After being turned on, the voltage generated by the fortieth resistor R40 is superimposed on the second end of the fifth operational amplifier U5A, causing the inverting terminal voltage of the fifth operational amplifier U5A to be greater than the non-phase terminal voltage. Due to the single power supply, a low level is output, thereby disconnecting the second field effect transistor Q2, thereby turning off the dummy load.
[0076] like Figure 1 and Figure 2 As shown, in some embodiments, the adaptive dummy load device further includes: a voltage drop acceleration control circuit 600; the voltage drop acceleration control circuit 600 may include but is not limited to: a differential circuit 610 and a discharge circuit 620, the first end of the differential circuit 610 is connected to the output voltage terminal VOUT+, the third end of the discharge circuit 620 is connected to the second end of the differential circuit 610, the first end of the discharge circuit 620 is connected to the twelve volt voltage terminal +12V, and the second end of the discharge circuit 620 is connected to the first end of the fifth operational amplifier U5A.
[0077] Specifically, the differential circuit 610 may include but is not limited to: a fourth operational amplifier U4, a seventh capacitor C7, a twenty-second resistor R22 and a twenty-seventh resistor R27, the first end of the fourth operational amplifier U4 is grounded through the twenty-seventh resistor R27, the second end of the fourth operational amplifier U4 is connected to the output voltage terminal VOUT+ through the seventh capacitor C7, the third end of the fourth operational amplifier U4 is connected to the second end of the fourth operational amplifier U4 through the twenty-second resistor R22, and the third end of the fourth operational amplifier U4 is connected to the third end of the discharge circuit 620.
[0078] The discharge circuit 620 may include but is not limited to: a first transistor, a twentieth resistor and a first diode, the first end of the first transistor is connected to the twelve volt voltage terminal +12V, the second end of the first transistor is connected to the first node A, the third end of the first transistor is connected to the third end of the fourth operational amplifier U4, the twentieth resistor is respectively connected between the first end and the third end of the first transistor, and the first diode is connected in parallel to the twentieth resistor.
[0079] Specifically, when the fourth operational amplifier U4 detects that the output voltage changes with a negative slope, that is, when the output voltage is adjusted from a high voltage to a low voltage, the seventh capacitor C7 starts to discharge, and a current flows through the third terminal of the first transistor. At this time, the first transistor is turned on, and a current flows from the emitter to the collector, and the 50th voltage V5A is raised, thereby increasing the rapid discharge of the dummy load, adjusting the output voltage to the newly set voltage, speeding up the response time of the control system, and making the system quickly reach balance. At the same time, it can also effectively prevent the operator from accidentally touching when turning off the power, and the possibility of being electrocuted due to incomplete discharge, which greatly improves safety.
[0080] The above is only a preferred embodiment of the present application and does not constitute any formal limitation to the present application. Any technician familiar with the art can make many possible changes and modifications to the technical solution of the present application by using the above disclosed methods and technical contents without departing from the scope of the technical solution of the present application, or modify it into an equivalent embodiment of equivalent changes. Therefore, all equivalent changes made according to the shape, structure and principle of the present application without departing from the content of the technical solution of the present application should be included in the protection scope of the present application.
Claims
1. An adaptive dummy load device, characterized in that: include: A first control circuit, configured to output a first control signal; A second control circuit, used for outputting a second control signal; A third control circuit, used for outputting a third control signal; The dummy load power regulating circuit is used to change the power of the dummy load according to the first control signal, the second control signal and the third control signal, so as to maintain the output voltage stable.
2. The adaptive dummy load device according to claim 1, characterized in that: The dummy load power regulation circuit includes: a fifth operational amplifier, a second field effect transistor, a thirty-seventh resistor, a power regulation resistor and a first node, the first node is connected in common with the first control circuit, the second control circuit, the third control circuit and the thirty-seventh resistor, the first end of the fifth operational amplifier is connected to the first node, the second end of the fifth operational amplifier is connected to the third end of the second field effect transistor, the third end of the fifth operational amplifier is connected to the second end of the second field effect transistor, the first end of the second field effect transistor is connected to the output voltage end, the first end of the power regulation resistor is connected in common with the second end of the fifth operational amplifier and the third end of the second field effect transistor, and the second end of the power regulation resistor is grounded.
3. The adaptive dummy load device according to claim 2, characterized in that: The first control circuit includes: a first adjustment unit and a first differential output circuit, the first end of the first differential output circuit is connected to the first adjustment unit, the second end of the first differential output circuit is connected to the output voltage attenuation signal end, the third end of the first differential output circuit is connected to the first node, and the first differential output circuit is used to output a first control signal.
4. The adaptive dummy load device according to claim 3, characterized in that: The first adjustment unit includes: a twenty-first resistor and a twenty-third resistor, the first end of the twenty-third resistor is connected to the five-volt voltage terminal, the second end of the twenty-third resistor is connected to the second end of the first differential output circuit, the first end of the twenty-first resistor is grounded, and the second end of the twenty-first resistor is connected to the second end of the twenty-third resistor.
5. The adaptive dummy load device according to claim 2, characterized in that: The second control circuit includes: a second adjustment unit and a second differential output circuit, the first end of the second differential output circuit is connected to the second adjustment unit, the second end of the second differential output circuit is connected to the output voltage attenuation signal end, the third end of the second differential output circuit is connected to the first node, and the second differential output circuit is used to output a second control signal.
6. The adaptive dummy load device according to claim 5, characterized in that: The second adjustment unit includes: a thirty-first resistor and a thirty-second resistor, the first end of the thirty-second resistor is connected to the five-volt voltage terminal, the second end of the thirty-second resistor is connected to the second end of the second differential output circuit, the first end of the thirty-first resistor is grounded, and the second end of the thirty-first resistor is connected to the second end of the thirty-second resistor.
7. The adaptive dummy load device according to claim 2, characterized in that: The third control circuit includes: a twenty-eighth resistor, a first end of the twenty-eighth resistor is connected to the five-volt voltage terminal, and a second end of the twenty-eighth resistor is connected to the first node.
8. The adaptive dummy load device according to any one of claims 2 to 7, characterized in that: The adaptive dummy load device further comprises: a high current control circuit; The large current control circuit includes: a 40th resistor and a second diode, the first end of the 40th resistor is connected to the output current attenuation signal end, the second end of the 40th resistor is connected to the first end of the second diode, and the second end of the second diode is connected to the second end of the fifth operational amplifier.
9. The adaptive dummy load device according to any one of claims 2 to 7, characterized in that: The adaptive dummy load device further comprises: a voltage drop acceleration control circuit; The voltage drop acceleration control circuit includes: a differential circuit and a discharge circuit, the first end of the differential circuit is connected to the output voltage end, the third end of the discharge circuit is connected to the second end of the differential circuit, the first end of the discharge circuit is connected to the twelve volt voltage end, and the second end of the discharge circuit is connected to the first end of the fifth operational amplifier.
10. The adaptive dummy load device according to claim 9, characterized in that: The differential circuit includes: a fourth operational amplifier, a seventh capacitor, a twenty-second resistor and a twenty-seventh resistor, The first end of the fourth operational amplifier is grounded through the twenty-seventh resistor, the second end of the fourth operational amplifier is connected to the output voltage end through the seventh capacitor, the third end of the fourth operational amplifier is connected to the second end of the fourth operational amplifier through the twenty-second resistor, and the third end of the fourth operational amplifier is connected to the third end of the discharge circuit.