Processing alignment method of HDI circuit board and HDI circuit board

Abstract

The present invention discloses a processing alignment method and HDI circuit board of an HDI circuit board, wherein a reference target hole penetrates all stacking layers as a unified alignment reference to ensure the global consistency of the processing references of each layer; at the same time, a composite target generated based on a previous process is used as an alignment reference for the stacking circuit of a subsequent process, and the spatial correlation between its annular distribution through holes and the central through hole is utilized to provide a dual alignment reference of radial distribution features and central positioning features, respectively, so that the positioning deviation of each stacking process only affects the current layer, and avoids the error from being superimposed layer by layer on the subsequent processes. In addition, through the synergistic effect of the reference target hole and the composite target during repeated processing, the annular through hole of the composite target of the previous process provides a local compensation reference for the subsequent blind hole / buried hole processing, and the central through hole inherits the global positioning information of the reference target hole, thereby realizing the layer-by-layer convergence of the positioning error in the multi-layer stack, which is beneficial to improving the processing alignment accuracy and processing reliability of the HDI circuit board.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit boards, and in particular to a processing alignment method of an HDI circuit board and the HDI circuit board. Background Art

[0002] HDI (high-density interconnection) circuit boards use micro-blind buried via technology to achieve interlayer interconnection, and its core process indicators require blind hole alignment accuracy ≤±15μm. Driven by the demand for ultra-thin electronic products, high-order HDI has evolved from 5-order to 10-order, requiring more than 5 lamination processes, and the overall thickness is compressed to less than 0.4mm. In order to achieve this thin design, ultra-thin copper foil and low CTE substrate must be used, but such materials are prone to cumulative deformation due to differences in thermal expansion coefficients during laser drilling and pattern transfer processes. Especially when the number of circuit boards exceeds 8, the residual stress generated by multiple laminations is superimposed, resulting in a nonlinear increase in interlayer offset, causing a variety of defects. The current industry uses X-ray compensation systems to only correct part of the linear offset, and the compound offset caused by nonlinear deformation of high-order HDI has become the primary technical obstacle to alignment accuracy. Summary of the invention

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention provides a processing alignment method of an HDI circuit board and an HDI circuit board, which can improve the processing alignment accuracy of the HDI circuit board.

[0004] On the one hand, an embodiment of the present invention provides a method for processing and aligning an HDI circuit board, comprising:

[0005] Inner layer circuit: processing the first circuit layer on the inner core board and forming a process edge with a first metal target to obtain a first semi-finished product;

[0006] Laminated drilling target: machining a reference target hole on the process edge of the laminated semi-finished product based on the first metal target to obtain a second semi-finished product;

[0007] Lamination drilling: drilling the second semi-finished product based on the reference target hole, and processing the first annular target with circumferentially distributed through holes on the process side to obtain a third semi-finished product;

[0008] Laminated circuit: processing a second circuit layer and a second metal target on the third semi-finished product based on the first annular target to obtain a fourth semi-finished product;

[0009] Lamination: after laminating the fourth semi-finished product, re-drilling the reference target hole to obtain a fifth semi-finished product;

[0010] Laminated blind holes: laser opening the fifth semi-finished product based on the reference target hole to expose the second metal target and the first annular target, and processing a blind hole with the second metal target to obtain a sixth semi-finished product;

[0011] Laminating buried vias: drilling the sixth semi-finished product based on the reference target hole and penetrating the center of the first annular target to form a first composite target, thereby obtaining a seventh semi-finished product;

[0012] Repeat the stacked circuit, the stacked lamination, and at least one of the stacked drilling, the stacked blind hole and the stacked buried hole until the multi-layer processing is completed, wherein the reference target hole runs through all the stacked layers and serves as a unified alignment reference, and the first composite target of the previous process serves as the alignment reference of the stacked circuit of the subsequent process.

[0013] According to some embodiments of the present invention, processing the first circuit layer on the inner core board and forming a process edge with a first metal target to obtain a first semi-finished product includes:

[0014] Based on the alignment function of the direct imaging device and the pre-given expansion and contraction coefficient, the first circuit layer is processed on the inner core board and a process edge with a first metal target is formed to obtain a first semi-finished product.

[0015] According to some embodiments of the present invention, the step of processing a reference target hole on a process edge of a laminated semi-finished product based on the first metal target to obtain a second semi-finished product includes:

[0016] Based on the X-Ray alignment function of the laminated drilling target equipment, the first metal target is aligned and identified;

[0017] A reference target hole is processed on the process edge of the laminated semi-finished product based on the first metal target to obtain a second semi-finished product.

[0018] According to some embodiments of the present invention, the step of processing a reference target hole on a process edge of a laminated semi-finished product based on the first metal target to obtain a second semi-finished product includes:

[0019] Based on the first metal target, a plurality of reference target holes are processed on two oppositely arranged process edges of the laminated semi-finished product to obtain a second semi-finished product.

[0020] According to some embodiments of the present invention, drilling the second semi-finished product based on the reference target hole and processing the first annular target with circumferentially distributed through holes at the process edge to obtain the third semi-finished product includes:

[0021] The second semi-finished product is drilled based on the reference target hole, and the first annular target is processed at the process edge with a minimum aperture to obtain a third semi-finished product, wherein the first annular target includes a central through hole and a plurality of through holes distributed in a circle around the central through hole.

[0022] According to some embodiments of the present invention, drilling the second semi-finished product based on the reference target hole and processing the first annular target with circumferentially distributed through holes at the process edge to obtain the third semi-finished product includes:

[0023] The second semi-finished product is drilled based on the reference target hole, and the first annular target is processed on the process edge based on the hole diameter of 0.2 mm to obtain a third semi-finished product, wherein the first annular target includes a central through hole and 16 through holes distributed in a circle around the central through hole.

[0024] According to some embodiments of the present invention, the drilling of the sixth semi-finished product based on the reference target hole and penetrating the center of the first annular target to form a first composite target to obtain a seventh semi-finished product includes:

[0025] The sixth semi-finished product is drilled based on the reference target hole and penetrates the central through hole of the first annular target to form a first composite target, thereby obtaining a seventh semi-finished product.

[0026] According to some embodiments of the present invention, the drilling of the sixth semi-finished product based on the reference target hole and penetrating the central through hole of the first annular target to form a first composite target to obtain a seventh semi-finished product includes:

[0027] Drilling the sixth semi-finished product based on the reference target hole;

[0028] The central through hole of the first annular target is processed into a through hole to form a first composite target, thereby obtaining a seventh semi-finished product, wherein the diameter of the through hole is larger than the inner diameter of the central through hole and smaller than the inner diameter of the first composite target.

[0029] On the other hand, an embodiment of the present invention provides a method for processing and aligning an HDI circuit board, comprising:

[0030] Processing a first circuit layer on the inner core board and forming a process edge with a first metal target to obtain a first semi-finished product;

[0031] Processing a reference target hole on the process edge of the laminated semi-finished product based on the first metal target to obtain a second semi-finished product;

[0032] The second semi-finished product is drilled based on the reference target hole, and a first annular target with circumferentially distributed through holes is processed at the process edge to obtain a third semi-finished product;

[0033] Processing a second circuit layer and a second metal target on the third semi-finished product based on the first annular target to obtain a fourth semi-finished product;

[0034] After laminating the fourth semi-finished product, re-drilling the reference target hole to obtain a fifth semi-finished product;

[0035] Based on the reference target hole, laser-opening a window on the fifth semi-finished product to expose the second metal target and the first annular target, and processing a blind hole with the second metal target to obtain a sixth semi-finished product;

[0036] Based on the reference target hole, drilling the sixth semi-finished product and penetrating the center of the first annular target to form a first composite target, thereby obtaining a seventh semi-finished product;

[0037] Processing a third circuit layer and a third metal target on the seventh semi-finished product based on the first composite target to obtain an eighth semi-finished product;

[0038] After laminating the eighth semi-finished product, re-drilling the reference target hole to obtain a ninth semi-finished product;

[0039] Based on the reference target hole, laser-opening a window on the ninth semi-finished product to expose the third metal target, and processing a blind hole with the third metal target and processing a second annular target with circumferentially distributed through holes on the process edge to obtain a tenth semi-finished product;

[0040] Based on the reference target hole, drilling the tenth semi-finished product and penetrating the center of the second annular target to form a second composite target, thereby obtaining an eleventh semi-finished product;

[0041] A fourth circuit layer is processed on the eleventh semi-finished product based on the second composite target.

[0042] On the other hand, an embodiment of the present invention provides an HDI circuit board, which is prepared by the above-mentioned HDI circuit board processing and alignment method.

[0043] The embodiments of the present invention have at least the following beneficial effects:

[0044] The reference target hole penetrates all the stacking layers as a unified alignment reference to ensure the global consistency of the processing references of each layer; at the same time, the composite target (the structure after the through hole is formed in the center of the first annular target) generated in the previous process is used as the alignment reference for the stacking circuit in the subsequent process. The spatial correlation between the annular distribution through holes and the central through holes is used to provide dual alignment references of radial distribution features and central positioning features, so that the positioning deviation of each stacking process only affects the current level, avoiding the error from being superimposed layer by layer on the subsequent processes. In addition, through the synergistic effect of the reference target hole and the composite target during repeated processing, the annular through hole of the composite target in the previous process provides a local compensation reference for the subsequent blind hole / buried hole processing, and the central through hole inherits the global positioning information of the reference target hole, thereby realizing the layer-by-layer convergence of the positioning error in the multi-layer stacking, which is conducive to improving the processing alignment accuracy and processing reliability of the HDI circuit board.

[0045] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0047] Figure 1 A schematic diagram of key steps of a method for machining and aligning an HDI circuit board according to an embodiment of the present invention;

[0048] Figure 2 A schematic diagram of the changing states of the inner core plate and the first semi-finished product according to an embodiment of the present invention;

[0049] Figure 3 A schematic diagram of the changing states of the laminated semi-finished product and the second semi-finished product according to an embodiment of the present invention;

[0050] Figure 4 A schematic diagram of the change process of the third semi-finished product and the fourth semi-finished product of the embodiment of the present invention;

[0051] Figure 5 A schematic diagram of the change process of the fifth semi-finished product and the sixth semi-finished product of the embodiment of the present invention;

[0052] Figure 6 This is a schematic diagram of the change process of the seventh semi-finished product and the eighth semi-finished product of the embodiment of the present invention;

[0053] Figure 7 A schematic diagram of the changing process of the laminated semi-finished product and the ninth semi-finished product according to an embodiment of the present invention;

[0054] Figure 8 Schematic diagram of the change process of the tenth semi-finished product and the eleventh semi-finished product of the embodiment of the present invention;

[0055] Fig. 9 Schematic diagram of the stacked structure of the HDI circuit board according to an embodiment of the present invention.

[0056] Reference numerals:

[0057] Inner core plate 101, first semi-finished product 102, second semi-finished product 103, third semi-finished product 104, fourth semi-finished product 105, fifth semi-finished product 106, sixth semi-finished product 107, seventh semi-finished product 108, eighth semi-finished product 109, ninth semi-finished product 110, tenth semi-finished product 111, eleventh semi-finished product 112, first metal target 201, reference target hole 202, first annular target 203, center through hole 213, second metal target 204, first composite target 205, through through hole 215, third metal target 206, second annular target 207, second composite target 208. DETAILED DESCRIPTION

[0058] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0059] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., and orientations or positional relationships indicated are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0060] In the description of the present invention, "several" means one or more, "multiple" means more than two, greater than, less than, and exceeding are understood as not including the number itself, and "above", "below", and "within" are understood as including the number itself. If there is a description of "first", "second", etc., it is only used for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0061] In the description of the present invention, unless otherwise clearly defined, words such as “setting”, “installation” and “connection” should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above words in the present invention in combination with the specific content of the technical solution.

[0062] The production process of HDI circuit boards is a highly complex precision manufacturing process, the core of which is to achieve a high-density interconnection structure, involving key technologies such as micro blind buried vias, laser drilling and multiple laminations. Since the complete HDI circuit board production process involves many steps, in order to focus on the technical purpose of this embodiment: to improve the processing alignment accuracy of HDI circuit boards, the following article focuses on analyzing the core processes directly related to it, and other basic processes can refer to the standard HDI process specifications. For example, the production of inner layer circuits includes cutting and pretreatment, graphic transfer, browning / blackening treatment, and inner layer AOI inspection.

[0063] Please refer to Figure 1 This embodiment discloses a method for processing and aligning an HDI circuit board, comprising:

[0064] Inner layer circuit: processing the first circuit layer on the inner core board 101 and forming a process edge with a first metal target 201 to obtain a first semi-finished product 102;

[0065] For example, please refer to Figure 2 After cutting and pre-processing, the inner core board 101 enters the pattern transfer process. The purpose of the pattern transfer process is to process the circuit pattern on the metal layer on the surface of the inner core board 101 to form an inner circuit layer. Among them, the process edge is the edge area reserved for the HDI circuit board (production board) during the production process to facilitate processing and assembly. The process edge does not participate in the circuit function and is mainly used for support, fixation and auxiliary production (such as alignment). When the inner core board 101 is undergoing pattern transfer processing, the functional circuits (such as Figure 2 As shown by the mark A1 in the figure, a first metal target 201 is processed at the process edge, and the first metal target 201 is used as a positioning reference for the subsequent process.

[0066] Laminated drilling target: Based on the first metal target 201, a reference target hole 202 is processed on the process edge of the laminated semi-finished product to obtain a second semi-finished product 103;

[0067] For example, when the inner layer circuit is manufactured and the lamination process is started, the first semi-finished product 102 is used as the processing basis, and the lamination material (such as resin coated copper foil, RCC) is laminated and pressed with the first semi-finished product 102, such as Figure 3 As shown, Figure 3 The functional circuit (as indicated by the mark A1) and the first metal target 201 shown on the left side are covered by the laminated material and cannot be seen visually. It is worth mentioning that the laminated material needs to be pre-opened by etching the copper foil before lamination to avoid the first metal target 201. After the lamination process, the laminated semi-finished product is obtained. The first metal target 201 is detected by using the property of X-ray penetrating the resin layer of the laminated material, and the first metal target 201 is used as the alignment reference to process the reference target hole 202 (as shown in FIG. 202 ) on the process edge of the laminated semi-finished product. Figure 3 As shown on the right), the hole diameter and hole position can be determined according to the actual design requirements. This process can be processed using a press-fit X-ray drilling target integrated equipment to reduce positioning errors and shorten process conversion time to improve processing efficiency.

[0068] Lamination drilling: drilling the second semi-finished product 103 based on the reference target hole 202, and processing the first annular target 203 with circumferentially distributed through holes on the process edge to obtain the third semi-finished product 104;

[0069] For example, after the lamination process is completed, the laminated semi-finished product (i.e., the second semi-finished product 103) needs to be drilled to form a through hole on the laminated semi-finished product as a basis for buried holes. The laminated drilling process uses the reference target hole 202 as a positioning reference to drill the second semi-finished product 103, such as Figure 4 As shown by the mark A2 on the left, during the drilling process, the first annular target 203 is processed synchronously on the process edge, and the first annular target 203 includes a plurality of through holes distributed in a circle, and the coordinates of the discrete hole positions can be mutually verified to reduce the single-point alignment error, thereby providing higher alignment accuracy for subsequent laminated circuit production.

[0070] Laminated circuit: Based on the first annular target 203, a second circuit layer and a second metal target 204 are processed on the third semi-finished product 104 to obtain a fourth semi-finished product 105;

[0071] Exemplarily, the manufacturing process of the laminated circuit is similar to the manufacturing process of the inner layer circuit, except that the laminated circuit is manufactured with the first annular target 203 as the alignment reference, and the image visual detection technology is used for alignment detection. The first annular target 203 has a high alignment accuracy, and the first annular target 203 is processed with the reference target hole 202 as the alignment reference. By inheriting the alignment reference, the alignment cumulative error can be reduced and the alignment accuracy can be improved. Figure 4 When the second metal target 204 is processed simultaneously, it can be used as a positioning reference for the subsequent process.

[0072] Lamination: after laminating the fourth semi-finished product 105, re-reference the target hole 202 to obtain the fifth semi-finished product 106;

[0073] Exemplarily, the lamination process is a process of laminating and pressing the lamination material with the fourth semi-finished product 105. During the production process of the HDI circuit board, multiple pressing and drilling operations are performed, and each operation may involve the production of target holes. In order to ensure the accuracy of the entire production process, a series of measures are usually taken to ensure the position and accuracy of the target hole. These measures may include the use of high-precision positioning equipment, strict process control and quality control, etc. Among them, Figure 5The second metal circuit (as indicated by the mark A3), the second metal target 204, the first annular target 203 and the reference target hole 202 shown on the left side are all covered by the laminated material as indicated by the dotted lines. The reference target hole 202 is electroplated with metal after the processing of the laminated circuit to form a metallized through hole, which can be repositioned in the same way as the laminated drilling target process, that is, the laminated material needs to be pre-opened by etching the copper foil before lamination.

[0074] Laminated blind hole: Based on the reference target hole 202, the fifth semi-finished product 106 is laser-opened to expose the second metal target 204 and the first annular target 203, and the blind hole is processed with the second metal target 204 to obtain the sixth semi-finished product 107;

[0075] Exemplarily, after lamination is completed, the second metal target 204 and the first annular target 203 are both covered by the laminate material, and the first annular target 203 is changed from a through-hole target to a blind-hole target. Figure 5 , using the reference target hole 202 as the alignment target, the fifth semi-finished product 106 is laser-opened using a laser drilling device to ablate the copper foil and resin material on the surface of the second metal target 204 and the first annular target 203, thereby exposing the second metal target 204 and the first annular target 203. It is worth mentioning that after electroplating in the laminated circuit process, the through hole of the first annular target 203 will form a metallized hole, and the first annular target 203 can be exposed after laser windowing. In the current processing technology, the size of the blind hole is relatively small, and laser equipment is usually used for processing. After exposing the second metal target 204, the blind hole is processed using the second metal target 204 as the alignment reference, such as Figure 5 As shown in the mark A4, the alignment accuracy between the blind hole processing and the circuit pattern of the previous layer can be ensured.

[0076] Lamination buried hole: Based on the reference target hole 202, the sixth semi-finished product 107 is drilled and penetrates the center of the first annular target 203 to form a first composite target 205, thereby obtaining a seventh semi-finished product 108;

[0077] For example, the lamination buried hole processing is usually carried out by mechanical drilling to process a through hole on the lamination semi-finished product (i.e., the sixth semi-finished product 107), which can be converted into a buried hole after subsequent lamination and lamination. The lamination buried hole uses the reference target hole 202 as the alignment reference, and performs drilling processing on the sixth semi-finished product 107 to form a hole as shown in FIG. Figure 6The through hole indicated by the mark A5 in the middle. During the drilling process, a through hole is simultaneously processed at the center of the first annular target 203 (the alignment mark of the previous process) to form a first composite target 205. The first composite target 205 can take into account the alignment matching of the through hole and the blind hole, and the first composite target 205 can be compatible with the material expansion and contraction of the previous process mark during the pressing / processing process. The superposition error is automatically averaged through the geometric center constraint, and the spatial superposition characteristics of the first composite target 205 are used to vector synthesize the historical processing error (expansion and contraction deformation of the first annular target 203) and the processing positioning (through hole) of the current layer. The convergence of the alignment error across the process stages is achieved through center overlap, which is conducive to providing a more accurate alignment reference for the subsequent process.

[0078] Repeat the stacking circuit, stacking lamination, and at least one of stacking drilling, stacking blind vias and stacking buried vias until the multi-layer processing is completed, wherein the reference target hole 202 runs through all the stacking layers and serves as a unified alignment reference, and the first composite target 205 of the previous process serves as the alignment reference of the stacking circuit of the subsequent process.

[0079] For example, according to the different number of layers of the HDI circuit board, the processing technology of the stacked circuits and stacked lamination between different stacks is similar, but the difference is that the alignment references used are different. The first composite target 205 of the previous process is used as the alignment reference of the stacked circuits of the subsequent process, which can provide higher alignment accuracy, and the reference target hole 202 can be used as the alignment reference of the stacked drilling and stacked buried holes, and as the initial alignment reference of the stacked blind holes, so as to expose the corresponding metal target (such as the second metal target 204) and then switch the alignment reference to achieve higher precision alignment. According to different stacking processing requirements, it can be processed according to at least one process of stacked drilling, stacked blind holes and stacked buried holes until all layers are processed.

[0080] In this way, the reference target hole 202 runs through all the stacking layers as a unified alignment reference to ensure the global consistency of the processing references of each level; at the same time, the composite target (the structure after the through hole is formed in the center of the first annular target 203) generated in the previous process is used as the alignment reference for the stacking circuit in the subsequent process, and the spatial correlation between its annular distribution through holes and the central through holes is used to provide dual alignment references of radial distribution characteristics and central positioning characteristics, respectively, so that the positioning deviation of each stacking process only affects the current level, avoiding the error from being superimposed layer by layer on the subsequent processes. In addition, through the synergistic effect of the reference target hole 202 and the composite target during repeated processing, the annular through hole of the composite target in the previous process provides a local compensation reference for the subsequent blind hole / buried hole processing, and the central through hole inherits the global positioning information of the reference target hole 202, thereby realizing the layer-by-layer convergence of the alignment error in the multi-layer stacking, which is beneficial to improving the processing alignment accuracy and processing reliability of the HDI circuit board.

[0081] In the above inner layer circuit process, the first circuit layer is processed on the inner layer core board 101 and a process edge with a first metal target 201 is formed to obtain a first semi-finished product 102, including:

[0082] Based on the alignment function of the direct imaging device and the pre-given expansion and contraction coefficient, the first circuit layer is processed on the inner core board 101 and a process edge with a first metal target 201 is formed to obtain a first semi-finished product 102 .

[0083] Exemplarily, a direct imaging device (DI device) is an exposure device for direct imaging, which can directly form a fine circuit pattern on the inner core board 101 through UV (ultraviolet) laser scanning, and use the preset UV Mark point (optical calibration mark) of the inner core board 101 to capture the position of the UV Mark point through a camera, adjust the position of the exposure pattern in real time, and eliminate the deformation or offset of the inner core board 101 itself. Compared with traditional film exposure, direct imaging equipment does not require a physical mask for exposure, which avoids the problem of unstable film size, and by pre-scaling the expansion and contraction coefficient, it ensures that the pattern can still accurately match the UV Mark point after scaling. In the process of making the circuit pattern, the first metal target 201 is processed at the process edge at the same time, which can form a continuous alignment control system, so that the precise interlayer alignment of the multi-layer HDI board can be achieved through the coordination of pre-compensation of material expansion and contraction, high-precision alignment of the DI device and the target transfer system. The pre-scaling coefficient compensates for the lamination deformation, the DI device ensures the instant accuracy of the image formation, and the target at the process edge provides a stable physical positioning reference for the subsequent process, realizing closed-loop control of the alignment.

[0084] In the laminated drilling target process, a reference target hole 202 is processed on the process edge of the laminated semi-finished product based on the first metal target 201 to obtain a second semi-finished product 103, including:

[0085] Based on the X-Ray alignment function of the laminated drilling target equipment, the first metal target 201 is aligned and identified;

[0086] Based on the first metal target 201 , a reference target hole 202 is processed at the process edge of the laminated semi-finished product to obtain a second semi-finished product 103 .

[0087] Exemplarily, the laminated drilling target process can use a pressed X-ray drilling target integrated device as the laminated drilling target device, and the X-Ray alignment function of the device can penetrate the resin layer of the laminated material to align and identify the first metal target 201. In the early inner layer circuit process, the geometric correction of the circuit layer by pre-giving the expansion and contraction coefficient can effectively suppress the posture deviation of the first metal target 201 caused by the thermodynamic deformation of the material. The first metal target 201 is used as the alignment reference for making the reference target hole 202, which can improve the alignment accuracy of the multi-level interconnection structure. Among them, process edges are arranged on the opposite sides of the laminated semi-finished product, and multiple reference target holes 202, for example, 4, can be processed on the process edges. The multiple reference target holes 202 are distributed in different positions, that is: based on the first metal target 201, multiple reference target holes 202 are processed on two relatively arranged process edges of the laminated semi-finished product to obtain the second semi-finished product 103. It should be noted that the number of the alignment marks such as the target and the target hole in this embodiment can be multiple, and the arrangement positions are determined according to actual design requirements.

[0088] In the stacking drilling process, the second semi-finished product 103 is drilled based on the reference target hole 202, and the first annular target 203 with circumferentially distributed through holes is processed at the process edge to obtain the third semi-finished product 104, including:

[0089] The second semi-finished product 103 is drilled based on the reference target hole 202 , and the first annular target 203 is processed at the process edge with the minimum aperture to obtain the third semi-finished product 104 . The first annular target 203 includes a central through hole 213 and a plurality of through holes distributed in a circle around the central through hole 213 .

[0090] For example, please refer to Figure 4 , the through holes of the first annular target 203 are processed using the minimum aperture, the first annular target 203 includes a central through hole 213 and multiple through holes distributed in a circumferential array around the central through hole 213, the aperture of each through hole is the minimum aperture in the plate, and the through hole with the minimum aperture is used as the alignment reference, which can greatly reduce the alignment error caused by the precision of the conventional target hole, and the multiple through holes distributed in a circumferential array can further improve the alignment accuracy. For example, the aperture of each through hole constituting the first annular target 203 is 0.2mm, and the number of through holes distributed around the central through hole 213 is 16, that is, in the stacking drilling process, the second semi-finished product 103 is drilled based on the reference target hole 202, and the first annular target 203 containing circumferentially distributed through holes is processed at the process edge to obtain the third semi-finished product 104, including:

[0091] The second semi-finished product 103 is drilled based on the reference target hole 202, and the first annular target 203 is processed at the process edge based on the hole diameter of 0.2 mm to obtain the third semi-finished product 104. The first annular target 203 includes a central through hole 213 and 16 through holes distributed in a circle around the central through hole 213.

[0092] In the lamination and hole-burying process, the sixth semi-finished product 107 is drilled based on the reference target hole 202 and penetrates the center of the first annular target 203 to form a first composite target 205, thereby obtaining a seventh semi-finished product 108, including:

[0093] The sixth semi-finished product 107 is drilled based on the reference target hole 202 and penetrates the central through hole 213 of the first annular target 203 to form a first composite target 205 , thereby obtaining a seventh semi-finished product 108 .

[0094] For example, please refer to Figure 5 and Figure 6 The reference target hole 202 is used as the alignment reference, and a through hole 215 penetrating the central through hole 213 of the first annular target 203 is synchronously processed during the drilling process, so that the through hole 215 and the plurality of through holes distributed in a circumference in the first annular target form a first composite target 205, and the characteristics of the first composite target 205 are used to improve the processing alignment accuracy and processing reliability of the HDI circuit board.

[0095] The sixth semi-finished product 107 is drilled based on the reference target hole 202 and penetrates the central through hole 213 of the first annular target 203 to form a first composite target 205, thereby obtaining a seventh semi-finished product 108, including:

[0096] The sixth semi-finished product 107 is drilled based on the reference target hole 202; the central through hole 213 of the first annular target 203 is processed into a through hole 215 to form a first composite target 205, thereby obtaining a seventh semi-finished product 108, wherein the aperture of the through hole 215 is larger than the central through hole 213 and smaller than the inner diameter of the first composite target 205.

[0097] For example, by properly setting the aperture of the through hole 215 , the through hole 215 can penetrate the central through hole 213 of the first annular target 203 while retaining the peripheral through holes distributed in a circumference, thereby forming the first composite target 205 .

[0098] In order to facilitate understanding of the inventive concept of the present invention, the following reference is made to Figures 2 to 9 , taking a two-order eight-layer board as an example, the stacking structure of the two-order eight-layer board is as follows Fig. 9 As shown, Fig. 9The labels L1 to L8 refer to the first to eighth circuit layers. Since the L1 to L4 layers are centrally symmetrical with the L8 to L5 layers, for ease of description, the key steps of HDI circuit board lamination processing are described starting with the top view structure of the L1 to L4 layers of the inner core board 101. Figures 2 to 8 The left example picture shown in the figure is an example picture of the state of the semi-finished product before processing in different processing steps, and the right example picture is an example picture of the changed state of the semi-finished product after processing. The middle arrow indicates the processing change.

[0099] This embodiment also provides a method for processing and aligning an HDI circuit board, including steps S201 to S212. It should be noted that the steps in this embodiment are numbered only for the convenience of review and understanding, and do not limit the execution order of the steps. The contents of each step are described in detail below:

[0100] S201, processing the first circuit layer on the inner core board 101 and forming a process edge with a first metal target 201 to obtain a first semi-finished product 102;

[0101] Exemplarily, the inner core board 101 is used as the core board of an eight-layer HDI circuit board, such as Figure 2 As shown on the left, after the circuit pattern is processed, a functional circuit and a first metal target 201 are formed on the copper foil on the surface of the inner core board 101, as shown in FIG. Figure 2 As shown on the right, the first circuit layer is the L4 layer of the HDI circuit board.

[0102] S202, machining a reference target hole 202 at the process edge of the laminated semi-finished product based on the first metal target 201 to obtain a second semi-finished product 103;

[0103] For example, please refer to Figure 3 After the circuit processing is completed, lamination and pressing are performed, and the lamination material is stacked on the upper and lower sides of the first semi-finished product 102. The functional circuit of the first semi-finished product 102 and the first metal target 201 are covered by the lamination material. Figure 3 The dotted line indicates that it is covered. The surface of the second semi-finished product 103 obtained after the pressing and drilling is the copper foil used for processing the L3 layer. The reference target hole 202 is processed on the second semi-finished product 103, as shown in FIG. Figure 3 As shown on the right side of the reference target hole 202, the reference target hole 202 provides a positioning reference for subsequent processes.

[0104] S203, drilling the second semi-finished product 103 based on the reference target hole 202, and processing the first annular target 203 with circumferentially distributed through holes on the process edge to obtain a third semi-finished product 104;

[0105] For example, drilling is performed on the L3 layer, such as Figure 4As shown by the mark A2 on the left, a first annular target 203 is processed simultaneously. The first annular target 203 includes a central through hole 213 and 16 peripheral through holes distributed in a circular array around the central through hole 213. The apertures of the central through hole 213 and the peripheral through holes are both the smallest apertures of the L3 layer.

[0106] S204, processing the second circuit layer and the second metal target 204 on the third semi-finished product 104 based on the first annular target 203 to obtain a fourth semi-finished product 105;

[0107] For example, after the drilling process is completed, the first annular target 203 is used as a positioning reference to process the second circuit layer on the copper foil on the surface of the third semi-finished product 104, such as Figure 4 The line indicated by mark A3 and the second metal target 204 are used to obtain a fourth semi-finished product 105 .

[0108] S205, after laminating the fourth semi-finished product 105, re-drilling the reference target hole 202 to obtain a fifth semi-finished product 106;

[0109] Exemplarily, laminated materials are stacked on opposite sides of the fourth semi-finished product 105 and pressed together, and the circuit patterns and through holes on opposite sides of the fourth semi-finished product 105 are covered by the laminated materials. Figure 5 The dotted line on the left indicates coverage. The reference target hole 202 is electroplated with metal after processing in step S204 to form a metallized through hole, which can be repositioned in the same way as step S202, that is, the laminated material needs to be pre-opened by etching the copper foil before lamination.

[0110] S206, laser opening a window of the fifth semi-finished product 106 based on the reference target hole 202 to expose the second metal target 204 and the first annular target 203, and processing a blind hole with the second metal target 204 to obtain a sixth semi-finished product 107;

[0111] For example, after lamination and lamination, the surface of the semi-finished product is a copper foil for forming the L2 layer. Laser windowing of the fifth semi-finished product 106 with the reference target hole 202 can expose the covered second metal target 204 and the first annular target 203, and then switch the alignment reference, and use the second metal target 204 as the alignment reference to process the blind hole, such as Figure 5 As shown on the right side, marked A4.

[0112] S207, drilling the sixth semi-finished product 107 based on the reference target hole 202 and penetrating the center of the first annular target 203 to form a first composite target 205, thereby obtaining a seventh semi-finished product 108;

[0113] Exemplarily, the reference target hole 202 is used as the alignment reference to perform drilling processing on the sixth semi-finished product 107, such as Figure 6As shown by the mark A5 on the left, a through hole 215 is processed in the center of the first annular target 203, and the aperture of the through hole 215 is larger than the central through hole 213 and smaller than the inner diameter of the first annular target 203 (the diameter of the inscribed circle formed by the outer through holes), so that the through hole 215 covers the central through hole 213, so that the through hole 215 and the first annular target 203 form a first composite target 205.

[0114] S208, processing the third circuit layer and the third metal target 206 on the seventh semi-finished product 108 based on the first composite target 205 to obtain an eighth semi-finished product 109;

[0115] For example, the surface copper foil of the seventh semi-finished product 108 is processed into a third circuit layer and a third metal target 206 is formed by taking the first composite target 205 as the alignment reference. Figure 6 As shown on the right side, marked A6.

[0116] S209, after laminating the eighth semi-finished product 109, re-drilling the reference target hole 202 to obtain a ninth semi-finished product 110;

[0117] For example, after the processing of the third circuit layer is completed, lamination and pressing are performed again, and the circuits of the third circuit layer, the third metal target 206, etc. are all covered by the lamination material. Figure 7 The left side is covered by a dotted line. The surface of the semi-finished product after lamination is formed into a copper foil for processing the L1 circuit layer (outer layer). The reference target hole 202 is re-drilled to provide a positioning reference for subsequent post-processing.

[0118] S210, laser opening a window of the ninth semi-finished product 110 based on the reference target hole 202 to expose the third metal target 206, and processing a blind hole with the third metal target 206 and processing a second annular target 207 containing circumferentially distributed through holes on the process edge to obtain a tenth semi-finished product 111;

[0119] For example, Figure 7 As shown on the right side, the ninth semi-finished product 110 is laser-opened with the reference target hole 202 as the alignment reference to expose the third metal target 206, and then the third metal target 206 is used to process the blind hole, as shown in FIG. Figure 7 As shown by the mark A7 on the right side, a second annular target 207 is processed on the process edge, and the structure of the second annular target 207 is the same as that of the first annular target 203 .

[0120] S211, drilling the tenth semi-finished product 111 based on the reference target hole 202 and penetrating the center of the second annular target 207 to form a second composite target 208, thereby obtaining the eleventh semi-finished product 112;

[0121] Exemplarily, the reference target hole 202 is used as the alignment reference to perform drilling processing on the tenth semi-finished product 111, such as Figure 8 As shown by the mark A8, during the drilling process, the center of the second annular target 207 is penetrated to form a second composite target 208, so as to be used as a positioning reference for subsequent processes.

[0122] S212 , processing a fourth circuit layer on the eleventh semi-finished product 112 based on the second composite target 208 .

[0123] For example, the second composite target 208 is used as a positioning reference to process the copper foil on the surface of the eleventh semi-finished product 112 into a fourth circuit layer, namely, the L1 layer. Figure 8 As shown by the mark A9 on the right, the processing of the outer layer circuit is completed.

[0124] In this way, the reference target hole 202 runs through all the stacking layers as a unified alignment reference to ensure the global consistency of the processing references of each level; at the same time, the composite target (the structure after the through hole is formed in the center of the first annular target 203) generated in the previous process is used as the alignment reference for the stacking circuit in the subsequent process, and the spatial correlation between its annular distribution through holes and the central through holes is used to provide dual alignment references of radial distribution characteristics and central positioning characteristics, respectively, so that the positioning deviation of each stacking process only affects the current level, avoiding the error from being superimposed layer by layer on the subsequent processes. In addition, through the synergistic effect of the reference target hole 202 and the composite target during repeated processing, the annular through hole of the composite target in the previous process provides a local compensation reference for the subsequent blind hole / buried hole processing, and the central through hole inherits the global positioning information of the reference target hole 202, thereby realizing the layer-by-layer convergence of the alignment error in the multi-layer stacking, which is beneficial to improving the processing alignment accuracy and processing reliability of the HDI circuit board.

[0125] This embodiment also provides an HDI circuit board, which is prepared by the above-mentioned HDI circuit board processing alignment method. The HDI circuit board processing alignment method and beneficial effects can be specifically referred to above, and will not be repeated here.

[0126] The embodiments of the present invention are described in detail above with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge scope of ordinary technicians in the relevant technical field without departing from the purpose of the present invention.

Claims

1. A method for processing and aligning an HDI circuit board, characterized in that: include: Inner layer circuit: processing a first circuit layer on an inner layer core board (101) and forming a process edge with a first metal target (201) to obtain a first semi-finished product (102); Laminated drilling target: machining a reference target hole (202) on the process edge of a laminated semi-finished product based on the first metal target (201) to obtain a second semi-finished product (103); Lamination drilling: drilling the second semi-finished product (103) based on the reference target hole (202), and processing the first annular target (203) containing circumferentially distributed through holes on the process edge to obtain a third semi-finished product (104); Laminated circuit: processing a second circuit layer and a second metal target (204) on the third semi-finished product (104) based on the first annular target (203) to obtain a fourth semi-finished product (105); Laminating: laminating the fourth semi-finished product (105) and re-drilling the reference target hole (202) to obtain a fifth semi-finished product (106); Laminated blind hole: based on the reference target hole (202), the fifth semi-finished product (106) is laser-opened to expose the second metal target (204) and the first annular target (203), and a blind hole is processed with the second metal target (204) to obtain a sixth semi-finished product (107); Laminating buried vias: drilling the sixth semi-finished product (107) based on the reference target hole (202) and penetrating the center of the first annular target (203) to form a first composite target (205), thereby obtaining a seventh semi-finished product (108); The stacked circuit, the stacked lamination, and at least one of the stacked drilling, the stacked blind hole, and the stacked buried hole are repeated until multi-layer processing is completed, wherein the reference target hole (202) penetrates all stacked layers and serves as a unified alignment reference, and the first composite target (205) of the previous process serves as an alignment reference for the stacked circuit of the subsequent process.

2. The HDI circuit board processing alignment method according to claim 1, characterized in that: The step of processing the first circuit layer on the inner core board (101) and forming a process edge with a first metal target (201) to obtain a first semi-finished product (102) comprises: Based on the alignment function of the direct imaging device and the pre-set expansion and contraction coefficient, a first circuit layer is processed on the inner core board (101) and a process edge with a first metal target (201) is formed to obtain a first semi-finished product (102).

3. The method for processing and aligning an HDI circuit board according to claim 1, characterized in that: The method of machining a reference target hole (202) on the process edge of a laminated semi-finished product based on the first metal target (201) to obtain a second semi-finished product (103) comprises: Based on the X-Ray alignment function of the laminated drilling target equipment, the first metal target (201) is aligned and identified; A reference target hole (202) is machined on the process edge of the laminated semi-finished product based on the first metal target (201) to obtain a second semi-finished product (103).

4. The HDI circuit board processing alignment method according to claim 1 or 3, characterized in that: The method of machining a reference target hole (202) on the process edge of a laminated semi-finished product based on the first metal target (201) to obtain a second semi-finished product (103) comprises: Based on the first metal target (201), a plurality of reference target holes (202) are processed on two oppositely arranged process edges of the laminated semi-finished product to obtain a second semi-finished product (103).

5. The method for processing and aligning an HDI circuit board according to claim 1, characterized in that: The method of drilling the second semi-finished product (103) based on the reference target hole (202) and processing the first annular target (203) containing circumferentially distributed through holes to obtain a third semi-finished product (104) comprises: The second semi-finished product (103) is drilled based on the reference target hole (202), and the first annular target (203) is processed at the process edge with a minimum hole diameter to obtain a third semi-finished product (104), wherein the first annular target (203) comprises a central through hole (213) and a plurality of through holes distributed in a circumference around the central through hole (213).

6. The method for processing and aligning an HDI circuit board according to claim 5, characterized in that: The method of drilling the second semi-finished product (103) based on the reference target hole (202) and processing the first annular target (203) containing circumferentially distributed through holes to obtain a third semi-finished product (104) comprises: The second semi-finished product (103) is drilled based on the reference target hole (202), and a first annular target (203) is processed on the process edge based on a hole diameter of 0.2 mm to obtain a third semi-finished product (104), wherein the first annular target (203) includes a central through hole (213) and 16 through holes distributed in a circumference around the central through hole (213).

7. The HDI circuit board processing alignment method according to claim 5 or 6, characterized in that: The drilling process of the sixth semi-finished product (107) based on the reference target hole (202) and penetrating the center of the first annular target (203) to form a first composite target (205) to obtain a seventh semi-finished product (108) comprises: The sixth semi-finished product (107) is drilled based on the reference target hole (202) and penetrates the central through hole (213) of the first annular target (203) to form a first composite target (205), thereby obtaining a seventh semi-finished product (108).

8. The method for processing and aligning an HDI circuit board according to claim 7, characterized in that: The drilling process of the sixth semi-finished product (107) based on the reference target hole (202) and penetrating the central through hole (213) of the first annular target (203) to form a first composite target (205) to obtain a seventh semi-finished product (108) comprises: drilling the sixth semi-finished product (107) based on the reference target hole (202); The central through hole (213) of the first annular target (203) is processed into a through hole (215) to form a first composite target (205), thereby obtaining a seventh semi-finished product (108), wherein the diameter of the through hole (215) is larger than the inner diameter of the central through hole (213) and smaller than the inner diameter of the first composite target (205).

9. A method for processing and aligning an HDI circuit board, characterized in that: include: Processing a first circuit layer on the inner core board (101) and forming a process edge with a first metal target (201) to obtain a first semi-finished product (102); Processing a reference target hole (202) on the process edge of the laminated semi-finished product based on the first metal target (201) to obtain a second semi-finished product (103); Drilling the second semi-finished product (103) based on the reference target hole (202), and processing the first annular target (203) containing circumferentially distributed through holes on the process edge to obtain a third semi-finished product (104); Processing a second circuit layer and a second metal target (204) on the third semi-finished product (104) based on the first annular target (203) to obtain a fourth semi-finished product (105); After laminating the fourth semi-finished product (105), re-drilling the reference target hole (202) to obtain a fifth semi-finished product (106); Based on the reference target hole (202), laser windowing is performed on the fifth semi-finished product (106) to expose the second metal target (204) and the first annular target (203), and a blind hole is processed with the second metal target (204) to obtain a sixth semi-finished product (107); Based on the reference target hole (202), the sixth semi-finished product (107) is drilled and penetrates the center of the first annular target (203) to form a first composite target (205), thereby obtaining a seventh semi-finished product (108); Processing a third circuit layer and a third metal target (206) on the seventh semi-finished product (108) based on the first composite target (205) to obtain an eighth semi-finished product (109); After laminating the eighth semi-finished product (109), re-drilling the reference target hole (202) to obtain a ninth semi-finished product (110); Based on the reference target hole (202), the ninth semi-finished product (110) is laser-opened to expose the third metal target (206), and blind holes are processed with the third metal target (206), and a second annular target (207) containing circumferentially distributed through holes is processed on the process edge to obtain a tenth semi-finished product (111); Based on the reference target hole (202), the tenth semi-finished product (111) is drilled and penetrates the center of the second annular target (207) to form a second composite target (208), thereby obtaining an eleventh semi-finished product (112); A fourth circuit layer is processed on the eleventh semi-finished product (112) based on the second composite target (208).

10. An HDI circuit board, characterized in that: The HDI circuit board is prepared by the processing and alignment method of the HDI circuit board as claimed in any one of claims 1 to 9.

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