Gallium nitride device preparation method and gallium nitride device

Abstract

The embodiment of the invention provides a gallium nitride device preparation method and a gallium nitride device, and relates to the technical field of semiconductors. The gallium nitride device is manufactured through the gallium nitride device manufacturing method, and the gallium nitride device manufacturing method comprises the steps that a gallium nitride prefabricated device is provided, and the gallium nitride prefabricated device comprises a channel layer, a barrier layer and a P-type gallium nitride layer which are arranged in a stacked mode; depositing a protective layer on the surfaces of the barrier layer and the P-type gallium nitride layer which are far away from one side of the channel layer; photoetching is carried out on the protection layer, two preset areas are exposed, and ion implantation doping is carried out on the two preset areas; forming an isolation region in the non-active region; and forming a source electrode and a drain electrode of the device on the two preset regions respectively. Through the thickness setting of the protective layer and the energy setting of the implanted ions, the distribution concentration peak value of the implanted ions can be controlled in the surface area of the barrier layer, the implanted ions are prevented from expanding to the channel layer and the area below the channel layer, and the loss of other areas is reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a gallium nitride device preparation method and a gallium nitride device. Background Art

[0002] Gallium nitride (GaN) is a third-generation wide bandgap semiconductor material. Due to its large bandgap width, high electron saturation rate, high breakdown electric field, high thermal conductivity, corrosion resistance and radiation resistance, it has strong advantages in high voltage, high frequency, high temperature, high power and radiation resistance environment conditions. It is considered to be the best material for short-wave optoelectronic devices and high voltage, high frequency and high power devices. Therefore, gallium nitride transistors have become a research hotspot in power devices. At present, the methods for preparing ohmic contacts of gallium nitride devices at home and abroad mainly include high temperature annealing, barrier layer thinning, and secondary epitaxial growth of heavily doped GaN ohmic contact layers.

[0003] When high-temperature annealing is used to prepare ohmic contact, the Al in the electrode melts at high temperature, making the electrode surface morphology uneven. High-temperature annealing restricts the flexibility of the process and will also affect subsequent processes. The process control of preparing ohmic contact by thinning the barrier layer is difficult, and etching will cause etching damage to the channel layer GaN. Growing a heavily doped GaN ohmic contact layer through secondary epitaxy requires secondary epitaxy, which is complex and difficult. Summary of the invention

[0004] The purpose of the present invention includes providing a gallium nitride device preparation method and a gallium nitride device, which can form a heavily doped source and drain metal deposition area through ion implantation, which is conducive to forming a low ohmic contact resistance. In addition, the implanted ions are confined to the surface of the barrier layer, reducing the impact on the two-dimensional electron gas transport in the channel.

[0005] The embodiments of the present invention can be implemented as follows:

[0006] In a first aspect, the present invention provides a method for preparing a gallium nitride device, comprising:

[0007] A gallium nitride prefabricated device is provided, wherein the gallium nitride prefabricated device comprises a channel layer and a barrier layer which are stacked;

[0008] Depositing a protective layer on the surface of the barrier layer away from the channel layer;

[0009] Performing photolithography on the protective layer to expose two preset areas, and performing preset ion doping on the two preset areas; forming an isolation area in the non-active areas of the barrier layer and the channel layer;

[0010] The source and drain of the device are respectively formed on the two preset regions; and a gate is formed on the barrier layer.

[0011] In an optional embodiment, the gallium nitride prefabricated device further includes a P-type gallium nitride layer;

[0012] Before depositing the protective layer, the method further includes leaving a desired P-type gallium nitride shape on the P-type gallium nitride layer through photolithography and etching;

[0013] The protection layer covers the side of the P-type gallium nitride layer away from the barrier layer, the gate is arranged on the side of the P-type gallium nitride layer away from the barrier layer, and the two preset areas are located on both sides of the P-type gallium nitride layer.

[0014] In an optional embodiment, performing predetermined ion doping on two predetermined regions and forming a source and a drain of a device in the two predetermined regions includes:

[0015] Implanting predetermined ions into two predetermined regions for N-type heavy doping;

[0016] Performing metal deposition on the two preset areas, and forming a first metal layer and a second metal layer on the two preset areas respectively;

[0017] The first metal layer and the second metal layer are etched by photolithography and etching processes to form a source electrode and a drain electrode respectively.

[0018] In an optional embodiment, before metal deposition is performed on the two preset areas, the method further includes:

[0019] The preset area is annealed in a preset temperature range, and the preset temperature range is between 900° C. and 1200° C.

[0020] In an optional implementation, implanting predetermined ions into two predetermined regions for N-type heavy doping includes:

[0021] Multiple injections in the preset area, 10~40KeV / @2E14~16cm -2 , 40~80KeV / @4E14~16cm -2 , 80~120KeV / @2E14~16cm -2 , the actual energy is set according to the thickness of the dielectric protection layer.

[0022] In an optional embodiment, forming an isolation region in the inactive region of the barrier layer and the channel layer includes:

[0023] In the inactive area, the conductive two-dimensional electron gas between the barrier layer and the channel layer is destroyed by etching trenches, or the conductive two-dimensional electron gas between the barrier layer and the channel layer is destroyed by ion implantation of N ions or Ar ions, thereby forming an isolation region.

[0024] In an optional embodiment, forming a gate on a P-type gallium nitride layer includes:

[0025] A through hole is opened in the protective layer, wherein the P-type gallium nitride layer is exposed through the through hole;

[0026] Depositing a gate metal layer on the wafer exposing the P-type gallium nitride layer;

[0027] Spin-coat photoresist on the wafer, and expose and develop to reveal the portion outside the gate metal pattern;

[0028] The gate metal layer is etched under the blocking of the photoresist, and the photoresist is removed after the etching is completed to form a gate.

[0029] In an optional embodiment, after forming a gate on the P-type gallium nitride layer, the method further includes:

[0030] A passivation layer is deposited on the surface of the barrier layer, the electrode surface, and the P-type gallium nitride surface away from the channel layer. Through photolithography and etching, the passivation layer covers the top surface of the barrier layer, exposing the source, drain, and gate surfaces.

[0031] In an alternative embodiment, the passivation layer is made of at least one of silicon nitride, aluminum oxide or silicon dioxide.

[0032] In an optional embodiment, the preset ions are silicon ions;

[0033] And / or the protective layer includes a silicon nitride protective layer, and the thickness is set to 20-300 nm.

[0034] In a second aspect, the present invention provides a gallium nitride device, which is manufactured by the gallium nitride device manufacturing method of any one of the aforementioned embodiments, wherein the gallium nitride device comprises a substrate, a buffer layer, a channel layer and a barrier layer stacked in sequence, and the barrier layer has a source electrode, a drain electrode and a gate electrode spaced apart;

[0035] An isolation region is provided in the non-active regions of the channel layer and the barrier layer. The gallium nitride device also includes a stacked protective layer and a passivation layer. The protective layer covers the barrier layer. The protective layer on the side away from the barrier layer is provided with a passivation layer. The upper surfaces of the source, gate and drain are exposed in the passivation layer.

[0036] The embodiment of the present invention provides a method for preparing a gallium nitride device and a gallium nitride device, wherein the gallium nitride device is made by the method for preparing a gallium nitride device, and the method for preparing a gallium nitride device includes providing a gallium nitride prefabricated device, wherein the gallium nitride prefabricated device includes a stacked channel layer, a barrier layer, and a P-type gallium nitride layer; then, on the P-type gallium nitride layer, by photolithography and etching, a required shape of the P-type gallium nitride layer is left; a protective layer is deposited on the surface of the barrier layer and the P-type gallium nitride layer away from the channel layer; photolithography is performed on the protective layer to expose two preset areas, and preset ion doping is performed on the two preset areas, and the two preset areas are located on both sides of the P-type gallium nitride layer; an isolation area is formed in the non-active area of ​​the barrier layer and the channel layer; and the source and drain of the device are respectively formed on the two preset areas. By setting the thickness of the protective layer and the ion implantation energy, the peak value of the implanted ion distribution concentration can be controlled in the surface area of ​​the barrier layer, the contact resistance is reduced, and the implanted ions are inhibited from extending to the channel layer and the area below, reducing the loss to other areas. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0038] Figure 1 A schematic diagram of the structure of a gallium nitride device provided by an embodiment of the present invention;

[0039] Figure 2 A schematic structural diagram of a gallium nitride device provided for an optional embodiment of the present invention;

[0040] Figure 3 One of the schematic diagrams of the gallium nitride device manufacturing process provided by the embodiment of the present invention;

[0041] Figure 4 A second schematic diagram of the gallium nitride device manufacturing process provided by an embodiment of the present invention;

[0042] Figure 5 A third schematic diagram of the gallium nitride device manufacturing process provided by an embodiment of the present invention;

[0043] Figure 6 A fourth schematic diagram of the gallium nitride device manufacturing process provided by an embodiment of the present invention;

[0044] Figure 7 A fifth schematic diagram of the gallium nitride device manufacturing process provided by an embodiment of the present invention;

[0045] Figure 8A sixth schematic diagram of the gallium nitride device manufacturing process provided by an embodiment of the present invention;

[0046] Fig. 9 A flow chart of a method for preparing a gallium nitride device provided by an embodiment of the present invention;

[0047] Fig.10 A flow chart of a method for preparing a gallium nitride device provided in an optional embodiment of the present invention.

[0048] Icons: 1. Substrate; 2. Buffer layer; 3. Channel layer; 4. Barrier layer; 5. Preset area; 6. P-type gallium nitride layer; 7. Protective layer; 8. Gate; 9. Source; 10. Drain; 11. Isolation area; 12. Passivation layer. DETAILED DESCRIPTION

[0049] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0050] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0051] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0052] In the description of the present invention, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. appear to indicate an orientation or position relationship, they are based on the orientation or position relationship shown in the accompanying drawings, or are the orientation or position relationship in which the product of the invention is usually placed when used. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0053] In addition, the terms “first”, “second”, etc., if used, are merely used to distinguish between the descriptions and should not be understood as indicating or implying relative importance.

[0054] It should be noted that, in the absence of conflict, the features in the embodiments of the present invention may be combined with each other.

[0055] It should be noted that when preparing ohmic contact by ion implantation, the distribution depth of the doped ions is mainly proportional to the energy of the implanted ions. The greater the ion energy, the greater the implantation depth of the doped ions. However, this is also accompanied by increased bombardment damage to the material by the implanted ions, and the doped ions are distributed in a Gaussian distribution with high concentration in the middle and low concentration on both sides. Ordinary ion implantation doping methods cannot control the concentration peak of the doped ions to concentrate on the surface, and have limited effect on reducing the ohmic contact resistance. In addition, the implanted ions easily extend to the channel layer and below, causing damage to non-essential implantation areas.

[0056] The following describes in detail a gallium nitride device preparation method provided by an embodiment of the present invention and the corresponding technical effects it brings, in conjunction with the patent drawings.

[0057] Please refer to Figure 1-Figure 10 , a gallium nitride preparation method provided by an embodiment of the present invention includes:

[0058] Please refer to Figure 3-Figure 10 , S100: providing a gallium nitride prefabricated device, the gallium nitride prefabricated device comprising a stacked channel layer 3 and a barrier layer 4, and a P-type gallium nitride layer 6.

[0059] In detail, the gallium nitride prefabricated device also includes a stacked substrate 1 and a buffer layer 2, wherein the buffer layer 2 is located between the substrate 1 and the channel layer 3, that is, the substrate 1, the buffer layer 2, the channel layer 3, and the barrier layer 4 are stacked in sequence.

[0060] S300: depositing a protective layer on the surface of the barrier layer and the P-type gallium nitride layer away from the channel layer, that is, depositing a protective layer 7 on the surface of the barrier layer 4 away from the channel layer 3;

[0061] It should be noted that, in the present embodiment, the protective layer 7 is a silicon nitride protective layer 7 with a thickness of 20 to 300 nm. Of course, in some other embodiments, the protective layer 7 may also be a silicon dioxide protective layer 7 or be made of other insulating materials.

[0062] S400: performing photolithography on the protective layer 7 to expose two preset regions 5, the two preset regions 5 being located on both sides of the P-type gallium nitride layer 6, and performing preset ion doping on the two preset regions 5;

[0063] It can be understood that in an optional embodiment, photolithography is performed on the surface of the protective layer 7 to expose the preset area 5, and the rest is covered by photoresist, and the protective layer 7 is provided on the upper side of the barrier layer 4 away from the channel layer 3.

[0064] Therefore, when the preset ion doping is performed on the two preset areas 5, the photoresist will prevent the doped ions from affecting the area outside the preset area 5, that is, the injected preset ions will only form doping in the preset area 5. In addition, the setting of the thickness of the protective layer 7 and the injection energy will control the peak concentration of the injected ion distribution in the surface area of ​​the barrier layer, and suppress the injection of ions from extending to the channel layer and below, reducing the loss to other areas, and can effectively cause the ohmic metal to tunnel with the two-dimensional electron gas layer to form a low-resistance ohmic contact.

[0065] S500: forming an isolation region 11 in the inactive region of the barrier layer 4 and the channel layer 3;

[0066] It can be understood that by etching the grooves, or by implanting N ions or Ar ions, the conductive two-dimensional electron gas between the barrier layer and the channel layer in the non-active region is destroyed;

[0067] S600: forming a source 9 and a drain 10 of the device respectively on the two preset regions 5;

[0068] It can be understood that the ohmic metal of the source 9 and the drain 10 is prepared on the heavily doped preset region 5 so that the ohmic metal and the two-dimensional electron gas layer undergo tunneling to form a low-resistance ohmic contact.

[0069] Therefore, through the above method, it can be ensured that during doping, the preset ions are concentrated on the surface of the preset area 5 in contact with the source 9 and the drain 10. It is easy to understand that the preset area 5 is an ion doping area and will not affect other areas.

[0070] In detail, performing preset ion doping on the two preset areas 5 and forming the source 9 and the drain 10 on the two preset areas 5 specifically includes: injecting preset ions on the two preset areas 5 for N-type heavy doping, and performing metal deposition on the two preset areas 5, and forming a first metal layer and a second metal layer on the two preset areas 5 respectively, and then etching the first metal layer and the second metal layer by using a photolithography process to form the source 9 and the drain 10 respectively.

[0071] It should be noted that before metal deposition is performed on the two preset areas 5, the two preset areas 5 are also annealed in a preset temperature range, and the preset temperature range is between 900°C and 1200°C. It should be noted that the annealing treatment can effectively activate the doped ions to repair the damage caused during the ion injection process and optimize the electrical performance.

[0072] Optionally, the implantation of the preset ions in the preset region 5 is divided into multiple implantations. It should be noted that multiple low-dose implantations, rather than a one-time high-dose implantation, can reduce damage accumulation while maintaining a higher final doping concentration (for example, the following 10-40 KeV / @2E14-16 cm -2 , 40~80KeV / @4E14~16cm -2 , 80~120KeV / @2E14~16cm -2 It should be noted that the actual energy is set according to the thickness of the dielectric protection layer).

[0073] In this embodiment, the above-mentioned preset ions are silicon ions, that is, silicon ions are implanted into the two preset regions 5 for N-type heavy doping.

[0074] It is understandable that silicon ions, as N-type dopants, will significantly increase the electron concentration in local areas after being injected into semiconductor materials such as GaN. High doping concentration brings the Fermi level closer to the bottom of the conduction band, thereby reducing the Schottky barrier height, and through heavy doping, the difference in barrier height between metal and semiconductor can be reduced, allowing more free electrons to migrate from semiconductors to metals, forming low-resistance ohmic contacts. In addition, high-concentration silicon ion doping can provide better stability during high-temperature annealing, prevent doped atoms from diffusing or escaping, and maintain good electrical properties.

[0075] It should be noted that heavy doping also helps to form a more uniform and smooth metal-semiconductor interface, reducing interface defects and roughness and improving contact quality.

[0076] S700: A gate 8 is formed on the barrier layer 4

[0077] In detail, in some optional embodiments, the gallium nitride prefabricated device further includes a P-type gallium nitride layer 6, that is, the substrate 1, the buffer layer 2, the channel layer 3, the barrier layer 4 and the P-type gallium nitride layer 6 are stacked in sequence.

[0078] Before depositing the protective layer 7 , the process further includes S200 : on the P-type gallium nitride layer, photolithography and etching are performed to leave the required shape of the P-type gallium nitride layer 6 .

[0079] Among them, the protective layer 7 covers the side of the P-type gallium nitride layer 6 away from the barrier layer 4, and the gate is arranged on the side of the P-type gallium nitride layer 6 away from the barrier layer 4. That is to say, in this embodiment, the gate 8 is directly arranged on the P-type gallium nitride layer 6, and the two preset areas 5 are located on both sides of the P-type gallium nitride layer 6.

[0080] In detail, first, a through hole is opened in the protective layer 7 to expose the P-type gallium nitride layer 6, and a gate 8 metal layer is deposited on the wafer with the P-type gallium nitride layer 6 exposed, and then a photoresist is applied on a partial area of ​​the gate 8 metal layer. In detail, the photoresist is spin-coated on the wafer, and an unexpected part of the gate 8 metal pattern is exposed by exposure and development. The gate 8 metal layer is etched under the blocking of the photoresist, and the photoresist is removed after the etching is completed to form a gate electrode.

[0081] In this embodiment, after the gate 8 is formed on the P-type gallium nitride layer 6, the method for preparing a gallium nitride device further includes: depositing a passivation layer 12 on the surface of the barrier layer 4, the electrode surface, and the P-type gallium nitride surface away from the channel layer 3, and through photolithography and etching, the passivation layer 12 covers the top surface of the barrier layer 4, exposing the source 9, the drain 10, and the gate 8 surface. That is, the passivation layer 12 is deposited on the side of the barrier layer 4 away from the channel layer 3, the passivation layer 12 covers the top surface of the barrier layer 4, exposing the top surfaces of the source 9 and the drain 10, and the top surface of the gate 8 exposes the passivation layer 12.

[0082] It should be noted that the material of the passivation layer 12 may include but is not limited to silicon nitride, silicon dioxide, aluminum oxide or other materials with insulating properties. It can be understood that by setting the passivation layer 12, the surface of the silicon nitride device can be passivated, and the source 9, the drain 10 and the gate 8 can be isolated, thereby reducing the surface resistance trap density of the gallium nitride device to inhibit current collapse.

[0083] Please refer to Figure 1-Figure 2 The embodiment of the present invention further provides a gallium nitride device, which is made by the above-mentioned gallium nitride device preparation method. The gallium nitride device includes a substrate 1, a buffer layer 2, a channel layer 3, and a barrier layer 4 which are stacked in sequence. The barrier layer 4 is provided with a source 9, a drain 10 and a gate 8 which are spaced apart. The channel layer 3 and the barrier layer 4 are both provided with an isolation region 11 in the inactive regions. The gallium nitride device also includes a protective layer 7 and a passivation layer 12 which are stacked. The protective layer 7 covers the barrier layer 4. The protective layer 7 on the side away from the barrier layer 4 is provided with the passivation layer 12. That is, the side of the protective layer 7 away from the barrier layer 4 is provided with the passivation layer 12, and the upper surfaces of the source 9, the gate 8 and the drain 10 are exposed from the passivation layer 12.

[0084] Optionally, in some embodiments, the gallium nitride device further includes a P-type gallium nitride layer 6. Specifically, the substrate 1, the buffer layer 2, the channel layer 3, the barrier layer 4 and the P-type gallium nitride layer 6 are stacked in sequence, wherein the gate 8 is arranged on a side of the P-type gallium nitride layer 6 away from the barrier layer 4.

[0085] It should be noted that in this embodiment, the buffer layer 2 is undoped or lightly doped AlN or AlGaN, etc. The buffer layer 2 is a transition layer that can alleviate lattice mismatch and thermal mismatch and provide a high-quality growth foundation for the subsequently grown channel layer 3 and barrier layer 4.

[0086] The channel layer 3 may be undoped or lightly doped GaN, which mainly provides a high-mobility two-dimensional electron gas (2DEG) channel to ensure efficient current transmission. The barrier layer 4 is an AlGaN barrier layer 4 .

[0087] In summary, an embodiment of the present invention provides a gallium nitride device preparation method and a gallium nitride device, wherein the gallium nitride device is made by the gallium nitride device preparation method, and the gallium nitride device preparation method comprises providing a gallium nitride prefabricated device, wherein the gallium nitride prefabricated device comprises a stacked channel layer 3, a barrier layer 4 and a P-type gallium nitride layer 6; then, on the P-type gallium nitride layer 6, by photolithography and etching, a required P-type gallium nitride shape is left, and a protective layer 7 is deposited on the surface of the barrier layer 4 and the P-type gallium nitride layer 6 away from the channel layer 3; photolithography is performed on the protective layer 7 to expose two preset areas 5, and preset ion doping is performed on the two preset areas 5, and the two preset areas 5 are located on both sides of the P-type gallium nitride layer 6; an isolation region 11 is formed in the non-active area of ​​the barrier layer 4 and the channel layer 3; and a device source 9 and a drain 10 are formed on the two preset areas 5, respectively. By setting the thickness of the protective layer 7 and the energy of the injected ions in the preset area 5, the peak concentration of the injected ions can be controlled on the surface of the barrier layer 4, reducing the contact resistance, and suppressing the injection of ions from extending to the channel layer 3 and below, reducing the loss to other areas.

[0088] The above description is only a specific implementation mode of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a technician familiar with the technical field within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention.

Claims

1. A method for preparing a gallium nitride device, characterized in that: include: A gallium nitride prefabricated device is provided, wherein the gallium nitride prefabricated device comprises a channel layer and a barrier layer which are stacked; Depositing a protective layer on the surface of the barrier layer away from the channel layer; Performing photolithography on the protective layer to expose two preset areas, and performing preset ion doping on the two preset areas; forming an isolation region in the barrier layer and the inactive region of the channel layer; Forming a source and a drain of the device respectively on the two preset areas; A gate is formed on the barrier layer.

2. The method for preparing a gallium nitride device according to claim 1, characterized in that: The gallium nitride prefabricated device also includes a P-type gallium nitride layer; Before depositing the protective layer, the method further includes, in the P-type gallium nitride layer, leaving a desired P-type gallium nitride shape by photolithography and etching; The protection layer covers a side of the P-type gallium nitride layer away from the barrier layer, the gate is arranged on a side of the P-type gallium nitride layer away from the barrier layer, and the two preset areas are located on both sides of the P-type gallium nitride layer.

3. The method for preparing a gallium nitride device according to claim 1, characterized in that: Performing preset ion doping on the two preset regions and forming a source and a drain of a device in the two preset regions comprises: Implanting the preset ions into the two preset regions for N-type heavy doping; Performing metal deposition on the two preset areas, and forming a first metal layer and a second metal layer on the two preset areas respectively; The first metal layer and the second metal layer are etched by photolithography and etching processes to form a source electrode and a drain electrode respectively.

4. The method for preparing a gallium nitride device according to claim 3, characterized in that: Before depositing metal on the two preset areas, the method further includes: The preset area is subjected to annealing treatment in a preset temperature range, and the preset temperature range is between 900° C. and 1200° C.

5. The method for preparing a gallium nitride device according to claim 3, characterized in that: The step of implanting the preset ions into the two preset regions for N-type heavy doping includes: Multiple injections are made on the preset area, 10~40KeV / @2E14~16cm -2 , 40~80KeV / @4E14~16cm -2 , 80~120KeV / @2E14~16cm -2 , the actual energy is set according to the thickness of the dielectric protection layer.

6. The method for preparing a gallium nitride device according to claim 2, characterized in that: The forming of a gate on the P-type gallium nitride layer comprises: A through hole is formed in the protective layer, wherein the through hole exposes the P-type gallium nitride layer; Depositing a gate metal layer on the wafer of the exposed P-type gallium nitride layer; Spin-coating photoresist on the wafer, exposing and developing to expose the portion outside the gate metal pattern; The gate metal layer is etched under the blocking of the photoresist, and the photoresist is removed after the etching is completed to form a gate.

7. The method for preparing a gallium nitride device according to claim 2, characterized in that: After forming a gate on the P-type gallium nitride layer, the method further includes: A passivation layer is deposited on the surface of the barrier layer, the electrode surface, and the P-type gallium nitride surface away from the channel layer. Through photolithography and etching, the passivation layer covers the top surface of the barrier layer, exposing the source, drain, and gate surfaces.

8. The method for preparing a gallium nitride device according to claim 7, characterized in that: The passivation layer is made of at least one of silicon nitride, aluminum oxide or silicon dioxide.

9. The method for preparing a gallium nitride device according to claim 1, characterized in that: The preset ions are silicon ions; And / or the protective layer includes a silicon nitride protective layer with a thickness of 20 to 300 nm.

10. A gallium nitride device, characterized in that: The gallium nitride device is made by the method for preparing the gallium nitride device according to any one of claims 1 to 9, wherein the gallium nitride device comprises a substrate, a buffer layer, a channel layer and a barrier layer stacked in sequence, and the barrier layer has a source electrode, a drain electrode and a gate electrode spaced apart; The isolation region is provided in the inactive regions of the channel layer and the barrier layer. The gallium nitride device further comprises a protective layer and a passivation layer which are stacked. The protective layer covers the barrier layer. The passivation layer is provided on the protective layer away from the barrier layer. The upper surfaces of the source, the gate and the drain are exposed from the passivation layer.

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