An infrared detection chip of a phase-transition-regulated van der Waals junction transistor, a preparation method thereof, and an application thereof

Abstract

The present invention relates to an infrared detection chip of a phase change-regulated van der Waals junction transistor, a preparation method thereof, and an application thereof. The unit structure of the infrared detection chip of the van der Waals junction transistor includes a two-dimensional material layer, a metal electrode, a vanadium dioxide micro-nano structure, an electrical channel, and a CMOS readout circuit from top to bottom; the metal electrode includes a metal gate, an auxiliary electrode, a metal source, and a metal drain; both ends of the vanadium dioxide micro-nano structure are respectively connected to the metal gate and the auxiliary electrode, and both ends of the two-dimensional material layer are respectively connected to the metal source and the metal drain; the electrical channel is connected to the metal electrode and the CMOS readout circuit on the substrate. The infrared detection chip prepared by the present invention significantly improves the response speed of the device, broadens the response range, realizes ultra-sensitive detection, and can realize a self-powered infrared detection chip, which is of great significance for reducing the power consumption and cost of the device.

Description

Technical Field

[0001] The present invention belongs to the field of optoelectronic infrared detection of semiconductor devices, and particularly relates to a phase-change-regulated van der Waals junction transistor infrared detection chip, a preparation method thereof, and an application thereof. Background Art

[0002] Infrared detection technology is widely used in the military field and the national economy. It can ensure stable observation effects under harsh meteorological conditions and occupies a key core position in fields such as aerospace, optical communication, industrial control, and near-infrared imaging. Traditional infrared detection devices are difficult to further optimize in terms of performance indicators such as responsivity, response speed, and detection wavelength, and there are problems such as the need for cryogenic cooling, large volume and difficulty in achieving integration, and high cost. Therefore, it is necessary to use new principles and technologies to develop high-performance infrared detectors and chips.

[0003] Two-dimensional materials, due to their ultrathin materials with only atomic layer thickness and no dangling bonds, have unique optical and electrical properties and have broad application prospects in the fields of electronics and optoelectronics. In particular, it is expected to achieve room-temperature infrared detection, which will significantly reduce the complexity and cost of optoelectronic detection systems. In addition, two-dimensional materials have the characteristic of high carrier mobility, which enables photo-generated carriers to be quickly transported and collected inside the material, and is expected to improve performance parameters such as the response speed and sensitivity of optoelectronic detectors. The optoelectronic properties of two-dimensional materials can also be tuned in various ways, providing the possibility for realizing wide-spectrum detection. Although two-dimensional materials have excellent optoelectronic properties, there are still some bottleneck problems in the process of practical application. At the contact interface between two-dimensional materials and other materials, due to charge trapping caused by surface states, a part of photo-generated carriers are trapped by trap states, thereby reducing the carrier collection efficiency. This will not only lead to an increase in the power consumption of the device, but also make the response time of the detector longer, limiting the fast response ability of the optoelectronic detector. For some common two-dimensional materials, such as molybdenum disulfide, their intrinsic band gaps enable them to have good optoelectronic properties in the visible or near-infrared band, but they cannot respond in the mid-infrared and far-infrared bands. It is necessary to regulate the band gap of the material through complex band engineering and other means, but these methods often have certain technical difficulties and limitations, restricting the wide application of two-dimensional materials in the field of infrared optoelectronic detection. Summary of the Invention

[0004] The purpose of the present invention is to provide a phase-change-regulated van der Waals junction transistor infrared detection chip, a preparation method thereof, and an application thereof, so as to solve the problems of low responsivity and detectivity, long response time, and the need for cryogenic cooling operation existing in existing infrared detectors.

[0005] The present invention provides an infrared detection chip of a phase change-regulated van der Waals junction transistor. Its unit structure from top to bottom includes a two-dimensional material layer, a metal electrode, a vanadium dioxide micro-nano structure, an electrical channel, and a CMOS (Complementary Metal-Oxide-Semiconductor) readout circuit; the metal electrode includes a metal gate, an auxiliary electrode, a metal source, and a metal drain; both ends of the vanadium dioxide micro-nano structure are respectively connected to the metal gate and the auxiliary electrode, and both ends of the two-dimensional material layer are respectively connected to the metal source and the metal drain; the electrical channel is connected to the metal electrode and the CMOS readout circuit on the substrate.

[0006] Preferably, the material of the two-dimensional material layer includes any one of an n-type semiconductor or a p-type semiconductor, its thickness ranges from 0.3 to 100 nm, its length ranges from 1 to 500 μm, and its width ranges from 100 nm to 20 μm; the preparation method of the two-dimensional material layer includes any one of mechanical exfoliation method, chemical vapor deposition method, liquid-phase exfoliation method, or molecular beam epitaxy method.

[0007] More preferably, the n-type semiconductor includes any one of molybdenum disulfide (MoS2), platinum selenide (PtSe2), tungsten diselenide (WSe2), tin disulfide (SnS2), indium selenide (InSe), tungsten disulfide (WS2), molybdenum ditelluride (MoTe2), tin diselenide (SnSe2), zinc oxide (ZnO), gallium arsenide (GaAs); the p-type semiconductor includes any one of black phosphorus (BP), tellurium (Te), germanium selenide (GeSe), tungsten selenide (WSe2), gallium selenide (GaSe), gallium arsenide (GaAs).

[0008] Preferably, the thickness ranges of the metal electrodes are all from 50 to 200 nm, the length ranges are all from 50 to 5000 μm, and the width ranges are all from 100 nm to 50 μm.

[0009] Preferably, the materials of the metal gate and the auxiliary electrode include one or several of gold, silver, copper, and chromium; the materials of the metal source and the metal drain are selected based on the material of the two-dimensional material layer. When the two-dimensional material layer is an n-type semiconductor, the metal source and the metal drain are low work function metals, including one or several of aluminum, titanium, and scandium; when the two-dimensional material layer is a p-type semiconductor, the metal source and the metal drain are high work function metals, including one or several of gold, silver, platinum, and nickel.

[0010] Preferably, the material of the vanadium dioxide micro-nano structure is vanadium dioxide, its shape is rectangular, its length ranges from 1 to 500 μm, and its width ranges from 100 nm to 20 μm.

[0011] Preferably, the CMOS readout circuit is etched in the substrate, which acquires the output signal of the detector and converts it into an electrical signal for subsequent processing; the substrate is connected to the electron transport track in the two-dimensional material layer through an electrical channel to achieve signal and energy transmission; the material of the substrate includes any one of Si, sapphire, polyethylene terephthalate (PET), or polyimide (PI); the material of the electrical channel includes any one of indium, gold, silver, or aluminum.

[0012] The present invention provides an application of the above phase-change regulated van der Waals junction transistor infrared detection chip in the field of optoelectronic detection.

[0013] The present invention also provides a preparation method of the above phase-change regulated van der Waals junction transistor infrared detection chip, including the following steps:

[0014] S1: Prepare a substrate;

[0015] S2: Etch a CMOS readout circuit on the substrate;

[0016] S3: Prepare a vanadium dioxide micro-nano structure on the substrate;

[0017] S4: Photolithograph a metal electrode pattern on the substrate where the vanadium dioxide micro-nano structure is prepared, prepare the metal electrode and strip it, so that both ends of the vanadium dioxide micro-nano structure are connected to the metal gate and the auxiliary electrode respectively, and at the same time prepare the metal source and the metal drain;

[0018] S5: Prepare a two-dimensional material layer and transfer it above the vanadium dioxide micro-nano structure to form a heterojunction, so that both ends of the two-dimensional material layer are in contact with the metal source and the metal drain respectively;

[0019] S6: Photolithograph and pattern on the substrate, and then deposit metal as the electrical channel.

[0020] Preferably, when fabricating the CMOS readout circuit on a rigid substrate (Si or sapphire) in step S2, traditional CMOS integrated circuit manufacturing processes are used, and when fabricating the CMOS readout circuit on a flexible substrate (PET or PI), printed electronics processes are used; in step S3, the preparation method of the vanadium dioxide micro-nano structure includes top-down methods or bottom-up methods; among them, the top-down method is to prepare a vanadium dioxide thin film on a substrate and then obtain the vanadium dioxide micro-nano structure through photolithography and etching, including but not limited to any one of magnetron sputtering or laser pulse deposition; the bottom-up method is to directly grow the vanadium dioxide micro-nano structure, including but not limited to any one of hydrothermal methods or chemical vapor deposition; in step S4, the photolithography method includes but not limited to any one of ultraviolet lithography or electron beam lithography; the preparation process of the metal electrode includes any one of electron beam evaporation, magnetron sputtering, or thermal evaporation; in step S5, the preparation method of the two-dimensional material layer includes but not limited to any one of mechanical exfoliation, liquid-phase exfoliation, or chemical vapor deposition, and its transfer method includes but not limited to any one of dry transfer or wet transfer using a viscoelastic polydimethylsiloxane (PDMS) polymer film.

[0021] More preferably, the mechanical exfoliation method mainly uses tape to repeatedly exfoliate bulk materials into thin layers, and the exfoliated thin-layer materials can be directly transferred onto the target substrate and directly contacted with the metal to construct specific devices.

[0022] Transistors based on hybrid heterojunctions composed of two-dimensional materials and phase-change vanadium dioxide materials have characteristics such as low subthreshold swing and high carrier mobility, and can achieve fast and ultrasensitive responses in the subthreshold region of the device. When an external source-drain bias is applied, an internal built-in electric field is formed due to band bending at the heterojunction interface. By applying a certain negative gate voltage, the two-dimensional material channel can be pinched off, and the device is in the off state. When infrared light irradiates the surface of the device, due to the photothermal-electric effect, VO2 changes from a semiconductor property to a metal property, thereby regulating the depletion region in the two-dimensional material channel, and the device changes from the off state to the on state. Therefore, sensitive response to room-temperature infrared light can be achieved according to the change of the source-drain current, with the advantage of high signal-to-noise ratio, and the light response speed of the device is determined by the switching speed of the transistor, achieving a fast response. When no bias is applied, due to the built-in electric field at the interface between the two ends of the two-dimensional material and the phase-change material, self-powered response can also be achieved. By arraying the above unit devices and connecting the readout circuit, an infrared imaging function can be realized.

[0023] Beneficial effects

[0024] (1) A novel dielectric - layer - free transistor structure composed of a phase - change material and a two - dimensional semiconductor material proposed by the present invention solves the problem of slow response speed (in the order of milliseconds to seconds) caused by interface charge traps. The response time of the device is no longer determined by the lifetime of photo - generated carriers, but depends on the switching speed of the device (in the order of nanoseconds to microseconds). This junction transistor has an extremely fast switching speed due to its excellent sub - threshold swing, so it can significantly improve the response speed of the device. Moreover, the device has the advantage of low dark current in the sub - threshold region, achieving ultrasensitive detection and solving the contradiction problem between device responsivity and response speed that cannot be solved by the metal - oxide field - effect transistor structure in the prior art.

[0025] (2) The response wavelength of two - dimensional material photon detectors is limited by the bandgap. Especially for semiconductors with a relatively large intrinsic bandgap, infrared light detection cannot be achieved. Although vanadium dioxide can be used for infrared detection, its response mechanism is a thermal effect, so the response time is in the order of milliseconds to seconds. The present invention proposes to perform infrared detection by regulating the built - in electric field of the hybrid heterojunction. This new response mechanism breaks through the limitation of the semiconductor bandgap of traditional photon detectors, broadens the response range, and is expected to achieve effective resolution of wavelength and optical power by forming type - II contacts and Schottky contacts between VO2 and two - dimensional materials before and after phase change, respectively.

[0026] (3) The junction field - effect transistor proposed by the present invention has the advantage of low power consumption. In the sub - threshold region, only a very small gate voltage is required to cut off the device. Moreover, by utilizing the built - in electric field at the interface between vanadium dioxide and two - dimensional materials, the detector can operate at zero bias voltage, that is, a self - powered infrared detection chip is realized, which is of great significance for reducing device power consumption and cost. Description of the Drawings

[0027] Figure 1 is the front view of the infrared detection chip structure of the van der Waals junction transistor with phase - change regulation of the present invention.

[0028] Figure 2 is the side view of the unit structure of the infrared detection chip of the van der Waals junction transistor with phase - change regulation of the present invention.

[0029] Figure 3 is the simulation diagram of changing the gate voltage of the infrared detection chip of the van der Waals junction transistor with phase - change regulation of the present invention.

[0030] Figure 4 is the photocurrent diagram of the infrared detection chip of the van der Waals junction transistor with phase - change regulation of the present invention under dark and light conditions (V DS = 1V).

[0031] Figure 5 is the response time diagram of the infrared detection chip of the van der Waals junction transistor with phase - change regulation of the present invention.

[0032] Reference numerals: 1 - two - dimensional material layer, 21 - metal gate, 22 - auxiliary electrode, 23 - metal source electrode, 24 - metal drain electrode, 3 - vanadium dioxide micro - nano structure, 4 - electrical channel, 5 - CMOS read - out circuit. Specific embodiments

[0033] The present invention will be further described below in conjunction with specific embodiments. It should be understood that these embodiments are only used to illustrate the present invention and not to limit the scope of the present invention. In addition, it should be understood that after reading the content taught by the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms also fall within the scope defined by the appended claims of this application.

[0034] Embodiment

[0035] This embodiment provides a phase - change - regulated van der Waals junction transistor infrared detection chip. As shown in FIGS. Figure 1 、 Figure 2 The unit structure of the van der Waals junction transistor infrared detection chip includes, from top to bottom, a two - dimensional material layer 1, a metal electrode, a vanadium dioxide micro - nano structure 3, an electrical channel 4, and a CMOS read - out circuit 5; the metal electrode includes a metal gate 21, an auxiliary electrode 22, a metal source electrode 23, and a metal drain electrode 24; both ends of the vanadium dioxide micro - nano structure 3 are respectively connected to the metal gate 21 and the auxiliary electrode 22, both ends of the two - dimensional material layer 1 are respectively connected to the metal source electrode 23 and the metal drain electrode 24; the electrical channel 4 is connected to the metal electrode and the CMOS read - out circuit 5 on the substrate.

[0036] The preparation method of the above - mentioned phase - change - regulated van der Waals junction transistor infrared detection chip includes the following steps:

[0037] S1: Prepare the substrate: Use acetone and isopropyl alcohol solutions to ultrasonically clean the silicon wafer with a 300 - nm oxide layer for 15 minutes in sequence, and then dry it with an inert gas such as nitrogen.

[0038] S2: Pattern the CMOS read - out circuit 5 on the substrate: Form the circuit on the silicon wafer by oxidation, photolithography, etching, and ion implantation in sequence.

[0039] S3: Prepare the vanadium dioxide micro - nano structure 3 on the substrate by ultraviolet photolithography, magnetron sputtering, and thermal oxidation in sequence.

[0040] S4: Prepare a metal electrode pattern on the substrate by ultraviolet lithography with a channel width of 5 μm. Then deposit the metal electrode by electron beam evaporation. The electrode consists of 5 nm of chromium and 70 nm of gold (chromium serves as an adhesion layer to prevent the gold from peeling off). Finally, use acetone to lift off the excess photoresist to achieve the connection of both ends of the vanadium dioxide micro-nano structure 3 to the metal gate 21 and the auxiliary electrode 22 respectively; at the same time, prepare a 70 nm titanium metal electrode as the metal source electrode 23 and the metal drain electrode 24;

[0041] S5: Select molybdenum disulfide material for the two-dimensional material layer 1 and prepare it by the mechanical exfoliation method: repeatedly exfoliate the molybdenum disulfide crystal material with 3M tape, and select a suitable size of few-layer molybdenum disulfide material through an optical microscope; transfer the molybdenum disulfide to above the vanadium dioxide micro-nano structure 3 by PDMS dry transfer to form a heterojunction at the junction. Both ends of the molybdenum disulfide two-dimensional material layer 1 are in contact with the metal source electrode 23 and the metal drain electrode 24 respectively;

[0042] S6: Pattern the substrate by lithography, and then deposit indium metal as the electrical channel 4 to connect the metal electrode and the CMOS readout circuit 5.

[0043] When no current is applied, vanadium dioxide is in the semiconductor state. At this time, the electron-hole pairs generated by photoexciting vanadium dioxide are effectively separated under the action of the built-in electric field formed with molybdenum disulfide. And under the regulation of vanadium dioxide, by changing the length of the depletion layer in the molybdenum disulfide channel to regulate the conductivity of molybdenum disulfide, so that its threshold voltage undergoes a lateral shift. The smaller the incident light power, the greater the responsivity. The responsivity can reach 10 3 A / W during operation, indicating that the device can perform ultrasensitive detection of near-infrared light. When vanadium dioxide changes from the semiconductor state to the metal state, the electro-driven phase change response time is in the microsecond to millisecond range. Compared with two-dimensional material photodetectors with a response time usually in the second range, the response speed can be increased by more than three orders of magnitude.

[0044] Set the corresponding parameters in the TCAD simulation software and simulate the above transistor structure. From Figure 3 the simulation results, it can be seen that when the heterojunction is not formed, the electron concentration in the MOS2 channel is determined by the semiconductor doping concentration, which is specified as 10 18 cm -3 , as a PN junction is formed between the contact interfaces of VO2 and MOS2, when the gate voltage (V G ) applied between the VO2 gate and the source is equal to 0V, due to the band bending, a depletion layer with a certain width is formed. Although this causes the channel electron concentration to decrease, the device is still in the conducting state; when V GWhen it is less than 0, it will reverse-bias the PN junction between the gate and the channel. According to the characteristics of the PN junction, the reverse-bias voltage will cause the depletion layer to become wider, and the further decrease in the electron concentration in the MoS2 channel results in a decrease in conductivity; when the absolute value of the negative voltage applied to the gate continues to increase, the depletion layer will become wider and the conductive channel will become narrower. As can be seen from the figure, when V G decreases to -0.7 V, the depletion layer almost occupies the conductive channel, and the electron concentration reaches the minimum corresponding to the cut-off state, at which time the channel current is almost zero. Therefore, the electron concentration and the width of the depletion layer in the channel can be controlled by changing the gate voltage, thereby controlling the current magnitude and realizing the characteristics of controlling the transistor switch.

[0045] Figure 4 is the photocurrent diagram of the device under dark and light conditions when the drain-source voltage V DS = 1 V. As can be seen from the figure, the device exhibits a very low subthreshold swing, a very low threshold voltage, and a switching ratio that can reach nearly four orders of magnitude. There is an obvious increase in photocurrent under light illumination. The device has the advantages of low dark current, a large switching ratio, and high sensitivity in the subthreshold region.

[0046] Figure 5 is the light response time diagram of the above phase-change-regulated van der Waals junction transistor infrared detection chip. The rise time is the time when the normalized photocurrent increases from 10% to 90%, and the fall time is the time when the normalized photocurrent decreases from 90% to 10%. As can be seen from the figure, the device has a response speed in the microsecond range (7 μs, 10 μs).

Claims

1. A van der Waals junction transistor infrared detection chip with phase change regulation, characterized in that, The unit structure of the van der Waals junction transistor infrared detection chip includes a two-dimensional material layer (1), metal electrodes, a vanadium dioxide micro-nano structure (3), an electrical channel (4), and a CMOS readout circuit (5) from top to bottom; the metal electrodes include a metal gate (21), an auxiliary electrode (22), a metal source (23), and a metal drain (24); both ends of the vanadium dioxide micro-nano structure (3) are respectively connected to the metal gate (21) and the auxiliary electrode (22), and both ends of the two-dimensional material layer (1) are respectively connected to the metal source (23) and the metal drain (24); a heterojunction is formed between the two-dimensional material layer (1) and the vanadium dioxide micro-nano structure (3); the electrical channel (4) is connected to the metal electrodes and the CMOS readout circuit (5) on the substrate; The material of the two-dimensional material layer (1) includes any one of n-type semiconductors or p-type semiconductors, where the n-type semiconductors include any one of molybdenum disulfide, platinum selenide, tungsten diselenide, tin disulfide, indium selenide, tungsten disulfide, molybdenum ditelluride, tin diselenide, zinc oxide, gallium arsenide; the p-type semiconductors include any one of black phosphorus, tellurium, germanium selenide, tungsten selenide, gallium selenide, gallium arsenide; The material selection of the metal source (23) and the metal drain (24) is based on the material of the two-dimensional material layer (1). When the two-dimensional material layer (1) is an n-type semiconductor, the metal source (23) and the metal drain (24) are low work function metals, including one or several of aluminum, titanium, and scandium; when the two-dimensional material layer (1) is a p-type semiconductor, the metal source (23) and the metal drain (24) are high work function metals, including one or several of gold, silver, platinum, and nickel.

2. The infrared detection chip of the phase change-regulated van der Waals junction transistor according to claim 1, wherein The thickness range of the two-dimensional material layer (1) is 0.3 - 100 nm, the length range is 1 - 500 μm, and the width range is 100 nm - 20 μm; the preparation method of the two-dimensional material layer (1) includes any one of mechanical exfoliation method, chemical vapor deposition method, liquid phase exfoliation method, or molecular beam epitaxy method.

3. The phase-change-regulated van der Waals junction transistor infrared detection chip according to claim 1, wherein, The thickness range of the metal electrodes is 50 - 200 nm, the length range is 50 - 5000 μm, and the width range is 100 nm - 50 μm.

4. The infrared detection chip of the phase change-regulated van der Waals junction transistor according to claim 1, wherein The materials of the metal gate (21) and the auxiliary electrode (22) include one or several of gold, silver, copper, and chromium.

5. The infrared detection chip of the phase change-regulated van der Waals junction transistor according to claim 1, wherein The material of the vanadium dioxide micro-nano structure (3) is vanadium dioxide, and its shape is rectangular, with a length range of 1 - 500 μm and a width range of 100 nm - 20 μm.

6. The infrared detection chip of the phase change-regulated van der Waals junction transistor according to claim 1, wherein The CMOS readout circuit (5) is etched in the substrate, which acquires the detector output signal and converts it into an electrical signal for subsequent processing; the substrate is connected to the electron transport orbit in the two-dimensional material layer (1) through the electrical channel (4) to achieve signal and energy transmission; the material of the substrate includes any one of Si, sapphire, polyethylene terephthalate, or polyimide; the material of the electrical channel (4) includes any one of indium, gold, silver, or aluminum.

7. Application of the phase change regulated van der Waals junction transistor infrared detection chip according to any one of claims 1 - 6 in the field of optoelectronic detection.

8. A preparation method of an infrared detection chip of a phase change-regulated van der Waals junction transistor as described in any one of claims 1-6, comprising the following steps: S1: Prepare a substrate; S2: Etch a CMOS readout circuit (5) on the substrate; S3: Prepare a vanadium dioxide micro-nano structure (3) on the substrate; S4: Photolithograph a metal electrode pattern on the substrate on which the vanadium dioxide micro-nano structure (3) has been prepared, prepare the metal electrode and strip it, so that the two ends of the vanadium dioxide micro-nano structure (3) are respectively connected to a metal gate (21) and an auxiliary electrode (22), and at the same time prepare a metal source electrode (23) and a metal drain electrode (24); S5: Prepare a two-dimensional material layer (1) and transfer it above the vanadium dioxide micro-nano structure (3) to form a heterojunction, so that the two ends of the two-dimensional material layer (1) are respectively in contact with the metal source electrode (23) and the metal drain electrode (24); S6: Photolithograph and pattern on the substrate, and then deposit a metal as an electrical channel (4).

9. The method for preparing the infrared detection chip of the phase change regulated van der Waals junction transistor according to claim 8, wherein When etching the CMOS readout circuit (5) on the rigid substrate in step S2, a traditional CMOS integrated circuit manufacturing process is adopted; when etching the CMOS readout circuit (5) on the flexible substrate, a printed electronics process is adopted; the preparation method of the vanadium dioxide micro-nano structure (3) in step S3 includes a top-down method or a bottom-up method; Wherein the top-down method is to prepare a vanadium dioxide thin film on the substrate and then obtain the vanadium dioxide micro-nano structure (3) through photolithography and etching, including any one of magnetron sputtering method or laser pulse deposition method; the bottom-up method is to directly grow the vanadium dioxide micro-nano structure (3), including any one of hydrothermal method or chemical vapor deposition method; the photolithography method in step S4 includes any one of ultraviolet photolithography or electron beam lithography; the preparation process of the metal electrode includes any one of electron beam evaporation, magnetron sputtering or thermal evaporation; the preparation method of the two-dimensional material layer (1) in step S5 includes any one of mechanical exfoliation method, liquid phase exfoliation method, chemical vapor deposition method, and its transfer method includes any one of dry transfer or wet transfer by using a viscoelastic polydimethylsiloxane polymer film.

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