MEMS device packaging method and MEMS chip unit

Abstract

The invention provides a packaging method of an MEMS device and an MEMS chip unit. The packaging method comprises the following steps: manufacturing a substrate wafer, a glass sealing cover wafer and a silicon wafer through an etching process; bonding the glass cover wafer and the silicon wafer according to the second alignment mark and the third alignment mark to form a cover wafer; constructing a through hole structure and a silicon bonding ring of the cap wafer; manufacturing a metal intermediate layer on the surface of the silicon bonding ring; according to the first alignment mark and the second alignment mark, the cap wafer and the base wafer are bonded through the metal middle layer, and a packaging wafer with a vacuum airtight cavity is formed; performing wafer division on the packaging wafer along the first scribing groove and the second scribing groove to obtain MEMS chip units; the bonding quality and strength of the MEMS device are improved, the technological process is simplified, and the packaging reliability and the performance stability of the MEMS device are enhanced.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of chip packaging, and in particular to a packaging method for a MEMS device and a MEMS chip unit. Background Art

[0002] At present, the packaging technology of MicroElectroMechanical Systems (MEMS) devices is mainly divided into chip-level packaging and wafer-level packaging. Among them, although the wafer-level packaging technology has small packaging size, high transmission speed, high connection density, and can achieve rapid mass production to reduce production costs, its manufacturing process is complex and has high requirements for equipment and technology. The yield problem, dicing efficiency and finished product rate, poor maintainability, and technical maturity and compatibility are also problems existing in the wafer-level packaging technology. Summary of the invention

[0003] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

[0004] The purpose of the present application is to solve at least one of the technical problems existing in the related art to a certain extent. The embodiments of the present application provide a packaging method for a MEMS device and a MEMS chip unit, which can not only improve the bonding quality and strength of the MEMS device and simplify the process, but also enhance the reliability and performance stability of the MEMS device packaging.

[0005] An embodiment of the first aspect of the present application is a packaging method for a MEMS device, characterized by comprising:

[0006] Obtaining a base wafer, wherein the base wafer is provided with a MEMS device, a wafer bonding area, a first alignment mark, and a first scribe line;

[0007] Based on the MEMS device and the wafer bonding area, making a second scribe groove and a second alignment mark on the first wafer to form a first bonded wafer;

[0008] Based on the wafer bonding area, making a third alignment mark on the second wafer to form a second bonded wafer;

[0009] Bonding the first bonding wafer and the second bonding wafer according to the second alignment mark and the third alignment mark to form a cap wafer;

[0010] Based on the wafer bonding area, forming a silicon bonding ring on the cap wafer through hole;

[0011] Making a metal intermediate layer on the silicon bonding ring;

[0012] Bonding the cap wafer and the base wafer through the metal intermediate layer according to the first alignment mark and the second alignment mark to form a packaged wafer with a vacuum sealed chamber;

[0013] The packaged wafer is diced along the first dicing groove and the second dicing groove respectively to obtain a MEMS chip unit.

[0014] According to certain embodiments of the first aspect of the present application, the first wafer is a glass wafer, and the second wafer is a silicon wafer; the bonding method for bonding the first bonded wafer and the second bonded wafer according to the second alignment mark and the third alignment mark is silicon-glass anodic bonding.

[0015] According to certain embodiments of the first aspect of the present application, a bonding method of bonding the cap wafer and the base wafer through the metal intermediate layer according to the first alignment mark and the second alignment mark is metal intermediate layer bonding.

[0016] According to certain embodiments of the first aspect of the present application, a process temperature of the silicon-glass anodic bonding is higher than a process temperature of the metal intermediate layer bonding.

[0017] According to certain embodiments of the first aspect of the present application, the metal intermediate layer bonding is gold-silicon eutectic bonding, gold-gold diffusion bonding or copper-tin solder bonding.

[0018] According to certain embodiments of the first aspect of the present application, the base wafer contains a getter, and the getter is activated at a process temperature of metal interlayer bonding.

[0019] According to an embodiment of the second aspect of the present application, a MEMS chip unit is prepared according to the packaging method of the MEMS device of the first aspect of the present application; the MEMS chip unit comprises:

[0020] A base wafer is provided with a MEMS device, a wafer bonding area, a first alignment mark and a first scribe groove;

[0021] The first wafer is provided with a second scribe groove and a second alignment mark;

[0022] A second wafer is provided with a through hole, a silicon bonding ring and a third alignment mark, wherein the silicon bonding ring is provided with a metal intermediate layer;

[0023] The first wafer, the second wafer and the base wafer are bonded and connected in sequence to form a packaged wafer with a vacuum-sealed chamber.

[0024] According to certain embodiments of the second aspect of the present application, the metal intermediate layer includes a metal adhesive layer and a metal bonding layer.

[0025] According to certain embodiments of the second aspect of the present application, the metal adhesive layer is made of one or more of Ti, Gr and Ta, and the metal bonding layer is made of one or more of Au, Cu and Sn.

[0026] According to certain embodiments of the second aspect of the present application, the base wafer contains a getter, and the getter is Ti metal or Ti-based alloy thin film material.

[0027] The above scheme has at least the following beneficial effects: the packaging of MEMS devices is realized by secondary bonding, the bonding alignment is performed using the first alignment mark, the second alignment mark and the third alignment mark, and the glass cover wafer, the silicon wafer and the substrate wafer are bonded and connected in sequence, so that the glass cover wafer, the silicon wafer and the substrate wafer are connected to form a packaged wafer, and a vacuum-sealed chamber is formed to provide an optical path, which can avoid the problems of complex packaging, low efficiency and high cost existing in the traditional packaging process while meeting the compatibility of the airtightness and optical path of the MEMS device. Therefore, the present invention can not only improve the bonding quality and strength of the MEMS device, simplify the process, but also enhance the reliability and performance stability of the MEMS device packaging. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The accompanying drawings are used to provide further understanding of the technical solution of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the present application and do not constitute a limitation on the technical solution of the present application.

[0029] Figure 1 is a flow chart of a packaging method for a MEMS device provided in an embodiment of the present application;

[0030] Figure 2 is a schematic structural diagram of a substrate wafer provided in an embodiment of the present application;

[0031] Figure 3 A schematic diagram of the structure of a glass cover wafer provided in an embodiment of the present application;

[0032] Figure 4 is a schematic structural diagram of a cap wafer provided in an embodiment of the present application;

[0033] Figure 5 is a schematic structural diagram of a silicon bonding ring provided in an embodiment of the present application;

[0034] Figure 6 is a schematic diagram of the structure of a metal intermediate layer provided in an embodiment of the present application;

[0035] Figure 7 is a cross-sectional view of a packaged wafer provided in an embodiment of the present application;

[0036] Figure 8 is a cross-sectional view of a MEMS chip unit provided in an embodiment of the present application;

[0037] Fig. 9 It is a three-dimensional cross-sectional view of a MEMS chip unit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0038] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0039] It should be noted that, although the functional modules are divided in the device schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first", "second", etc. in the specification, claims or the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0040] The embodiments of the present application are further described below in conjunction with the accompanying drawings.

[0041] The embodiments of the present application provide a packaging method and structure of a MEMS device, which can not only improve the bonding quality and strength of the MEMS device and simplify the process, but also enhance the reliability and performance stability of the MEMS device packaging.

[0042] The embodiments of the present application are further described below in conjunction with the accompanying drawings.

[0043] like Figure 1 As shown, Figure 1 It is a flow chart of a packaging method of a MEMS device provided by an embodiment of the present invention. The packaging method of the MEMS device includes but is not limited to step S1, step S2, step S3, step S4, step S5, step S6, step S7 and step S8.

[0044] Step S1, obtaining a substrate wafer.

[0045] like Figure 2As shown, in some embodiments, a fabricated substrate wafer 200 is obtained, and the substrate wafer 200 is provided with a MEMS device 201, a getter 202, a wafer bonding area 203, a metal pad 204, a drive circuit 205, a first alignment mark 206, and a first scribe groove 207. Among them, in the substrate wafer 200, the positions of the MEMS device 201, the metal pad 204, the drive circuit 205 and other components are fixed, that is, they cannot be changed in any way during the post-production process; and the settings of the getter 202, the wafer bonding area 203, the first alignment mark 206, the first scribe groove 207 and other components can be changed according to actual conditions during the post-production process, and are not specifically limited here.

[0046] It is understandable that the position setting of each component of the base wafer 200 can provide a position reference for the subsequent structure of the glass cover wafer 400 and the silicon wafer 300. The obtained base wafer 200 is bonded with the first bonding wafer 300 and the second bonding wafer 400 to be manufactured later, so as to realize the packaging of the MEMS device 201, which is conducive to improving the packaging yield of the MEMS device 201.

[0047] Step S2, based on the MEMS device and the wafer bonding area, a second scribe line and a second alignment mark are made on the first wafer to form a first bonded wafer.

[0048] The first wafer is a glass wafer 301 .

[0049] The glass wafer 301 is used as a raw material and pre-processed to form a first bonded wafer 300 by making a second scribe groove 302 and a second alignment mark 303 based on the MEMS device 201 and the wafer bonding area 203 through an etching process.

[0050] like Figure 3 As shown, it can be understood that in some embodiments, the glass wafer 301 is used as a raw material, the glass wafer 301 is pre-processed, the position of the second scribe groove 302 is determined based on the position of the MEMS device 201 and the wafer bonding area 203 of the base wafer 200, and the second scribe groove 302 is manufactured by an etching process. The position of the second alignment mark 303 is determined according to the bonding alignment requirement, and the second alignment mark 303 is manufactured by an etching process. The first bonded wafer 300 can be manufactured.

[0051] It should be noted that the glass wafer 301 is a high-precision optical glass material, and using it as a packaging cover plate meets the required optical requirements.

[0052] Step S3: Based on the wafer bonding area, a third alignment mark is made on the second wafer to form a second bonded wafer.

[0053] The second wafer is a silicon wafer 401 .

[0054] like Figure 4 As shown, it can be understood that in some embodiments, the silicon wafer 401 is used as the raw material, the silicon wafer 401 is pre-processed, the position of the third alignment mark 402 is determined according to the bonding alignment requirements, and the third alignment mark 402 is made by an etching process to form a second bonding wafer.

[0055] Step S4 , bonding the first bonding wafer and the second bonding wafer according to the second alignment mark and the third alignment mark to form a cap wafer.

[0056] like Figure 4 As shown, based on the first bonding method, the first bonding wafer 300 and the second bonding wafer 400 can be bonded to form a cap wafer 500 by using the second alignment mark 303 and the third alignment mark 402 for bonding alignment.

[0057] Step S5, based on the wafer bonding area, capping the wafer through hole to form a silicon bonding ring.

[0058] Exemplarily, a silicon wafer is used as a raw material and the silicon wafer is processed. Based on the wafer bonding area 203, a through hole is made at a target position of the cap wafer 500 by an etching process to form a silicon bonding ring 404;

[0059] like Figure 5 As shown, it can be understood that the wafer thickness is determined based on the MEMS device 201 of the substrate wafer 200, the position and size of the through hole 403 are determined based on the wafer bonding area 203, and the through hole 403 structure of corresponding size is manufactured at the target position through an etching process, so that the through hole 403 provides a packaging cavity for the MEMS device 201, thereby forming a silicon bonding ring 404 for wafer bonding;

[0060] Step S6, making a metal intermediate layer on the silicon bonding ring.

[0061] The metal intermediate layer 600 is fabricated on the surface of the silicon bonding ring 404 of the cap wafer by using a metal film deposition process.

[0062] like Figure 6 As shown, it can be understood that the metal intermediate layer 600 is manufactured on the silicon bonding ring 404 formed on the cap wafer 500 , and the cap wafer 500 and the base wafer 200 can be bonded through the metal intermediate layer 600 to obtain the packaging wafer 700 .

[0063] Step S7 , bonding the cap wafer and the base wafer through the metal intermediate layer according to the first alignment mark and the second alignment mark to form a packaged wafer with a vacuum sealed chamber.

[0064] Based on the second bonding method, the cap wafer 500 and the base wafer 200 are bonded through the metal intermediate layer 600 according to the first alignment mark 206 and the second alignment mark 303 to form a package wafer 700 having a vacuum sealed chamber 701;

[0065] like Figure 7 As shown, since the first bonded wafer 300 and the second bonded wafer 400 have completed the bonding operation in step S3 to form the cap wafer 500, at this time, based on the second bonding method, the first pair of alignment marks 206 and the second alignment mark 303 are used for bonding alignment, and the cap wafer 500 and the base wafer 200 can be bonded through the metal intermediate layer 600 to form a packaged wafer 700 with a vacuum sealed chamber 701.

[0066] Step S8, dicing the packaged wafer along the first dicing groove and the second dicing groove respectively to obtain a MEMS chip unit.

[0067] like Figure 8 As shown, Figure 8 2 is a cross-sectional view of a MEMS chip unit. By cutting the package wafer 700 along the first scribe line 207 and the second scribe line 302 by mechanical or laser cutting, an independent MEMS chip unit can be obtained.

[0068] It is understandable that the packaging of the MEMS device is realized by the secondary bonding method, the bonding alignment is performed using the first alignment mark 206, the second alignment mark 303 and the third alignment mark 402, the first bonding wafer 300 and the second bonding wafer 400 are bonded to form the cap wafer 500 based on the first bonding method, and the cap wafer 500 and the base wafer 200 are bonded to form the packaging wafer 700 through the metal intermediate layer 600 based on the second bonding method, and a vacuum-sealed chamber 701 is enclosed to provide an optical path, which can meet the airtightness of the MEMS device and the compatibility of the optical path, while avoiding the problems of complex packaging, low efficiency and high cost in the traditional packaging process. It can not only improve the bonding quality and strength of the MEMS device, simplify the process, but also enhance the reliability and performance stability of the MEMS device packaging.

[0069] It should be noted that the pre-treatment operation includes cleaning, gluing, photolithography, development and other process operations. The pre-treatment operation facilitates the subsequent etching operation on the wafer structure, thereby obtaining a packaged wafer 700 that meets the requirements.

[0070] It should be noted that, in some embodiments, the first alignment mark 206 , the second alignment mark 303 , and the third alignment mark 402 are cross-shaped alignment marks.

[0071] It should be noted that, in some embodiments, the etching process is a reactive ion etching process.

[0072] In some embodiments, the first bonding method is silicon-glass anodic bonding, that is, the bonding method for bonding the first bonded wafer and the second bonded wafer according to the second alignment mark and the third alignment mark is silicon-glass anodic bonding.

[0073] In some embodiments, the second bonding method is metal intermediate layer bonding, that is, the bonding method of bonding the cap wafer and the base wafer through the metal intermediate layer according to the first alignment mark and the second alignment mark is metal intermediate layer bonding.

[0074] In some embodiments, a process temperature of the first bonding method is higher than a process temperature of the second bonding method.

[0075] It is understandable that in some embodiments, the first bonding method is silicon-glass anodic bonding, and the second bonding method is metal intermediate layer bonding. The packaging of the MEMS device 201 is achieved by secondary bonding, which can ensure the packaging yield and packaging efficiency of the MEMS device 201. Setting the process temperature of the silicon-glass anodic bonding of the first bonding wafer 300 and the silicon wafer 200 to be higher than the process temperature of the metal intermediate layer bonding of the cap wafer 500 and the base wafer 200 can ensure that the wafer bonding operation of the second metal intermediate layer bonding will not have a negative impact on the cap wafer 500, thereby ensuring the bonding quality and strength of the MEMS device 201, simplifying the process, and enhancing the reliability and performance stability of the MEMS device 201 packaging.

[0076] In some embodiments, the second bonding method includes gold-silicon eutectic bonding, gold-gold diffusion bonding, and copper-tin solder bonding.

[0077] It can be understood that based on the second bonding method, that is, the cap wafer 500 and the base wafer 200 are bonded through the metal intermediate layer 600, it can include three methods: gold-silicon eutectic bonding, gold-gold diffusion bonding, and copper-tin eutectic bonding. It should be noted that different bonding methods correspond to different metal intermediate layer bonding temperatures.

[0078] In some embodiments, the base wafer 200 includes a getter 202 that is activated at a process temperature for bonding the metal interlayer 600 .

[0079] like Fig. 9As shown, it can be understood that by performing operations such as cleaning, coating, photolithography, development, and etching on the wafer, a first bonded wafer 300, a second bonded wafer 400, and a base wafer 200 can be obtained; the first bonded wafer 300 and the second bonded wafer 400 are bonded and connected by silicon-glass anode bonding to obtain a cap wafer 500; and then the cap wafer 500 and the base wafer 200 are bonded and connected by metal intermediate layer bonding to obtain a packaged wafer 700, thereby realizing the packaging of the MEMS device. At the same time, the base wafer 200 is also provided with a getter 202, which is activated at the process temperature of the metal intermediate layer bonding and can absorb residual gas. After obtaining the packaged wafer 700, the packaged wafer 700 is wafer-diced along the first scribe groove 207 and the second scribe groove 302, respectively, to obtain an independent MEMS chip unit. Through this packaging method, the packaging of MEMS devices can be achieved through secondary bonding, which ensures the bonding quality and strength of the MEMS devices, simplifies the process, and enhances the reliability and performance stability of the MEMS device packaging.

[0080] It should be noted that the packaging method of MEMS devices can also be applied to other devices such as infrared devices, such as angular velocity accelerators, energy harvesters or infrared sensors, etc., which are not specifically limited here.

[0081] Reference Figures 2 to 9 , an embodiment of the present application provides a MEMS chip unit.

[0082] The MEMS chip unit includes: a base wafer 200 , a first bonding wafer 300 , and a second bonding wafer 400 .

[0083] The base wafer 200 is provided with a MEMS device 201, a wafer bonding area 203, a first alignment mark 206 and a first scribe groove 207; the first bonded wafer 300 is provided with a second scribe groove 302 and a second alignment mark 303; the second bonded wafer 400 is provided with a through hole 403, a silicon bonding ring 404 and a third alignment mark 402, wherein the silicon bonding ring 404 is provided with a metal intermediate layer 600; the first bonded wafer 300, the second bonded wafer 400 and the base wafer 200 are bonded and connected in sequence to form a packaged wafer 700 having a vacuum-sealed chamber 701.

[0084] It can be understood that, further, the MEMS chip unit includes structures such as a base wafer 200, a first bonding wafer 300, a second bonding wafer 400, a metal intermediate layer 600, etc. The first bonding wafer 300, the second bonding wafer 400 and the base wafer 200 are bonded and connected in sequence to form a packaged wafer 700 with a vacuum-sealed chamber 701. That is, according to the technical solution of the present invention, the packaging of the MEMS device is realized by a secondary bonding method, the bonding alignment is performed using the first alignment mark 206, the second alignment mark 303 and the third alignment mark 402, the first bonding wafer 300 and the second bonding wafer 400 are bonded to form a cap wafer 500 based on the first bonding method, and the cap wafer 500 and the base wafer 200 are bonded and connected through the metal intermediate layer 600 based on the second bonding method, so as to form a packaged wafer 700 with a vacuum-sealed chamber 701. Among them, the vacuum sealed chamber 701 can provide an optical path, which can meet the airtightness of the MEMS device and the compatibility of the optical path, while avoiding the problems of complex packaging, low efficiency and high cost in the traditional packaging process. Therefore, the present invention can not only improve the bonding quality and strength of the MEMS device, simplify the process, but also enhance the reliability and performance stability of the MEMS device packaging.

[0085] In some embodiments, the metal intermediate layer 600 includes a metal adhesive layer 601 and a metal bonding layer 602 .

[0086] In some embodiments, the metal adhesive layer 601 is made of one or more of Ti, Gr, and Ta, and the metal bonding layer 602 is made of one or more of Au, Cu, and Sn.

[0087] It is understandable that the material of the metal intermediate layer 600 can be selected according to actual conditions, wherein the metal bonding layer 601 can be made of Ti, Cr, Ta, and the metal bonding layer 602 can be made of one or more combinations of Au, Cu, Sn, which are not specifically limited here.

[0088] In some embodiments, the base wafer 200 includes a getter 202 , and the getter 202 is a Ti metal or Ti-based alloy thin film material.

[0089] It should be noted that based on the metal intermediate layer bonding method, the cap wafer 500 and the base wafer 200 can be bonded through the metal intermediate layer 600 to form the package wafer 700. Specifically, the metal intermediate layer bonding includes gold-silicon eutectic bonding, gold-gold diffusion bonding, and copper-tin solder bonding. It should be noted that different metal intermediate layer bonding methods correspond to different bonding temperatures.

[0090] Specifically, a packaging method for a MEMS device is described in detail below with an embodiment, and the specific steps are as follows.

[0091] The first step is to prepare a base wafer 200, and set a MEMS device 201, a getter 202, a wafer bonding area 203, a metal pad 204, a drive circuit 205, a first alignment mark 206 and a first scribe line 207. In this embodiment, the wafer bonding area 203 of the base wafer 200 is a metal intermediate layer 600, and the metal intermediate layer 600

[0092] It includes a metal bonding layer 601 and a metal bonding layer 602. The metal bonding layer 601 is a 50nm thick Cr metal layer, and the metal bonding layer is a 500nm thick Au metal layer.

[0093] In the second step, the first bonded wafer 300 is manufactured. The glass wafer 301 is subjected to pattern transfer through steps such as cleaning, coating, photolithography, development, and etching. The photoresist is used as a mask to manufacture the second scribe groove 302 and the second alignment mark 303 structure through an etching process, thereby completing the preparation of the first bonded wafer 300.

[0094] The third step is to make the cap wafer 500. First, the silicon wafer 401 is used as the raw material, and the silicon wafer 401 is pre-processed. According to the bonding alignment requirements, the position of the third alignment mark 402 is determined in the silicon wafer 401, and the third alignment mark 402 is made by etching to complete the preparation of the second bonded wafer 400. Based on the first bonding method, the second alignment mark 303 and the third alignment mark 402 are used to complete the alignment of the first bonded wafer 300 and the second bonded wafer 400, and then silicon-glass anodic bonding is performed. Specifically, the specific operation of silicon-glass anodic bonding is as follows: the first step is to evacuate the gas in the bonding chamber to a certain degree and maintain it until the bonding is completed; the second step is to increase the temperature, and the temperature in the chamber is gradually increased to the rated temperature in three stages, the temperature is 400°C; the third step is to pressurize, and the two electrodes pressurize the first bonded wafer 300 and the second bonded wafer 400 to a certain pressure and maintain it until the bonding is completed; the fourth step is to energize, and the two electrodes load a high voltage to the first bonded wafer 300 and the second bonded wafer 400, and maintain it for a certain period of time. Under this process condition, the process of the silicon-glass anodic bonding part can be completed, thereby obtaining the cap wafer 500.

[0095] The fourth step is to use the second bonding wafer 400 as the raw material to make the silicon bonding ring 404. First, determine the positions of the through hole 403 and the silicon bonding ring 404 of the second bonding wafer 400; transfer the mask pattern to the surface of the silicon wafer 401 by cleaning, coating, photolithography, and development, determine the wafer thickness based on the MEMS device 201 of the substrate wafer 200, determine the position and size of the through hole 403 based on the wafer bonding area 203, and make a through hole 403 structure of corresponding size at the target position through an etching process, so that the through hole 403 provides a packaging cavity for the MEMS device 201, thereby forming a silicon bonding ring 404 for wafer bonding;

[0096] The fifth step is to make a metal intermediate layer 600. The metal intermediate layer 600 including a metal bonding layer 601 and a metal bonding layer 602 is made on the surface of the silicon bonding ring 404 by using a process such as magnetron sputtering. By adjusting the sputtering power and the sputtering gas flow rate, the cap wafer 500 is maintained in a certain temperature range, and the target material is gradually deposited on the surface of the silicon bonding ring 404 to form a continuous film. The metal intermediate layer 600 obtained by the above process includes a metal bonding layer 601 and a metal bonding layer 602, wherein the metal bonding layer 601 is a 50nm thick Ti metal layer, and the metal bonding layer 602 is a 2μm thick Cu metal layer.

[0097] In the sixth step, the package wafer 700 is manufactured, the base wafer 200 and the cap wafer 500 are interconnected by metal interlayer bonding under vacuum, and the getter 202 is activated at the bonding temperature. The base wafer 200 and the cap wafer 500 are aligned on the photolithography machine using the first alignment mark 206, the second alignment mark 303 and the third alignment mark 402, so that the metal interlayer 600 on the silicon bonding ring 404 structure is in close contact with the wafer bonding area 203 of the base wafer 200. Specifically, the specific operation of metal intermediate layer bonding is as follows: the first step is to evacuate the gas in the bonding cavity to a certain degree and maintain it until the bonding is completed; the second step is to increase the temperature, the temperature in the cavity is gradually increased to the rated temperature of 300°C in three stages, and maintained for a certain time; the third step is to pressurize the substrate wafer 200 and the cap wafer 500 to a certain pressure and maintain it until the bonding is completed; the third step is to activate the getter 202, and the getter 202 is activated when the bonding process temperature rises to a certain temperature to absorb the residual active gas in the encapsulated MEMS closed cavity. The fourth step is to anneal, and after the temperature rises to the rated degree and maintains for a certain time, stop heating and let the wafer cool naturally, and the bonding is completed. Under this process condition, the process of the Au-Au diffusion bonding part is completed, and a vacuum-encapsulated optical MEMS packaging wafer 700 can be obtained. The first bonding wafer 300 , the second bonding wafer 400 and the base wafer 200 are connected to form a vacuum-sealed chamber 701 of the MEMS device and provide an optical path.

[0098] The seventh step is wafer dicing, in which the cap wafer 500 and the base wafer 200 in the wafer-level packaging are cut separately, that is, the packaging wafer 700 is cut, so that independent MEMS chip units can be obtained, thereby realizing the packaging of MEMS devices.

[0099] The present application proposes a packaging structure combining a glass cover wafer 400, a silicon cap wafer 500 and a base wafer 200. This design not only improves the packaging quality and strength of the MEMS device 201, but also enhances the reliability and performance stability of the packaging through the combination of multi-layer structures.

[0100] By making the second alignment mark 303 and the third alignment mark 402 on the glass cover wafer 400 and the silicon wafer 300 respectively, and using these alignment marks for precise alignment, a high-precision bonding process is achieved. This technology significantly improves the accuracy and reliability of the package. At the same time, two bonding methods (the first bonding method and the second bonding method) are used, which are respectively used for bonding the glass cover wafer 400 to the silicon wafer 300, and the cap wafer 500 to the substrate wafer 200. This multi-step bonding technology further enhances the strength and stability of the package.

[0101] In addition, the etching process is used to make scribe grooves and alignment marks on the glass wafer 301 and the silicon wafer 300, avoiding the complex mechanical processing steps in the traditional packaging method, thereby simplifying the process. The metal intermediate layer 600 is made on the silicon bonding ring using a metal film deposition process, which provides good conductivity and adhesion for the bonding process, further simplifying the packaging process.

[0102] Finally, by using glass wafer 301 as the capping material, the sealing and vacuum holding ability of MEMS device 201 are improved, thereby improving the performance stability of the device. At the same time, the multi-layer packaging structure and precise bonding technology make it more reliable and durable, and suitable for various complex and harsh working environments. The first scribe groove and the second scribe groove are respectively set on the packaged wafer, so that after the packaging is completed, the wafer can be easily scribed along these grooves to obtain independent MEMS chip units. This design improves the flexibility and production efficiency of the packaging process.

[0103] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the embodiments. Technical personnel familiar with the field can make various equivalent modifications or substitutions without violating the spirit of the present application. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.

Claims

1. A packaging method for a MEMS device, characterized in that: include: Obtaining a base wafer, wherein the base wafer is provided with a MEMS device, a wafer bonding area, a first alignment mark, and a first scribe line; Based on the MEMS device and the wafer bonding area, making a second scribe groove and a second alignment mark on the first wafer to form a first bonded wafer; Based on the wafer bonding area, making a third alignment mark on the second wafer to form a second bonded wafer; Bonding the first bonding wafer and the second bonding wafer according to the second alignment mark and the third alignment mark to form a cap wafer; Based on the wafer bonding area, forming a silicon bonding ring on the cap wafer through hole; Making a metal intermediate layer on the silicon bonding ring; Bonding the cap wafer and the base wafer through the metal intermediate layer according to the first alignment mark and the second alignment mark to form a packaged wafer with a vacuum sealed chamber; The packaged wafer is diced along the first dicing groove and the second dicing groove respectively to obtain a MEMS chip unit.

2. The packaging method of a MEMS device according to claim 1, characterized in that: The first wafer is a glass wafer, and the second wafer is a silicon wafer; the bonding method of bonding the first bonding wafer and the second bonding wafer according to the second alignment mark and the third alignment mark is silicon-glass anodic bonding.

3. The packaging method of a MEMS device according to claim 2, characterized in that: The bonding method of bonding the cap wafer and the base wafer through the metal intermediate layer according to the first alignment mark and the second alignment mark is metal intermediate layer bonding.

4. The packaging method of a MEMS device according to claim 3, characterized in that: The process temperature of the silicon-glass anodic bonding is higher than the process temperature of the metal intermediate layer bonding.

5. The packaging method of a MEMS device according to claim 3, characterized in that: The metal intermediate layer bonding is gold-silicon eutectic bonding, gold-gold diffusion bonding or copper-tin solder bonding.

6. The packaging method of a MEMS device according to claim 4, characterized in that: The base wafer contains a getter, which is activated at a process temperature of metal interlayer bonding.

7. A MEMS chip unit, characterized in that: Prepared according to the packaging method of a MEMS device according to any one of claims 1 to 6; the MEMS chip unit comprises: A base wafer is provided with a MEMS device, a wafer bonding area, a first alignment mark and a first scribe groove; The first wafer is provided with a second scribe groove and a second alignment mark; A second wafer is provided with a through hole, a silicon bonding ring and a third alignment mark, wherein the silicon bonding ring is provided with a metal intermediate layer; The first wafer, the second wafer and the base wafer are bonded and connected in sequence to form a packaged wafer with a vacuum-sealed chamber.

8. The MEMS chip unit according to claim 7, characterized in that: The metal intermediate layer includes a metal adhesive layer and a metal bonding layer.

9. The MEMS chip unit according to claim 8, characterized in that: The metal adhesive layer is made of one or more of Ti, Gr and Ta, and the metal bonding layer is made of one or more of Au, Cu and Sn.

10. The MEMS chip unit according to claim 7, characterized in that: The base wafer contains a getter, and the getter is Ti metal or Ti-based alloy thin film material.

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