Detection device of parasitic loop

By designing a parasitic circuit detection device including a capacitor input module and a main control module, the problem of induction and parasitic series power in the prior art is solved, and the accurate detection of the parasitic circuit of the secondary loop is achieved.

CN119780773AActive Publication Date: 2025-04-08WENSHAN POWER SUPPLY BUREAU YUNNAN GRID
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Patent Information

Application Number
CN202411782103.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-05
Publication Date
2025-04-08
Estimated Expiration
2044-12-05

AI Technical Summary

Technical Problem

When the prior art detects whether there is a parasitic loop in the secondary loop, it is impossible to accurately distinguish between induction and parasitic series power, resulting in the inability to accurately determine whether there is a parasitic loop.

Method used

A detection device for parasitic loops is designed, including a capacitor input module and a main control module. By automatically connecting different numbers of capacitors one after another, and detecting the voltage changes at the two voltage detection points before and after the capacitor, we can determine whether there is a parasitic loop.

Benefits of technology

This device can accurately distinguish parasitic series and induction, eliminate interference from induction, and truly determine whether there is a parasitic loop without manual wiring, saving time and effort.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The invention discloses a detection device of a parasitic loop, a capacitor input module comprises at least two capacitors which are connected in parallel, and each capacitor can be connected to a detected loop through different capacitor lines or disconnected from the detected loop; the main control module is used for detecting voltages of two voltage detection points of the detected loop after an air switch of the detected loop is disconnected and before a capacitor is connected; the capacitors in the capacitor input module are controlled to be connected to the detected loop through different capacitor lines in sequence, and the voltages of the two voltage detection points are detected when each capacitor is connected; and judging whether the detected loop has a parasitic loop or not according to the voltage change of the two voltage detection points. The device can accurately distinguish parasitic serial connection and induced electricity, eliminate interference of the induced electricity, truly judge and detect whether a parasitic loop exists or not, does not need manual wiring, saves time and labor, and can be applied to parasitic loop detection of various secondary loops.
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Description

Technical Field

[0001] The present invention relates to the technical field of parasitic loop detection, and in particular to a parasitic loop detection device. Background Art

[0002] It is strictly forbidden to generate parasitic circuits in the secondary circuit. When checking whether there is a parasitic circuit, the existing technology generally judges by disconnecting the circuit breaker and using a multimeter to measure whether there is voltage on the positive and negative power supplies at the lower end of the circuit breaker. However, the secondary circuit is complicated, and there may be two power supply points that are close to other circuits. For example, the different contacts of the circuit breaker auxiliary switch include control power supply, signal power supply, etc. When the two contacts are close to each other, there may be an induced voltage. Therefore, the above method of disconnecting the circuit breaker to measure the potential cannot determine whether it is the voltage generated by the parasitic circuit or the voltage generated by induced electricity, and thus cannot accurately determine whether there is a parasitic circuit in the secondary circuit. Summary of the invention

[0003] Based on this, it is necessary to propose a parasitic circuit detection device to address the technical problem in the prior art that if induced electricity exists, it may not be possible to truly determine whether there is a parasitic circuit in the secondary circuit.

[0004] A parasitic loop detection device, the parasitic loop detection device comprising a capacitor input module and a main control module;

[0005] The capacitor input module includes at least two capacitors connected in parallel, and each capacitor can be connected to the measured circuit or disconnected from the measured circuit through different capacitor lines;

[0006] The main control module is connected to the circuit under test and the capacitor input module respectively, and is used to detect the voltages of two voltage detection points of the circuit under test after disconnecting the circuit breaker of the circuit under test and before connecting the capacitor;

[0007] The main control module is also used to control the capacitors in the capacitor input module to be connected to the measured circuit through different capacitor lines in sequence, and to detect the voltage of two voltage detection points for each capacitor connected, wherein the capacitor line where each capacitor is located is connected to the measured circuit through two voltage detection points;

[0008] The main control module is also used to determine whether a parasitic circuit exists in the circuit under test according to the voltage changes at the two voltage detection points.

[0009] The parasitic circuit detection device provided by the present application can automatically connect different numbers of capacitors in sequence, and detect the voltage of the voltage detection point before and after the capacitors are connected and after different numbers of capacitors are connected, and judge whether there is a parasitic circuit in the secondary circuit or the circuit being tested according to the change of the voltage at the voltage detection point. The present application can accurately distinguish between parasitic series electricity and induced electricity, eliminate the interference of induced electricity, and truly judge whether a parasitic circuit exists. It does not require manual wiring, saves time and effort, and can be applied to parasitic circuit detection of various secondary circuits. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0011] in:

[0012] Figure 1 is a structural block diagram of a parasitic loop detection device in one embodiment;

[0013] Figure 2 The schematic diagram of the method for measuring potential by disconnecting a circuit breaker in the prior art;

[0014] Figure 3 A partial schematic diagram of a capacitor input module in one embodiment;

[0015] Figure 4 A partial schematic diagram of a capacitor input module in one embodiment;

[0016] Figure 5 A circuit diagram of a capacitor input module in one embodiment;

[0017] Figure 6 is a circuit diagram of a main control circuit in one embodiment;

[0018] Figure 7 is a circuit diagram of a voltage detection circuit in one embodiment;

[0019] Figure 8 is a circuit diagram of a power module in one embodiment;

[0020] Fig. 9 FIG. 4 is a flowchart of a main control module in an embodiment. DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0022] Figure 2 The schematic diagram of the method for measuring potential by disconnecting a circuit breaker in the prior art is shown in FIG. Figure 2 As shown in the figure, the power supply points of A and B are close to each other, so induced electricity may be generated. When the circuit breaker of B is disconnected, capacitance C1 is generated between A and B, and capacitance C2 is generated between B and ground. Voltage can still be detected on B. If it is known that the voltage is induced electricity, B can be shorted to the ground. However, in reality, it is not easy to confirm whether the voltage is induced electricity or series current of a parasitic circuit. If the voltage is series current of a parasitic circuit, if B is rashly shorted to the ground, it will cause a grounding fault and an accident.

[0023] Therefore, the prior art cannot confirm whether the voltage detected on line B after disconnecting the circuit breaker is an induced voltage or a parasitic circuit cross-current while ensuring line safety, that is, it cannot determine whether a parasitic circuit exists.

[0024] In addition, based on the existing method of measuring potential by disconnecting the circuit breaker, workers are required to check against the drawings, which is time-consuming, labor-intensive and inefficient.

[0025] Based on this, it is necessary to design a parasitic circuit detection device to detect whether there is a parasitic circuit on the secondary circuit.

[0026] like Figure 1 As shown, in one embodiment, a parasitic loop detection device is provided, and the parasitic loop detection device includes a capacitor input module 10 and a main control module 20;

[0027] The capacitor input module 10 includes at least two capacitors connected in parallel, and each capacitor can be connected to the measured circuit 30 or disconnected from the measured circuit 30 through different capacitor lines;

[0028] The main control module 20 is connected to the circuit under test 30 and the capacitor input module 10 respectively, and is used to detect the voltages of two voltage detection points of the circuit under test 30 after disconnecting the circuit breaker of the circuit under test 30 and before connecting the capacitor;

[0029] The main control module 20 is also used to control the capacitors in the capacitor input module 10 to be connected to the measured circuit 30 through different capacitor lines in sequence, and to detect the voltages of two voltage detection points for each capacitor connected, wherein the capacitor line where each capacitor is located is connected to the measured circuit 30 through two voltage detection points;

[0030] The main control module 20 is also used to determine whether there is a parasitic circuit in the measured circuit 30 according to the voltage changes of the two voltage detection points.

[0031] Specifically, the capacitor input module 10 includes at least two capacitor circuits, each capacitor circuit includes a capacitor, and the capacitors of different capacitor circuits are connected in parallel. The capacitor in each capacitor circuit can be connected to the measured circuit 30 or disconnected from the measured circuit 30. More specifically, each capacitor circuit can be provided with a switch, and the on and off of the switch can control whether the capacitor of the capacitor circuit in which it is located is connected to the measured circuit 30.

[0032] In this embodiment, the main control module 20 is used to automatically control the connection or disconnection of the capacitor in the capacitor input module 10. Moreover, only one capacitor is controlled to be connected to the measured circuit 30 at a time. The main control module 20 can control different capacitors to be connected to the measured circuit 30 one by one in sequence. For example, the capacitor of the first capacitor circuit is first controlled to be connected to the measured circuit 30, and after a certain period of time, the capacitor of the second capacitor circuit is controlled to be connected to the measured circuit 30, and after a certain period of time again, the capacitor of the third capacitor circuit is controlled to be connected to the measured circuit 30, and so on.

[0033] It should be noted that as capacitors are connected, the already connected capacitors do not need to be disconnected, so the number of capacitors connected to the measured circuit 30 increases one by one.

[0034] Before the capacitor is connected to the measured circuit 30, there is capacitance to ground. If the capacitor is connected to the measured circuit 30, the connected capacitor is connected in parallel with the capacitance to ground of the measured circuit 30 when the circuit breaker is disconnected. Therefore, with the connection of the capacitor, the capacitance to ground of the measured circuit 30 is increased.

[0035] Figure 3 A partial schematic diagram of a capacitor input module 10 in one embodiment; Figure 4 FIG. 1 is a partial schematic diagram of a capacitor input module 10 in an embodiment; Figure 3 and Figure 4 , the power point A is close to the power point B of the circuit 30 under test, and the circuit B power circuit breaker is disconnected, so that A generates capacitance C1 to B, and B generates capacitance C2 to the ground. A capacitance input module 10 is connected between the power point B of the circuit 30 under test and the ground; Figure 3 and Figure 4 The capacitor input module 10 has three capacitors Ca, Cb and Cc, each of which can be connected to two voltage detection points of the measured circuit 30 through different capacitor lines by turning on and off the switch. After the capacitor is connected to the measured circuit 30, it is equivalent to increasing the capacitance of the measured circuit 30 to the ground.

[0036] certainly, Figure 3 and Figure 4This is merely an exemplary description. The number of capacitors included in the capacitor input module 10 may be 2, 3, 4, 6, etc., but is not limited to this number. This application does not impose any restriction on this.

[0037] After the capacitors Ca, Cb and Cc are put into or connected to the measured circuit 30, they are equivalent to being connected in parallel with the initial capacitance C2 to ground of the measured circuit 30, which is equivalent to increasing the capacitance to ground of the measured circuit 30.

[0038] The main control module 20 is used to detect the voltages of the two voltage detection points before and after the tested circuit 30 is connected to the capacitor. For example, before the capacitor is connected, the voltage of the two voltage detection points is U1. After the capacitor Ca is connected, the voltage of the two voltage detection points is U2. After the capacitor Cb is connected, the voltage of the two voltage detection points is U3. After the capacitor Cc is connected, the voltage of the two voltage detection points is U4.

[0039] The main control module 20 is also used to compare the voltage changes of two voltage detection points at different detection times, for example, to compare the changes among U1, U2, U3, and U4, and to determine whether there is a parasitic circuit in the detected circuit 30 according to the voltage changes.

[0040] The parasitic circuit detection device provided in this embodiment can automatically connect different numbers of capacitors in sequence, detect the voltage of the voltage detection point before and after the capacitors are connected and after different numbers of capacitors are connected, and judge whether there is a parasitic circuit in the secondary circuit or the circuit under test 30 according to the change of the voltage at the voltage detection point. This embodiment can accurately distinguish between parasitic series electricity and induced electricity, eliminate the interference of induced electricity, and truly judge whether there is a parasitic circuit without manual wiring, saving time and labor, and can be applied to parasitic circuit detection of various secondary circuits.

[0041] In one embodiment, the main control module 20 is specifically used to determine whether the voltages of the two voltage detection points of the measured circuit 30 decrease successively before and after the capacitor is connected and as the number of connected capacitors increases. If it is determined that the voltages of the two voltage detection points of the measured circuit 30 decrease successively, it is determined that there is no parasitic circuit in the measured circuit 30; if it is determined that the voltages of the two voltage detection points of the measured circuit 30 are unchanged or the change is within a preset small range, it is determined that there is a parasitic circuit in the measured circuit 30.

[0042] Specifically, Figure 2 As shown in the figure, after disconnecting the circuit breaker, if the voltage on B is the induced voltage, according to the capacitor voltage division formula, the voltage on capacitor C2 is:

[0043] Vc2=Vtotal*[C1 / [C1+C2]]

[0044] The voltage Vc2 on capacitor C2 is inversely proportional to the size of capacitor C2. Figure 3 or Figure 4In the example, before Ca, Cb, and Cc are put into operation, the voltage at the "voltage detection point" is measured, and then capacitors Ca, Cb, and Cc are put into operation in sequence. Then the capacitance of B to ground increases in sequence, which is equivalent to C2 increasing in sequence. If the voltage at the "voltage detection point" gradually decreases after the capacitors are put into operation in sequence, then the voltage is the induced voltage. If the voltage at the "voltage detection point" remains unchanged, then the voltage is the series voltage of the parasitic loop.

[0045] That is, if the measured circuit 30 does not have a parasitic circuit but has inductive circuits, the voltages at the two voltage detection points will gradually decrease as the capacitors are connected.

[0046] If a parasitic loop exists in the circuit 30 under test, then with the connection of the capacitor, the voltages at the two voltage detection points remain unchanged or change within a small range.

[0047] Based on this principle, it can be determined whether the circuit 30 under test has a parasitic circuit.

[0048] In one embodiment, the main control module 20 is specifically used to determine whether the voltages of the two voltage detection points of the measured circuit 30 decrease successively before and after the capacitor is connected and as the number of connected capacitors increases. If it is determined that the voltages of the two voltage detection points of the measured circuit 30 decrease successively, then according to the capacitance value of the connected capacitor, the capacitance value of the capacitance of the measured circuit 30 to ground before the capacitor is connected, and the total voltage of the measured circuit 30, it is determined whether the voltages of the two voltage detection points after each increase in the connected capacitor meet the capacitor voltage division. If it meets the capacitor voltage division, it is determined that there is no parasitic circuit in the measured circuit 30. If it does not meet the capacitor voltage division, it is determined that there is a parasitic circuit in the measured circuit 30;

[0049] If it is determined that the voltages at the two voltage detection points of the measured circuit 30 remain unchanged or the variation is within a preset small range, it is determined that a parasitic circuit exists in the measured circuit 30.

[0050] Specifically, Figure 2 As shown in the figure, after disconnecting the circuit breaker, if the voltage on B is the induced voltage, according to the capacitor voltage division formula, the voltage on capacitor C2 is:

[0051] Vc2=Vtotal*[C1 / [C1+C2]]

[0052] The voltage Vc2 on capacitor C2 is inversely proportional to the size of capacitor C2. Figure 3 or Figure 4 In the example, before Ca, Cb, and Cc are put into operation, the voltage at the "voltage detection point" is measured, and then capacitors Ca, Cb, and Cc are put into operation in sequence. Then the capacitance of B to ground increases in sequence, which is equivalent to C2 increasing in sequence. If the voltage at the "voltage detection point" gradually decreases after the capacitors are put into operation in sequence, then the voltage is the induced voltage. If the voltage at the "voltage detection point" remains unchanged, then the voltage is the series voltage of the parasitic loop.

[0053] That is, if the measured circuit 30 does not have a parasitic circuit but has inductive circuits, the voltages at the two voltage detection points will gradually decrease as the capacitors are connected.

[0054] If a parasitic loop exists in the circuit 30 under test, then with the connection of the capacitor, the voltages at the two voltage detection points remain unchanged or change within a small range.

[0055] Based on this principle, it can be determined whether the circuit 30 under test has a parasitic circuit.

[0056] In order to ensure the accuracy of judgment and prevent misjudgment, this embodiment further adds a judgment of whether the voltages of the two voltage detection points after each increase in the connected capacitor meet the capacitor voltage division after determining that the voltages of the two voltage detection points decrease successively. If they meet the capacitor voltage division, it is determined that there is no parasitic circuit in the measured circuit 30. If they do not meet the capacitor voltage division, it is determined that there is a parasitic circuit in the measured circuit 30.

[0057] Based on this principle, this embodiment can more accurately determine whether the circuit under test 30 has a parasitic circuit, thereby preventing misjudgment.

[0058] In one embodiment, the capacitor input module 10 includes at least two capacitor circuits to be connected and a capacitor input control circuit corresponding to each capacitor circuit;

[0059] Each capacitor circuit includes a capacitor, a protective resistor and a fuse connected in series with the capacitor, and at least one input control switch; and the capacitors between the capacitor circuits are connected in parallel;

[0060] One end of the fuse is connected to a voltage detection point, and the other end of the fuse is connected to one end of the capacitor, or the other end of the fuse is connected to one end of the capacitor through a control switch;

[0061] One end of the protection resistor is connected to another voltage detection point, and the other end of the protection resistor is connected to the other end of the capacitor, or the other end of the protection resistor is connected to the other end of the capacitor through an input control switch;

[0062] The capacitor input control circuit is connected to the input control switch and the main control module 20 , and is used to control the input control switch to be turned on under the access control of the main control module 20 to connect the corresponding capacitor line to the measured circuit 30 .

[0063] Specifically, Figure 3 and Figure 4 A partial circuit module 11 of the capacitor input module 10 is shown, and two connection modes of capacitor circuits are shown. Figure 3 and Figure 4 Take three capacitor circuits as an example, namely Figure 3 and Figure 4The partial circuit module 11 of the capacitor input module 10 includes three capacitor circuits. Figure 3 One end of the capacitor Ca is connected to one end of the fuse, the other end of the fuse is connected to a voltage detection point, the other end of the capacitor Ca is connected to one end of the resistor through a switch, and the other end of the resistor is connected to another voltage detection point. Similarly, one end of the capacitor Cb is connected to one end of the fuse, the other end of the fuse is connected to a voltage detection point, the other end of the capacitor Cb is connected to one end of the resistor through two switches, and the other end of the resistor is connected to another voltage detection point. One end of the capacitor Cc is connected to one end of the fuse, the other end of the fuse is connected to a voltage detection point, the other end of the capacitor Cc is connected to one end of the resistor through three switches, and the other end of the resistor is connected to another voltage detection point.

[0064] Figure 4 One end of the capacitor Ca is connected to one end of the fuse, the other end of the fuse is connected to a voltage detection point, the other end of the capacitor Ca is connected to one end of the resistor through a switch, and the other end of the resistor is connected to another voltage detection point. Similarly, one end of the capacitor Cb is connected to one end of the fuse, the other end of the fuse is connected to a voltage detection point, the other end of the capacitor Cb is connected to one end of the resistor through a switch, and the other end of the resistor is connected to another voltage detection point. One end of the capacitor Cc is connected to one end of the fuse, the other end of the fuse is connected to a voltage detection point, the other end of the capacitor Cc is connected to one end of the resistor through a switch, and the other end of the resistor is connected to another voltage detection point.

[0065] It should be noted that Figure 3 and Figure 4 The capacitor input control circuit is not shown.

[0066] In this embodiment, the capacitor input control circuit can flexibly and time-dividedly control the capacitors of one or more capacitor lines to be connected to the measured circuit 30.

[0067] In one embodiment, the capacitor input module 10 further includes a manual input control module electrically connected to the capacitor circuit;

[0068] The manual input control module is used to receive and connect the capacitance line specified by the user to the measured circuit 30 according to the manual operation of the user.

[0069] Specifically, the above-mentioned capacitor input control circuit can be automatically controlled by the main control module 20, so as to realize automatic control of capacitor access and voltage detection.

[0070] This embodiment also provides a manual input control module, and the user can use the manual input control module to manually control whether the capacitor is connected to the circuit 30 under test.

[0071] It should be noted that the above-mentioned capacitor input control circuit and the manual input control module of this embodiment are two independent control modules, both of which can control whether the capacitor line is connected to the measured circuit 30, and the two are neither conflicting nor mutually exclusive.

[0072] More specifically, the manual input control module may include a dial switch. The manually operated dial switch may independently control each capacitor line to be connected to the measured circuit 30, or disconnect the capacitor line from the measured circuit 30.

[0073] In addition, if a manual input control module is used, the user can also manually use a voltage measurement tool such as a multimeter to measure the voltages of the two voltage detection points.

[0074] Figure 5 FIG. 1 is a circuit diagram of a capacitor input module 10 in one embodiment; Figure 5 The first end of the capacitor C44 can be connected to the first voltage detection point through the dial switch SW2, the fuse F2, and the wiring terminal JP6. The second end of the capacitor C44 is connected to the second voltage detection point through the resistor U17 and the wiring terminal JP6.

[0075] Since the dip switch SW2 can be turned on and off, whether the first end of the capacitor C44 is connected to the first voltage detection point can be controlled by controlling the on and off of the contacts 1 and 6 of the dip switch SW2, thereby controlling whether the capacitor C44 and the capacitor circuit in which it is located are connected to the measured loop 30.

[0076] Similarly, the first end of capacitor C45 can be connected to the first voltage detection point through the dial switch SW2, the fuse F2, and the wiring terminal JP6. The second end of capacitor C45 is connected to the second voltage detection point through the resistor U17 and the wiring terminal JP6.

[0077] Since the coding switch SW2 can be turned on and off, whether the first end of the capacitor C45 is connected to the first voltage detection point can be controlled by controlling the on and off of the contacts 2 and 5 of the coding switch SW2, thereby controlling whether the capacitor C45 and the capacitor circuit in which it is located are connected to the measured loop 30.

[0078] The first end of the capacitor C46 can be connected to the first voltage detection point through the dial switch SW2, the fuse F2, and the wiring terminal JP6. The second end of the capacitor C46 is connected to the second voltage detection point through the resistor U17 and the wiring terminal JP6.

[0079] Since the dip switch SW2 can be turned on and off, by controlling the on and off of contacts 3 and 4 of the dip switch SW2, it is possible to control whether the first end of the capacitor C46 is connected to the first voltage detection point, thereby controlling whether the capacitor C46 and the capacitor circuit in which it is located are connected to the measured loop 30.

[0080] The dip switch SW2 may be, for example, a SMQS-03R-TP dip switch.

[0081] In this embodiment, by adding a manual input control module, the user can more flexibly control the access of the capacitor, thereby realizing dual control of the capacitor access and human-computer interaction.

[0082] In one embodiment, the input control switch is a relay switch;

[0083] The capacitor input control circuit is specifically used to connect the corresponding capacitor line to the measured circuit 30 by controlling the relay of the relay switch to be attracted.

[0084] Specifically, in this embodiment, each capacitor circuit corresponds to a relay switch, referring to Figure 3 By controlling the first relay switch to be closed, the capacitor Ca can be connected to the measured circuit 30. When the first relay switch is closed, the second relay switch is controlled to be closed, and the capacitor Cb can be connected to the measured circuit 30. When both the first relay switch and the second relay switch are closed, the third relay switch is controlled to be closed, and the capacitor Cc can be connected to the measured circuit 30.

[0085] refer to Figure 4 By controlling the first relay switch to close, the capacitor Ca can be connected to the measured circuit 30.

[0086] By controlling the second relay switch to close, the capacitor Cb can be connected to the measured circuit 30.

[0087] By controlling the third relay switch to close, the capacitor Cc can be connected to the measured circuit 30.

[0088] When the first relay switch and the second relay switch are closed at the same time, the capacitor Ca and the capacitor Cb can be connected at the same time.

[0089] When the first relay switch, the second relay switch and the third relay switch are closed at the same time, the capacitors Ca, Cb and Cc can be connected at the same time.

[0090] The input control switch of this embodiment is a relay switch. By controlling the on-off of the relay switch or the closing of the relay, it is possible to conveniently and flexibly control whether the capacitor line is connected to the circuit 30 under test.

[0091] In one embodiment, the capacitor input control circuit includes a first switch tube, a first resistor, a second resistor, a third resistor and a first diode;

[0092] The first end of the first switch tube is connected to the control end of the main control module 20 through a first resistor to receive an access control signal, and the first end of the first switch tube is also grounded through a second resistor;

[0093] The second end of the first switch tube is connected to a positive voltage through a third resistor, and the third end of the first switch tube is grounded;

[0094] The second end of the first switch tube is connected to one end of the corresponding relay switch, and the third end of the first switch tube is connected to the other end of the relay switch;

[0095] The anode of the first diode is grounded, and the cathode is connected to the second end of the first switch tube.

[0096] Specifically, the capacitor input control circuit in this embodiment is a relay control circuit. Each capacitor input control circuit is used to control whether the corresponding capacitor line is connected to the circuit 30 under test.

[0097] Figure 5 FIG. 1 is a circuit diagram of a capacitor input module 10 in one embodiment; Figure 5 The capacitor input control circuit corresponding to the capacitor C44 includes a first switch tube Q1, a first resistor R30, a second resistor R27, a third resistor R25 and a first diode D7; the first end of the first switch tube Q1 is connected to the control end of the main control module 20 through the first resistor R30 to receive the access control signal RELAY1, and the first end of the first switch tube Q1 is also grounded GND through the second resistor R27; the second end of the first switch tube Q1 is connected to the positive voltage VCC through the third resistor R25, and the third end of the first switch tube Q1 is grounded GND; the second end of the first switch tube Q1 is connected to the contact 2 of the corresponding relay switch RELAY11, and the third end of the first switch tube Q1 is connected to the contact 1 of the relay switch RELAY11; the anode of the first diode D7 is grounded, and the cathode is connected to the second end of the first switch tube Q1.

[0098] The capacitor circuit where the capacitor C44 is located includes the capacitor C44, the relay switch RELAY11, the fuse F2 and the resistor U17. The relay switch RELAY11 is a relay, the first contact of the relay switch RELAY11 is grounded, the third contact is connected to the fourth contact and connected to the normally open switch, the normally open switch can be connected to the sixth contact or the fifth contact, the fifth contact is connected to the first end of the capacitor C44, and the fourth contact of the relay switch RELAY11 is also connected to the first voltage detection point through the fuse F2 and the terminal JP6. The second end of the capacitor C44 is connected to the second voltage detection point through the resistor U17 and the terminal JP6.

[0099] When the first switch tube Q1 receives the access control signal RELAY1 from the main control module 20, the first switch tube Q1 is turned on and the normally open switch of the relay switch RELAY11 is turned to the contact 5, so that the first end of the capacitor C44 is connected to the first voltage detection point through the relay switch RELAY11, the fuse F2 and the terminal JP6 in sequence, and then the capacitor C44 and the capacitor circuit in which it is located are connected to the measured circuit 30.

[0100] The first switch tube Q1 can be a triode or a MOS tube, etc., which is not limited in the present application. If the first switch tube Q1 is a triode, the first end of the first switch tube Q1 is the base, the second end is the collector, and the third end is the emitter.

[0101] The capacitor input control circuit corresponding to the capacitor C45 includes a first switch tube Q2, a first resistor R32, a second resistor R31, a third resistor R33 and a first diode D8; the first end of the first switch tube Q2 is connected to the control end of the main control module 20 through the first resistor R32 to receive the access control signal RELAY2, and the first end of the first switch tube Q2 is also grounded GND through the second resistor R31; the second end of the first switch tube Q2 is connected to the positive voltage VCC through the third resistor R33, and the third end of the first switch tube Q2 is grounded GND; the second end of the first switch tube Q2 is connected to the contact 2 of the corresponding relay switch RELAY22, and the third end of the first switch tube Q2 is connected to the contact 1 of the relay switch RELAY22; the anode of the first diode D8 is grounded, and the cathode is connected to the second end of the first switch tube Q2.

[0102] The capacitor circuit where the capacitor C45 is located includes a capacitor C45, a relay switch RELAY22, a fuse F2 and a resistor U17. The relay switch RELAY22 is a relay, the first contact of the relay switch RELAY22 is grounded, the third contact is connected to the fourth contact and connected to the normally open switch, the normally open switch can be connected to the sixth contact or the fifth contact, the fifth contact is connected to the first end of the capacitor C45, and the fourth contact of the relay switch RELAY22 is also connected to the first voltage detection point through the fuse F2 and the terminal JP6. The second end of the capacitor C45 is connected to the second voltage detection point through the resistor U17 and the terminal JP6.

[0103] When the first switch tube Q2 receives the access control signal RELAY2 from the main control module 20, the first switch tube Q2 is turned on and the normally open switch of the relay switch RELAY22 is turned to the contact 5, so that the first end of the capacitor C45 is connected to the first voltage detection point through the relay switch RELAY22, the fuse F2 and the terminal JP6 in sequence, and then the capacitor C45 and the capacitor circuit in which it is located are connected to the measured circuit 30.

[0104] The first switch tube Q2 can be a triode or a MOS tube, etc., which is not limited in the present application. If the first switch tube Q2 is a triode, the first end of the first switch tube Q2 is the base, the second end is the collector, and the third end is the emitter.

[0105] The capacitor input control circuit corresponding to the capacitor C46 includes a first switch tube Q3, a first resistor R35, a second resistor R34, a third resistor R36 and a first diode D9; the first end of the first switch tube Q3 is connected to the control end of the main control module 20 through the first resistor R35 to receive the access control signal RELAY3, and the first end of the first switch tube Q3 is also grounded GND through the second resistor R34; the second end of the first switch tube Q3 is connected to the positive voltage VCC through the third resistor R36, and the third end of the first switch tube Q3 is grounded GND; the second end of the first switch tube Q3 is connected to the contact 2 of the corresponding relay switch RELAY33, and the third end of the first switch tube Q3 is connected to the contact 1 of the relay switch RELAY33; the anode of the first diode D9 is grounded, and the cathode is connected to the second end of the first switch tube Q3.

[0106] The capacitor circuit where the capacitor C46 is located includes a capacitor C46, ​​a relay switch RELAY11, a fuse F2 and a resistor U17. The relay switch RELAY33 is a relay, the first contact of the relay switch RELAY33 is grounded, the third contact is connected to the fourth contact and connected to the normally open switch, the normally open switch can be connected to the sixth contact or the fifth contact, the fifth contact is connected to the first end of the capacitor C46, ​​and the fourth contact of the relay switch RELAY33 is also connected to the first voltage detection point through the fuse F2 and the terminal JP6. The second end of the capacitor C46 is connected to the second voltage detection point through the resistor U17 and the terminal JP6.

[0107] When the first switch tube Q3 receives the access control signal RELAY3 from the main control module 20, the first switch tube Q3 is turned on, and the normally open switch of the relay switch RELAY33 is turned to the contact 5, so that the first end of the capacitor C46 is connected to the first voltage detection point through the relay switch RELAY33, the fuse F2 and the terminal JP6 in sequence, and then the capacitor C46 and the capacitor circuit in which it is located are connected to the measured circuit 30.

[0108] The first switch tube Q3 can be a triode or a MOS tube, etc., which is not limited in the present application. If the first switch tube Q3 is a triode, the first end of the first switch tube Q3 is the base, the second end is the collector, and the third end is the emitter.

[0109] The first diodes D7, D8 and D9 may be, for example, SS34 diodes.

[0110] The fuse F2 may be a resettable fuse, for example, an mSMD050-60V fuse.

[0111] U17 prevents the capacitor from being grounded after a breakdown.

[0112] Terminal block JP6 is connected to Figure 3 or Figure 4 The voltage detection point in .

[0113] It should be noted that Figure 5 The resistance value, model or capacitance value of each electronic component can be set according to the actual application situation, and this application does not impose any restrictions on this.

[0114] In this embodiment, three capacitors are combined into a "voltage test point" through the normally open contacts of three relays. By controlling the relays to be attracted, the capacitors can be automatically put in one by one to increase the capacitance of the circuit 30 to ground under test, without manual wiring, saving time and labor.

[0115] In one embodiment, the main control module 20 includes a main control circuit and a voltage detection circuit;

[0116] A main control circuit, used to control the capacitors in the capacitor input module 10 to be connected to the measured circuit 30 through different capacitor lines in sequence;

[0117] The voltage detection circuit is connected to the two voltage detection points, and is used to obtain the voltage detection values ​​of the two voltage detection points, divide, isolate and amplify the voltage detection values, and input the obtained analog amplified signal into the main control circuit;

[0118] The main control circuit is also used to perform analog-to-digital conversion on the analog amplified signal to obtain the voltages of two voltage detection points.

[0119] Specifically, Figure 6 is a circuit diagram of a main control circuit in one embodiment; Figure 7 FIG. 4 is a circuit diagram of a voltage detection circuit in one embodiment.

[0120] refer to Figure 6 The main control circuit includes the main control chip U1 and its external circuit. Taking U1 using STM32F103C8T6 as the main control as an example, the basic circuit of the SMT32 microcontroller needs to have an external high-speed crystal oscillator circuit, a power-on reset circuit, a startup mode selection circuit, a power decoupling circuit, and a program download circuit. Among them, C16, C20, and C21 are decoupling circuits, SW1 is a reset circuit, X1 is a high-speed crystal oscillator, and H1 is a program download circuit.

[0121] U1 is the main control chip, and its pins 20 and 44 are for power-on boot. Connect resistors R10 and R84 to the negative power supply. Pins 5 and 6 are external clock input pins, which need to be connected to both ends of the crystal oscillator X1, and connect C39 and C15 to the negative power supply. H1 is the program burning interface, connected to the debug pins SWCLK and SWDIO of the main control. The main control has 3 power pins, which need to be connected to a 3.3V power supply. Capacitors C16, C20, and C21 are connected in parallel for filtering. CN2 is the LCD screen interface. Pin 7 of the main control chip U1 is connected to the reset circuit. Pin 8 of the main control chip U1 is connected to the ground GND, pin 9 of the main control chip U1 is connected to the 3.3V voltage, and pin 10 of the main control chip U1 is connected to the output end of the voltage detection circuit to obtain the analog amplified signal ADC1. Pin 20 of the main control chip U1 is grounded through resistor R84, pin 23 of the main control chip U1 is grounded, pins 24, 48, and 36 of the main control chip U1 are connected to a 3.3V voltage, pins 47 and 35 of the main control chip U1 are grounded, pin 46 of the main control chip U1 is connected to an LED lamp, pin 44 of the main control chip U1 is grounded through resistor R10, and pins 31 and 30 of the main control chip U1 are connected to voltage VCC and ground respectively through terminal CN2.

[0122] The circuit of the LED lamp includes a light emitting diode and a resistor R9. The cathode of the light emitting diode is connected to the pin 46 of the main control chip U1, and the anode of the light emitting diode is connected to the voltage 3.3V through the resistor R9.

[0123] Pins 19, 21 and 22 of the main control chip U1 are connected to Figure 5 The first ends of the first switch tubes Q1, Q2 and Q3 are used to output access control signals RELAY1, RELAY2 and RELAY3 to the switch tubes.

[0124] refer to Figure 7 , JP7 is connected to Figure 3 or Figure 4 The "voltage detection point" in the circuit is divided by three resistors R89, R51, and R88, and then input into the isolation operational amplifier U39 to obtain the analog amplified signal ADC1. The amplification factor of the operational amplifier can be adjusted by the digital potentiometer U9. Then the voltage is detected using the ADC1 interface of the main control chip U1.

[0125] Figure 7Pin 1 of the isolation amplifier U39 is connected to a voltage of 3.3V, and pin 1 of the isolation amplifier U39 is also grounded through capacitor C57, and pin 4 of the isolation amplifier U39 is grounded. Pins 2 and 3 of the isolation amplifier U39 are respectively connected to the two ends of resistor R51, and the first voltage detection point is connected to pin 2 of the isolation amplifier U39 through the first end of JP7 and resistor R89, and the second voltage detection point is connected to pin 3 of the isolation amplifier U39 through the second end of JP7 and resistor R88. Pin 8 of the isolation amplifier U39 is connected to voltage GL13.3V, and pin 8 of the isolation amplifier U39 is also grounded through capacitor C58, and pins 5 and 6 of the isolation amplifier U39 are grounded, and pin 7 of the isolation amplifier U39 is grounded through resistor R52 and capacitor C59, and pin 7 of the isolation amplifier U39 is grounded through resistor R52 and capacitor C40, and pin 7 of the isolation amplifier U39 is connected to pin 3 of U8 through resistor R52. U8 pin 4 is connected to U9 pin 1, U8 pin 2 is grounded, U8 pin 5 is connected to 3.3V, U8 pin 1 is connected to U9 pin 7, U8 pin 1 is also connected to 3.3V through capacitor C41, U8 pin 1 is also grounded through resistor R21 and capacitor C42, U8 pin 1 is also connected to 3.3V through resistor R21 and diode D5, U8 pin 1 is also connected to the main control chip through resistor R21 to output signal ADC1. U8 pin 1 is also grounded through resistor R21 and diode D6. U9 pin 8 is grounded, U9 pin 3 is connected to +3.3V through capacitor C43, U9 pin 2 is connected to +3.3V, and U9 pins 4-6 are connected to pins 15, 17, and 14 of the main control chip U1 respectively.

[0126] In addition, pin 1 of U33 is grounded, and pin 1 of U33 is also connected to voltage VCC through capacitor C31, pin 2 of U33 is connected to voltage VCC, pin 3 of U33 is grounded, pin 4 of U33 is connected to voltage GL3.3V, and pin 4 of U33 is also grounded through capacitor C32.

[0127] In this embodiment, the main control circuit can control the connection of different capacitors, and the combination of the main control circuit and the voltage detection circuit can accurately collect the voltages of two voltage detection points when different numbers of capacitors are connected.

[0128] In one embodiment, the parasitic loop detection device further includes a display module;

[0129] The display module is connected to the main control circuit in the main control module 20, and is used to display the voltages of two voltage detection points detected at different times or before and after the capacitors are connected and after different numbers of capacitors are connected;

[0130] The display module is also used to display the judgment result, wherein the judgment result is used to indicate that the measured circuit 30 has a parasitic circuit, or that the measured circuit 30 does not have a parasitic circuit or has induced electricity.

[0131] Specifically, disconnect the circuit breaker of the circuit to be tested, and then connect the circuit to be tested 30 to JP6. Detect the voltage once before adding capacitors, add capacitors one by one, perform voltage detection, and compare the voltage values ​​before and after adding capacitors. If the voltage decreases after adding capacitors, the measured voltage is the induced voltage, otherwise the measured voltage is the parasitic circuit cross-current. At this time, the corresponding information is displayed on the LCD screen.

[0132] Fig. 9 The flowchart of the main control module 20 in one embodiment is shown in FIG. 1 . The display module can be used for human-computer interaction. The user can select the AC gear or the DC gear through the display module, and then detect and record the voltage U1 of the two voltage detection points before the capacitor is not connected. After the capacitor Ca is put into operation, the voltage U2 of the two voltage detection points before the capacitor Ca is put into operation is detected and recorded. After the capacitor Cb is put into operation, the voltage U3 of the two voltage detection points before the capacitor Ca and Cb is put into operation is detected and recorded. After the capacitor Cc is put into operation, the voltage U4 of the two voltage detection points before the capacitor Ca, Cb and Cc is put into operation is detected and recorded, and the voltage U1-U4 is displayed on the LCD screen of the display module. The main control module 20 also determines whether the voltage decreases in sequence according to U1-U4. If the voltage is not smaller in sequence, it is determined that there is a parasitic circuit, and the parasitic series electricity is displayed on the LCD screen. If the voltage decreases in sequence, it is calculated and determined whether the voltage meets the capacitor voltage division. If it meets the capacitor voltage division, it is determined that there is no parasitic circuit, and the LCD screen displays the induction electricity. If it does not meet the capacitor voltage division, it is determined that there is a parasitic circuit.

[0133] In one embodiment, the parasitic loop detection device further includes a power supply module, which is used to convert an input voltage into at least one target voltage and use the target voltage to power other modules.

[0134] Specifically, Figure 8 is a circuit diagram of a power module in one embodiment; Figure 8The power supply of the device is provided by a rechargeable lithium battery. USB1 is a type-C interface for charging. CN1 is the interface of the lithium battery. After filtering by C3, C4, and C5, it is input into the BAT pin of the power management chip (U2), and then through the VOUT pin of the chip, filtered by C1 and C2, and output 5V voltage after voltage stabilization by D2. LED1 is a common cathode light emitting diode. During the charging process, the CHARG pin of the power management chip outputs a high level, the PROG pin outputs a low level, and LED1 emits red light; when the battery is fully charged, the CHARG pin of the power management chip outputs a low level, the PROG pin outputs a high level, and LED1 emits green light. The voltage output of U2 is 5V, and a linear voltage regulator U15 is used to reduce the 5V voltage to 3.3V for the subsequent circuit. U16 is a power switch, and D10 further reduces the voltage, and outputs 3.3V after filtering by C27 and C28.

[0135] Pin 1 of U2 is connected to ground through parallel D2, capacitor C1 and capacitor C2, and pin 1 of U2 is also connected to voltage VCC, pin 2 of U2 is connected to pin 4 through LED1, pin 3 of U2 is connected to ground through resistor R2, pin 5 of U2 is connected to LED1 through resistor R3, pin 5 of U2 is also connected to ground through capacitor C6, pin 5 of U2 is also connected to pin 11 of USB1 through resistor U3, pin 6 of U2 is connected to ground through parallel capacitors C3, C4 and C5, pin 6 of U2 is also connected to pin 2 of CN1, pin 6 of U2 is also connected to pin 1 of CN1 through parallel capacitors C3, C4 and C5, pin 6 of U2 is also connected to pin 1 through inductors L1 and D1, pins 7 and 9 of U2 are connected to ground, and pin 8 of U2 is connected to pin 1 through D1. Pin 1 of USB1 is grounded, pins 2 and 11 of USB1 are connected, and pin 12 of USB1 is grounded.

[0136] Pin 1 of U15 is connected to pin 2 of U16 through D10, and pin 1 of U15 is also connected to pin 3. Pin 2 of U15 is grounded, and pin 5 of U15 outputs a voltage of 3.3V, and pin 5 of U15 is also grounded through capacitors C27 and C28 connected in parallel. Pin 1 of U16 is connected to voltage VCC.

[0137] In this embodiment, a variety of target voltages can be converted through the power module to provide power for other modules.

[0138] The device of the present application may include a power supply circuit to supply power to a main control chip (MCU); a capacitor input circuit to input a capacitor into a measured circuit 30 or a measured circuit through a general input and output port (GPIO) of the MCU to increase the capacitance of the measured circuit to ground; a voltage detection circuit connected to the measured circuit to measure the voltage change of the measured circuit before and after the capacitor is input; and a liquid crystal screen for selecting to measure an AC circuit or a DC circuit, and simultaneously displaying a voltage value and a determination result of whether a parasitic circuit exists.

[0139] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be completed by instructing the relevant hardware through a computer program, and the program can be stored in a non-volatile computer-readable storage medium. When the program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in the present application can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0140] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0141] The above embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A parasitic loop detection device, characterized in that: The parasitic loop detection device includes a capacitor input module and a main control module; The capacitor input module includes at least two capacitors connected in parallel, and each capacitor can be connected to the measured circuit or disconnected from the measured circuit through different capacitor lines. If the capacitor is connected to the measured circuit, the connected capacitor is connected in parallel with the ground capacitance of the measured circuit when the circuit breaker is disconnected; The main control module is connected to the measured circuit and the capacitor input module respectively, and is used to detect the voltages of two voltage detection points of the measured circuit after disconnecting the circuit breaker of the measured circuit and before connecting the capacitor; The main control module is further used to control the capacitors in the capacitor input module to be connected to the measured circuit through different capacitor lines in sequence, and to detect the voltages of the two voltage detection points each time a capacitor is connected, wherein the capacitor line where each capacitor is located is connected to the measured circuit through the two voltage detection points; The main control module is further used to determine whether there is a parasitic circuit in the measured circuit according to the voltage changes of the two voltage detection points.

2. The parasitic circuit detection device according to claim 1, characterized in that: The main control module is specifically used to determine whether the voltages of the two voltage detection points of the measured circuit decrease successively before and after the capacitor is connected and as the number of connected capacitors increases. If it is determined that the voltages of the two voltage detection points of the measured circuit decrease successively, it is determined that there is no parasitic circuit in the measured circuit; if it is determined that the voltages of the two voltage detection points of the measured circuit remain unchanged or the change is within a preset small range, it is determined that there is a parasitic circuit in the measured circuit.

3. The parasitic circuit detection device according to claim 1, characterized in that: The main control module is specifically used to determine whether the voltages of the two voltage detection points of the measured circuit decrease successively before and after the capacitor is connected and as the number of connected capacitors increases. If it is determined that the voltages of the two voltage detection points of the measured circuit decrease successively, then according to the capacitance value of the connected capacitor, the capacitance value of the capacitance to ground of the measured circuit before the capacitor is connected, and the total voltage of the measured circuit, it is determined whether the voltages of the two voltage detection points after each increase of the connected capacitor meet the capacitor voltage division. If it meets the capacitor voltage division, it is determined that there is no parasitic circuit in the measured circuit. If it does not meet the capacitor voltage division, it is determined that there is a parasitic circuit in the measured circuit; If it is determined that the voltages of the two voltage detection points of the measured circuit remain unchanged or the variation is within a preset small range, it is determined that a parasitic circuit exists in the measured circuit.

4. The parasitic circuit detection device according to claim 1, characterized in that: The capacitor input module includes at least two capacitor circuits to be connected and a capacitor input control circuit corresponding to each capacitor circuit; Each capacitor circuit includes a capacitor, a protective resistor and a fuse connected in series with the capacitor, and at least one input control switch; and the capacitors between the capacitor circuits are connected in parallel; One end of the fuse is connected to a voltage detection point, and the other end of the fuse is connected to one end of the capacitor, or the other end of the fuse is connected to one end of the capacitor through a control switch; One end of the protection resistor is connected to another voltage detection point, and the other end of the protection resistor is connected to the other end of the capacitor, or the other end of the protection resistor is connected to the other end of the capacitor through an input control switch; The capacitor input control circuit is connected to the input control switch and the main control module, and is used to control the input control switch to be turned on under the access control of the main control module so as to connect the corresponding capacitor line to the measured circuit.

5. The parasitic circuit detection device according to claim 4, characterized in that: The capacitor input module also includes a manual input control module electrically connected to the capacitor circuit; The manual input control module is used to receive and connect the capacitance line specified by the user to the measured circuit according to the manual operation of the user.

6. The parasitic circuit detection device according to claim 4, characterized in that: The input control switch is a relay switch; The capacitor input control circuit is specifically used to connect the corresponding capacitor line to the measured circuit by controlling the relay of the relay switch to be closed.

7. The parasitic circuit detection device according to claim 6, characterized in that: The capacitor input control circuit comprises a first switch tube, a first resistor, a second resistor, a third resistor and a first diode; The first end of the first switch tube is connected to the control end of the main control module through a first resistor to receive an access control signal, and the first end of the first switch tube is also grounded through a second resistor; The second end of the first switch tube is connected to a positive voltage through a third resistor, and the third end of the first switch tube is grounded; The second end of the first switch tube is connected to one end of the corresponding relay switch, and the third end of the first switch tube is connected to the other end of the relay switch; The anode of the first diode is grounded, and the cathode is connected to the second end of the first switch tube.

8. The parasitic circuit detection device according to claim 1, characterized in that: The main control module includes a main control circuit and a voltage detection circuit; The main control circuit is used to control the capacitors in the capacitor input module to be connected to the measured circuit through different capacitor lines in sequence; The voltage detection circuit is connected to the two voltage detection points, and is used to obtain the voltage detection values ​​of the two voltage detection points, divide, isolate and amplify the voltage detection values, and input the obtained analog amplified signals into the main control circuit; The main control circuit is also used to perform analog-to-digital conversion on the analog amplified signal to obtain the voltages of the two voltage detection points.

9. The parasitic circuit detection device according to claim 1, characterized in that: The parasitic loop detection device also includes a display module; The display module is connected to the main control circuit in the main control module, and is used to display the voltages of the two voltage detection points detected at different times or before and after the capacitors are connected and after different numbers of capacitors are connected; The display module is further used to display a judgment result, wherein the judgment result is used to indicate that a parasitic circuit exists in the measured circuit, or that a parasitic circuit does not exist in the measured circuit or that induced electricity exists.

10. The parasitic loop detection device according to claim 1, further comprising a power supply module, wherein the power supply module is used to convert an input voltage into at least one target voltage and use the target voltage to power other modules.

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