Detection device for parasitic loops

Abstract

The application discloses a kind of detection devices of parasitic loop, and the capacitor input module includes at least two parallel capacitors, and each capacitor can be respectively connected to the measured loop or disconnected with the measured loop by different capacitor lines;The host control module is used to detect the voltage of two voltage detection points of the measured loop after the air switch of the measured loop is disconnected, before the capacitor is connected;Control capacitor input module in the capacitor is connected to the measured loop by different capacitor lines in turn, and the voltage of two voltage detection points is detected every time a capacitor is connected;According to the voltage variation of two voltage detection points, it is judged whether the measured loop exists parasitic loop or not.The application can accurately distinguish parasitic series electricity and induced electricity, exclude the interference of induced electricity, truly judge whether detection parasitic loop exists or not, without manual wiring, save time and effort, and can be applied to the parasitic loop detection of various secondary circuits.

Description

Technical Field

[0001] This invention relates to the field of parasitic circuit detection technology, and more particularly to a device for detecting parasitic circuits. Background Technology

[0002] Parasitic loops are strictly prohibited in secondary circuits. Current technology typically checks for parasitic loops by disconnecting the circuit breaker and using a multimeter to measure the voltage at the positive and negative terminals of the circuit breaker. However, secondary circuits are complex and may have two power supply points close to each other. For example, different contacts of a circuit breaker auxiliary switch may have control power or signal power. When two contacts are close together, induced voltage may be present. Therefore, the method of disconnecting the circuit breaker and measuring the potential cannot determine whether the voltage is generated by a parasitic loop or by induced voltage, thus making it impossible to accurately determine whether a parasitic loop actually exists in the secondary circuit. Summary of the Invention

[0003] Based on this, it is necessary to address the technical problem that existing technologies may not be able to accurately determine whether a parasitic circuit exists in the secondary circuit if induced electricity is present, and propose a parasitic circuit detection device.

[0004] A parasitic circuit detection device, comprising a capacitor input module and a main control module;

[0005] The capacitor input module includes at least two capacitors connected in parallel, and each capacitor can be connected to the circuit under test or disconnected from the circuit under test through different capacitor lines.

[0006] The main control module is connected to the circuit under test and the capacitor input module respectively, and is used to detect the voltage at two voltage detection points of the circuit under test after the circuit breaker of the circuit under test is disconnected and before the capacitor is connected.

[0007] The main control module is also used to control the capacitors in the capacitor input module to be connected to the circuit under test through different capacitor lines in sequence, and to detect the voltage of two voltage detection points for each capacitor connected. The capacitor line of each capacitor is connected to the circuit under test through two voltage detection points.

[0008] The main control module is also used to determine whether there is a parasitic loop in the circuit under test based on the voltage changes at the two voltage detection points.

[0009] The parasitic loop detection device provided in this application can automatically connect different numbers of capacitors sequentially and detect the voltage at the voltage detection point before and after connecting the capacitors, as well as after connecting different numbers of capacitors. Based on the voltage changes at the voltage detection point, it determines whether a parasitic loop exists in the secondary circuit or the circuit under test. This application can accurately distinguish between parasitic crosstalk and induced crosstalk, eliminate interference from induced crosstalk, and accurately determine the existence of parasitic loops. It requires no manual wiring, saving time and effort, and can be applied to the detection of parasitic loops in various secondary circuits. Attached Figure Description

[0010] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] in:

[0012] Figure 1 This is a structural block diagram of a parasitic loop detection device in one embodiment;

[0013] Figure 2 This is a schematic diagram of the existing technology of measuring potential by disconnecting the circuit breaker;

[0014] Figure 3 This is a partial schematic diagram of the capacitor input module in one embodiment;

[0015] Figure 4 This is a partial schematic diagram of the capacitor input module in one embodiment;

[0016] Figure 5 This is a circuit diagram of the capacitor input module in one embodiment;

[0017] Figure 6 This is a circuit diagram of the main control circuit in one embodiment;

[0018] Figure 7 This is a circuit diagram of a voltage detection circuit in one embodiment;

[0019] Figure 8 This is a circuit diagram of the power module in one embodiment;

[0020] Figure 9 This is a flowchart of the main control module in one embodiment. Detailed Implementation

[0021] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] Figure 2 This is a schematic diagram of the existing technology of disconnecting the circuit breaker to measure the potential; such as... Figure 2 As shown, the power supply points A and B are close together, which may induce current. Disconnecting the circuit breaker for power supply B creates capacitance C1 between A and B, and capacitance C2 between B and ground. A voltage can still be detected on B. If this voltage is known to be induced, B can be shorted to ground. However, in reality, it's difficult to determine whether this voltage is induced or from a parasitic loop. If it's a parasitic loop, shorting B to ground rashly will cause a grounding fault and an accident.

[0023] Therefore, existing technology cannot confirm whether the voltage detected by circuit B after disconnecting the circuit breaker is an induced voltage or a parasitic loop current, while ensuring line safety. In other words, it cannot determine whether a parasitic loop exists.

[0024] In addition, the existing method of measuring potential by disconnecting the circuit breaker requires staff to check against the drawings, which is time-consuming, labor-intensive, and inefficient.

[0025] Therefore, it is necessary to design a parasitic circuit detection device to detect whether there is a parasitic circuit on the secondary circuit.

[0026] like Figure 1 As shown, in one embodiment, a parasitic circuit detection device is provided, which includes a capacitor input module 10 and a main control module 20.

[0027] The capacitor input module 10 includes at least two capacitors connected in parallel, and each capacitor can be connected to the circuit under test 30 or disconnected from the circuit under test 30 through different capacitor lines.

[0028] The main control module 20 is connected to the circuit under test 30 and the capacitor input module 10 respectively, and is used to detect the voltage at two voltage detection points of the circuit under test 30 after the circuit breaker of the circuit under test 30 is disconnected and before the capacitor is connected.

[0029] The main control module 20 is also used to control the capacitors in the capacitor input module 10 to be connected to the circuit under test 30 through different capacitor lines, and to detect the voltage of two voltage detection points for each capacitor connected. The capacitor line of each capacitor is connected to the circuit under test 30 through two voltage detection points.

[0030] The main control module 20 is also used to determine whether there is a parasitic circuit in the circuit under test 30 based on the voltage changes at the two voltage detection points.

[0031] Specifically, the capacitor input module 10 includes at least two capacitor lines, each including one capacitor, with the capacitors in different lines connected in parallel. The capacitor in each line can be connected to or disconnected from the circuit under test 30. More specifically, each capacitor line can be equipped with a switch, which controls whether the capacitor in that line is connected to the circuit under test 30 by opening and closing the switch.

[0032] In this embodiment, the main control module 20 automatically controls the connection or disconnection of capacitors in the capacitor input module 10. Furthermore, only one capacitor is connected to the test circuit 30 at a time. The main control module 20 can sequentially control different capacitors to connect to the test circuit 30 one by one. For example, it can first control the capacitor of the first capacitor line to connect to the test circuit 30, and after a certain period of time, control the capacitor of the second capacitor line to connect to the test circuit 30, and after another certain period of time, control the capacitor of the third capacitor line to connect to the test circuit 30, and so on.

[0033] It should be noted that as capacitors are added, existing capacitors do not need to be disconnected. Therefore, the number of capacitors connected to the circuit under test 30 increases gradually.

[0034] Before the capacitor is connected, the circuit under test 30 has a capacitance to ground. If the capacitor is connected to the circuit under test 30, the connected capacitor will be connected in parallel with the capacitance to ground of the circuit under test 30 when the circuit breaker is disconnected. Therefore, the connection of the capacitor is equivalent to increasing the capacitance to ground of the circuit under test 30.

[0035] Figure 3 This is a partial schematic diagram of the capacitor input module 10 in one embodiment; Figure 4 This is a partial schematic diagram of the capacitor input module 10 in one embodiment; see reference. Figure 3 and Figure 4 The power supply point A is close to the power supply point B of the circuit under test 30. When the power supply circuit breaker of circuit B is disconnected, capacitance C1 is generated between A and B, and capacitance C2 is generated between B and ground. A capacitor transfer module 10 is connected between the power supply point B of the circuit under test 30 and ground. Figure 3 and Figure 4 The capacitor input module 10 has three capacitors, Ca, Cb, and Cc. Each capacitor can be connected to two voltage detection points of the circuit under test 30 through different capacitor lines by switching on and off. After the capacitors are connected to the circuit under test 30, it is equivalent to increasing the capacitance of the circuit under test 30 to ground.

[0036] certainly, Figure 3 and Figure 4This is merely an illustrative example. The number of operable capacitors included in the capacitor input module 10 may be 2, 3, 4, 6, or other numbers, and this application does not impose any restrictions on this.

[0037] When capacitors Ca, Cb, and Cc are connected to or connected to the circuit under test 30, they are equivalent to being connected in parallel with the initial capacitance to ground C2 of the circuit under test 30, which is equivalent to increasing the capacitance to ground of the circuit under test 30.

[0038] The main control module 20 is used to detect the voltage at two voltage detection points before and after the capacitor is connected to the circuit under test 30. For example, before the capacitor is connected, the voltage at the two voltage detection points is U1. After the capacitor Ca is connected, the voltage at the two voltage detection points is U2. After the capacitor Cb is connected, the voltage at the two voltage detection points is U3. After the capacitor Cc is connected, the voltage at the two voltage detection points is U4.

[0039] The main control module 20 is also used to compare the voltage changes of two voltage detection points at different detection times, such as comparing the changes between U1, U2, U3, and U4, and to determine whether there is a parasitic circuit in the circuit under test 30 based on the voltage changes.

[0040] The parasitic loop detection device provided in this embodiment can automatically connect different numbers of capacitors sequentially and detect the voltage at the voltage detection point before and after connecting the capacitors, as well as after connecting different numbers of capacitors. Based on the voltage changes at the voltage detection points, it determines whether a parasitic loop exists in the secondary circuit or the circuit under test 30. This embodiment can accurately distinguish between parasitic crosstalk and induced crosstalk, eliminate interference from induced crosstalk, and accurately determine whether a parasitic loop exists. It requires no manual wiring, saving time and effort, and can be applied to the detection of parasitic loops in various secondary circuits.

[0041] In one embodiment, the main control module 20 is specifically used to determine whether the voltage of the two voltage detection points of the circuit under test 30 decreases sequentially before and after the capacitor is connected, and as the number of connected capacitors increases. If it is determined that the voltage of the two voltage detection points of the circuit under test 30 decreases sequentially, it is determined that the circuit under test 30 does not have a parasitic loop. If it is determined that the voltage of the two voltage detection points of the circuit under test 30 remains unchanged or the change is within a preset small range, it is determined that the circuit under test 30 has a parasitic loop.

[0042] Specifically, such as Figure 2 As shown, after the circuit breaker is disconnected, if the voltage across B is an induced voltage, according to the capacitor voltage divider formula, the voltage across capacitor C2 is:

[0043] Vc2 = Vtotal * [C1 / [C1+C2]]

[0044] The voltage Vc2 across capacitor C2 is inversely proportional to the value of capacitor C2. Therefore... Figure 3 or Figure 4In the process, before adding Ca, Cb, and Cc, the voltage at the "voltage detection point" is measured. Then, capacitors Ca, Cb, and Cc are added sequentially. The capacitance of B to ground increases sequentially, which is equivalent to C2 increasing sequentially. If the voltage at the "voltage detection point" gradually decreases after adding the capacitors sequentially, then this voltage is the induced voltage. If the voltage at the "voltage detection point" remains unchanged, then this voltage is the series voltage of the parasitic circuit.

[0045] That is, if the circuit under test 30 does not have a parasitic circuit, but has induced current, the voltage at the two voltage detection points will gradually decrease as the capacitor is connected.

[0046] If a parasitic loop exists in the circuit under test 30, the voltage at the two voltage detection points will remain unchanged or change within a small range as the capacitor is connected.

[0047] Based on this principle, it can be determined whether the tested circuit 30 has a parasitic circuit.

[0048] In one embodiment, the main control module 20 is specifically used to determine whether the voltage of the two voltage detection points of the circuit under test 30 decreases sequentially before and after the capacitor is connected, and as the number of connected capacitors increases. If it is determined that the voltage of the two voltage detection points of the circuit under test 30 decreases sequentially, then based on the capacitance value of the connected capacitor, the capacitance value of the capacitance to ground of the circuit under test 30 before the capacitor is connected, and the total voltage of the circuit under test 30, it is determined whether the voltage of the two voltage detection points conforms to the capacitor voltage division after each addition of the connected capacitor. If it conforms to the capacitor voltage division, it is determined that the circuit under test 30 does not have a parasitic loop. If it does not conform to the capacitor voltage division, it is determined that the circuit under test 30 has a parasitic loop.

[0049] If it is determined that the voltage at the two voltage detection points of the circuit under test 30 remains unchanged or the change is within a preset small range, then it is determined that the circuit under test 30 has a parasitic circuit.

[0050] Specifically, such as Figure 2 As shown, after the circuit breaker is disconnected, if the voltage across B is an induced voltage, according to the capacitor voltage divider formula, the voltage across capacitor C2 is:

[0051] Vc2 = Vtotal * [C1 / [C1+C2]]

[0052] The voltage Vc2 across capacitor C2 is inversely proportional to the value of capacitor C2. Therefore... Figure 3 or Figure 4 In the process, before adding Ca, Cb, and Cc, the voltage at the "voltage detection point" is measured. Then, capacitors Ca, Cb, and Cc are added sequentially. The capacitance of B to ground increases sequentially, which is equivalent to C2 increasing sequentially. If the voltage at the "voltage detection point" gradually decreases after adding the capacitors sequentially, then this voltage is the induced voltage. If the voltage at the "voltage detection point" remains unchanged, then this voltage is the series voltage of the parasitic circuit.

[0053] That is, if the circuit under test 30 does not have a parasitic circuit, but has induced current, the voltage at the two voltage detection points will gradually decrease as the capacitor is connected.

[0054] If a parasitic loop exists in the circuit under test 30, the voltage at the two voltage detection points will remain unchanged or change within a small range as the capacitor is connected.

[0055] Based on this principle, it can be determined whether the tested circuit 30 has a parasitic circuit.

[0056] To ensure the accuracy of the judgment and prevent misjudgment, this embodiment adds a judgment to determine whether the voltage of the two voltage detection points of the circuit under test 30 decreases sequentially after the capacitor is added each time. If the voltage of the two voltage detection points conforms to the capacitor voltage division, it is determined that the circuit under test 30 does not have a parasitic circuit. If the voltage of the two voltage detection points does not conform to the capacitor voltage division, it is determined that the circuit under test 30 has a parasitic circuit.

[0057] Based on this principle, this embodiment can more accurately determine whether there is a parasitic circuit in the circuit under test 30, and prevent misjudgment.

[0058] In one embodiment, the capacitor input module 10 includes at least two capacitor lines to be connected and a capacitor input control circuit corresponding to each capacitor circuit.

[0059] Each capacitor circuit includes a capacitor, a protective resistor and a fuse connected in series with the capacitor, and at least one control switch; and the capacitors in the capacitor circuits are connected in parallel.

[0060] One end of the fuse is connected to a voltage detection point, and the other end of the fuse is connected to one end of a capacitor, or the other end of the fuse is connected to one end of a capacitor via an on / off control switch.

[0061] One end of the protective resistor is connected to another voltage detection point, and the other end of the protective resistor is connected to the other end of the capacitor, or the other end of the protective resistor is connected to the other end of the capacitor through an on / off control switch.

[0062] The capacitor input control circuit is connected to the input control switch and the main control module 20. Under the access control of the main control module 20, it controls the input control switch to turn on so as to connect the corresponding capacitor line to the circuit under test 30.

[0063] Specifically, Figure 3 and Figure 4 Part of the circuit module 11 of the capacitor input module 10 is shown, and two connection methods for the capacitor lines are also shown. Figure 3 and Figure 4 This example uses a three-capacitor circuit. Figure 3 and Figure 4The circuit module 11 of the capacitor input module 10 contains three capacitor lines. Figure 3 One end of capacitor Ca is connected to one end of a fuse. The other end of the fuse is connected to a voltage detection point. The other end of capacitor Ca is connected to one end of a resistor via a switch. The other end of the resistor is connected to another voltage detection point. Similarly, one end of capacitor Cb is connected to one end of a fuse. The other end of the fuse is connected to a voltage detection point. The other end of capacitor Cb is connected to one end of a resistor via two switches. The other end of the resistor is connected to another voltage detection point. One end of capacitor Cc is connected to one end of a fuse. The other end of the fuse is connected to a voltage detection point. The other end of capacitor Cc is connected to one end of a resistor via three switches. The other end of the resistor is connected to another voltage detection point.

[0064] Figure 4 One end of capacitor Ca is connected to one end of a fuse. The other end of the fuse is connected to a voltage detection point. The other end of capacitor Ca is connected to one end of a resistor via a switch. The other end of the resistor is connected to another voltage detection point. Similarly, one end of capacitor Cb is connected to one end of a fuse. The other end of the fuse is connected to a voltage detection point. The other end of capacitor Cc is connected to one end of a fuse. The other end of the fuse is connected to a voltage detection point. The other end of capacitor Cc is connected to one end of a resistor via a switch. The other end of the resistor is connected to another voltage detection point.

[0065] It should be noted that, Figure 3 and Figure 4 The capacitor input control circuit is not shown.

[0066] This embodiment uses a capacitor input control circuit to flexibly and in time-segment control the connection of one or more capacitor lines to the circuit under test 30.

[0067] In one embodiment, the capacitor input module 10 further includes a manual input control module electrically connected to the capacitor circuit.

[0068] The manual input control module is used to receive and connect the capacitor line specified by the user to the circuit under test 30 according to the user's manual operation.

[0069] Specifically, the capacitor input control circuit mentioned above can be automatically controlled by the main control module 20, thereby realizing automatic control of capacitor input and voltage detection.

[0070] This embodiment also provides a manual connection control module, which allows users to manually control whether the capacitor is connected to the circuit under test 30.

[0071] It should be noted that the capacitor input control circuit mentioned above and the manual input control module of this embodiment are two independent control modules. Both can control whether the capacitor line is connected to the circuit under test 30. The two do not conflict or exclude each other.

[0072] More specifically, the manual control module may include DIP switches. Manually operating the DIP switches can independently control the connection of each capacitor line to the circuit under test 30, or disconnect the capacitor line from the circuit under test 30.

[0073] In addition, if the manual input control module is used, the user can also manually use voltage measuring tools such as a multimeter to measure the voltage at the two voltage detection points.

[0074] Figure 5 Here is a circuit diagram of capacitor input module 10 in one embodiment; see reference. Figure 5 The first terminal of capacitor C44 can be connected to the first voltage detection point via DIP switch SW2, fuse F2, and terminal JP6. The second terminal of capacitor C44 can be connected to the second voltage detection point via resistor U17 and terminal JP6.

[0075] Since the DIP switch SW2 can be switched on and off, by controlling the on and off of contacts 1 and 6 of the DIP switch SW2, it is possible to control whether the first terminal of capacitor C44 is connected to the first voltage detection point, and thus control whether capacitor C44 and the capacitor line it is connected to are connected to the circuit under test 30.

[0076] Similarly, the first terminal of capacitor C45 can be connected to the first voltage detection point via DIP switch SW2, fuse F2, and terminal JP6. The second terminal of capacitor C45 can be connected to the second voltage detection point via resistor U17 and terminal JP6.

[0077] Since the DIP switch SW2 can be switched on and off, by controlling the on / off state of contacts 2 and 5 of the DIP switch SW2, it is possible to control whether the first terminal of capacitor C45 is connected to the first voltage detection point, and thus control whether capacitor C45 and the capacitor line it is connected to the circuit under test 30.

[0078] The first terminal of capacitor C46 can be connected to the first voltage detection point via DIP switch SW2, fuse F2, and terminal JP6. The second terminal of capacitor C46 can be connected to the second voltage detection point via resistor U17 and terminal JP6.

[0079] Since the DIP switch SW2 can be switched on and off, by controlling the on and off of contacts 3 and 4 of the DIP switch SW2, it is possible to control whether the first terminal of capacitor C46 is connected to the first voltage detection point, and thus control whether capacitor C46 and the capacitor line it is connected to are connected to the circuit under test 30.

[0080] For example, the DIP switch SW2 can be an SMQS-03R-TP DIP switch.

[0081] This embodiment adds a manual input control module, which allows for more flexible user control of capacitor connection, realizing dual control of capacitor connection and human-computer interaction.

[0082] In one embodiment, the input control switch is a relay switch;

[0083] The capacitor input control circuit is specifically used to connect the corresponding capacitor line to the circuit under test 30 by controlling the relay switch to activate the relay.

[0084] Specifically, in this embodiment, each capacitor circuit corresponds to a relay switch, see reference. Figure 3 By controlling the first relay switch to close, capacitor Ca can be connected to the circuit under test 30. With the first relay switch closed, controlling the second relay switch to close will connect capacitor Cb to the circuit under test 30. With both the first and second relay switches closed, controlling the third relay switch to close will connect capacitor Cc to the circuit under test 30.

[0085] refer to Figure 4 By controlling the first relay switch to close, capacitor Ca can be connected to the circuit under test 30.

[0086] By controlling the closing of the second relay switch, capacitor Cb can be connected to the circuit under test 30.

[0087] By controlling the closing of the third relay switch, capacitor Cc can be connected to the circuit under test 30.

[0088] When the first and second relay switches are closed simultaneously, capacitors Ca and Cb can be connected at the same time.

[0089] When the first, second, and third relay switches are closed simultaneously, capacitors Ca, Cb, and Cc can be connected at the same time.

[0090] In this embodiment, the input control switch is a relay switch. By controlling the on / off state of the relay switch or the activation of the relay, it is possible to conveniently and flexibly control whether the capacitor line is connected to the circuit under test 30.

[0091] In one embodiment, the capacitor input control circuit includes a first switching transistor, a first resistor, a second resistor, a third resistor, and a first diode;

[0092] The first terminal of the first switching transistor is connected to the control terminal of the main control module 20 through a first resistor to receive the access control signal. The first terminal of the first switching transistor is also grounded through a second resistor.

[0093] The second terminal of the first switching transistor is connected to a positive voltage through the third resistor, and the third terminal of the first switching transistor is grounded.

[0094] The second terminal of the first switching transistor is connected to one end of the corresponding relay switch, and the third terminal of the first switching transistor is connected to the other end of the relay switch.

[0095] The anode of the first diode is grounded, and the cathode is connected to the second terminal of the first switching transistor.

[0096] Specifically, in this embodiment, the capacitor connection control circuit is a relay control circuit. Each capacitor connection control circuit is used to control whether the corresponding capacitor line is connected to the circuit under test 30.

[0097] Figure 5 Here is a circuit diagram of capacitor input module 10 in one embodiment; see reference. Figure 5 The capacitor input control circuit corresponding to capacitor C44 includes a first switch Q1, a first resistor R30, a second resistor R27, a third resistor R25, and a first diode D7. The first terminal of the first switch Q1 is connected to the control terminal of the main control module 20 through the first resistor R30 to receive the access control signal RELAY1. The first terminal of the first switch Q1 is also grounded to GND through the second resistor R27. The second terminal of the first switch Q1 is connected to the positive voltage VCC through the third resistor R25. The third terminal of the first switch Q1 is grounded to GND. The second terminal of the first switch Q1 is connected to contact 2 of the corresponding relay switch RELAY11, and the third terminal of the first switch Q1 is connected to contact 1 of the relay switch RELAY11. The anode of the first diode D7 is grounded, and the cathode is connected to the second terminal of the first switch Q1.

[0098] The capacitor circuit containing capacitor C44 includes capacitor C44, relay switch RELAY11, fuse F2, and resistor U17. Relay switch RELAY11 is a relay; its first contact is grounded, its third and fourth contacts are connected to a normally open switch, which can be connected to either the sixth or fifth contact. The fifth contact is connected to the first terminal of capacitor C44. The fourth contact of relay switch RELAY11 is also connected to the first voltage detection point via fuse F2 and terminal JP6. The second terminal of capacitor C44 is connected to the second voltage detection point via resistor U17 and terminal JP6.

[0099] When the first switch Q1 receives the access control signal RELAY1 from the main control module 20, the first switch Q1 is turned on and switches the normally open switch of the relay switch RELAY11 to contact 5. This causes the first end of the capacitor C44 to be connected to the first voltage detection point in sequence through the relay switch RELAY11, the fuse F2 and the terminal JP6, thereby connecting the capacitor C44 and the capacitor line it is connected to the circuit under test 30.

[0100] The first switching transistor Q1 can be a transistor or a MOSFET, etc., and this application does not impose any restrictions on it. If the first switching transistor Q1 is a transistor, then the first terminal of the first switching transistor Q1 is the base, the second terminal is the collector, and the third terminal is the emitter.

[0101] The capacitor input control circuit corresponding to capacitor C45 includes a first switch Q2, a first resistor R32, a second resistor R31, a third resistor R33, and a first diode D8. The first terminal of the first switch Q2 is connected to the control terminal of the main control module 20 through the first resistor R32 to receive the input control signal RELAY2. The first terminal of the first switch Q2 is also grounded to GND through the second resistor R31. The second terminal of the first switch Q2 is connected to the positive voltage VCC through the third resistor R33. The third terminal of the first switch Q2 is grounded to GND. The second terminal of the first switch Q2 is connected to contact 2 of the corresponding relay switch RELAY22, and the third terminal of the first switch Q2 is connected to contact 1 of the relay switch RELAY22. The anode of the first diode D8 is grounded, and the cathode is connected to the second terminal of the first switch Q2.

[0102] The capacitor circuit containing capacitor C45 includes capacitor C45, relay switch RELAY22, fuse F2, and resistor U17. Relay switch RELAY22 is a relay; its first contact is grounded, its third and fourth contacts are connected to a normally open switch, which can be connected to either the sixth or fifth contact. The fifth contact is connected to the first terminal of capacitor C45. The fourth contact of relay switch RELAY22 is also connected to the first voltage detection point via fuse F2 and terminal JP6. The second terminal of capacitor C45 is connected to the second voltage detection point via resistor U17 and terminal JP6.

[0103] When the first switch Q2 receives the access control signal RELAY2 from the main control module 20, the first switch Q2 is turned on and switches the normally open switch of the relay switch RELAY22 to contact 5. This causes the first end of the capacitor C45 to be connected to the first voltage detection point in sequence through the relay switch RELAY22, the fuse F2, and the terminal JP6, thereby connecting the capacitor C45 and the capacitor line it is connected to the circuit under test 30.

[0104] The first switching transistor Q2 can be a transistor or a MOSFET, etc., and this application does not impose any restrictions on it. If the first switching transistor Q2 is a transistor, then the first terminal of the first switching transistor Q2 is the base, the second terminal is the collector, and the third terminal is the emitter.

[0105] The capacitor input control circuit corresponding to capacitor C46 includes a first switch Q3, a first resistor R35, a second resistor R34, a third resistor R36, and a first diode D9. The first terminal of the first switch Q3 is connected to the control terminal of the main control module 20 through the first resistor R35 to receive the input control signal RELAY3. The first terminal of the first switch Q3 is also grounded to GND through the second resistor R34. The second terminal of the first switch Q3 is connected to the positive voltage VCC through the third resistor R36. The third terminal of the first switch Q3 is grounded to GND. The second terminal of the first switch Q3 is connected to contact 2 of the corresponding relay switch RELAY33, and the third terminal of the first switch Q3 is connected to contact 1 of the relay switch RELAY33. The anode of the first diode D9 is grounded, and the cathode is connected to the second terminal of the first switch Q3.

[0106] The capacitor circuit containing capacitor C46 includes capacitor C46, ​​relay switch RELAY11, fuse F2, and resistor U17. Relay switch RELAY33 is a relay; its first contact is grounded, its third and fourth contacts are connected to a normally open switch, which can be connected to either the sixth or fifth contact. The fifth contact is connected to the first terminal of capacitor C46. The fourth contact of relay switch RELAY33 is also connected to the first voltage detection point via fuse F2 and terminal JP6. The second terminal of capacitor C46 is connected to the second voltage detection point via resistor U17 and terminal JP6.

[0107] When the first switch Q3 receives the access control signal RELAY3 from the main control module 20, the first switch Q3 is turned on and switches the normally open switch of the relay switch RELAY33 to contact 5. This causes the first end of the capacitor C46 to be connected to the first voltage detection point in sequence through the relay switch RELAY33, the fuse F2, and the terminal JP6, thereby connecting the capacitor C46 and the capacitor line it is connected to the circuit under test 30.

[0108] The first switching transistor Q3 can be a transistor or a MOSFET, etc., and this application does not impose any restrictions on it. If the first switching transistor Q3 is a transistor, then the first terminal of the first switching transistor Q3 is the base, the second terminal is the collector, and the third terminal is the emitter.

[0109] The first diodes D7, D8, and D9 can be, for example, SS34 diodes.

[0110] Fuse F2 can be a resettable fuse, such as an mSMD050-60V fuse.

[0111] U17 prevents DC grounding after capacitor breakdown.

[0112] Terminal JP6 is connected to Figure 3 or Figure 4 Voltage detection points in the system.

[0113] It should be noted that, Figure 5 The resistance, model, or capacitance value of each electronic component can be set according to the actual application, and this application does not impose any restrictions on this.

[0114] In this embodiment, three capacitors are connected in parallel to the "voltage test point" through the normally open contacts of three relays. By controlling the relays to engage, the capacitors can be automatically engaged one by one to increase the capacitance to ground of the circuit under test 30, eliminating the need for manual wiring and saving time and effort.

[0115] In one embodiment, the main control module 20 includes a main control circuit and a voltage detection circuit;

[0116] The main control circuit is used to control the capacitors in the capacitor input module 10 to be connected to the circuit under test 30 through different capacitor lines.

[0117] The voltage detection circuit is connected to two voltage detection points to obtain the voltage detection values ​​of the two voltage detection points, perform voltage division, isolation and amplification on the voltage detection values, and input the obtained analog amplified signal to the main control circuit.

[0118] The main control circuit is also used to perform analog-to-digital conversion on the analog amplified signal to obtain the voltage at the two voltage detection points.

[0119] Specifically, Figure 6 This is a circuit diagram of the main control circuit in one embodiment; Figure 7 This is a circuit diagram of a voltage detection circuit in one embodiment.

[0120] refer to Figure 6 The main control circuit includes the main control chip U1 and its external circuitry. Taking an STM32F103C8T6 microcontroller as the main controller for U1 as an example, the basic circuitry for the STM32 microcontroller to operate requires an external high-speed crystal oscillator circuit, a power-on reset circuit, a startup mode selection circuit, a power supply decoupling circuit, and a program download circuit. Specifically, C16, C20, and C21 form the decoupling circuit, SW1 is the reset circuit, X1 is the high-speed crystal oscillator, and H1 is the program download circuit.

[0121] U1 is the main control chip. Pins 20 and 44 are for power-on boot, connected to the negative power supply via resistors R10 and R84. Pins 5 and 6 are external clock input pins, which need to be connected to both ends of crystal oscillator X1, connected to the negative power supply via capacitors C39 and C15. H1 is the programming interface, connected to the main control chip's debug pins SWCLK and SWDIO. The main control chip has three power supply pins, which need to be connected to a 3.3V power supply, with capacitors C16, C20, and C21 connected in parallel for filtering. CN2 is the LCD screen interface. Pin 7 of the main control chip U1 is connected to the reset circuit. Pin 8 of the main control chip U1 is grounded (GND), pin 9 is connected to 3.3V, and pin 10 is connected to the output of the voltage detection circuit to obtain the analog amplified signal ADC1. Pin 20 of the main control chip U1 is grounded through resistor R84, pin 23 of the main control chip U1 is grounded, pins 24, 48, and 36 of the main control chip U1 are connected to 3.3V voltage, pins 47 and 35 of the main control chip U1 are grounded, pin 46 of the main control chip U1 is connected to an LED, pin 44 of the main control chip U1 is grounded through resistor R10, and pins 31 and 30 of the main control chip U1 are connected to voltage VCC and ground respectively through terminal CN2.

[0122] The LED circuit includes a light-emitting diode and a resistor R9. The cathode of the light-emitting diode is connected to pin 46 of the main control chip U1, and the anode of the light-emitting diode is connected to a voltage of 3.3V through the resistor R9.

[0123] Pins 19, 21, and 22 of the main control chip U1 are respectively connected to Figure 5 The first terminals of the first switching transistors Q1, Q2, and Q3 are used to output access control signals RELAY1, RELAY2, and RELAY3 to the switching transistors.

[0124] refer to Figure 7 JP7 is connected to Figure 3 or Figure 4 The "voltage detection point" uses a voltage divider formed by three resistors R89, R51, and R88, which is then input to the isolation operational amplifier U39 to obtain the analog amplified signal ADC1. The amplification factor of the operational amplifier can be adjusted using the digital potentiometer U9. The voltage is then detected using the ADC1 interface of the main control chip U1.

[0125] Figure 7Pin 1 of the intermediate isolation operational amplifier U39 is connected to a voltage of 3.3V. Pin 1 of the isolation operational amplifier U39 is also grounded through capacitor C57. Pin 4 of the isolation operational amplifier U39 is grounded. Pins 2 and 3 of the isolation operational amplifier U39 are respectively connected to the two ends of resistor R51. The first voltage detection point is connected to pin 2 of the isolation operational amplifier U39 through the first end of JP7 and resistor R89. The second voltage detection point is connected to pin 3 of the isolation operational amplifier U39 through the second end of JP7 and resistor R88. Pin 8 of the isolation operational amplifier U39 is connected to a voltage of GL13.3V. Pin 8 of the isolation operational amplifier U39 is also grounded through capacitor C58. Pins 5 and 6 of the isolation operational amplifier U39 are grounded. Pin 7 of the isolation operational amplifier U39 is grounded through resistor R52 and capacitor C59. Pin 7 of the isolation operational amplifier U39 is grounded through resistor R52 and capacitor C40. Pin 7 of the isolation operational amplifier U39 is connected to pin 3 of U8 through resistor R52. Connect pin 4 of U8 to pin 1 of U9. Pin 2 of U8 is grounded. Pin 5 of U8 is connected to 3.3V. Pin 1 of U8 is connected to pin 7 of U9. Pin 1 of U8 is also connected to 3.3V through capacitor C41. Pin 1 of U8 is also grounded through resistor R21 and capacitor C42. Pin 1 of U8 is also connected to 3.3V through resistor R21 and diode D5. Pin 1 of U8 is also connected to the main control chip through resistor R21 to output signal ADC1. Pin 1 of U8 is also grounded through resistor R21 and diode D6. Pin 8 of U9 is grounded. Pin 3 of U9 is connected to +3.3V through capacitor C43. Pin 2 of U9 is connected to +3.3V. Pins 4-6 of U9 are connected to pins 15, 17, and 14 of the main control chip U1, respectively.

[0126] In addition, pin 1 of U33 is grounded, and pin 1 of U33 is also connected to voltage VCC through capacitor C31. Pin 2 of U33 is connected to voltage VCC, pin 3 of U33 is grounded, pin 4 of U33 is connected to voltage GL3.3V, and pin 4 of U33 is also grounded through capacitor C32.

[0127] In this embodiment, the main control circuit can control the connection of different capacitors. By combining the main control circuit and the voltage detection circuit, the voltage at two voltage detection points can be accurately collected when different numbers of capacitors are connected.

[0128] In one embodiment, the parasitic circuit detection device further includes a display module;

[0129] The display module is connected to the main control circuit in the main control module 20 and is used to display the voltage of two voltage detection points detected at different times, before and after connecting the capacitor, and after connecting different numbers of capacitors.

[0130] The display module is also used to display the judgment result, wherein the judgment result is used to indicate that the tested circuit 30 has a parasitic circuit, or that the tested circuit 30 does not have a parasitic circuit or has an induced circuit.

[0131] Specifically, disconnect the circuit breaker of the circuit under test, and then connect the circuit under test 30 to JP6. Before connecting the capacitors, measure the voltage once. Connect the capacitors sequentially and measure the voltage each time. Compare the voltage values ​​before and after connecting the capacitors. If the voltage decreases sequentially after connecting the capacitors, the measured voltage is the induced voltage; otherwise, the measured voltage is the parasitic circuit current. The corresponding information is then displayed on the LCD screen.

[0132] Figure 9 This is a flowchart of the main control module 20 in one embodiment. The display module allows for human-machine interaction. Users can select AC or DC mode through the display module, and then detect and record the voltage U1 at the two voltage detection points before the capacitor is connected. After capacitor Ca is connected, the voltage U2 at the two voltage detection points before the capacitor is connected is detected and recorded. After capacitor Cb is connected, the voltage U3 at the two voltage detection points before the capacitor is connected is detected and recorded. After capacitor Cc is connected, the voltage U4 at the two voltage detection points before the capacitor is connected is detected and recorded. The voltages U1-U4 are displayed on the LCD screen of the display module. The main control module 20 also determines whether the voltage decreases sequentially based on U1-U4. If the voltage does not decrease sequentially, it is determined that a parasitic circuit exists, and parasitic crosstalk is displayed on the LCD screen. If the voltage decreases sequentially, it calculates and determines whether the voltage conforms to capacitor voltage division. If it conforms to capacitor voltage division, it is determined that there is no parasitic circuit, and induced current is displayed on the LCD screen. If it does not conform to capacitor voltage division, it is determined that a parasitic circuit exists.

[0133] In one embodiment, the parasitic loop detection device further includes a power supply module for converting the input voltage into at least one target voltage and using the target voltage to power other modules.

[0134] Specifically, Figure 8 Here is a circuit diagram of the power module in one embodiment; see reference. Figure 8The device is powered by a rechargeable lithium battery. USB1 is a Type-C interface for charging. CN1 is the lithium battery interface. After being filtered by C3, C4, and C5, the battery is input to the BAT pin of the power management chip (U2). Then, it passes through the chip's VOUT pin, is filtered by C1 and C2, and regulated by D2 to output a 5V voltage. LED1 is a common cathode light-emitting diode. During charging, the CHARG pin of the power management chip outputs a high level, and the PROG pin outputs a low level, causing LED1 to emit red light. When the battery is fully charged, the CHARG pin of the power management chip outputs a low level, and the PROG pin outputs a high level, causing LED1 to emit green light. The voltage output of U2 is 5V, which is stepped down to 3.3V using a linear regulator U15 to supply the subsequent circuitry. U16 is the power switch, and D10 further steps down the voltage, which is then filtered by C27 and C28 to output 3.3V.

[0135] Pin 1 of U2 is grounded through parallel connection of capacitors C1 and C2. Pin 1 of U2 is also connected to voltage VCC. Pin 2 of U2 is connected to pin 4 through LED1. Pin 3 of U2 is grounded through resistor R2. Pin 5 of U2 is connected to LED1 through resistor R3. Pin 5 of U2 is also grounded through capacitor C6. Pin 5 of U2 is also connected to pin 11 of USB1 through resistor U3. Pin 6 of U2 is grounded through parallel connection of capacitors C3, C4, and C5. Pin 6 of U2 is also connected to pin 2 of CN1. Pin 6 of U2 is also connected to pin 1 of CN1 through parallel connection of capacitors C3, C4, and C5. Pin 6 of U2 is also connected to pin 1 through inductors L1 and D1. Pins 7 and 9 of U2 are grounded. Pin 8 of U2 is connected to pin 1 through D1. Pin 1 of USB1 is grounded. Pins 2 and 11 of USB1 are connected. Pin 12 of USB1 is grounded.

[0136] Pin 1 of U15 is connected to pin 2 of U16 via D10. Pin 1 of U15 is also connected to pin 3. Pin 2 of U15 is grounded. Pin 5 of U15 outputs a voltage of 3.3V. Pin 5 of U15 is also grounded via parallel capacitors C27 and C28. Pin 1 of U16 is connected to voltage VCC.

[0137] This embodiment can convert various target voltages through a power module to power other modules.

[0138] The device of this application may include a power supply circuit for supplying power to the main control chip (MCU); a capacitor input circuit for controlling the input of a capacitor to the circuit under test 30 or the circuit under test through the general purpose input / output port (GPIO) of the MCU to increase the capacitance to ground of the circuit under test; a voltage detection circuit connected to the circuit under test to measure the voltage change of the circuit under test before and after the capacitor is input; and an LCD screen for selecting the AC circuit or DC circuit to be measured, and simultaneously displaying the voltage value and the determination result of whether a parasitic circuit exists.

[0139] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and RAMbus dynamic RAM (RDRAM), etc.

[0140] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0141] The above embodiments merely illustrate several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A device for detecting parasitic circuits, characterized in that, The parasitic circuit detection device includes a capacitor input module and a main control module; The capacitor connection module includes at least two capacitors connected in parallel. Each capacitor can be connected to or disconnected from the circuit under test via different capacitor lines. If a capacitor is connected to the circuit under test, the connected capacitor is connected in parallel with the ground capacitance of the circuit under test when the circuit breaker is disconnected. The capacitor connection module also includes a manual connection control module electrically connected to the capacitor circuit. The manual connection control module is used to receive and connect the capacitor line specified by the user to the circuit under test according to the user's manual operation. The capacitor connection module also includes a capacitor connection control circuit. The capacitor line also includes a connection control switch, which is a relay switch. The capacitor connection control circuit is specifically used to connect the corresponding capacitor line to the circuit under test by controlling the relay switch to activate the relay. The capacitor input control circuit includes a first switching transistor, a first resistor, a second resistor, a third resistor, and a first diode. The first terminal of the first switching transistor is connected to the control terminal of the main control module via the first resistor to receive the input control signal; the first terminal of the first switching transistor is also grounded via the second resistor. The second terminal of the first switching transistor is connected to a positive voltage via the third resistor, and the third terminal of the first switching transistor is grounded. The second terminal of the first switching transistor is connected to one end of a corresponding relay switch, and the third terminal of the first switching transistor is connected to the other end of the relay switch. The anode of the first diode is grounded, and the cathode is connected to the second terminal of the first switching transistor. The main control module is connected to the circuit under test and the capacitor input module respectively, and is used to detect the voltage at two voltage detection points of the circuit under test after the circuit breaker of the circuit under test is disconnected and before the capacitor is connected. The main control module is also used to control the capacitors in the capacitor input module to be connected to the circuit under test through different capacitor lines in sequence, and to detect the voltage of the two voltage detection points for each capacitor connected. The capacitor line of each capacitor is connected to the circuit under test through the two voltage detection points. The main control module is also used to determine whether there is a parasitic circuit in the circuit under test based on the voltage changes at the two voltage detection points.

2. The parasitic circuit detection device according to claim 1, characterized in that, The main control module is specifically used to determine whether the voltage of the two voltage detection points of the circuit under test decreases sequentially before and after the capacitor is connected, and as the number of connected capacitors increases. If it is determined that the voltage of the two voltage detection points of the circuit under test decreases sequentially, it is determined that the circuit under test does not have a parasitic loop. If it is determined that the voltage of the two voltage detection points of the circuit under test remains unchanged or the change is within a preset small range, it is determined that the circuit under test has a parasitic loop.

3. The parasitic circuit detection device according to claim 1, characterized in that, The main control module is specifically used to determine whether the voltage at the two voltage detection points of the circuit under test decreases sequentially before and after the capacitor is connected, and as the number of connected capacitors increases. If it is determined that the voltage at the two voltage detection points of the circuit under test decreases sequentially, then based on the capacitance value of the connected capacitor, the capacitance value of the circuit under test to ground before the capacitor is connected, and the total voltage of the circuit under test, it determines whether the voltage at the two voltage detection points conforms to the capacitor voltage division after each addition of the connected capacitor. If it conforms to the capacitor voltage division, it is determined that the circuit under test does not have a parasitic loop; if it does not conform to the capacitor voltage division, it is determined that the circuit under test has a parasitic loop. If it is determined that the voltage at the two voltage detection points of the circuit under test remains unchanged or changes within a preset small range, then it is determined that the circuit under test has a parasitic circuit.

4. The parasitic circuit detection device according to claim 1, characterized in that, The capacitor input module includes at least two capacitor lines to be connected and a capacitor input control circuit corresponding to each capacitor circuit. Each capacitor circuit includes a capacitor, a protective resistor and a fuse connected in series with the capacitor, and at least one control switch; and the capacitors in the capacitor circuits are connected in parallel. One end of the fuse is connected to a voltage detection point, and the other end of the fuse is connected to one end of a capacitor, or the other end of the fuse is connected to one end of a capacitor via an input control switch. One end of the protective resistor is connected to another voltage detection point, and the other end of the protective resistor is connected to the other end of the capacitor, or the other end of the protective resistor is connected to the other end of the capacitor through an input control switch. The capacitor input control circuit is connected to the input control switch and the main control module, and is used to control the input control switch to conduct under the access control of the main control module so as to connect the corresponding capacitor line to the circuit under test.

5. The parasitic circuit detection device according to claim 1, characterized in that, The main control module includes a main control circuit and a voltage detection circuit; The main control circuit is used to control the capacitors in the capacitor input module to be connected to the circuit under test sequentially through different capacitor lines; The voltage detection circuit is connected to the two voltage detection points and is used to obtain the voltage detection values ​​of the two voltage detection points, perform voltage division, isolation and amplification on the voltage detection values, and input the obtained analog amplified signal to the main control circuit. The main control circuit is also used to perform analog-to-digital conversion on the analog amplified signal to obtain the voltages at the two voltage detection points.

6. The parasitic circuit detection device according to claim 1, characterized in that, The parasitic circuit detection device also includes a display module; The display module is connected to the main control circuit in the main control module and is used to display the voltages of the two voltage detection points detected at different times, before and after connecting the capacitor, and after connecting different numbers of capacitors. The display module is also used to display the judgment result, wherein the judgment result is used to indicate that the tested circuit has a parasitic circuit, or that the tested circuit does not have a parasitic circuit or has an induced circuit.

7. The parasitic circuit detection device according to claim 1, wherein the parasitic circuit detection device further comprises a power supply module, the power supply module being used to convert the input voltage into at least one target voltage, and using the target voltage to power other modules.

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