A portable nuclear radiation imaging module test system based on FPGA

Abstract

The invention discloses a portable nuclear radiation imaging module test system based on FPGA, including a signal input interface, an analog-to-digital converter, an FPGA, a data cache module, and an HDMI display; the signal input interface is used to access the four-way analog signal output by the nuclear radiation imaging detector module and convert it into a digital signal through the analog-to-digital converter, and the digital signal is processed in sequence by digital filtering, pole-zero cancellation, baseline subtraction, pile-up rejection, and peak extraction in the FPGA to obtain the peak value of the effective four-way coincidence signal, and calculate a number of pairs of coordinate values, which are stored in the data cache module, and after reaching the set storage depth, the scatter image is calculated by the scatter image drawing module inside the FPGA, and the scatter image is sent to the display for display. The present invention can realize the rapid and accurate testing of the imaging results of the nuclear radiation imaging detector module, and has a small size, convenient use, portability and universality.

Description

Technical Field

[0001] The present invention relates to nuclear radiation imaging technology, and in particular to a portable test system developed based on FPGA and used for testing the imaging effect of a nuclear radiation imaging detector module, belonging to the technical field of nuclear radiation detection. Background Art

[0002] Gamma ray imaging technology is widely used in medical imaging, environmental monitoring, nuclear energy industry, security inspection and other fields. The gamma ray imaging system is a relatively complex and large system. According to the function of each component, it can usually be divided into an imaging detector module, a data acquisition module and an image display module. Its workflow is roughly as follows: Figure 1 shown.

[0003] Among them, the imaging detector module is mainly composed of scintillation crystals, photoelectric conversion devices and signal readout circuits. Whether the signal readout circuit uses the balanced charge distribution method (SCD) or the discrete positioning readout method (DPC), it can ultimately convert the multi-channel signals output by the photoelectric conversion device into 4 analog signals for output.

[0004] The data acquisition module is usually composed of a high-speed, high-resolution analog-to-digital converter (ADC), a field-programmable gate array (FPGA), a dynamic random access memory (SDRAM), and a communication interface. It collects the analog signal output by the imaging detector module and uses different formulas for calculations according to the different signal readout circuits used. Each time a trigger is triggered, a set of coordinate values ​​is obtained and stored in the memory. Finally, the data in the memory is uploaded to the image display module through the communication interface.

[0005] The 4 input signals are marked as A, B, C, and D respectively. The horizontal coordinate X and vertical coordinate Y obtained by the DPC circuit can be calculated by formula 3-1:

[0006]

[0007] The horizontal coordinate X and vertical coordinate Y obtained by using the SCD circuit can be calculated by formula 3-2:

[0008]

[0009] The image display module is relatively flexible. Usually, a dedicated host computer is developed on the computer. It receives the coordinate data uploaded by the data acquisition module through the Ethernet interface or USB interface, and displays it using a plane scatter plot or point density map. Figure 2 As shown. Figure a is a plane scatter plot; Figure b is a point density plot.

[0010] If the signal is divided into analog signal and digital signal, the whole system can be divided into two parts. One part is the imaging detector module that generates analog signal, that is, the signal generation system, and the other part is the data acquisition module and image display module that processes digital signal, that is, the test system. The current problem lies in the second part.

[0011] The products currently available on the market can be roughly divided into two categories. One is an integrated system that includes data acquisition and scatter plot imaging functions, which runs on a desktop personal computer. Since a signal input port is required, the data acquisition card needs to be inserted into the PCIE slot of the computer motherboard and connected to an external monitor. Figure 3 Although this type of equipment has achieved the expected function, it is large in size and is not convenient for daily debugging or use in other work situations.

[0012] The other type is the common data acquisition card, which has certain data processing and computing capabilities, and can obtain a series of data, the effective peak value or integration results of four channels, and can be operated as a single machine, and transmit the data to the back stage through the Ethernet or USB interface. It is necessary to develop a special host computer software on the personal computer in combination with the communication protocol of the acquisition card to obtain and display the scatter plot. Its workflow is as follows Figure 4 The working process of this type of equipment is similar to that of the usual gamma-ray imaging system. It has a certain degree of flexibility and can meet the needs of external work, but it is still not very convenient, and the difficulty of host computer development increases with the complexity of the acquisition card's communication protocol.

[0013] In most imaging detector module testing scenarios, operators expect to directly connect the signal to the test system and obtain the scatter plot imaging results with only a few parameter configurations. In addition, the test system should be small in size, light in weight, and can be carried with a bag to meet the needs of application scenarios such as visiting customers and participating in exhibitions. However, there are currently no related products that can meet such needs. Summary of the invention

[0014] In view of the above-mentioned deficiencies in the prior art, the object of the present invention is to provide a portable nuclear radiation imaging module testing system based on FPGA. The present invention can realize rapid and accurate testing of the imaging results of the nuclear radiation imaging detector module, and has the advantages of small size, easy use, portability and universality.

[0015] In order to achieve the above object, the technical solution adopted by the present invention is as follows:

[0016] A portable nuclear radiation imaging module test system based on FPGA comprises a signal input interface, an analog-to-digital converter, FPGA, a data cache module, an HDMI display and a large-capacity rechargeable battery. The analog-to-digital converter is a four-channel converter. The signal input interface is used to connect four-channel analog signals output by a nuclear radiation imaging detector module and convert them into digital signals through the analog-to-digital converter. The digital signals are processed in sequence by a digital filtering module, a pole-zero cancellation module, a baseline subtraction module, a pile-up rejection module and a peak extraction module in the FPGA to obtain effective peak values ​​of four-channel coincident signals, and a coordinate calculation module is used to calculate a plurality of pairs of coordinate values, which are stored in the data cache module. After reaching a set storage depth, a scatter image is calculated in the FPGA through a scatter image drawing module, and the scatter image is sent to the HDMI display for display. The large-capacity rechargeable battery is used to power power consumption components.

[0017] Furthermore, it also includes an energy spectrum viewing module. The data processed by the peak extraction module is output to the energy spectrum viewing module. The energy spectrum viewing module outputs the data as a channel address to the data cache module. After reaching the set storage depth, the energy spectrum data of the four channels are uploaded to the HDMI display for display.

[0018] Furthermore, it also includes a waveform viewing module. The four analog signals connected to the signal input interface are not processed in any way. After sampling, they are directly sent to the data cache module for storage through the waveform viewing module. After reaching the set depth, the waveform data of the four channels are uploaded to the HDMI display for display.

[0019] Furthermore, it also includes a shell, the signal input interface is arranged on the shell, the analog-to-digital converter, FPGA, data cache module and large-capacity rechargeable battery are arranged in the shell, and the HDMI display is arranged on the surface of the shell.

[0020] The present invention also includes an SD card memory for storing scattergram data in binary format.

[0021] The pole-zero cancellation module is used to process the signal output by the charge-sensitive preamplifier of the imaging detector module to reduce its pulse width. The circuit structure of the pole-zero cancellation module includes a capacitor C1, a sliding resistor R p and resistor R1; capacitor C1 and sliding rheostat R p Connected in parallel between the input and output terminals, one end of the resistor R1 is grounded, and the other end is connected to the line between the output terminal and the capacitor C1; the output expression of the pole-zero cancellation module is,

[0022]

[0023] in, V o[n] is the signal output at the nth sampling moment; V i [n] is the signal input at the nth sampling moment; Δt is the sampling interval of the analog-to-digital converter.

[0024] The accumulation rejection module is used to identify the accumulation signal by using a pulse width identification method. If the current signal pulse width is greater than a set width, the signal is discarded without subsequent processing.

[0025] Compared with the prior art, the present invention has the following beneficial effects:

[0026] 1. The present invention takes into account the advantages of both the integrated data acquisition and scatter plot imaging system and the split data acquisition and scatter plot imaging system, while making up for the shortcomings of both, and can achieve rapid and accurate testing of the imaging results of the nuclear radiation imaging detector module.

[0027] 2. The present invention is small in size, light in weight, and can be carried in a bag, thus meeting the demand for portability; it is plug-and-play, easy to use, and can adapt to a variety of application scenarios, thus greatly promoting market work.

[0028] 3. Within the input signal amplitude range, this test system is applicable to all nuclear radiation imaging detector modules with 4-channel signal outputs that use DPC or SCD circuits, and is universal. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 - Prior art gamma ray imaging system workflow diagram.

[0030] Figure 2-Figure 1 Example images displayed in the image display module; (a) plane scatter plot; (b) point density plot.

[0031] Figure 3 -Schematic diagram of the prior art integrated data acquisition and scatter plot imaging system.

[0032] Figure 4 - Schematic diagram of the prior art split data acquisition and scatter plot imaging system.

[0033] Figure 5 -Block diagram of the test system of the present invention.

[0034] Figure 6 -Schematic diagram of the analog pole-zero cancellation circuit of the present invention.

[0035] Figure 7 - Schematic diagram of the housing of the test system of the present invention. DETAILED DESCRIPTION

[0036] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0037] See also Figure 5 The present invention relates to the field of nuclear radiation detection, and in particular to a portable test system developed based on FPGA for testing the imaging effect of a nuclear radiation imaging detector module, which is mainly composed of a signal input interface, a high-speed analog-to-digital converter ADC, FPGA, a data cache module, an SD card memory, an HDMI display, and a large-capacity rechargeable battery.

[0038] The signal input interface is used to connect the four-channel analog signals output by the nuclear radiation imaging detector module and convert them into digital signals through the analog-to-digital converter. After digital processing in the FPGA, the peak values ​​of the four-channel matching signals are obtained through the digital filtering module, the pole-zero cancellation module, the baseline subtraction module, the pile-up rejection module, the peak extraction module, etc., and the coordinate calculation module calculates several pairs of coordinate values, which are stored in the data cache module (DDR3 memory). After reaching the set storage depth, the scatter image is calculated in the FPGA through the scatter image drawing module, and finally the scatter image is sent to the HDMI display for display. At the same time, the drawing data is stored in the SD card memory in binary format to meet the possible needs for further processing of the original data, forming an integrated miniaturized test system.

[0039] The specific functions and practical choices of each part are introduced as follows.

[0040] Signal input interface, choose SMA or LEMO plug as the signal input interface, and use coaxial cable connection to ensure signal quality and reduce interference during signal transmission.

[0041] High-speed ADC uses a parallel interface ADC with a sampling rate of more than 50MHz and a resolution of more than 12 bits, which can ensure that the characteristics of the input nuclear signal are not lost or distorted, and at the same time has a higher data bandwidth.

[0042] FPGA uses Xilinx's ARTIX-7 series FPGA chips, whose internal resources can meet the needs of internal calculations, caching and other processes.

[0043] DDR3 memory uses a 4G bit DDR3 chip. For a pair of coordinate data with a bit width of 32 bits, the theoretical maximum storage depth can reach 32768, which can meet the needs of large-capacity cache.

[0044] SD card storage, choose a 32G bit SD card, which can store up to 262144 coordinate points to meet the needs of large-capacity continuous storage.

[0045] HDMI display, choose a 7-inch HDMI display, which can not only display UI elements such as scatter plots and parameter setting dialog boxes at the same time, but also be small in size, meeting the needs of portability and miniaturization.

[0046] Large-capacity rechargeable battery, using 5000mAh large-capacity laptop battery to meet the needs of portable devices working without being plugged in for a long time.

[0047] In the present invention, by implementing the firmware code in the FPGA, from the perspective of modular design, the entire test system is composed as follows: Figure 5 shown.

[0048] Compared with the conventional data acquisition card for nuclear radiation imaging detector modules, the present invention adds two functional modules, namely, the pole-zero cancellation module and the pile-up rejection module, to achieve faster and more accurate imaging results at high counting rates. The functions and algorithm principles are as follows.

[0049] Pole-zero cancellation module: The nuclear radiation detector module uses a charge-sensitive preamplifier. The pulse signal it outputs has a fast rising edge, and a falling edge that slowly drops to the baseline, decreasing exponentially from the top over time. Under high counting rates, the slowly falling pulse tailing will cause pulse accumulation and baseline drift, which will lead to inaccurate peak extraction results, causing the calculated coordinate position to shift compared to its original position, affecting the imaging results. The pole-zero cancellation module can process the signal output by the charge-sensitive preamplifier to reduce its pulse width. The pole-zero cancellation module is derived from the analog pole-zero cancellation circuit. Figure 6 The schematic diagram of the analog pole-zero cancellation circuit is shown. The circuit structure includes capacitor C1, sliding resistor R p and resistor R1; capacitor C1 and sliding rheostat R p Connected in parallel between the input terminal and the output terminal, one end of the resistor R1 is grounded, and the other end is connected between the output terminal and the capacitor C1.

[0050] Derived from the circuit transfer function, the output expression is:

[0051]

[0052] in, V o [n] is the signal output at the nth sampling moment; V i [n] is the signal input at the nth sampling moment; Δt is the sampling interval of the analog-to-digital converter.

[0053] Pile-up rejection module: The signal after the pole-zero cancellation module and the baseline subtraction module may still be piled up due to the randomness of the nuclear signal. Considering that the probability of this happening is already small, the pulse width discrimination method is used to discriminate the pile-up signal. When it is determined that the current signal pulse width is greater than the set width, the signal is discarded without extracting its peak value.

[0054] This test system has the characteristics of small size and portability, which is achieved through the following three aspects.

[0055] 1. Hardware circuit design

[0056] In terms of processors, most products available on the market divide digital signal processing and communication functions into two FPGA chips for implementation, that is, one chip implements logical functions such as data acquisition and digital signal processing, and the other chip is specifically responsible for realizing data interaction inside and outside the system. In terms of data acquisition, four single-channel ADC (analog-to-digital conversion) chips are mostly used, and each input is equipped with a front-end signal conditioning circuit. This will cause the following problems: a. The circuit board is large in size, resulting in a large outer shell; b. The system power consumption is high, and a special adapter is required. Such adapters are often large in size and weight; c. Some have heat dissipation requirements and need to be equipped with active heat dissipation devices (fans);

[0057] The present invention realizes digital signal processing and communication functions in one FPGA chip, and only uses one 4-channel ADC chip with higher integration to sample analog signals, which greatly reduces the number of components on the board and also reduces power consumption. No heat dissipation is required, and it can be powered by a common +5V, 2A DC power adapter. The circuit board size is small and the casing volume is small.

[0058] 2. Interaction design

[0059] Compared with existing products on the market, in terms of external data interaction, whether using the PCIE interface (the PCIE interface needs to be plugged into a computer with a computer case, and thin and light notebooks do not provide this interface) or the Gigabit Ethernet interface, it is necessary to use a personal computer and special host computer software. The host computer software of some products cannot meet the function of real-time imaging and needs further development, which also requires the participation of a personal computer. This further increases the size of the entire system and is not easy to carry.

[0060] This design uses a 7-inch HDMI interface display and directly embeds the display into the product housing, so that data processing and data interaction can be carried out directly on a single system. It can run stand-alone without the assistance of a personal computer.

[0061] 3. Firmware code design

[0062] Most of the host computer software of existing products on the market are not developed for the testing of nuclear radiation imaging detector modules. Therefore, their functions cannot fully match the needs of actual testing work, such as real-time imaging, viewing channel energy spectra, and input waveform display. No products that integrate these three functional requirements have been found so far.

[0063] According to the above requirements, the present invention develops a special functional module and develops an adaptive host computer software at the HDMI end, thereby ensuring the functional requirements while maintaining the miniaturization and portability of the entire system.

[0064] In actual applications, the above three functions are not used at the same time. At the same time, since the implementation of each function requires a large amount of storage space in the memory, the data cache module is time-division multiplexed during design.

[0065] The real-time imaging function, namely the calculation and storage of scatter plot coordinates, has been described in detail above.

[0066] View channel energy spectrum function. By observing the scatter plot, we can only get a qualitative understanding of whether the distinction is clear, and we cannot quantitatively evaluate the performance of the nuclear radiation imaging module from the data. The present invention can view the energy spectrum of each channel by viewing the energy spectrum module to obtain its resolution index, which can not only evaluate the resolution of the detector module, but also evaluate the consistency of each channel. In theory, the better the consistency of each channel, the better the imaging effect. Its implementation logic is as follows: after switching to the function of viewing the channel energy spectrum, the input data is processed to obtain a peak value, and the peak data range is between 0 and 4095. The data is sent to the data cache module as the channel address. After reaching the set storage depth, the energy spectrum data of the four channels are uploaded to the HDMI display for display.

[0067] Input waveform display function. When using this instrument to test the nuclear radiation imaging module, there are two issues that need to be determined first. One is whether the analog signals of the four channels output by the nuclear radiation imaging detector module are within the ADC range. The other is the background noise level of the analog signals of the four channels output by the imaging detector module. The boundary judgment module requires a trigger threshold, which needs to be higher than the background noise level, otherwise the noise will cause a large number of false triggers, and the expected function cannot be achieved. Therefore, it is necessary to sample and store the input analog signal first to obtain the input waveform of each channel, and determine the above two issues by observing the waveform. The implementation logic is as follows: after switching to the input waveform display function, the input data is not processed in any way. After sampling, it is directly sent to the data cache module for storage through the waveform viewing module. After reaching the set depth, the waveform data of the four channels are uploaded to the HDMI display for display.

[0068] The shell shape is as follows Figure 7shown.

[0069] In the specific implementation, the 4 output signals of the imaging detector module are connected to the test system in the order of A, B, C, and D. After setting the storage depth, trigger threshold, and refresh frequency on the HDMI touch screen display, wait for a certain period of time to see the scatter plot results on the display. If other processing is required on the original data, the SD card can be ejected by pressing the SD card slot, and the data can be read out on the personal computer in the binary file storage format. When the device needs to be charged or plugged in, it can be charged by connecting a 5V, 2A DC power adapter through the Type-C interface.

[0070] The above embodiments of the present invention are merely examples for illustrating the present invention, and are not intended to limit the embodiments of the present invention. For those skilled in the art, other different forms of changes and modifications can be made based on the above description. It is impossible to list all the embodiments here. Any obvious changes or modifications derived from the technical solution of the present invention are still within the scope of protection of the present invention.

Claims

1. A portable nuclear radiation imaging module test system based on FPGA, characterized in that: It includes a signal input interface, an analog-to-digital converter, an FPGA, a data cache module, an HDMI display, and a large-capacity rechargeable battery; The analog-to-digital converter is a four-channel converter. The signal input interface is used to connect the four analog signals output by the nuclear radiation imaging detector module and convert them into digital signals through the analog-to-digital converter. The digital signals are processed in the FPGA in sequence by the digital filtering module, the pole-zero cancellation module, the baseline subtraction module, the pile-up rejection module, and the peak extraction module to obtain the effective peak values ​​of the four-way coincidence signal, and a number of pairs of coordinate values ​​are calculated by the coordinate calculation module and stored in the data cache module. After reaching the set storage depth, a scatter image is calculated by the scatter image drawing module inside the FPGA, and the scatter image is sent to the HDMI display for display; a large-capacity rechargeable battery is used to power power-consuming components.

2. The portable nuclear radiation imaging module test system based on FPGA according to claim 1, characterized in that: It also includes an energy spectrum viewing module. The data processed by the peak extraction module is output to the energy spectrum viewing module. The energy spectrum viewing module outputs the data as a channel address to the data cache module. After reaching the set storage depth, the energy spectrum data of the four channels are uploaded to the HDMI display for display.

3. The portable nuclear radiation imaging module test system based on FPGA according to claim 1, characterized in that: It also includes a waveform viewing module. The four analog signals connected to the signal input interface are not processed in any way. After sampling, they are directly sent to the data cache module for storage through the waveform viewing module. After reaching the set depth, the waveform data of the four channels are uploaded to the HDMI display for display.

4. The portable nuclear radiation imaging module test system based on FPGA according to claim 1, characterized in that: It also includes a shell, the signal input interface is arranged on the shell, the analog-to-digital converter, FPGA, data cache module and large-capacity rechargeable battery are arranged in the shell, and the HDMI display is arranged on the surface of the shell.

5. The portable nuclear radiation imaging module test system based on FPGA according to claim 1, characterized in that: SD card memory is also included for storing scatter plot data in binary format.

6. The portable nuclear radiation imaging module test system based on FPGA according to claim 1, characterized in that: The pole-zero cancellation module is used to process the signal output by the charge-sensitive preamplifier of the imaging detector module to reduce its pulse width.

7. The portable nuclear radiation imaging module test system based on FPGA according to claim 6, characterized in that: The circuit structure of the pole-zero cancellation module includes a capacitor C1, a sliding resistor R p and resistor R1; capacitor C1 and sliding rheostat R p Connected in parallel between the input and output terminals, one end of the resistor R1 is grounded, and the other end is connected to the line between the output terminal and the capacitor C1; the output expression of the pole-zero cancellation module is, in, V o [n] is the signal output at the nth sampling moment; V i [n] is the signal input at the nth sampling moment; Δt is the sampling interval of the analog-to-digital converter.

8. The portable nuclear radiation imaging module test system based on FPGA according to claim 1, characterized in that: The accumulation rejection module is used to identify the accumulation signal by using a pulse width identification method. If the current signal pulse width is greater than a set width, the signal is discarded without subsequent processing.

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