Low dropout regulator and capacitance compensation method
By designing a combination of amplifier, buffer circuit and compensation capacitor in a low dropout regulator, the problem of increasing area and power consumption in the prior art is solved, achieving a wider frequency response range and higher stability.
Patent Information
- Application Number
- CN202311490180.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-10-04
- Filing Date
- 2023-11-09
- Publication Date
- 2025-04-08
AI Technical Summary
When existing low dropout regulators improve the supply voltage suppression ratio (PSRR), they usually require an increase in voltage-regulating capacitors or increase system power consumption, resulting in increased area or possible latching.
A low dropout voltage regulator is designed, including an amplifier, a buffer circuit, an output circuit, a first compensation capacitor and a second compensation capacitor. By coupling a first compensation capacitor between the internal cascade node of the amplifier and the output circuit, the first pole frequency in the baud graph and the PSRR turning point frequency is separated; by coupling a second compensation capacitor between the input terminal of the buffer circuit and the input power supply, the second pole and the third pole frequency in the baud graph are separated to ensure stable operation of the voltage regulator.
Without significantly increasing the footprint and power consumption of the low dropout regulator, the power supply voltage suppression ratio of the low dropout regulator is improved, and the frequency response range and stability of the voltage regulator are improved.
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Figure CN119781560A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a low dropout regulator (LDO), and more particularly to a low dropout regulator with improved power supply rejection ratio (PSRR) and a capacitor compensation method. Background Art
[0002] A low voltage dropout regulator is a type of linear DC regulator. Since low voltage dropout regulators can operate with a small output-input voltage difference and have the advantages of low output noise and small size, they are often used in various circuits.
[0003] For a low-dropout voltage regulator, the power supply voltage rejection ratio represents its ability to suppress noise. In order to improve the power supply voltage rejection ratio, traditional low-dropout voltage regulators usually adopt two methods. The first method is to increase the voltage stabilization capacitor in the low-dropout voltage regulator, but this method will greatly increase the area occupied by the low-dropout voltage regulator. The second method is to compensate through an additional circuit, but this method will cause the power consumption of the system to increase and may even cause latch-up. Therefore, how to effectively improve the power supply voltage rejection ratio of a low-dropout voltage regulator is one of the topics in this field. Summary of the invention
[0004] The present disclosure provides a low voltage dropout regulator, comprising an amplifier, a buffer circuit, an output circuit, a first compensation capacitor and a second compensation capacitor. The amplifier comprises a non-inverting input terminal, an inverting input terminal, an internal cascade node and an output terminal. The buffer circuit comprises an input terminal and an output terminal, wherein the input terminal of the buffer circuit is coupled to the output terminal of the amplifier. The output circuit comprises an input terminal and an output terminal, wherein the input terminal of the output circuit is coupled to the output terminal of the buffer circuit, and the output terminal of the output circuit is used to output an output voltage. The first compensation capacitor is coupled between the output terminal of the output circuit and the internal cascade node of the amplifier to separate the first pole frequency and the power supply voltage rejection ratio turning point frequency in the Bode diagram of the low voltage dropout regulator. The second compensation capacitor is coupled between the input terminal of the buffer circuit and the input power supply to separate the second pole frequency and the third pole frequency in the Bode diagram of the low voltage dropout regulator, so that the low voltage dropout regulator can operate stably.
[0005] The present disclosure provides a low voltage dropout regulator, comprising an amplifier, a buffer circuit, an output circuit, a first compensation capacitor and a second compensation capacitor. The amplifier comprises a non-inverting input terminal, an inverting input terminal, an internal cascade node and an output terminal. The buffer circuit comprises an input terminal and an output terminal, wherein the input terminal of the buffer circuit is coupled to the output terminal of the amplifier. The output circuit comprises an input terminal and an output terminal, wherein the input terminal of the output circuit is coupled to the output terminal of the buffer circuit, and the output terminal of the output circuit is used to output an output voltage. The first compensation capacitor is coupled between the output terminal of the output circuit and the internal cascade node of the amplifier to separate the first pole frequency and the power supply voltage rejection ratio turning point frequency in the Bode diagram of the low voltage dropout regulator. The second compensation capacitor is coupled between the input terminal and the output terminal of the buffer circuit to separate the second pole frequency and the third pole frequency in the Bode diagram of the low voltage dropout regulator, so that the low voltage dropout regulator can operate stably.
[0006] The present disclosure provides a capacitance compensation method applicable to a low-dropout voltage regulator, wherein the low-dropout voltage regulator includes an amplifier and an output circuit. The capacitance compensation method includes: providing a buffer circuit in the low-dropout voltage regulator, wherein the buffer circuit includes an input terminal and an output terminal, the input terminal of the buffer circuit is coupled to the output terminal of the amplifier, and the output terminal of the buffer circuit is coupled to the input terminal of the output circuit; providing a first compensation capacitor in the low-dropout voltage regulator, wherein the first compensation capacitor is coupled between the output terminal of the output circuit and the internal cascade node of the amplifier to separate the first pole frequency and the power supply voltage rejection ratio turning point frequency in the Bode diagram of the low-dropout voltage regulator; and providing a second compensation capacitor in the low-dropout voltage regulator, wherein the second compensation capacitor is coupled to the output terminal of the amplifier and the input terminal of the buffer circuit to separate the second pole frequency and the third pole frequency in the Bode diagram of the low-dropout voltage regulator, so as to enable the low-dropout voltage regulator to operate stably.
[0007] Through the low-dropout regulator and capacitor compensation method of the present disclosure, the low-dropout regulator can be compensated without significantly increasing the occupied area and power consumption of the low-dropout regulator, thereby improving the power supply voltage rejection ratio of the low-dropout regulator. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] In order to make the above and other objects, features, advantages and embodiments of the present disclosure more clearly understood, the accompanying drawings are described as follows:
[0009] Figure 1 A circuit diagram of a low dropout voltage regulator according to some embodiments of the present disclosure;
[0010] Figure 2 A circuit diagram of a low dropout voltage regulator according to some embodiments of the present disclosure;
[0011] Figure 3A schematic diagram of a small signal circuit model of a low dropout regulator according to some embodiments of the present disclosure;
[0012] Figure 4A A schematic diagram of a power supply rejection ratio (PSRR) of a low dropout regulator according to some embodiments of the present disclosure;
[0013] Figure 4B A Bode plot of a low dropout voltage regulator according to some embodiments of the present disclosure; and
[0014] Figure 5 The present invention is a flow chart of a capacitance compensation method according to some embodiments of the present disclosure. DETAILED DESCRIPTION
[0015] The embodiments of the present disclosure will be described below in conjunction with the accompanying drawings. In the accompanying drawings, the same reference numerals represent the same or similar elements or method flows.
[0016] In this disclosure, when an element is referred to as "connected", it may refer to "electrical connection" or "optical connection", and when an element is referred to as "coupled", it may refer to "electrical coupling" or "optical coupling". "Connected" or "coupled" may also be used to indicate the coordinated operation or interaction between two or more elements. Unless the article is specifically limited in the text, "one" and "the" may refer to a single or multiple elements. It will be further understood that "comprising", "including", "having" and similar words used herein indicate the features, regions, integers, steps, operations, elements and / or components recorded therein, but do not exclude the one or more other features, regions, integers, steps, operations, elements, components and / or groups thereof described therein or in addition thereto.
[0017] Figure 1 FIG. 1 is a circuit diagram of a low-dropout regulator 100 according to some embodiments of the present disclosure. In some embodiments, the low-dropout regulator 100 includes an amplifier 110, a buffer circuit 120, an output circuit 130, a compensation capacitor CA, and a compensation capacitor CC.
[0018] In some embodiments, the amplifier 110 is an amplifier circuit composed of transistors Ms, Mp, Mn and transistors M3-10. The source terminals of transistors M3 and M4 are used to receive the input power supply Vin, the gate terminals of transistors M3 and M4 are coupled to each other, the drain terminal of transistor M3 is coupled to the source terminal of transistor M5, and the drain terminal of transistor M4 is coupled to the source terminal of transistor M6. The gate terminals of transistors M5 and M6 are coupled to each other, the drain terminal of transistor M5 is coupled to the drain terminal of transistor M7 and the gate terminals of transistors M3 and M4, and the drain terminal of transistor M6 is coupled to the drain terminal of transistor M8. The gate terminals of transistors M7 and M8 are coupled to each other, the source terminal of transistor M7 is coupled to the drain terminal of transistor Mp and the drain terminal of transistor M9, and the source terminal of transistor M8 is coupled to the drain terminal of transistor M10. The gate terminals of transistors M9 and M10 are coupled to each other, and the source terminals of transistors M3 and M4 are used to receive the ground power supply. In some embodiments, the node between the source terminal of transistor M8 and the drain terminal of transistor M10 is an internal cascode node Nc of amplifier 110 .
[0019] The source terminal of transistor Ms is coupled to the input power supply Vin, the gate terminal of transistor Ms is used to receive the reference voltage Vf1, and the drain terminal of transistor Ms is coupled to the source terminals of transistors Mp and Mn. The gate terminal of transistor Mp is the non-inverting input terminal of amplifier 110, coupled to output circuit 130, and used to receive feedback voltage Vfb, and the drain terminal of transistor Mp is coupled to the source terminal of transistor M7. The gate terminal of transistor Mn is the inverting input terminal of amplifier 110, and used to receive reference voltage Vref, and the drain terminal of transistor Mn is coupled to the source terminal of transistor M8.
[0020] In addition, the amplifier 110 further includes an output terminal between the drain terminal of the transistor M6 and the drain terminal of the transistor M8 for outputting the control voltage Vct. The amplifier 110 is used to output the control voltage Vct to the buffer circuit 120 at the output terminal according to the reference voltage Vref and the feedback voltage Vfb to adjust the voltage output by the output circuit 130.
[0021] It should be noted that although the amplifier 110 in the present disclosure is drawn as a folded cascode architecture, the present disclosure is not limited to this. In some embodiments, the amplifier 110 can be implemented by a folded cascode architecture, a telescopic architecture, a two-stage architecture, other amplifier architectures or any combination thereof.
[0022] In some embodiments, the buffer circuit 120 includes an input terminal and an output terminal, wherein the input terminal of the buffer circuit 120 is coupled to the output terminal of the amplifier 110 and the compensation capacitor CC to enable the low dropout regulator 100 to operate stably. The buffer circuit 120 is configured to output a buffer voltage Vbuf to the output circuit 130 at its output terminal according to the control voltage Vct.
[0023] like Figure 1 As shown, in some embodiments, the buffer circuit 120 includes transistors M1 and M2, wherein the source terminal of the transistor M1 is coupled to the input power supply Vin, the drain terminal of the transistor M1 is coupled to the source terminal of the transistor M2, the gate terminal of the transistor M1 receives the reference voltage Vf2, the drain terminal of the transistor M2 receives the ground power supply, the gate terminal of the transistor M2 receives the control voltage Vct, and the node N1 between the transistors M1 and M2 is coupled to the output circuit 130 to output the buffer voltage Vbuf.
[0024] It should be noted that although Figure 1 The buffer circuit 120 in the figure is drawn as a source follower architecture implemented by transistors M1 and M2, but the present disclosure is not limited to this. The buffer circuit 120 in the present disclosure can be implemented by an advanced source follower architecture, an enhanced advanced source follower architecture, other similar circuit architectures or a combination thereof.
[0025] In a conventional low-dropout regulator without a buffer circuit, since the output of the amplifier is directly coupled to the power transistor, it is easy for the transistor inside the amplifier to enter the linear region, thereby affecting the power supply rejection ratio (PSRR) of the low-dropout regulator. The buffer circuit 120 in the low-dropout regulator 100 of the present disclosure provides a voltage difference between the gate and the source of the transistor M2 between the output of the amplifier 110 and the gate of the power transistor PM, so that the transistor of the amplifier 110 is more likely to operate in the saturation region, thereby improving the PSRR of the low-dropout regulator 100 when operating at a low frequency.
[0026] In some embodiments, the output circuit 130 includes an input terminal and an output terminal, and includes a power transistor PM, a voltage divider circuit 131, and a load circuit 132. The input terminal of the output circuit 130 is coupled to the output terminal of the buffer circuit 120, and the output terminal of the output circuit 130 is used to output the output voltage Vout.
[0027] The gate terminal of the power transistor PM is coupled to the input terminal of the output circuit 130 (i.e., the output terminal of the buffer circuit 120) for receiving the buffer voltage Vbuf. The source terminal of the power transistor PM is coupled to the input power source Vin, and the drain terminal of the power transistor PM is coupled to the voltage divider circuit 131, the load circuit 132, and the output terminal of the output circuit 130.
[0028] The voltage divider circuit 131 is coupled to the drain terminal of the power transistor PM, the non-inverting input terminal of the amplifier 110, and the ground power supply, and is used to output a feedback voltage Vfb to the non-inverting input terminal of the amplifier 110 according to the output voltage Vout. In some embodiments, the voltage divider circuit 131 includes a voltage divider resistor RA and a voltage divider resistor RB. The voltage divider resistors RA and RB are coupled in series between the drain terminal of the power transistor PM and the ground power supply, and a node N2 between the voltage divider resistors RA and RB is coupled to the non-inverting input terminal of the amplifier 110. The feedback voltage Vfb is determined by the ratio of the resistance values between the voltage divider resistors RA and RB.
[0029] In some embodiments, the load circuit 132 includes a load resistor RL and a load capacitor CL, wherein the load resistor RL and the load capacitor CL are coupled in parallel between the drain terminal of the power transistor PM and a ground power source.
[0030] Under the Miller compensation used by conventional low-dropout regulators, the frequency of the turning point of the PSRR of the low-dropout regulator is close to the frequency of the first pole of its Bode plot, resulting in the two frequencies being unable to be decoupled. The compensation capacitor CA of the low-dropout regulator 100 of the present disclosure is coupled between the drain terminal of the power transistor PM and the internal cascade node Nc of the amplifier 110 to separate the frequency of the turning point of the PSRR of the low-dropout regulator 100 from the frequency of the first pole of the Bode plot of the low-dropout regulator 100 (plotted on Figure 4A , 4B ), so that the frequency of the turning point of the PSRR is higher than the frequency of the first pole of the Bode plot, thereby improving the PSRR of the low dropout regulator 100.
[0031] It should be noted that the term "power supply rejection ratio (PSRR) turning point" in this disclosure document refers to the schematic diagram of the PSRR of a low dropout regulator (plotted on Figure 4B ), and the term "first pole" refers to the first turning point in the Bode plot of the low dropout regulator from low frequency to high frequency (plotted on Figure 4A ).
[0032] By adding the compensation capacitor CA in the low dropout regulator 100 , the frequency of the PSRR turning point of the low dropout regulator 100 can be increased, so that the PSRR of the low dropout regulator 100 starts to increase at a higher frequency than the traditional one, thereby being applicable to a wider frequency range.
[0033] The compensation capacitor CC is coupled between the input terminal of the buffer circuit 120 and the input power source Vin, and is used to separate the second pole and the third pole in the Bode diagram of the low dropout regulator 100 .
[0034] It should be noted that the term "second pole" in the present disclosure represents the second turning point of the Bode plot of the low dropout regulator from low frequency to high frequency, and the term "third pole" represents the third turning point of the Bode plot of the low dropout regulator from low frequency to high frequency. Therefore, in some embodiments, the frequency of the first pole of the low dropout regulator 100 is less than the frequency of the second pole, and the frequency of the second pole is less than the frequency of the third pole.
[0035] In some embodiments, the frequency of the first pole of the Bode plot of the low-dropout regulator 100 is determined by the capacitance value of the compensation capacitor CA, the frequency of the second pole is determined by the capacitance value of the compensation capacitor CC, and the frequency of the third pole is determined by the capacitance value of the load capacitor CL. If the capacitance value of the compensation capacitor CC is too small, the second pole and the third pole will be too close, thereby generating a complex pole phenomenon, resulting in unstable operation of the low-dropout regulator 100. Therefore, the compensation capacitor CC usually requires a larger capacitance value, thereby increasing the volume of the compensation capacitor CC. The following will describe how to reduce the volume of the compensation capacitor CC.
[0036] Figure 2 FIG. 2 is a circuit diagram of a low dropout regulator 200 according to some embodiments of the present disclosure. Figure 2 The low dropout regulator 200 is similar to Figure 1 For the sake of brevity, only the differences are described below.
[0037] In some embodiments, Figure 2 The low dropout regulator 200 does not include the compensation capacitor CC, and further includes a compensation capacitor CB. The compensation capacitor CB is coupled between the input terminal and the output terminal of the buffer circuit 120 (i.e., between the output terminal of the amplifier 110 and the input terminal of the output circuit 130), and is used to separate the frequency p2 of the second pole and the frequency of the third pole in the Bode diagram of the low dropout regulator 200.
[0038] Compared to Figure 1 The low dropout regulator 100, Figure 2The connection method of the compensation capacitor CB in the low-dropout regulator 200 has a capacitor amplification effect, which can make the second pole and the third pole in the Bode diagram of the low-dropout regulator 200 easier to separate, thereby maintaining the operation stability of the low-dropout regulator 200.
[0039] Figure 3 Schematic diagram of a small signal circuit model of a low dropout regulator 200 drawn according to some embodiments of the present disclosure. By establishing the small signal circuit model of the low dropout regulator 200, the frequency p1 of the first pole, the frequency p2 of the second pole, and the frequency z1 of the first zero of the Bode diagram of the low dropout regulator 200 can be obtained (e.g. Figure 4B The frequency p1 of the first pole, the frequency p2 of the second pole and the frequency z1 of the first zero point can be expressed by the following formulas:
[0040]
[0041]
[0042]
[0043] In formula (1), formula (2) and formula (3), R1 represents the equivalent resistance value of the output terminal of the amplifier 110, CA represents the capacitance value of the compensation capacitor CA, CB represents the capacitance value of the compensation capacitor CB, CGD represents the equivalent capacitance value between the gate and the drain of the power transistor PM, gm2 represents the transistor transconductance of the transistor M2 of the buffer circuit 120, and gm3 represents the transistor transconductance of the power transistor PM. Figure 3 In FIG. 1 , gm1 represents the input of the amplifier 110 to the transistor transconductance, and gm4 represents the transistor transconductance between the self-compensation capacitor CA and the output terminal of the amplifier 110 .
[0044] To illustrate the difference between the low dropout regulator 200 of the present disclosure and the conventional low dropout regulator in terms of PSRR and Bode diagram, please refer to Figure 4A , 4B . Figure 4A FIG. 2 is a schematic diagram of PSRR of a low dropout regulator 200 (indicated by a solid line) according to some embodiments of the present disclosure and a conventional low dropout regulator (indicated by a dotted line).
[0045] The smaller the PSRR of a low dropout regulator, the better its operating performance. Figure 4AIn the embodiment, the frequency at which the PSRR of the conventional low dropout regulator starts to rise is lower than the frequency at which the PSRR of the low dropout regulator 200 starts to rise. In other words, the low dropout regulator 200 can maintain a better performance frequency range than the conventional low dropout regulator. In addition, at the same frequency, the low dropout regulator 200 also has a smaller PSRR than the conventional low dropout regulator. Figure 4A For example, at a frequency of 300 kHz, the PSRR of the low dropout regulator 200 is 20 dB less than the PSRR of a conventional low dropout regulator.
[0046] Figure 4B FIG. 2 is a Bode diagram of a low-dropout voltage regulator 200 and a conventional low-dropout voltage regulator according to some embodiments of the present disclosure. Figure 4B As shown, since the low-dropout regulator 200 includes the compensation capacitor CA, the low-dropout regulator 200 can adjust the frequency p1 of the first pole in the Bode diagram to achieve different gain curves. In addition, since the low-dropout regulator 200 includes the compensation capacitor CB, the frequency p2 of the second pole, the frequency z1 of the first zero point, and the frequency of the third pole (not drawn) in the Bode diagram can also be adjusted to enable the low-dropout regulator 200 to operate more stably.
[0047] Figure 5 FIG. 5 is a flow chart of a capacitance compensation method 500 according to some embodiments of the present disclosure. In some embodiments, the capacitance compensation method 500 includes steps S510, S520, and S530.
[0048] In step S510, a buffer circuit (e.g., buffer circuit 120) is provided in a low-dropout regulator (e.g., low-dropout regulator 200), wherein the buffer circuit includes an input end and an output end, the input end of the buffer circuit is coupled to the output end of an amplifier (e.g., amplifier 110) of the low-dropout regulator, and the output end of the buffer circuit is coupled to the input end of an output circuit (e.g., output circuit 130) of the low-dropout regulator.
[0049] In step S520, a first compensation capacitor (e.g., compensation capacitor CA) is provided in the low dropout regulator, wherein the first compensation capacitor is coupled between the output terminal of the output circuit and the internal cascade node of the amplifier to separate a first pole frequency and a first PSRR turning point frequency in a Bode diagram of the low dropout regulator.
[0050] In step S530, a second compensation capacitor (e.g., compensation capacitor CB or compensation capacitor CC) is provided in the low dropout regulator, wherein the second compensation capacitor is coupled to the output terminal of the amplifier and the input terminal of the buffer circuit to separate the second pole frequency and the third pole frequency in the Bode diagram of the low dropout regulator so that the low dropout regulator can operate stably.
[0051] It should be noted that the number and order of steps in the capacitance compensation method 500 of the present disclosure are only examples and are not intended to limit the present disclosure. The number and order of other steps are within the scope of the present disclosure. In some embodiments, steps S520 and S530 may be performed simultaneously. In some embodiments, step S530 may be performed earlier than step S520.
[0052] In summary, compared to conventional low-dropout regulators, the low-dropout regulators 100, 200 provided by the present disclosure and the low-dropout regulator implemented by the capacitor compensation method 500 can separate the frequency p1 of the first pole in the Bode diagram from the PSRR turning point frequency, and can thus operate in a wider frequency range to increase operational stability. In addition, compared to conventional low-dropout regulators, the newly added buffer circuit 120 and compensation capacitors CA, CB, and CC in the low-dropout regulators 100, 200 can be implemented only by a simple combination of transistors and capacitors, so that the aforementioned PSRR improvement can be achieved without significantly increasing the power consumption of the low-dropout regulator.
[0053] The above are only preferred embodiments of the present disclosure. Without departing from the scope or spirit of the present disclosure, the structure of the present disclosure may be modified and equivalently changed. In summary, all modifications and equivalent changes made to the present disclosure within the scope of the following claims are within the scope of the present disclosure.
[0054] Description of Reference Numerals
[0055] 100:Low Dropout Regulator (LDO)
[0056] 110: Amplifier
[0057] 120: Buffer circuit
[0058] 130: Output circuit
[0059] 131: Voltage divider circuit
[0060] 132: Load circuit
[0061] 200:Low Dropout Regulator
[0062] 500: Capacitance compensation method
[0063] S510, S520, S530: Steps
[0064] CA, CB, CC: Compensation capacitors
[0065] CL: Load capacitance
[0066] Vf1, Vf2, Vref: reference voltage
[0067] Vin: Input power
[0068] Vct: Control voltage
[0069] Vbuf: buffer voltage
[0070] Vfb: Feedback voltage
[0071] Vout: output voltage
[0072] M1-M10: Transistor
[0073] Ms,Mn,Mp:Transistor
[0074] PM: Power Transistor
[0075] RA, RB: voltage divider resistor
[0076] RL: load resistance
[0077] N1, N2: nodes
[0078] Nc: internal cascade node
[0079] gm1-gm4: transistor transconductance
[0080] R1: equivalent resistance
[0081] C1, C2, CGD: equivalent capacitance
[0082] p1: frequency of the first pole
[0083] p2: frequency of the second pole of LDO 200
[0084] z1: Frequency of the first zero point of LDO 200
Claims
1. A low dropout voltage regulator, comprising: An amplifier comprising a non-inverting input terminal, an inverting input terminal, an internal cascade node and an output terminal; a buffer circuit comprising an input terminal and an output terminal, wherein the input terminal of the buffer circuit is coupled to the output terminal of the amplifier; an output circuit, comprising an input terminal and an output terminal, wherein the input terminal of the output circuit is coupled to the output terminal of the buffer circuit, and the output terminal of the output circuit is used to output an output voltage; A first compensation capacitor is coupled between the output terminal of the output circuit and the internal cascade node of the amplifier, and is used to separate the first pole frequency and the power supply voltage rejection ratio turning point frequency in the Bode diagram of the low dropout regulator; as well as The second compensation capacitor is coupled between the input terminal of the buffer circuit and an input power source, and is used to separate the second pole frequency and the third pole frequency in the Bode diagram of the low dropout regulator, so as to make the low dropout regulator operate stably.
2. The low-dropout regulator according to claim 1, wherein the inverting input terminal of the amplifier is used to receive a reference voltage, the non-inverting input terminal is used to receive a feedback voltage, and the amplifier is used to output a control voltage at the output terminal of the amplifier according to the reference voltage and the feedback voltage to adjust the output voltage of the output circuit. 3 . The low voltage dropout regulator according to claim 2 , wherein the input end of the buffer circuit is used to receive the control voltage, and the buffer circuit is used to output a buffer voltage at the output end of the buffer circuit according to the control voltage.
4. The low voltage dropout regulator according to claim 3, wherein the output circuit comprises a power transistor, a control end of the power transistor is coupled to the output end of the buffer circuit, a first end of the power transistor is coupled to the input power supply, and a second end of the power transistor is coupled to the output end of the output circuit.
5. The low-dropout regulator according to claim 4, wherein the output circuit further comprises a voltage divider circuit, the voltage divider circuit is coupled to the second end of the power transistor, the non-inverting input end of the amplifier and a ground power supply, and is used to output the feedback voltage to the non-inverting input end of the amplifier according to the output voltage.
6. The low-dropout regulator according to claim 5, wherein the voltage-dividing circuit comprises a first voltage-dividing resistor and a second voltage-dividing resistor, the first voltage-dividing resistor is coupled between the second end of the power transistor and a first node, the second voltage-dividing resistor is coupled between the first node and the ground power supply, and the non-inverting input terminal of the amplifier is coupled to the first node.
7. The low dropout regulator according to claim 1, wherein the first pole frequency in the Bode plot is related to the capacitance value of the first compensation capacitor, and The second pole frequency in the Bode plot is related to a capacitance value of the second compensation capacitor.
8. A low dropout voltage regulator, comprising: An amplifier comprising a non-inverting input terminal, an inverting input terminal, an internal cascade node and an output terminal; a buffer circuit comprising an input terminal and an output terminal, wherein the input terminal of the buffer circuit is coupled to the output terminal of the amplifier; an output circuit, comprising an input terminal and an output terminal, wherein the input terminal of the output circuit is coupled to the output terminal of the buffer circuit, and the output terminal of the output circuit is used to output an output voltage; A first compensation capacitor is coupled between the output terminal of the output circuit and the internal cascade node of the amplifier, and is used to separate the first pole frequency and the power supply voltage rejection ratio turning point frequency in the Bode diagram of the low dropout regulator; as well as The second compensation capacitor is coupled between the input terminal and the output terminal of the buffer circuit and is used to separate the second pole frequency and the third pole frequency in the Bode diagram of the low dropout regulator so as to make the low dropout regulator operate stably.
9. The low dropout regulator according to claim 8, wherein the first pole frequency in the Bode plot is negatively correlated with the capacitance value of the first compensation capacitor, and The second pole frequency in the Bode plot is positively correlated to the capacitance value of the first compensation capacitor, and negatively correlated to the capacitance value of the second compensation capacitor.
10. A capacitance compensation method, applicable to a low voltage dropout regulator, wherein the low voltage dropout regulator comprises an amplifier and an output circuit, and the capacitance compensation method comprises: A buffer circuit is provided in the low-dropout regulator, wherein the buffer circuit comprises an input terminal and an output terminal, the input terminal of the buffer circuit is coupled to the output terminal of the amplifier, and the output terminal of the buffer circuit is coupled to the input terminal of the output circuit; Providing a first compensation capacitor in the low dropout regulator, wherein the first compensation capacitor is coupled between the output terminal of the output circuit and the internal cascade node of the amplifier to separate the first pole frequency and the power supply voltage rejection ratio turning point frequency in the Bode diagram of the low dropout regulator; as well as A second compensation capacitor is provided in the low-dropout regulator, wherein the second compensation capacitor is coupled to the output terminal of the amplifier and the input terminal of the buffer circuit to separate the second pole frequency and the third pole frequency in the Bode diagram of the low-dropout regulator so that the low-dropout regulator can operate stably.