Fast response ldo with overcurrent protection

Abstract

This invention relates to the field of low dropout linear regulators (LDOs), specifically a fast-response LDO with overcurrent protection. The bias circuit and Zener diode D1 are electrically connected to the input of a high-bandwidth source follower. The high-bandwidth source follower, reference circuit, overcurrent protection circuit, operational amplifier circuit, and filter circuit are then sequentially connected. The overcurrent protection circuit includes a comparator bias unit, a comparator unit, a trigger unit, a drive unit, MOSFETs M9, M10, and N6. The comparator bias unit generates a comparator bias voltage, turning on MOSFETs M9 and M10. The comparator unit receives the comparator bias voltage and a reference signal generated by the reference circuit. When the reference signal voltage is greater than the comparator bias voltage, it drives the trigger unit, turning on MOSFET N6 and turning off the drive unit. This solves the problem that the fast-response LDO cannot perform overcurrent protection.

Description

Technical Field

[0001] This invention relates to the field of low dropout linear regulators, and in particular to a fast-response LDO with overcurrent protection. Background Technology

[0002] LDO, or low dropout linear regulator, is particularly important in applications requiring high precision and stability, such as communication systems and industrial control equipment. Its fast response speed is crucial; it can quickly respond to changes in input voltage and load, rapidly adjusting the output voltage to keep the system operating within a stable voltage range. This helps reduce system instability caused by voltage fluctuations or sudden load changes, such as voltage overshoot and undervoltage, thereby improving the overall stability of the system.

[0003] However, current fast-response LDOs integrate overcurrent protection into their peripheral circuitry, directly shutting down the LDO when an overcurrent occurs. This fails to account for overcurrent faults generated within the LDO itself. For instance, if a minor overcurrent occurs in the LDO's peripheral circuitry, insufficient to trigger overcurrent protection, it can be amplified by the LDO's large-bandwidth source follower during its fast response, leading to overcurrent in the operational amplifier and potentially damaging it. Therefore, it is crucial to incorporate overcurrent protection within the LDO to suppress overcurrent signals generated during its fast-response operation. Summary of the Invention

[0004] To address the aforementioned shortcomings, the present invention aims to propose a fast-response LDO with overcurrent protection, thereby solving the problem that the fast-response LDO cannot perform protection actions when there is an internal overcurrent.

[0005] To achieve this objective, the present invention adopts the following technical solution:

[0006] A fast-response LDO with overcurrent protection includes a bias circuit, a wide-bandwidth source follower, a reference circuit, a Zener diode D1, an operational amplifier circuit, a filter circuit, and an overcurrent protection circuit; the output terminal of the filter circuit is used as the output terminal of the fast-response LDO.

[0007] The output terminal of the bias circuit and the cathode of the Zener diode D1 are both electrically connected to the input terminal of the wide-bandwidth source follower. The output terminal of the wide-bandwidth source follower is electrically connected to the input terminal of the reference circuit. The output terminal of the reference circuit is electrically connected to the input terminal of the overcurrent protection circuit. The output terminal of the overcurrent protection circuit is electrically connected to the input terminal of the operational amplifier circuit. The output terminal of the operational amplifier circuit is electrically connected to the input terminal of the filter circuit. The anode of the Zener diode D1 is grounded.

[0008] The overcurrent protection circuit includes a comparator bias unit, a comparator unit, a trigger unit, a drive unit, MOSFET M9, MOSFET M10, and MOSFET N6; the input terminal of the comparator unit is used as the input terminal of the overcurrent protection circuit, and the output terminal of the drive unit is used as the output terminal of the overcurrent protection circuit.

[0009] The gate of the MOS transistor M9, the output terminal of the comparator bias unit, and the bias terminal of the comparator unit are electrically connected. The output terminal of the comparator unit is electrically connected to the input terminal of the trigger unit. The VDD terminal of the comparator bias unit, the VDD terminal of the comparator unit, and the source of the MOS transistor M9 are all connected to the VDD power supply. The gate of the MOS transistor M9 and the gate of the MOS transistor M10 are electrically connected. The drain of the MOS transistor M9 and the source of the MOS transistor M10 are both electrically connected to the VDD terminal of the driving unit. The output terminal of the trigger unit is electrically connected to the gate of the MOS transistor N6. The source of the MOS transistor N6 and the ground terminal of the driving unit are both grounded. The drain of the MOS transistor N6 and the drain of the MOS transistor M10 are both electrically connected to the input terminal of the driving unit.

[0010] The comparator bias unit is used to generate a comparator bias voltage and turn on the MOS transistors M9 and M10.

[0011] The comparator unit is used to receive the comparator bias voltage and the reference signal generated by the reference circuit. When the voltage of the reference signal is greater than the comparator bias voltage, it drives the trigger unit to turn on the MOS transistor N6 and turn off the drive unit.

[0012] Furthermore, the comparator unit includes MOSFETs M5, M6, M7, M8, N4, and N5, resistors R2 and R3, and diode D2; the gate of MOSFET M6 is used as the input terminal of the comparator unit, the gates of MOSFETs M5 and M8 are both used as the bias terminals of the comparator unit, the sources of MOSFETs M5 and M8 are both used as the VDD terminal of the comparator unit, and the source of MOSFET N5 is used as the output terminal of the comparator unit.

[0013] The source of MOSFET M6 and the source of MOSFET M7 are both electrically connected to the drain of MOSFET M5. The drain of MOSFET M6, the drain of MOSFET N4, and the gate of MOSFET N4 are all electrically connected to the gate of MOSFET N5. The drain of MOSFET N5 is electrically connected to the drain of MOSFET M7. The gate of MOSFET M7 and one end of resistor R2 are both electrically connected to one end of resistor R3. The anode of diode D2, the other end of resistor R3, the source of MOSFET N4, and the source of MOSFET N5 are all grounded. The other end of resistor R2 and the cathode of diode D2 are both electrically connected to the drain of MOSFET M8.

[0014] Furthermore, the comparator bias unit includes MOS transistors M1, M2, M3, M4, N1, N2, and N3, and resistor R1; the sources of MOS transistors M1, M2, and M3 are all used as the VDD terminal of the comparator bias unit, and the gate of MOS transistor M3 is used as the output terminal of the comparator bias unit.

[0015] The gate and drain of MOSFET M1 are electrically connected to one end of resistor R1. The other end of resistor R1 and the gate of MOSFET M4 are electrically connected to the drain of MOSFET N3. The gate of MOSFET M3, the drain of MOSFET N1, the gate of MOSFET M2, and the drain of MOSFET M2 are all electrically connected to the source of MOSFET M4. The gate of MOSFET N3, the gate of MOSFET N1, the gate of MOSFET N2, and the drain of MOSFET N2 are all electrically connected to the drain of MOSFET M3. The drain of MOSFET M4, the source of MOSFET N1, the source of MOSFET N2, and the source of MOSFET N3 are all grounded.

[0016] Furthermore, the trigger unit includes MOSFETs M13, M14, N9, N10, M15, N11, N12, and M37, resistors R4 and R5; the gate of MOSFET M14 serves as the input terminal of the trigger unit, and the drain of MOSFET M37 serves as the output terminal of the trigger unit.

[0017] The source of MOSFET M13 is connected to VDD power. The drain of MOSFET M13 and the source of MOSFET M14 are both electrically connected to the source of MOSFET M15. The drain of MOSFET M15 is electrically connected to one end of resistor R4, and the other end of resistor R4 is grounded. The gates of MOSFET M13, M14, and N9 are all electrically connected to the gate of MOSFET N10. The gates of MOSFET M37, N12, and M15 are also connected to the source of MOSFET M15. The gate of transistor N11, the drain of MOSFET M14, and the drain of MOSFET N9 are all electrically connected. The source of MOSFET N10 is grounded. The drain of MOSFET N10, the source of MOSFET N9, and the source of MOSFET N11 are all electrically connected. The drain of MOSFET N11 is electrically connected to one end of resistor R5. The other end of resistor R5 is connected to VDD power supply. The source of MOSFET M37 is connected to VDD power supply. The source of MOSFET N12 is grounded. The drain of MOSFET M37 and the drain of MOSFET N12 are electrically connected.

[0018] Furthermore, the driving unit includes MOSFETs M11, M12, N7, and N8; the gate of MOSFET M11 is used as the input terminal of the driving unit, the drain of MOSFET M12 is used as the output terminal of the driving unit, the source of MOSFET M11 and the source of MOSFET M12 are both used as the VDD terminal of the driving unit, and the source of MOSFET N7 and the source of MOSFET N8 are both used as the ground terminal of the driving unit.

[0019] The gate of MOS transistor M11 is electrically connected to the gate of MOS transistor N7. The drain of MOS transistor M11, the drain of MOS transistor N7, and the gate of MOS transistor M12 are all electrically connected to the gate of MOS transistor N8. The drain of MOS transistor M12 is electrically connected to the drain of MOS transistor N8.

[0020] Furthermore, the filtering circuit includes a frequency band filtering unit, a first shaping filtering unit, and a second shaping filtering unit; the input terminal of the frequency band filtering unit is used as the input terminal of the filtering circuit, the output terminal of the frequency band filtering unit is electrically connected to the input terminal of the first shaping filtering unit, the output terminal of the first shaping filtering unit is electrically connected to the input terminal of the second shaping filtering unit, and the output terminal of the second shaping filtering unit is used as the output terminal of the filtering circuit.

[0021] The frequency band filtering unit is used to set a cutoff frequency to filter out non-output signal frequency bands;

[0022] The first shaping and filtering unit is used to filter out noise and interference in the signal;

[0023] The second shaping and filtering unit is used for signal waveform shaping and signal amplification.

[0024] Furthermore, the frequency band filtering unit includes a response speed setting circuit and a frequency band filter; the input terminal of the response speed setting circuit is used as the input terminal of the frequency band filtering unit, the output terminal of the response speed setting circuit is electrically connected to the input terminal of the frequency band filter, and the output terminal of the frequency band filter is used as the output terminal of the frequency band filtering unit.

[0025] The response speed setting circuit is used to set the on-time of the frequency band filter;

[0026] The response speed setting circuit includes MOSFET M15 and MOSFET M16; the gate of MOSFET M15 is used as the input terminal of the response speed setting circuit, and the drain of MOSFET M15 is used as the output terminal of the response speed setting circuit.

[0027] The source of the MOS transistor M15 is connected to the VDD power supply, the gate of the MOS transistor M15 is electrically connected to the gate of the MOS transistor M16, the drain of the MOS transistor M15 is electrically connected to the drain of the MOS transistor M16, and the source of the MOS transistor M16 is grounded.

[0028] The frequency band filter includes a resistor R and a capacitor C. One end of the resistor R is used as the input terminal of the frequency band filter, and the other end of the resistor R is used as the output terminal of the frequency band filter. The other end of the resistor R is electrically connected to one end of the capacitor C, and the other end of the capacitor C is grounded.

[0029] The resistor R includes at least two sub-resistors R6, one end of the first sub-resistor R6 is used as one end of the resistor R, and the other end of the last sub-resistor R6 is used as the other end of the resistor R; the other end of the first sub-resistor R6 and one end of the last sub-resistor R6 are electrically connected.

[0030] The capacitor C includes at least two sub-capacitors C1, one end of each sub-capacitor C1 is used as one end of the capacitor C, and the other end of each sub-capacitor C1 is used as the other end of the capacitor C.

[0031] Furthermore, the first shaping and filtering unit includes MOSFETs M17, M18, M19, M20, M21, and M22, resistors R7 and R8; the gate of MOSFET M18 is used as the input terminal of the first shaping and filtering unit, and the gate of MOSFET M21 is used as the output terminal of the first shaping and filtering unit.

[0032] The sources of MOSFETs M17 and M21 are both connected to VDD power. The drains of MOSFET M17 and M18 are electrically connected to the source of MOSFET M21. The drain of MOSFET M21 is electrically connected to one end of resistor R7, and the other end of resistor R7 is grounded. The gates of MOSFETs M17, M18, and M19 are all electrically connected to the gate of MOSFET M20. The drain of MOSFET M18 and the drain of MOSFET M19 are electrically connected. The source of MOSFET M20 and the source of MOSFET M22 are both grounded. The drain of MOSFET M20, the source of MOSFET M19, and the source of MOSFET M22 are all electrically connected. The drain of MOSFET M22 is electrically connected to one end of resistor R8, and the other end of resistor R8 is grounded. The gate of MOSFET M21 and the gate of MOSFET M22 are electrically connected.

[0033] Furthermore, the second shaping and filtering unit includes MOSFETs M23, M24, M25, and M26; the gate of MOSFET M23 is used as the input terminal of the second shaping and filtering unit, and the drain of MOSFET M25 is used as the output terminal of the second shaping and filtering unit.

[0034] The gate of the MOS transistor M23 and the gate of the MOS transistor M24 are electrically connected. The source of the MOS transistor M23 is connected to the VDD power supply. The drain of the MOS transistor M23 and the drain of the MOS transistor M24 are electrically connected. The source of the MOS transistor M24 is grounded.

[0035] The gate of the MOS transistor M25 is electrically connected to the gate of the MOS transistor M26. The source of the MOS transistor M25 is connected to the VDD power supply. The drain of the MOS transistor M25 is electrically connected to the drain of the MOS transistor M26. The source of the MOS transistor M26 is grounded.

[0036] Furthermore, the high-bandwidth source follower includes a MOSFET M27, a capacitor CL, a current mirror circuit, and a bias constant current source; the gate of the MOSFET M27 is used as the input terminal of the high-bandwidth source follower, and the source of the MOSFET M27 is used as the output terminal of the high-bandwidth source follower.

[0037] The control terminal of the current mirror circuit is electrically connected to the output terminal of the bias constant current source. The first terminal of the current mirror circuit is electrically connected to the drain of the MOS transistor M27. The second terminal of the current mirror circuit and one end of the capacitor CL are both electrically connected to the source of the MOS transistor M27. The other end of the capacitor CL is grounded.

[0038] The technical solution provided by this invention can include the following beneficial effects: The fast-response LDO consists of a bias circuit and a Zener diode D forming a startup circuit that generates a stable bias voltage. After being buffered and isolated by a large-bandwidth source follower, the bias voltage is provided to the reference circuit, enabling it to operate at the required static operating point and preventing the reference circuit from entering a zero bias current state, i.e., the operating current in the circuit is zero, thus preventing it from working properly. The reference circuit then generates a reference signal, which is provided to the operational amplifier circuit, thereby enabling the operational amplifier circuit to achieve linear voltage adjustment. Furthermore, because a large-bandwidth source follower is used, the linear establishment time of the operational amplifier circuit is greatly shortened, thereby greatly shortening the response time of the operational amplifier circuit to the output signal. Therefore, if the reference signal is disturbed, overcurrent may easily occur. Thus, an overcurrent protection circuit is set here to prevent the overcurrent reference signal from breaking down the operational amplifier circuit. Finally, the output signal is filtered by the end filter circuit to filter out non-output signal frequency bands, resulting in a higher quality output signal that is more compatible with the fast-response LDO and adaptable to the application environment of the fast-response LDO, avoiding signal distortion.

[0039] Specifically, when the overcurrent protection circuit normally receives the comparator bias voltage, MOSFETs M1 and M2 are in the conducting state, and the comparator unit normally receives the reference signal to drive the trigger unit to enable MOSFET M1. Only when the reference signal is overcurrent (i.e., the voltage of the reference signal is greater than the comparator bias voltage) is MOSFET M1 triggered to turn on, thereby turning off the subsequent drive unit and cutting off the transmission of the overcurrent signal to the operational amplifier circuit, realizing fast-response internal overcurrent protection of the LDO. More importantly, using a comparator with a bias voltage for overcurrent detection can speed up the detection speed and adapt to the fast response characteristics of the LDO. At the same time, using the triggering method (trigger unit) to transmit the signal to the operational amplifier circuit can play a certain role in isolation and filtering, avoiding direct transmission of the reference signal. Attached Figure Description

[0040] Figure 1 This is a schematic diagram of a fast-response LDO with overcurrent protection, which is one embodiment of the present invention.

[0041] Figure 2 Is it like this? Figure 1 The circuit diagram of the overcurrent protection circuit is shown.

[0042] Figure 3 Is it like this? Figure 1 The circuit diagram of the filter circuit shown is shown.

[0043] Figure 4 Is it like this? Figure 1 The circuit diagram shown is for a high-bandwidth source follower.

[0044] The circuit includes: bias circuit 1, wide-bandwidth source follower 2, reference circuit 3, Zener diode D1, operational amplifier circuit 4, filter circuit 5, overcurrent protection circuit 6, undervoltage protection circuit 7, MOSFET M37, resistor R9, resistor R10, operational amplifier A1, comparator bias unit 61, comparator unit 62, trigger unit 63, drive unit 64, MOSFET M9, MOSFET M10, MOSFET N6, MOSFET M5, MOSFET M6, MOSFET M7, MOSFET M... 8. MOSFET N4, MOSFET N5, Resistor R2, Resistor R3, Diode D2, MOSFET M1, MOSFET M2, MOSFET M3, MOSFET M4, MOSFET N1, MOSFET N2, MOSFET N3, Resistor R1, MOSFET M13, MOSFET M14, MOSFET N9, MOSFET N10, MOSFET M15, MOSFET N11, MOSFET N12, MOSFET M37, Resistor R4, Resistor R5, MOSFET M11 MOSFET M12, MOSFET N7, MOSFET N8, frequency band filtering unit 51, first shaping and filtering unit 52, second shaping and filtering unit 53, response speed setting circuit 511, frequency band filter 512, MOSFET M15, MOSFET M16, resistor R, capacitor C, resistor R6, capacitor C1, MOSFET M17, MOSFET M18, MOSFET M19, MOSFET M20, MOSFET M21, MOSFET M22, resistor R7, resistor R8, MOSFET M23, MOSFET M24, M MOSFET M25, MOSFET M26, MOSFET M1, capacitor CL, current mirror circuit 21, bias constant current source 22, MOSFET M2, MOSFET M3, MOSFET M4, MOSFET M5, MOSFET M6, MOSFET M7, current source A2, MOSFET M8, MOSFET M9, MOSFET M27, MOSFET M28, MOSFET M29, MOSFET M30, MOSFET M31, MOSFET M32, MOSFET M33, current source A2, MOSFET M34, MOSFET M35. Detailed Implementation

[0045] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0046] In the description of embodiments of the present invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of embodiments of the present invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0047] In the description of the embodiments of the present invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in the embodiments of the present invention according to the specific circumstances.

[0048] The following is combined with Figures 1 to 4 This describes a fast-response LDO with overcurrent protection according to an embodiment of the present invention.

[0049] A fast-response LDO with overcurrent protection includes a bias circuit 1, a wide-bandwidth source follower 2, a reference circuit 3, a Zener diode D1, an operational amplifier circuit 4, a filter circuit 5, and an overcurrent protection circuit 6; the output terminal of the filter circuit 5 is used as the output terminal of the fast-response LDO.

[0050] The output terminal of bias circuit 1 and the cathode of Zener diode D1 are electrically connected to the input terminal of wide-bandwidth source follower 2. The output terminal of wide-bandwidth source follower 2 is electrically connected to the input terminal of reference circuit 3. The output terminal of reference circuit 3 is electrically connected to the input terminal of overcurrent protection circuit 6. The output terminal of overcurrent protection circuit 6 is electrically connected to the input terminal of operational amplifier circuit 4. The output terminal of operational amplifier circuit 4 is electrically connected to the input terminal of filter circuit 5. The anode of Zener diode D1 is grounded.

[0051] The overcurrent protection circuit 6 includes a comparator bias unit 61, a comparator unit 62, a trigger unit 63, a drive unit 64, a MOSFET M9, a MOSFET M10, and a MOSFET N6; the input terminal of the comparator unit 62 is used as the input terminal of the overcurrent protection circuit 6, and the output terminal of the drive unit 64 is used as the output terminal of the overcurrent protection circuit 6.

[0052] The gate of MOSFET M9, the output of comparator bias unit 61, and the bias terminal of comparator unit 62 are electrically connected. The output of comparator unit 62 is electrically connected to the input of trigger unit 63. The VDD terminal of comparator bias unit 61, the VDD terminal of comparator unit 62, and the source of MOSFET M9 are all connected to the VDD power supply. The gate of MOSFET M9 and the gate of MOSFET M10 are electrically connected. The drain of MOSFET M9 and the source of MOSFET M10 are both electrically connected to the VDD terminal of drive unit 64. The output of trigger unit 63 is electrically connected to the gate of MOSFET N6. The source of MOSFET N6 and the ground terminal of drive unit 64 are both grounded. The drain of MOSFET N6 and the drain of MOSFET M10 are both electrically connected to the input of drive unit 64.

[0053] Comparator bias unit 61 is used to generate comparator bias voltage and turn on MOSFETs M9 and M10;

[0054] The comparator unit 62 is used to receive the comparator bias voltage and the reference signal generated by the reference circuit 3. When the voltage of the reference signal is greater than the comparator bias voltage, it drives the trigger unit 63 to turn on the MOS transistor N6 and turn off the drive unit 64.

[0055] This invention proposes a preferred embodiment of a fast-response LDO with overcurrent protection, such as... Figures 1 to 2 As shown, the fast-response LDO consists of a bias circuit 1 and a Zener diode D1 forming a startup circuit that generates a stable bias voltage. After being buffered and isolated by a wide-bandwidth source follower 2, the bias voltage is provided to the reference circuit 3, enabling it to operate at the required static operating point. This prevents the reference circuit 3 from entering a zero-bias current state, where the operating current in the circuit is zero, thus preventing it from functioning properly. The reference circuit 3 then generates a reference signal, which is provided to the operational amplifier circuit 4. The operational amplifier circuit 4 uses this signal to achieve linear voltage adjustment. Because of the use of the wide-bandwidth source follower 2, the linear setup time of the operational amplifier circuit 4 is greatly shortened, resulting in a significantly shorter response time to the output signal. Therefore, if the reference signal is disturbed, overcurrent may easily occur. Thus, an overcurrent protection circuit 6 is set here to prevent the overcurrent reference signal from breaking down the operational amplifier circuit 4. Finally, the output signal is filtered by the final filter circuit 5, which filters out non-output signal frequency bands, resulting in a higher quality output signal that is more suitable for the fast-response LDO and its application environment, avoiding signal distortion.

[0056] Specifically, when the overcurrent protection circuit 6 normally receives the comparator bias voltage, MOSFETs M9 and M10 are in the conducting state, and the comparator unit 62 normally receives the reference signal to drive the trigger unit 63 to enable MOSFET M6. Only when the reference signal is overcurrent (i.e., the voltage of the reference signal is greater than the comparator bias voltage) is the MOSFET M6 triggered to turn on, thereby turning off the subsequent drive unit 64 and cutting off the transmission of the overcurrent signal to the operational amplifier circuit 4, realizing fast-response overcurrent protection within the LDO. More importantly, using a comparator with a bias voltage for overcurrent detection can speed up the detection speed and adapt to the fast response characteristics of the LDO. At the same time, using the triggering method (trigger unit 63) to transmit the signal to the operational amplifier circuit 4 can play a certain role in isolation and filtering, avoiding direct transmission of the reference signal.

[0057] Op-amp circuit 4 can specifically be:

[0058] Operational amplifier circuit 4 includes MOSFET M37, resistors R9 and R10, and operational amplifier A1. The negative input terminal of operational amplifier A1 serves as the input terminal of operational amplifier circuit 4, and the drain of MOSFET M37 serves as the output terminal. The source of MOSFET M37 is connected to VDD power supply, the gate of MOSFET M37 is electrically connected to the output terminal of operational amplifier A1, and the source of MOSFET M37 is electrically connected to one end of resistor R9. The other end of resistor R9 and the positive input terminal of operational amplifier A1 are both electrically connected to one end of resistor R10, and the other end of resistor R10 is grounded. The operational amplifier circuit 4, composed of MOSFET M37, resistors R9 and R10, and operational amplifier A1, features negative feedback, enabling the output to respond linearly to changes in the input while maintaining output-input balance. Furthermore, both MOSFETs M1 and M37 are high-voltage LDMOS transistors, which offer higher gain, faster response speed, and stronger voltage withstand capability compared to ordinary MOSFETs, making them more suitable for wide-bandwidth source follower 2 and LDOs using this follower.

[0059] The reference circuit 3 can be a bandgap reference circuit, which has the characteristics of low noise and high stability compared with ordinary reference circuits, and is more conducive to providing a stable reference signal for the operational amplifier circuit 4.

[0060] Zener diode D1 can be used, which has fast switching characteristics, strong overcharge and over-discharge resistance, reduces input voltage noise, avoids introducing noise into the wide-bandwidth source follower 2, and is compatible with the fast response characteristics of the wide-bandwidth source follower 2.

[0061] It should be noted that the fast response LDO may also include an undervoltage protection circuit 7. After the output terminal of the operational amplifier circuit 4 is electrically connected to the input terminal of the undervoltage protection circuit 7, the output terminal of the undervoltage protection circuit 7 is then electrically connected to the input terminal of the filter circuit 5 to prevent signal undervoltage from occurring through the operational amplifier circuit 4, which would lead to disorder in the final output signal.

[0062] Furthermore, the comparator unit 62 includes MOSFETs M5, M6, M7, M8, N4, and N5, resistors R2 and R3, and diode D2; the gate of MOSFET M6 is used as the input terminal of the comparator unit 62, the gates of MOSFETs M5 and M8 are both used as the bias terminals of the comparator unit 62, the sources of MOSFETs M5 and M8 are both used as the VDD terminal of the comparator unit 62, and the source of MOSFET N5 is used as the output terminal of the comparator unit 62.

[0063] The source of MOSFET M6 and the source of MOSFET M7 are both electrically connected to the drain of MOSFET M5. The drain of MOSFET M6, the drain of MOSFET N4, and the gate of MOSFET N4 are all electrically connected to the gate of MOSFET N5. The drain of MOSFET N5 is electrically connected to the drain of MOSFET M7. The gate of MOSFET M7 and one end of resistor R2 are both electrically connected to one end of resistor R3. The anode of diode D2, the other end of resistor R3, the source of MOSFET N4, and the source of MOSFET N5 are all grounded. The other end of resistor R2 and the cathode of diode D2 are both electrically connected to the drain of MOSFET M8.

[0064] The comparator unit 62 in this embodiment consists of a sampling circuit composed of MOSFET M8, resistors R2 and R3 and diode D2 to receive the comparator bias voltage (VB). The comparator circuit is composed of MOSFETs M5, M6, M7, N4 and N5, which can effectively reduce the noise generated in the fast response of LDO and reduce power consumption. At the same time, it can quickly determine the comparator bias voltage. Compared with directly using comparator components (which have a slow response), it is more suitable for fast response LDO.

[0065] Furthermore, the comparator bias unit 61 includes MOSFETs M1, M2, M3, M4, N1, N2, and N3, and a resistor R1; the sources of MOSFETs M1, M2, and M3 are all used as the VDD terminal of the comparator bias unit 61, and the gate of MOSFET M3 is used as the output terminal of the comparator bias unit 61.

[0066] The gate and drain of MOSFET M1 are electrically connected to one end of resistor R1. The other end of resistor R1 and the gate of MOSFET M4 are electrically connected to the drain of MOSFET N3. The gate of MOSFET M3, the drain of MOSFET N1, the gate of MOSFET M2, and the drain of MOSFET M2 are all electrically connected to the source of MOSFET M4. The gate of MOSFET N3, the gate of MOSFET N1, the gate of MOSFET N2, and the drain of MOSFET N2 are all electrically connected to the drain of MOSFET M3. The drain of MOSFET M4, the source of MOSFET N1, the source of MOSFET N2, and the source of MOSFET N3 are all grounded.

[0067] In this embodiment, the comparator bias unit 61 uses MOSFET M1 and resistor R1 to divide the branch voltage. MOSFETs M2, M3, N2, and N3 form a current mirror. MOSFETs M2 and N2 are connected in a diode configuration, so that they saturate upon conduction. MOSFETs M3 and N1 operate in the linear region. By adjusting the width-to-length ratio of MOSFETs N2 and M3, the comparator bias voltage (VB) can be adjusted. Thus, the overcurrent protection circuit 6 can adjust the comparator bias voltage according to actual needs, thereby adapting to more types of fast-response LDOs.

[0068] Furthermore, the trigger unit 63 includes MOSFETs M13, M14, N9, N10, M15, N11, N12, and M37, as well as resistors R4 and R5; the gate of MOSFET M14 is used as the input terminal of the trigger unit 63, and the drain of MOSFET M37 is used as the output terminal of the trigger unit 63.

[0069] The source of MOSFET M13 is connected to VDD power. The drain of MOSFET M13 and the source of MOSFET M14 are both electrically connected to the source of MOSFET M15. The drain of MOSFET M15 is electrically connected to one end of resistor R4, and the other end of resistor R4 is grounded. The gates of MOSFET M13, M14, and N9 are all electrically connected to the gate of MOSFET N10. The gates of MOSFET M37, N12, M15, and N9 are also electrically connected. The gate of transistor 11 and the drain of transistor M14 are electrically connected to the drain of transistor N9. The source of transistor N10 is grounded. The drain of transistor N10 and the source of transistor N9 are electrically connected to the source of transistor N11. The drain of transistor N11 is electrically connected to one end of resistor R5. The other end of resistor R5 is connected to the VDD power supply. The source of transistor M37 is connected to the VDD power supply. The source of transistor N12 is grounded. The drain of transistor M37 is electrically connected to the drain of transistor N12.

[0070] In this embodiment, the trigger unit 63 needs to be controlled and triggered while also playing a certain role in isolation and filtering. It is composed of MOS transistors M13, M14, N9, N10, M15, N11, N12, M37, resistor R4, and resistor R5 to form a Schmitt trigger.

[0071] Furthermore, the driving unit 63 includes MOSFETs M11, M12, N7, and N8; the gate of MOSFET M11 is used as the input terminal of the driving unit 63, the drain of MOSFET M12 is used as the output terminal of the driving unit 63, the source of MOSFET M11 and the source of MOSFET M12 are both used as the VDD terminal of the driving unit 63, and the source of MOSFET N7 and the source of MOSFET N8 are both used as the ground terminal of the driving unit 63.

[0072] The gate of MOSFET M11 is electrically connected to the gate of MOSFET N7. The drain of MOSFET M11, the drain of MOSFET N7, and the gate of MOSFET M12 are all electrically connected to the gate of MOSFET N8. The drain of MOSFET M12 is electrically connected to the drain of MOSFET N8.

[0073] In this embodiment, since the trigger unit 63 is a Schmitt trigger, its output signal driving capability may be insufficient. Therefore, the driving unit 63 is composed of MOS transistors M11, M12, N7, and N8 to enhance the signal driving capability and improve signal integrity. This prevents the signal from weakening during transmission due to factors such as attenuation or load, reduces signal distortion and aberration, and ensures signal quality.

[0074] Furthermore, the filter circuit 5 includes a frequency band filter unit 51, a first shaping filter unit 52, and a second shaping filter unit 53; the input terminal of the frequency band filter unit 51 is used as the input terminal of the filter circuit, the output terminal of the frequency band filter unit 51 is electrically connected to the input terminal of the first shaping filter unit 52, the output terminal of the first shaping filter unit 52 is electrically connected to the input terminal of the second shaping filter unit 53, and the output terminal of the second shaping filter unit 53 is used as the output terminal of the filter circuit;

[0075] The frequency band filtering unit 51 is used to set the cutoff frequency to filter out non-output signal frequency bands;

[0076] The first shaping and filtering unit 52 is used to filter out noise and interference in the signal;

[0077] The second shaping and filtering unit 53 is used for signal waveform shaping and signal amplification.

[0078] In this embodiment, based on the characteristics of a fast-response LDO, if the filtering capability is poor, high-frequency signals can easily lead to uncontrollable filtering frequency bands, potentially resulting in excessive noise current (i.e., excessive fluctuations). Therefore, the filter circuit 5 is preferably composed of a frequency band filtering unit 51, a first shaping filter unit 52, and a second shaping filter unit 53. Figure 3 As shown. The signal input first passes through the frequency band filtering unit 51, which filters out non-output signal frequency bands according to the set cutoff frequency, allowing only the specified signal frequency band to pass. This achieves frequency band filtering while preventing uncontrollable signal frequency band filtering, filtering out the specified frequency band of the output signal. Then, the signal is filtered by the first shaping and filtering unit 52 to remove noise and interference. Finally, the second shaping and filtering unit 53 shapes the signal. Because the waveform of the signal may be distorted due to various factors (such as noise, attenuation, etc.) during signal transmission, the second shaping and filtering unit 53 reprocesses the signal to restore or improve the waveform quality, making the waveform of the output signal closer to the original signal. At the same time, the second shaping and filtering unit 53 also amplifies the signal, improving its load-carrying capacity and maintaining its driving capability for subsequent circuits. In summary, this filtering circuit processes the signal sequentially through three functional modules, enhancing the filtering capability for fast response LDO signals, adapting to high-frequency signals, and resisting high-frequency noise and spurious waves from fast response LDO application environments (such as high-power high-voltage switching power supplies), thus providing a certain degree of end-point overcurrent protection.

[0079] Furthermore, the frequency band filtering unit 51 includes a response speed setting circuit 511 and a frequency band filter 512; the input terminal of the response speed setting circuit 511 is used as the input terminal of the frequency band filtering unit 51, the output terminal of the response speed setting circuit 511 is electrically connected to the input terminal of the frequency band filter 512, and the output terminal of the frequency band filter 512 is used as the output terminal of the frequency band filtering unit 51.

[0080] The response speed setting circuit 511 is used to set the on-time of the frequency band filter 512;

[0081] The response speed setting circuit 511 includes MOSFET M15 and MOSFET M16; the gate of MOSFET M15 is used as the input terminal of the response speed setting circuit 511, and the drain of MOSFET M15 is used as the output terminal of the response speed setting circuit 511.

[0082] The source of MOSFET M15 is connected to VDD power supply, the gate of MOSFET M15 is electrically connected to the gate of MOSFET M16, the drain of MOSFET M15 is electrically connected to the drain of MOSFET M16, and the source of MOSFET M16 is grounded.

[0083] The band filter 512 includes a resistor R and a capacitor C. One end of the resistor R is used as the input terminal of the band filter 512, and the other end of the resistor R is used as the output terminal of the band filter 512. The other end of the resistor R is electrically connected to one end of the capacitor C, and the other end of the capacitor C is grounded.

[0084] The resistor R includes at least two sub-resistors R6. One end of the first sub-resistor R6 is used as one end of the resistor R, and the other end of the last sub-resistor R6 is used as the other end of the resistor R. The other end of the first sub-resistor R6 and one end of the last sub-resistor R6 are electrically connected.

[0085] Capacitor C includes at least two sub-capacitors C1, one end of each sub-capacitor C1 is used as one end of capacitor C, and the other end of each sub-capacitor C1 is used as the other end of capacitor C.

[0086] In this embodiment, the frequency band filtering unit 51 filters out non-output signal frequency bands according to the cutoff frequency. The response speed setting circuit 511 sets the conduction time of the frequency band filter 512. That is, by changing the response speed of the response speed setting circuit 511 itself, it determines when the signal is transmitted to the frequency band filter 512 and how long it lasts, thereby realizing frequency band selection and filtering out non-output signal frequency bands.

[0087] The response speed setting circuit 511 is an inverter composed of MOSFETs M15 and M16. By adjusting the W / L ratio (width-to-length ratio) of the MOSFETs, the slew rate is affected, thereby affecting the response speed of the inverter. The W / L ratio of the MOSFETs can be set in advance according to the signal requirements.

[0088] The frequency band filter 512 is an RC filter composed of a resistor R and a capacitor C. By designing resistors R and capacitors C with different resistance values ​​and capacitors C with different capacitance values, and with the MOSFET W in the response speed setting circuit 511 fixed, the RC filter can achieve different cutoff frequencies by proportionally adjusting L, thus providing an adjustable filtering function. It filters out unwanted output signal frequency bands. The resistance values ​​of R and C can be preset in advance according to signal requirements, in conjunction with the response speed setting circuit 511. The filtering scheme can be determined through simulation to match the high-frequency signals of the fast-response LDO. More importantly, the resistor R is composed of multiple sub-resistors R6 connected in series, and the capacitor C is composed of multiple sub-capacitors C1 connected in parallel, which improves the simulation accuracy and the final frequency band filtering accuracy, resulting in better filtering performance.

[0089] Furthermore, the first shaping and filtering unit 52 includes MOSFETs M17, M18, M19, M20, M21, and M22, resistors R7 and R8; the gate of MOSFET M18 is used as the input terminal of the first shaping and filtering unit 52, and the gate of MOSFET M21 is used as the output terminal of the first shaping and filtering unit 52.

[0090] The sources of MOSFETs M17 and M21 are both connected to the VDD power supply. The drains of MOSFETs M17 and M18 are electrically connected to the source of MOSFET M21. The drain of MOSFET M21 is electrically connected to one end of resistor R7, and the other end of resistor R7 is grounded. The gates of MOSFETs M17, M18, and M19 are all electrically connected to the gate of MOSFET M20. The drains of MOSFETs M18 and M19 are electrically connected. The sources of MOSFETs M20 and M22 are both grounded. The drains of MOSFETs M20 and M19 are electrically connected to the source of MOSFET M22. The drain of MOSFET M22 is electrically connected to one end of resistor R8, and the other end of resistor R8 is grounded. The gates of MOSFETs M21 and M22 are electrically connected.

[0091] In this embodiment, the first shaping and filtering unit 52 is a Schmitt trigger composed of MOSFETs M17, M18, M19, M20, M21, and M22, along with resistors R7 and R8. The hysteresis characteristic of the Schmitt trigger effectively filters out signal noise and interference, resulting in better performance. More importantly, by adjusting the width-to-length ratio of the NMOS and PMOS transistors in the Schmitt trigger, the forward conduction threshold VTH+ and the negative conduction threshold VTH- can be adjusted to match the high-frequency signal of the fast-response LDO, improving filtering accuracy and allowing for a threshold margin to prevent false triggering.

[0092] Furthermore, the second shaping and filtering unit 53 includes MOSFETs M23, M24, M25, and M26; the gate of MOSFET M23 is used as the input terminal of the second shaping and filtering unit 53, and the drain of MOSFET M25 is used as the output terminal of the second shaping and filtering unit 53.

[0093] The gate of MOSFET M23 is electrically connected to the gate of MOSFET M24. The source of MOSFET M23 is connected to the VDD power supply. The drain of MOSFET M23 is electrically connected to the drain of MOSFET M24. The source of MOSFET M24 is grounded.

[0094] The gates of MOSFET M25 and MOSFET M26 are electrically connected. The source of MOSFET M25 is connected to the VDD power supply. The drains of MOSFET M25 and MOSFET M26 are electrically connected. The source of MOSFET M26 is grounded.

[0095] In this embodiment, MOSFETs M23 and M24 constitute the first inverter 531, and MOSFETs M25 and M26 constitute the second inverter 532. The signal shaping and signal amplification functions of the second shaping and filtering unit 53 are implemented by two stages of inverters. The first inverter 531 receives the input signal and converts it into a form suitable for processing by the second inverter 532, which then further processes the signal. Thus, signal shaping and amplification are achieved through two signal inversions to provide a more stable and reliable output signal. Therefore, the first inverter 531 and the second inverter 532 are preferably composed of MOSFETs, which can play a role in buffering, isolation, and impedance matching during signal transmission while realizing the signal shaping and signal amplification functions.

[0096] Furthermore, the high-bandwidth source follower 2 includes a MOSFET M27, a capacitor CL, a current mirror circuit 21, and a bias constant current source 22; the gate of the MOSFET M27 is used as the input terminal of the high-bandwidth source follower 2, and the source of the MOSFET M27 is used as the output terminal of the high-bandwidth source follower 2.

[0097] The control terminal of the current mirror circuit 21 is electrically connected to the output terminal of the bias constant current source 22. The first terminal of the current mirror circuit 21 is electrically connected to the drain of the MOSFET M27. The second terminal of the current mirror circuit 21 and one end of the capacitor CL are both electrically connected to the source of the MOSFET M27. The other end of the capacitor CL is grounded.

[0098] In this embodiment, as Figure 4 As shown, in order to utilize the large bandwidth characteristics of the large bandwidth source follower 2 and shorten the linear settling time, so that the LDO can maintain a stable output voltage while accelerating the output voltage response speed, a closed-loop current mirror circuit 21 between the drain and source of the MOSFET M27 is used. Under the bias voltage provided by the bias constant current source 22, the current mirror circuit 21 can effectively improve the small signal output impedance of the MOSFET M27, thereby having a larger bandwidth and making its intrinsic gain much greater than 1.

[0099] The current mirror circuit 21 can specifically be:

[0100] The current mirror circuit 21 includes MOSFETs M28, M29, M30, M31, M32, and M33. The drain of MOSFET M30 is used as the control terminal of the current mirror circuit 21, the drain of MOSFET M29 is used as the first terminal of the current mirror circuit 21, and the drain of MOSFET M28 is used as the second terminal of the current mirror circuit 21. The drain and gate of MOSFET M29 are electrically connected to the gate of MOSFET M30, the drain and gate of MOSFET M31 are electrically connected to the drain of MOSFET M30, the drain and gate of MOSFET M33 are electrically connected to the drain of MOSFET M32, and the gate of MOSFET M33 is electrically connected to the gate of MOSFET M28. The sources of MOSFETs M29, M30, M31, and M32 are all connected to the VDD power supply, and the sources of MOSFETs M28 and M33 are grounded.

[0101] The current mirror circuit 21, composed of MOSFETs M28, M29, M30, M31, M32, and M33, can achieve the following effects:

[0102] The open-loop conductance of the current from node 1 to node 2 is: Where C1 represents the parasitic capacitance of MOSFET M33, im2 is the input current of MOSFET M28, gm2 is the transconductance of MOSFET M28, gm4 is the transconductance of MOSFET M30, gm5 is the transconductance of MOSFET M31, gm6 is the transconductance of MOSFET M32, and gm7 is the transconductance of MOSFET M33. If Vin is a small-signal voltage and im2 is the small-signal current of input MOSFET M28, if Vin is positive, im2 increases; if Vin is negative, im2 decreases; thus, the bidirectional voltage slewing rate of this source follower is improved.

[0103] The high-bandwidth source follower 2 uses current feedback to improve the slew rate. The two main poles affecting the gain of this source follower are located at the output Vout and the drain of MOSFET M7, respectively. The closed-loop gain of this source follower is: Where gm1 is the transconductance of the MOS transistor M27, gm3 is the transconductance of the MOS transistor M29, and CL represents the capacitor CL.

[0104] Furthermore, the dominant pole of the large-bandwidth source follower 2 is also determined by its output point (Vout), so the bandwidth of the large-bandwidth source follower 2 can be calculated as follows: *gm1*( ); where CL is the capacitance value of capacitor CL. Currently, the bandwidth of a source follower can be determined by... Figure 1 Analysis yields: (gm1+gm2). Therefore, compared to the two, the bandwidth of the large-bandwidth source follower 2 is 1+ of the bandwidth of the current source follower. The bandwidth of the large-bandwidth source follower 2 is obviously many times that of the current source follower, which greatly shortens the linear setup time.

[0105] Therefore, through analysis of the current mirror circuit 21, it can be known that the bandwidth of the large bandwidth source follower 2 can be expressed by the formula: *gm1*( This allows for the selection of source followers with different bandwidths based on actual needs.

[0106] The bias constant current source 22 can specifically be:

[0107] The bias constant current source 22 includes a current source A2, a MOSFET M34, and a MOSFET M35. The drain of the MOSFET M34 is used as the output terminal of the bias constant current source 22. The drain and gate of the MOSFET M34 are electrically connected to the gate of the MOSFET M35. The sources of the MOSFET M34 and the MOSFET M35 are both grounded. The drain of the MOSFET M35 is electrically connected to the output terminal of the current source A2. The bias voltage signal generated by the bias constant current source composed of the MOSFET and the current source A2 has better quality.

[0108] Other configurations and operations of a fast-response LDO with overcurrent protection according to embodiments of the present invention are known to those skilled in the art and will not be described in detail here.

[0109] In the description of this specification, references to terms such as "embodiment," "example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0110] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims

1. A fast-response LDO with overcurrent protection, characterized in that: It includes a bias circuit, a high-bandwidth source follower, a reference circuit, a Zener diode D1, an operational amplifier circuit, a filter circuit, and an overcurrent protection circuit; the output of the filter circuit is used as the output of the fast-response LDO. The output terminal of the bias circuit and the cathode of the Zener diode D1 are both electrically connected to the input terminal of the wide-bandwidth source follower. The output terminal of the wide-bandwidth source follower is electrically connected to the input terminal of the reference circuit. The output terminal of the reference circuit is electrically connected to the input terminal of the overcurrent protection circuit. The output terminal of the overcurrent protection circuit is electrically connected to the input terminal of the operational amplifier circuit. The output terminal of the operational amplifier circuit is electrically connected to the input terminal of the filter circuit. The anode of the Zener diode D1 is grounded. The overcurrent protection circuit includes a comparator bias unit, a comparator unit, a trigger unit, a drive unit, MOSFET M9, MOSFET M10, and MOSFET N6; the input terminal of the comparator unit is used as the input terminal of the overcurrent protection circuit, and the output terminal of the drive unit is used as the output terminal of the overcurrent protection circuit. The gate of the MOS transistor M9, the output terminal of the comparator bias unit, and the bias terminal of the comparator unit are electrically connected. The output terminal of the comparator unit is electrically connected to the input terminal of the trigger unit. The VDD terminal of the comparator bias unit, the VDD terminal of the comparator unit, and the source of the MOS transistor M9 are all connected to the VDD power supply. The gate of the MOS transistor M9 and the gate of the MOS transistor M10 are electrically connected. The drain of the MOS transistor M9 and the source of the MOS transistor M10 are both electrically connected to the VDD terminal of the driving unit. The output terminal of the trigger unit is electrically connected to the gate of the MOS transistor N6. The source of the MOS transistor N6 and the ground terminal of the driving unit are both grounded. The drain of the MOS transistor N6 and the drain of the MOS transistor M10 are both electrically connected to the input terminal of the driving unit. The comparator bias unit is used to generate a comparator bias voltage and turn on the MOS transistors M9 and M10. The comparator unit is used to receive the comparator bias voltage and the reference signal generated by the reference circuit. When the voltage of the reference signal is greater than the comparator bias voltage, it drives the trigger unit to turn on the MOS transistor N6 and turn off the drive unit. The comparator unit includes MOSFETs M5, M6, M7, M8, N4, and N5, resistors R2 and R3, and diode D2. The gate of MOSFET M6 serves as the input terminal of the comparator unit, the gates of MOSFETs M5 and M8 both serve as the bias terminals of the comparator unit, the sources of MOSFETs M5 and M8 both serve as the VDD terminal of the comparator unit, and the source of MOSFET N5 serves as the output terminal of the comparator unit. The source of MOSFET M6 and the source of MOSFET M7 are both electrically connected to the drain of MOSFET M5. The drain of MOSFET M6, the drain of MOSFET N4, and the gate of MOSFET N4 are all electrically connected to the gate of MOSFET N5. The drain of MOSFET N5 is electrically connected to the drain of MOSFET M7. The gate of MOSFET M7 and one end of resistor R2 are both electrically connected to one end of resistor R3. The anode of diode D2, the other end of resistor R3, the source of MOSFET N4, and the source of MOSFET N5 are all grounded. The other end of resistor R2 and the cathode of diode D2 are both electrically connected to the drain of MOSFET M8. The comparator bias unit includes MOSFETs M1, M2, M3, M4, N1, N2, and N3, and resistor R1; the sources of MOSFETs M1, M2, and M3 are all used as the VDD terminal of the comparator bias unit, and the gate of MOSFET M3 is used as the output terminal of the comparator bias unit. The gate and drain of MOSFET M1 are electrically connected to one end of resistor R1. The other end of resistor R1 and the gate of MOSFET M4 are electrically connected to the drain of MOSFET N3. The gate of MOSFET M3, the drain of MOSFET N1, the gate of MOSFET M2, and the drain of MOSFET M2 are all electrically connected to the source of MOSFET M4. The gate of MOSFET N3, the gate of MOSFET N1, the gate of MOSFET N2, and the drain of MOSFET N2 are all electrically connected to the drain of MOSFET M3. The drain of MOSFET M4, the source of MOSFET N1, the source of MOSFET N2, and the source of MOSFET N3 are all grounded.

2. The fast-response LDO with overcurrent protection according to claim 1, characterized in that: The trigger unit includes MOSFETs M13, M14, N9, N10, M15, N11, N12, and M37, resistors R4 and R5; the gate of MOSFET M14 is used as the input terminal of the trigger unit, and the drain of MOSFET M37 is used as the output terminal of the trigger unit. The source of MOSFET M13 is connected to VDD power. The drain of MOSFET M13 and the source of MOSFET M14 are both electrically connected to the source of MOSFET M15. The drain of MOSFET M15 is electrically connected to one end of resistor R4, and the other end of resistor R4 is grounded. The gates of MOSFET M13, M14, and N9 are all electrically connected to the gate of MOSFET N10. The gates of MOSFET M37, N12, and M15 are also connected to the source of MOSFET M15. The gate of transistor N11, the drain of MOSFET M14, and the drain of MOSFET N9 are all electrically connected. The source of MOSFET N10 is grounded. The drain of MOSFET N10, the source of MOSFET N9, and the source of MOSFET N11 are all electrically connected. The drain of MOSFET N11 is electrically connected to one end of resistor R5. The other end of resistor R5 is connected to VDD power supply. The source of MOSFET M37 is connected to VDD power supply. The source of MOSFET N12 is grounded. The drain of MOSFET M37 and the drain of MOSFET N12 are electrically connected.

3. The fast-response LDO with overcurrent protection according to claim 1, characterized in that: The driving unit includes MOSFETs M11, M12, N7, and N8; the gate of MOSFET M11 is used as the input terminal of the driving unit, the drain of MOSFET M12 is used as the output terminal of the driving unit, the source of MOSFET M11 and the source of MOSFET M12 are both used as the VDD terminal of the driving unit, and the source of MOSFET N7 and the source of MOSFET N8 are both used as the ground terminal of the driving unit. The gate of MOS transistor M11 is electrically connected to the gate of MOS transistor N7. The drain of MOS transistor M11, the drain of MOS transistor N7, and the gate of MOS transistor M12 are all electrically connected to the gate of MOS transistor N8. The drain of MOS transistor M12 is electrically connected to the drain of MOS transistor N8.

4. A fast-response LDO with overcurrent protection according to claim 1, characterized in that: The filtering circuit includes a frequency band filtering unit, a first shaping filtering unit, and a second shaping filtering unit; the input terminal of the frequency band filtering unit is used as the input terminal of the filtering circuit, the output terminal of the frequency band filtering unit is electrically connected to the input terminal of the first shaping filtering unit, the output terminal of the first shaping filtering unit is electrically connected to the input terminal of the second shaping filtering unit, and the output terminal of the second shaping filtering unit is used as the output terminal of the filtering circuit. The frequency band filtering unit is used to set a cutoff frequency to filter out non-output signal frequency bands; The first shaping and filtering unit is used to filter out noise and interference in the signal; The second shaping and filtering unit is used for signal waveform shaping and signal amplification.

5. A fast-response LDO with overcurrent protection according to claim 4, characterized in that: The frequency band filtering unit includes a response speed setting circuit and a frequency band filter; the input terminal of the response speed setting circuit is used as the input terminal of the frequency band filtering unit, the output terminal of the response speed setting circuit is electrically connected to the input terminal of the frequency band filter, and the output terminal of the frequency band filter is used as the output terminal of the frequency band filtering unit. The response speed setting circuit is used to set the on-time of the frequency band filter; The response speed setting circuit includes MOSFET M15 and MOSFET M16; the gate of MOSFET M15 is used as the input terminal of the response speed setting circuit, and the drain of MOSFET M15 is used as the output terminal of the response speed setting circuit. The source of the MOS transistor M15 is connected to the VDD power supply, the gate of the MOS transistor M15 is electrically connected to the gate of the MOS transistor M16, the drain of the MOS transistor M15 is electrically connected to the drain of the MOS transistor M16, and the source of the MOS transistor M16 is grounded. The frequency band filter includes a resistor R and a capacitor C. One end of the resistor R is used as the input terminal of the frequency band filter, and the other end of the resistor R is used as the output terminal of the frequency band filter. The other end of the resistor R is electrically connected to one end of the capacitor C, and the other end of the capacitor C is grounded. The resistor R includes at least two sub-resistors R6, one end of the first sub-resistor R6 is used as one end of the resistor R, and the other end of the last sub-resistor R6 is used as the other end of the resistor R; the other end of the first sub-resistor R6 and one end of the last sub-resistor R6 are electrically connected. The capacitor C includes at least two sub-capacitors C1, one end of each sub-capacitor C1 is used as one end of the capacitor C, and the other end of each sub-capacitor C1 is used as the other end of the capacitor C.

6. A fast-response LDO with overcurrent protection according to claim 4, characterized in that: The first shaping and filtering unit includes MOSFETs M17, M18, M19, M20, M21, and M22, resistors R7 and R8; the gate of MOSFET M18 is used as the input terminal of the first shaping and filtering unit, and the gate of MOSFET M21 is used as the output terminal of the first shaping and filtering unit. The sources of MOSFETs M17 and M21 are both connected to VDD power. The drains of MOSFET M17 and M18 are electrically connected to the source of MOSFET M21. The drain of MOSFET M21 is electrically connected to one end of resistor R7, and the other end of resistor R7 is grounded. The gates of MOSFETs M17, M18, and M19 are all electrically connected to the gate of MOSFET M20. The drain of MOSFET M18 and the drain of MOSFET M19 are electrically connected. The source of MOSFET M20 and the source of MOSFET M22 are both grounded. The drain of MOSFET M20, the source of MOSFET M19, and the source of MOSFET M22 are all electrically connected. The drain of MOSFET M22 is electrically connected to one end of resistor R8, and the other end of resistor R8 is grounded. The gate of MOSFET M21 and the gate of MOSFET M22 are electrically connected.

7. A fast-response LDO with overcurrent protection according to claim 4, characterized in that: The second shaping and filtering unit includes MOSFETs M23, M24, M25, and M26; the gate of MOSFET M23 is used as the input terminal of the second shaping and filtering unit, and the drain of MOSFET M25 is used as the output terminal of the second shaping and filtering unit. The gate of the MOS transistor M23 and the gate of the MOS transistor M24 are electrically connected. The source of the MOS transistor M23 is connected to the VDD power supply. The drain of the MOS transistor M23 and the drain of the MOS transistor M24 are electrically connected. The source of the MOS transistor M24 is grounded. The gate of the MOS transistor M25 is electrically connected to the gate of the MOS transistor M26. The source of the MOS transistor M25 is connected to the VDD power supply. The drain of the MOS transistor M25 is electrically connected to the drain of the MOS transistor M26. The source of the MOS transistor M26 is grounded.

8. A fast-response LDO with overcurrent protection according to claim 1, characterized in that: The high-bandwidth source follower includes a MOSFET M27, a capacitor CL, a current mirror circuit, and a bias constant current source; the gate of the MOSFET M27 is used as the input terminal of the high-bandwidth source follower, and the source of the MOSFET M27 is used as the output terminal of the high-bandwidth source follower. The control terminal of the current mirror circuit is electrically connected to the output terminal of the bias constant current source. The first terminal of the current mirror circuit is electrically connected to the drain of the MOS transistor M27. The second terminal of the current mirror circuit and one end of the capacitor CL are both electrically connected to the source of the MOS transistor M27. The other end of the capacitor CL is grounded.

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