Method for reducing noise based on optical chip high-precision voltage source matrix

Abstract

The invention discloses a noise reduction method based on an optical chip high-precision voltage source matrix, and the method comprises the following steps: S1, initializing an MCP23017, and configuring chip selection and address selection signals; s2, the SPI sends a control signal, and a DAC8568 channel is selected; s3, the DAC8568 converts the digital signal into an analog voltage signal; s4, amplifying the analog voltage signal; s5, adding a noise reduction capacitor to carry out high-frequency noise filtering; s6, providing a stable voltage by a voltage-stabilized power supply module; s7, optimizing PCB design, and performing layered wiring and shielding; and S8, adjusting and calibrating voltage output in real time. According to the high-precision voltage source matrix control method based on the ESP32-S3 microcontroller and the DAC8568 chip, accurate adjustment of multi-channel voltage output, noise suppression and voltage stability optimization are achieved, and the strict requirement of high-precision equipment for a voltage source is met.

Description

Technical Field

[0001] The present invention relates to the technical field of voltage sources, and in particular to a method for reducing noise based on a high-precision voltage source matrix of an optical chip. Background Art

[0002] In modern electronic devices, especially in high-precision application scenarios, the stability and accuracy of the power supply are the key to ensuring the normal operation of the system. Especially in the fields of optical chips, sensors and other precision instruments, the requirements for voltage sources are extremely strict. In order to meet these requirements, many applications use voltage source matrix technology, which can provide accurate and stable voltage output for multiple channels. However, with the increasing demand for high-precision and low-noise power supplies, the voltage source matrix in the prior art still has certain defects in practical applications, especially in terms of multi-channel control, noise interference, precision control, etc.

[0003] The common voltage source matrix system currently relies on digital-to-analog converter (DAC) chips to generate voltage signals. DAC8568 is a widely used 16-bit precision DAC chip with high-precision digital-to-analog conversion function, which can provide the necessary voltage output for optical chips and other high-precision devices. In the traditional voltage source matrix, multiple DAC chips are connected in series or in parallel to meet the needs of multi-channel voltage output. However, although DAC8568 has certain advantages in accuracy and conversion speed, it also faces some inherent technical limitations, especially in noise control and multi-channel voltage regulation.

[0004] In the prior art, DAC8568 communicates with a microcontroller via SPI (serial peripheral interface) to achieve digital-to-analog conversion of voltage output. However, during high-frequency data transmission, especially in the case of multi-channel control, SPI signals are susceptible to external interference, which affects the accuracy and stability of voltage output. Specifically, when SPI signals are transmitted at high frequencies, especially when multiple channels work in parallel, electromagnetic interference and signal attenuation can cause errors in data transmission, resulting in fluctuations in the voltage signal generated by the DAC chip, affecting system performance.

[0005] In addition to the interference problem of signal transmission, another problem of the existing voltage source matrix system is noise interference. In traditional designs, the sources of noise interference are mostly the power supply itself and the voltage regulation circuit. Although the existing technology uses simple noise reduction methods such as filter capacitors, in practical applications, these methods are difficult to completely eliminate high-frequency noise, especially in high-speed operation and complex circuit environments, where noise problems still seriously affect the stability of voltage. Due to the presence of high-frequency noise, the quality of the signal is difficult to be effectively guaranteed, which may cause measurement errors, signal distortion, and even affect the normal operation of the system for devices such as optical chips that have extremely high voltage accuracy requirements.

[0006] In addition, the traditional voltage source matrix also has deficiencies in voltage regulation and calibration. Although some systems use software calibration methods, the effect of software calibration methods is limited due to factors such as temperature drift and power supply fluctuations in the circuit, and the output of the voltage source matrix cannot be adjusted in real time. Especially in the case of large environmental changes, it is difficult for the system to ensure the long-term stability of the voltage signal. Some current voltage source matrix systems do not use a real-time adjustment mechanism, resulting in the voltage output deviating from the target value during operation due to temperature changes or power supply interference, thereby affecting the performance of the system.

[0007] The power supply module in the prior art also has certain limitations when providing power to the DAC8568 chip and other circuit modules. The power supply design adopted by many systems fails to solve the problem of voltage stability well. Especially in multi-channel voltage output and high power consumption application scenarios, power supply fluctuations and instability may directly affect the performance of the entire voltage source matrix. Although some systems use voltage-stabilized power supply modules, power supply fluctuations are still inevitable in multi-module, high-power consumption systems. Such fluctuations may cause unstable voltage output, resulting in abnormal system operation or performance degradation.

[0008] From the perspective of system structure, traditional voltage source matrices usually achieve multi-channel voltage output by connecting multiple DAC chips in series or in parallel. This design method increases the complexity of the system, especially in terms of signal transmission and power management, and is prone to introduce unnecessary noise or interference. In addition, existing voltage source matrices usually do not have special optimizations for multi-channel and high-precision voltage output, resulting in the stability and accuracy of the voltage source being difficult to meet higher requirements in complex application environments.

[0009] Therefore, how to provide a method for reducing noise based on a high-precision voltage source matrix of an optical chip is an urgent problem that technicians in this field need to solve. Summary of the invention

[0010] One object of the present invention is to propose a method for reducing noise based on a high-precision voltage source matrix of an optical chip. The present invention effectively solves the problems of noise interference, voltage fluctuation, and insufficient precision existing in the existing voltage source matrix by optimizing the SPI communication protocol, introducing dual operational amplifiers, noise reduction capacitors, and voltage-stabilized power supply modules. The method ensures the stability and accuracy of the voltage output through real-time adjustment and calibration mechanisms, and improves the overall performance of the system through dynamic adjustment and feedback mechanisms. The present invention has the advantages of high voltage control accuracy, strong system stability, strong anti-interference ability, and flexible adjustment, and can be widely used in optical chips, precision instruments, and other occasions that require high-precision voltage support.

[0011] A method for reducing noise based on a high-precision voltage source matrix of an optical chip according to an embodiment of the present invention comprises the following steps:

[0012] S1. Initialize the GPIO port configuration of the MCP23017 expander through the ESP32-S3 microcontroller, and assign the chip select signal and address select signal of the DAC8568 chip;

[0013] S2, sends digital control signals to the DAC8568 chip through the SPI communication interface of ESP32-S3, selects the target channel and generates the corresponding digital voltage signal according to the configured chip select signal and address selection signal;

[0014] S3, using the DAC8568 chip to convert the received digital voltage signal into an analog voltage signal, and output the initial analog voltage signal on each channel;

[0015] S4, input the initial analog voltage signal output by the DAC8568 chip into the dual operational amplifier, stably amplify the initial analog voltage signal, improve the initial analog voltage fluctuation and enhance the signal strength;

[0016] S5, adding a noise reduction capacitor to each amplified initial analog voltage signal path, performing high-frequency noise filtering on the initial analog voltage signal, and generating a filtered stable analog voltage signal;

[0017] S6, providing a stable power supply voltage for the DAC8568 chip, dual operational amplifier and MCP23017 expander in the system through a voltage-stabilized power supply module;

[0018] S7. Optimize the PCB design of the system, arrange the signal lines and ground lines in layers, and arrange shielding layers at key nodes;

[0019] S8, through the control logic of the ESP32-S3 microcontroller, the output voltage of the 16×8 voltage source matrix is ​​adjusted and calibrated in real time.

[0020] Optionally, the S2 specifically includes:

[0021] S21, initialize the SPI communication interface through the ESP32-S3 microcontroller and establish communication channels with multiple DAC8568 chips;

[0022] S22, configure the chip select signal of ESP32-S3 to activate the target DAC8568 chip for data transmission;

[0023] S23, sending an address selection signal containing the target channel address to the activated DAC8568 chip through ESP32-S3 to select the specified output channel;

[0024] S24, on the specified channel, transmits the digital control signal to the target DAC8568 chip through the SPI communication interface of ESP32-S3;

[0025] S25, DAC8568 chip generates digital voltage signal according to the received digital control signal and combines the following dynamic optimization mechanism:

[0026]

[0027] Among them, V out is a digital voltage signal, D in is the input 16-bit digital signal, V REF is the reference voltage, α is the dynamic adjustment coefficient, ΔV env is the power supply voltage fluctuation value detected by the system, γ is the comprehensive compensation factor, K cal is the hardware calibration coefficient for each channel of the system, T comp is the temperature compensation parameter of the channel working environment, f noise is the main frequency of the signal noise.

[0028] Optionally, the S3 specifically includes:

[0029] S31, transmitting the digital control signal containing the target voltage value to the designated input channel of the DAC8568 chip through the SPI communication interface of the ESP32-S3 microcontroller;

[0030] After receiving the digital control signal, the S32 and DAC8568 chips activate the internal digital-to-analog converter and convert the digital signal according to the value of the input signal;

[0031] S33, in the digital-to-analog converter of DAC8568, converting the digital signal into a corresponding analog voltage signal using a 16-bit resolution, the analog signal being proportional to the input digital signal;

[0032] S34, DAC8568 chip outputs the converted analog voltage signal to the specified channel through its output port;

[0033] S35. On each output channel, the DAC8568 chip generates and outputs an initial analog voltage signal according to the input digital control signal.

[0034] Optionally, the S4 specifically includes:

[0035] S41, inputting the initial analog voltage signal output by the DAC8568 chip to the non-inverting input terminal of the dual operational amplifier;

[0036] S42, after receiving the initial analog voltage signal, the dual operational amplifier activates its amplification circuit according to the set gain parameter and prepares to amplify the signal;

[0037] S43, the amplification circuit inside the dual operational amplifier amplifies the input signal according to the set gain coefficient, generates an enhanced analog voltage signal, and effectively stabilizes the output;

[0038] S44, the dual operational amplifier transmits the enhanced analog voltage signal to the next stage circuit through its output port;

[0039] S45. During the output process, the gain of the dual operational amplifier is adjusted to output a stable analog voltage signal with high signal strength and small fluctuation.

[0040] Optionally, the S5 specifically includes:

[0041] S51, transmitting the enhanced analog voltage signal output by the dual operational amplifier to the input end of the noise reduction capacitor as part of the signal path;

[0042] S52, according to the circuit design, connecting the noise reduction capacitor to the signal path, connecting it to the signal line in parallel, and filtering the high-frequency noise of the signal;

[0043] S53. When the enhanced analog voltage signal passes through the noise reduction capacitor, the capacitor reduces the high-frequency noise components in the signal, especially high-frequency interference and unnecessary electromagnetic waves, through its specific capacitance value and filtering characteristics:

[0044]

[0045] Among them, V filtered (f) is the frequency response of the initial analog voltage signal amplified by the dual operational amplifier, V amplified (f) is the frequency response of the analog voltage signal after filtering, R filter is the resistance value in series with the noise reduction capacitor in the signal path, C filter is the capacitance value of the noise reduction capacitor, f is the frequency of the signal, and j is the imaginary unit;

[0046] S54, selecting an appropriate noise reduction capacitor value according to the target signal frequency and the noise frequency;

[0047] S55, outputting the signal filtered by the noise reduction capacitor to generate a filtered stable analog voltage signal.

[0048] Optionally, the S6 specifically includes:

[0049] S61, providing a stable DC voltage through a voltage-stabilizing power supply module to maintain the normal operation of each component in the system and maintain the voltage stability of the entire system;

[0050] S62, inputting the stable voltage of the voltage-stabilized power supply module to the DAC8568 chip, so that the DAC8568 obtains a stable power supply during the digital-to-analog conversion process;

[0051] S63, inputting the stable voltage output by the voltage-stabilized power supply module into the dual operational amplifier, so that the operational amplifier accurately amplifies the signal under the stable power supply voltage;

[0052] S64, input the stable voltage output by the voltage-stabilized power supply module to the MCP23017 expander to prevent power supply fluctuations from affecting the stability of I2C or SPI communication;

[0053] S65. According to the power requirements and power consumption of each module, the voltage-stabilized power supply module adjusts the output voltage to adapt to the power requirements of each component:

[0054]

[0055] Among them, V out (t) is the output voltage after dynamic adjustment, V nom is the rated voltage of the regulated power supply, β is the voltage regulation coefficient, P(t) is the instantaneous power consumption of the system, P max is the maximum power consumption of the system, I(t) is the instantaneous current demand of the system, λ is the current regulation factor, and t is the time.

[0056] Optionally, the S8 specifically includes:

[0057] S81, start the ESP32-S3 microcontroller and initialize the control port of the system, including the SPI communication interface for data exchange with the DAC8568 chip;

[0058] The S82 and ESP32-S3 microcontrollers read the current output voltage value of each DAC8568 chip in the 16×8 voltage source matrix and calculate the target voltage value required for each channel according to the real-time needs of the system;

[0059] S83, based on the error between the current output voltage value and the target voltage value, the ESP32-S3 microcontroller generates an adjustment instruction and sends a control signal to the corresponding DAC8568 chip through the SPI communication interface to adjust the voltage output;

[0060] The S84 and ESP32-S3 microcontrollers monitor the output voltage changes based on the feedback voltage values ​​and make fine adjustments for each channel:

[0061] V out_adjusted (t) = V out (t)+θ·(V target (t)-Vfeedback (t));

[0062] Among them, V out_adjusted (t) is the adjusted output voltage, V out (t) is the current output voltage, V target (t) is the target voltage, V feedback (t) is the feedback voltage, θ is the fine-tuning coefficient, and t is the time;

[0063] S85, periodically calibrate the voltage output, and the ESP32-S3 microcontroller obtains temperature, time, and hardware status data to make dynamic adjustments to compensate for temperature drift and hardware deviation;

[0064] S86. During the adjustment and calibration process, the ESP32-S3 microcontroller continuously monitors the working status of the voltage source matrix and adjusts the output voltage in real time:

[0065]

[0066] Among them, V stability (t) is the stability of the output voltage, σ is the stability coefficient, and ΔV(t) is the voltage error.

[0067] The beneficial effects of the present invention are:

[0068] The present invention proposes a high-precision voltage source matrix control method by combining the ESP32-S3 microcontroller and the DAC8568 chip, which effectively solves a series of defects in the existing voltage source matrix technology. First, by optimizing the SPI communication protocol, introducing dual operational amplifiers and noise reduction capacitor design, the present invention significantly improves the stability and accuracy of voltage output. In the case of multi-channel voltage output, the reliability and efficiency of the voltage source matrix are ensured by reducing high-frequency noise and signal interference. In addition, a voltage-stabilized power supply module is used to provide a stable power supply for the system, which solves the influence of power supply fluctuations on the voltage source matrix from the source, greatly improves the stability of the system, and avoids equipment failures caused by voltage instability or errors.

[0069] Another important benefit is that the high accuracy of the voltage source matrix output voltage is ensured through real-time adjustment and calibration mechanisms. Under different environmental conditions, especially temperature changes or power supply interference, the system can dynamically compensate for errors to ensure that the voltage of each output channel always remains close to the expected value. This dynamic adjustment capability improves the adaptability and stability of the system and avoids the loss of accuracy and performance degradation caused by factors such as temperature drift and power supply fluctuations in traditional voltage source matrices.

[0070] Finally, the voltage source matrix control method of the present invention can be widely used in optical chips, high-precision sensors and other precision equipment, providing more accurate, stable and efficient voltage support, and meeting the strict requirements of modern high-precision equipment for voltage sources. Therefore, the present invention not only has significant advantages in accuracy, stability and reliability, but also shows superiority in improving system performance, reducing maintenance costs and enhancing equipment stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0071] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0072] Figure 1 A flowchart of a method for reducing noise based on a high-precision voltage source matrix of an optical chip proposed by the present invention;

[0073] Figure 2 The present invention is a schematic diagram of the voltage regulation and calibration process of a method for reducing noise based on a high-precision voltage source matrix of an optical chip. DETAILED DESCRIPTION

[0074] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, which only illustrate the basic structure of the present invention in a schematic manner, and therefore only show the components related to the present invention.

[0075] refer to Figure 1-2 , a method for reducing noise based on a high-precision voltage source matrix of an optical chip, comprising the following steps:

[0076] S1. Initialize the GPIO port configuration of the MCP23017 expander through the ESP32-S3 microcontroller, and assign the chip select signal and address select signal of the DAC8568 chip;

[0077] S2, sends digital control signals to the DAC8568 chip through the SPI communication interface of ESP32-S3, selects the target channel and generates the corresponding digital voltage signal according to the configured chip select signal and address selection signal;

[0078] S3, using the DAC8568 chip to convert the received digital voltage signal into an analog voltage signal, and output the initial analog voltage signal on each channel;

[0079] S4, input the initial analog voltage signal output by the DAC8568 chip into the dual operational amplifier, stably amplify the initial analog voltage signal, improve the initial analog voltage fluctuation and enhance the signal strength;

[0080] S5, adding a noise reduction capacitor to each amplified initial analog voltage signal path, performing high-frequency noise filtering on the initial analog voltage signal, and generating a filtered stable analog voltage signal;

[0081] S6, providing a stable power supply voltage for the DAC8568 chip, dual operational amplifier and MCP23017 expander in the system through a voltage-stabilized power supply module;

[0082] S7. Optimize the PCB design of the system, arrange the signal lines and ground lines in layers, and arrange shielding layers at key nodes;

[0083] S8, through the control logic of the ESP32-S3 microcontroller, the output voltage of the 16×8 voltage source matrix is ​​adjusted and calibrated in real time.

[0084] In this implementation, S2 specifically includes:

[0085] S21, initialize the SPI communication interface through the ESP32-S3 microcontroller and establish communication channels with multiple DAC8568 chips;

[0086] S22, configure the chip select signal of ESP32-S3 to activate the target DAC8568 chip for data transmission;

[0087] S23, sending an address selection signal containing the target channel address to the activated DAC8568 chip through ESP32-S3 to select the specified output channel;

[0088] S24, on the specified channel, transmits the digital control signal to the target DAC8568 chip through the SPI communication interface of ESP32-S3;

[0089] S25, DAC8568 chip generates digital voltage signal according to the received digital control signal and combines the following dynamic optimization mechanism:

[0090]

[0091] Among them, V out is a digital voltage signal, D in is the input 16-bit digital signal, V REF is the reference voltage, α is the dynamic adjustment coefficient, ΔV env is the power supply voltage fluctuation value detected by the system, γ is the comprehensive compensation factor, K cal is the hardware calibration coefficient for each channel of the system, T comp is the temperature compensation parameter of the channel working environment, f noise is the main frequency of the signal noise.

[0092] In this implementation, S3 specifically includes:

[0093] S31, transmitting the digital control signal containing the target voltage value to the designated input channel of the DAC8568 chip through the SPI communication interface of the ESP32-S3 microcontroller;

[0094] After receiving the digital control signal, the S32 and DAC8568 chips activate the internal digital-to-analog converter and convert the digital signal according to the value of the input signal;

[0095] S33, in the digital-to-analog converter of DAC8568, converting the digital signal into a corresponding analog voltage signal using a 16-bit resolution, the analog signal being proportional to the input digital signal;

[0096] S34, DAC8568 chip outputs the converted analog voltage signal to the specified channel through its output port;

[0097] S35. On each output channel, the DAC8568 chip generates and outputs an initial analog voltage signal according to the input digital control signal.

[0098] In this implementation manner, the S4 specifically includes:

[0099] S41, inputting the initial analog voltage signal output by the DAC8568 chip to the non-inverting input terminal of the dual operational amplifier;

[0100] S42, after receiving the initial analog voltage signal, the dual operational amplifier activates its amplification circuit according to the set gain parameter and prepares to amplify the signal;

[0101] S43, the amplification circuit inside the dual operational amplifier amplifies the input signal according to the set gain coefficient, generates an enhanced analog voltage signal, and effectively stabilizes the output;

[0102] S44, the dual operational amplifier transmits the enhanced analog voltage signal to the next stage circuit through its output port;

[0103] S45. During the output process, the gain of the dual operational amplifier is adjusted to output a stable analog voltage signal with high signal strength and small fluctuation.

[0104] In this implementation manner, S5 specifically includes:

[0105] S51, transmitting the enhanced analog voltage signal output by the dual operational amplifier to the input end of the noise reduction capacitor as part of the signal path;

[0106] S52, according to the circuit design, connecting the noise reduction capacitor to the signal path, connecting it to the signal line in parallel, and filtering the high-frequency noise of the signal;

[0107] S53. When the enhanced analog voltage signal passes through the noise reduction capacitor, the capacitor reduces the high-frequency noise components in the signal, especially high-frequency interference and unnecessary electromagnetic waves, through its specific capacitance value and filtering characteristics:

[0108]

[0109] Among them, V filtered (f) is the frequency response of the initial analog voltage signal amplified by the dual operational amplifier, V amplified (f) is the frequency response of the analog voltage signal after filtering, R filter is the resistance value in series with the noise reduction capacitor in the signal path, C filter is the capacitance value of the noise reduction capacitor, f is the frequency of the signal, and j is the imaginary unit;

[0110] S54, selecting an appropriate noise reduction capacitor value according to the target signal frequency and the noise frequency;

[0111] S55, outputting the signal filtered by the noise reduction capacitor to generate a filtered stable analog voltage signal.

[0112] In this implementation manner, S6 specifically includes:

[0113] S61, providing a stable DC voltage through a voltage-stabilizing power supply module to maintain the normal operation of each component in the system and maintain the voltage stability of the entire system;

[0114] S62, inputting the stable voltage of the voltage-stabilized power supply module to the DAC8568 chip, so that the DAC8568 obtains a stable power supply during the digital-to-analog conversion process;

[0115] S63, inputting the stable voltage output by the voltage-stabilized power supply module into the dual operational amplifier, so that the operational amplifier accurately amplifies the signal under the stable power supply voltage;

[0116] S64, input the stable voltage output by the voltage-stabilized power supply module to the MCP23017 expander to prevent power supply fluctuations from affecting the stability of I2C or SPI communication;

[0117] S65. According to the power requirements and power consumption of each module, the voltage-stabilized power supply module adjusts the output voltage to adapt to the power requirements of each component:

[0118]

[0119] Among them, V out (t) is the output voltage after dynamic adjustment, V nom is the rated voltage of the regulated power supply, β is the voltage regulation coefficient, P(t) is the instantaneous power consumption of the system, Pmax is the maximum power consumption of the system, I(t) is the instantaneous current demand of the system, λ is the current regulation factor, and t is the time.

[0120] In this implementation manner, S8 specifically includes:

[0121] S81, start the ESP32-S3 microcontroller and initialize the control port of the system, including the SPI communication interface for data exchange with the DAC8568 chip;

[0122] The S82 and ESP32-S3 microcontrollers read the current output voltage value of each DAC8568 chip in the 16×8 voltage source matrix and calculate the target voltage value required for each channel according to the real-time needs of the system;

[0123] S83, based on the error between the current output voltage value and the target voltage value, the ESP32-S3 microcontroller generates an adjustment instruction and sends a control signal to the corresponding DAC8568 chip through the SPI communication interface to adjust the voltage output;

[0124] The S84 and ESP32-S3 microcontrollers monitor the output voltage changes based on the feedback voltage values ​​and make fine adjustments for each channel:

[0125] V out_adjusted (t) = V out (t)+θ·(V target (t(-V feedback (t));

[0126] Among them, V out_adjusted (t) is the adjusted output voltage, V out (t) is the current output voltage, V target (t) is the target voltage, V feedback (t) is the feedback voltage, θ is the fine-tuning coefficient, and t is the time;

[0127] S85, periodically calibrate the voltage output, and the ESP32-S3 microcontroller obtains temperature, time, and hardware status data to make dynamic adjustments to compensate for temperature drift and hardware deviation;

[0128] S86. During the adjustment and calibration process, the ESP32-S3 microcontroller continuously monitors the working status of the voltage source matrix and adjusts the output voltage in real time:

[0129]

[0130] Among them, V stability (t) is the stability of the output voltage, σ is the stability coefficient, and ΔV(t) is the voltage error.

[0131] Embodiment 1:

[0132] In order to verify the feasibility of the present invention in implementation, the present invention was applied to the optoelectronic testing laboratory of a certain technology company. During the optical chip testing process, we used a voltage source matrix control method based on the ESP32-S3 microcontroller and the DAC8568 chip to provide 16 channels of voltage output for different test points of each optical chip. During the test process, we require that the voltage of each test channel be stable within a specific range (e.g., ±0.1V) and that extremely low noise be maintained during the entire test process.

[0133] Before the test begins, the ESP32-S3 microcontroller initializes the 16×8 voltage source matrix and establishes communication with each DAC8568 chip through the SPI interface. Each DAC8568 chip is configured to control a different test channel to provide the required voltage output.

[0134] During the test, the ESP32-S3 microcontroller reads the voltage output of each DAC8568 chip in real time and compares it with the target voltage value. If there is a difference between the output voltage and the target voltage (such as ±0.05V), the microcontroller sends an adjustment instruction to the DAC8568 through the SPI interface to adjust the voltage in real time and ensure that the voltage is within the target range. In order to reduce voltage fluctuations and noise, the system adds noise reduction capacitors to each voltage channel. The noise reduction capacitors effectively filter high-frequency noise, ensuring that the voltage output of the voltage source matrix is ​​more stable and avoiding signal instability caused by noise interference.

[0135] The system uses a high-precision voltage-stabilized power supply module to provide stable voltage for each voltage output channel to avoid the influence of power supply fluctuations on the voltage source matrix. The design of the voltage-stabilized power supply module ensures that the output voltage of the power supply always remains within the predetermined range when the load changes, thus providing a stable power supply environment for the DAC8568 chip and the optical chip.

[0136] The ESP32-S3 microcontroller is used to adjust the 16-channel voltage output of the voltage source matrix to ensure accurate control of the output voltage of each channel. At each test point (optical chip input port), the error between the actual voltage and the target voltage is monitored and recorded. An oscilloscope is used to monitor the voltage fluctuation in real time and record the noise value of each channel.

[0137] Table 1 Voltage source matrix output error table

[0138]

[0139] It can be seen from the data in the table that the method of the present invention has obvious advantages over the traditional method in terms of voltage accuracy and noise control. In terms of voltage accuracy, the voltage error of the present invention is generally small. For example, in channel 1, the voltage error of the present invention is only 0.002V, while the voltage error of the traditional method is 0.020V, and the difference reaches 0.018V. This shows that through the control method of the present invention, the voltage output can be more accurately maintained within the target value range, ensuring the stability and high precision of the system.

[0140] In terms of noise control, the noise amplitude of the present invention is significantly lower than that of the traditional method. For example, in channel 1, the noise amplitude of the present invention is only 0.02mV, while the noise amplitude of the traditional method is 0.10mV, a difference of 0.08mV. This shows that the present invention has advantages in reducing high-frequency noise and effectively improves the stability and quality of the voltage signal. This is crucial for the application of high-precision equipment such as optical chips and precision sensors, because excessive noise will directly affect the accuracy of the measurement results and the normal operation of the equipment.

[0141] In summary, the present invention provides better performance in voltage accuracy and noise control, ensuring the stability and reliability of the voltage source matrix in complex and high-precision applications.

[0142] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A method for reducing noise based on a high-precision voltage source matrix of an optical chip, characterized in that: The steps include: S1. Initialize the GPIO port configuration of the MCP23017 expander through the ESP32-S3 microcontroller, and assign the chip select signal and address select signal of the DAC8568 chip; S2, sends digital control signals to the DAC8568 chip through the SPI communication interface of ESP32-S3, selects the target channel and generates the corresponding digital voltage signal according to the configured chip select signal and address selection signal; S3, using the DAC8568 chip to convert the received digital voltage signal into an analog voltage signal, and output the initial analog voltage signal on each channel; S4, input the initial analog voltage signal output by the DAC8568 chip into the dual operational amplifier, stably amplify the initial analog voltage signal, improve the initial analog voltage fluctuation and enhance the signal strength; S5, adding a noise reduction capacitor to each amplified initial analog voltage signal path, performing high-frequency noise filtering on the initial analog voltage signal, and generating a filtered stable analog voltage signal; S6, providing a stable power supply voltage for the DAC8568 chip, dual operational amplifier and MCP23017 expander in the system through a voltage-stabilized power supply module; S7. Optimize the PCB design of the system, arrange the signal lines and ground lines in layers, and arrange shielding layers at key nodes; S8, through the control logic of the ESP32-S3 microcontroller, the output voltage of the 16×8 voltage source matrix is ​​adjusted and calibrated in real time.

2. According to claim 1, a method for reducing noise based on a high-precision voltage source matrix of an optical chip is characterized in that: The S2 specifically includes: S21, initialize the SPI communication interface through the ESP32-S3 microcontroller and establish communication channels with multiple DAC8568 chips; S22, configure the chip select signal of ESP32-S3 to activate the target DAC8568 chip for data transmission; S23, sending an address selection signal containing the target channel address to the activated DAC8568 chip through ESP32-S3 to select the specified output channel; S24, on the specified channel, transmits the digital control signal to the target DAC8568 chip through the SPI communication interface of ESP32-S3; S25, DAC8568 chip generates digital voltage signal according to the received digital control signal and combines the following dynamic optimization mechanism: Among them, V out is a digital voltage signal, D in is the input 16-bit digital signal, V REF is the reference voltage, α is the dynamic adjustment coefficient, ΔV env is the power supply voltage fluctuation value detected by the system, γ is the comprehensive compensation factor, K cal is the hardware calibration coefficient for each channel of the system, T comp is the temperature compensation parameter of the channel working environment, f noise is the main frequency of the signal noise.

3. The method for reducing noise based on a high-precision voltage source matrix of an optical chip according to claim 1, characterized in that: The S3 specifically includes: S31, transmitting the digital control signal containing the target voltage value to the designated input channel of the DAC8568 chip through the SPI communication interface of the ESP32-S3 microcontroller; After receiving the digital control signal, the S32 and DAC8568 chips activate the internal digital-to-analog converter and convert the digital signal according to the value of the input signal; S33, in the digital-to-analog converter of DAC8568, converting the digital signal into a corresponding analog voltage signal using a 16-bit resolution, the analog signal being proportional to the input digital signal; S34, DAC8568 chip outputs the converted analog voltage signal to the specified channel through its output port; S35. On each output channel, the DAC8568 chip generates and outputs an initial analog voltage signal according to the input digital control signal.

4. The method for reducing noise based on a high-precision voltage source matrix of an optical chip according to claim 1, characterized in that: The S4 specifically includes: S41, inputting the initial analog voltage signal output by the DAC8568 chip to the non-inverting input terminal of the dual operational amplifier; S42, after receiving the initial analog voltage signal, the dual operational amplifier activates its amplification circuit according to the set gain parameter and prepares to amplify the signal; S43, the amplification circuit inside the dual operational amplifier amplifies the input signal according to the set gain coefficient, generates an enhanced analog voltage signal, and effectively stabilizes the output; S44, the dual operational amplifier transmits the enhanced analog voltage signal to the next stage circuit through its output port; S45. During the output process, the gain of the dual operational amplifier is adjusted to output a stable analog voltage signal with high signal strength and small fluctuation.

5. The method for reducing noise based on a high-precision voltage source matrix of an optical chip according to claim 1, characterized in that: The S5 specifically includes: S51, transmitting the enhanced analog voltage signal output by the dual operational amplifier to the input end of the noise reduction capacitor as part of the signal path; S52, according to the circuit design, connecting the noise reduction capacitor to the signal path, connecting it to the signal line in parallel, and filtering the high-frequency noise of the signal; S53. When the enhanced analog voltage signal passes through the noise reduction capacitor, the capacitor reduces the high-frequency noise components in the signal, especially high-frequency interference and unnecessary electromagnetic waves, through its specific capacitance value and filtering characteristics: Among them, V filtered (f) is the frequency response of the initial analog voltage signal amplified by the dual operational amplifier, V amplified (f) is the frequency response of the analog voltage signal after filtering, R filter is the resistance value in series with the noise reduction capacitor in the signal path, C filter is the capacitance value of the noise reduction capacitor, f is the frequency of the signal, and j is the imaginary unit; S54, selecting an appropriate noise reduction capacitor value according to the target signal frequency and the noise frequency; S55, outputting the signal filtered by the noise reduction capacitor to generate a filtered stable analog voltage signal.

6. The method for reducing noise based on a high-precision voltage source matrix of an optical chip according to claim 1, characterized in that: The S6 specifically includes: S61, providing a stable DC voltage through a voltage-stabilizing power supply module to maintain the normal operation of each component in the system and maintain the voltage stability of the entire system; S62, inputting the stable voltage of the voltage-stabilized power supply module to the DAC8568 chip, so that the DAC8568 obtains a stable power supply during the digital-to-analog conversion process; S63, inputting the stable voltage output by the voltage-stabilized power supply module into the dual operational amplifier, so that the operational amplifier accurately amplifies the signal under the stable power supply voltage; S64, input the stable voltage output by the voltage-stabilized power supply module to the MCP23017 expander to prevent power supply fluctuations from affecting the stability of I2C or SPI communication; S65. According to the power requirements and power consumption of each module, the voltage-stabilized power supply module adjusts the output voltage to adapt to the power requirements of each component: Among them, V out (t) is the output voltage after dynamic adjustment, V nom is the rated voltage of the regulated power supply, β is the voltage regulation coefficient, P(t) is the instantaneous power consumption of the system, P max is the maximum power consumption of the system, I(t) is the instantaneous current demand of the system, λ is the current regulation factor, and t is the time.

7. The method for reducing noise based on a high-precision voltage source matrix of an optical chip according to claim 1, characterized in that: The S8 specifically includes: S81, start the ESP32-S3 microcontroller and initialize the control port of the system, including the SPI communication interface for data exchange with the DAC8568 chip; The S82 and ESP32-S3 microcontrollers read the current output voltage value of each DAC8568 chip in the 16×8 voltage source matrix and calculate the target voltage value required for each channel according to the real-time needs of the system; S83, based on the error between the current output voltage value and the target voltage value, the ESP32-S3 microcontroller generates an adjustment instruction and sends a control signal to the corresponding DAC8568 chip through the SPI communication interface to adjust the voltage output; The S84 and ESP32-S3 microcontrollers monitor the output voltage changes based on the feedback voltage values ​​and make fine adjustments for each channel: V out_adjusted (t)=V out (t)+θ·(V target (t)-V feedback (t)); Among them, V out_adjusted (t) is the adjusted output voltage, V out (t) is the current output voltage, V target (t) is the target voltage, V feedback (t) is the feedback voltage, θ is the fine-tuning coefficient, and t is the time; S85, periodically calibrate the voltage output, and the ESP32-S3 microcontroller obtains temperature, time, and hardware status data to make dynamic adjustments to compensate for temperature drift and hardware deviation; S86. During the adjustment and calibration process, the ESP32-S3 microcontroller continuously monitors the working status of the voltage source matrix and adjusts the output voltage in real time: Among them, V stability (t) is the stability of the output voltage, σ is the stability coefficient, and ΔV(t) is the voltage error.

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