A method for evaluating a power supply network of a digital integrated circuit in a high magnetic field pulse environment

Abstract

The application particularly relates to a method and device for evaluating a power supply network of a digital integrated circuit in a strong magnetic field pulse environment. The method comprises the following steps: extracting power supply network data of a digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power supply network model; performing equivalent conversion processing on strong magnetic field pulse data based on an equivalent relationship between time domain data and frequency domain data to obtain corresponding frequency domain magnetic field data; applying a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data to obtain induced potential of the two-dimensional power supply network; calculating a reduction value of voltage margin based on the induced potential, and determining correction data of the voltage margin of the digital integrated circuit based on the reduction value of the voltage margin. The scheme can realize non-destructive evaluation of the reliability of the power supply network of the digital integrated circuit.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, in particular to a method and device for evaluating a power supply network of a digital integrated circuit in a strong magnetic field pulse environment, a storage medium, a computer program product, and an electronic device. BACKGROUND

[0002] In related technologies, with the continuous development of electronic technology, the complexity, miniaturization and high-speed trend of electronic systems make the influence of electromagnetic environment on electronic components a problem that cannot be ignored. The electromagnetic environment may cause the failure of electronic components, affect the normal operation of the electronic system, and even pose a serious threat to personal and equipment safety.

[0003] The method for analyzing the reliability of a digital integrated circuit in a strong magnetic field environment is a traditional method that studies the reliability of a digital integrated circuit by injection. However, the injection method has problems such as expensive experimental equipment, device damage during experimental operation, and the need to produce physical products before testing to determine reliability. By using the method of the present application, the cost of experimental equipment can be saved, the device is not damaged, and the reliability of the digital integrated circuit can be determined in advance of physical production.

[0004] It should be noted that the information disclosed in the above background section is only used to strengthen the understanding of the background of the present application, and therefore can include information that does not constitute prior art known to those of ordinary skill in the art. SUMMARY

[0005] The present application provides a method and device for evaluating a power supply network of a digital integrated circuit in a strong magnetic field pulse environment, a storage medium, a computer program product, and an electronic device. The induced potential of the power supply network in a strong magnetic field pulse is evaluated, which can overcome the defects in the prior art to some extent.

[0006] Other characteristics and advantages of the present application will become apparent from the following detailed description, or will be learned by practice of the present application.

[0007] According to a first aspect of the present application, a method for evaluating a power supply network of a digital integrated circuit in a strong magnetic field pulse environment is provided, the method comprising:

[0008] extracting power supply network data of a digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power supply network model;

[0009] equivalent conversion processing of the strong magnetic field pulse data based on the equivalent relationship between the time domain data and the frequency domain data to obtain corresponding frequency domain magnetic field data;

[0010] applying a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data to obtain the induced potential of the two-dimensional power supply network;

[0011] The reduction value of the voltage margin is calculated based on the induced potential, and the correction data of the voltage margin of the digital integrated circuit is determined based on the reduction value of the voltage margin.

[0012] In some example embodiments, the two-dimensional power supply network model includes two-dimensional power supply ring lines and power supply strip lines.

[0013] In some example embodiments, the extracting of the power supply network data of the digital integrated circuit to be analyzed to obtain the corresponding two-dimensional power supply network model includes:

[0014] extracting an original power supply network model from a digital integrated circuit GDS file;

[0015] simplifying the original power supply network model to obtain a simplified three-dimensional power supply network model; the power supply network model includes power supply ring lines and power supply strip lines;

[0016] converting the three-dimensional power supply network model to obtain a two-dimensional power supply network model.

[0017] In some example embodiments, the simplifying of the original power supply network model includes:

[0018] removing signal lines and I / O ports of the original power supply network, and retaining a plurality of wiring layers corresponding to the power supply strip lines and the power supply ring lines, to construct a three-dimensional power supply network model based on the plurality of wiring layers.

[0019] In some example embodiments, when the spatially uniform strong magnetic field is applied to the digital integrated circuit based on the frequency domain magnetic field data, the method further includes:

[0020] configuring the surface current density of the digital integrated circuit and the ideal magnetic conductor condition.

[0021] In some example embodiments, the calculating of the reduction value of the voltage margin based on the induced potential includes:

[0022] determining the reduction value of the voltage margin based on the change amount of the imaginary part voltage.

[0023] According to a second aspect of the present application, a strong magnetic field pulse environment digital integrated circuit power supply network evaluation device is provided, including:

[0024] a two-dimensional power supply network model construction module configured to extract power supply network data of a digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power supply network model;

[0025] a magnetic field conversion module configured to perform equivalent conversion processing on the strong magnetic field pulse data based on an equivalent relationship between time domain data and frequency domain data to obtain corresponding frequency domain magnetic field data.

[0026] a magnetic field applying module configured to apply a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data to obtain induced potential of the two-dimensional power supply network;

[0027] a correction data calculating module configured to calculate a reduced value of voltage margin based on the induced potential, and determine correction data of the voltage margin of the digital integrated circuit based on the reduced value of the voltage margin.

[0028] According to a third aspect of the present application, there is provided a storage medium having stored thereon a computer program which, when executed by a processor, implements the method for evaluating power supply network of digital integrated circuit in strong magnetic field pulse environment as described above.

[0029] According to a fourth aspect of the present application, there is provided an electronic device comprising:

[0030] a processor; and

[0031] a memory configured to store executable instructions of the processor;

[0032] wherein the processor is configured to implement the method for evaluating power supply network of digital integrated circuit in strong magnetic field pulse environment as described above via execution of the executable instructions.

[0033] According to a fifth aspect of the present application, there is provided a computer program product having stored thereon a computer program which, when executed by a processor, implements the method for evaluating power supply network of digital integrated circuit in strong magnetic field pulse environment as described above.

[0034] The method for evaluating power supply network of digital integrated circuit in strong magnetic field pulse environment provided by the embodiments of the present application extracts power supply network data of the digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power supply network model; performs equivalent conversion processing on the strong magnetic field pulse data based on the equivalent relationship between time domain data and frequency domain data to obtain corresponding frequency domain magnetic field data; applies a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data to obtain induced potential of the two-dimensional power supply network; and finally calculates a reduced value of voltage margin based on the induced potential, and determines correction data of the voltage margin of the digital integrated circuit based on the reduced value of the voltage margin. Thus, the reliability of the power supply network of the digital integrated circuit is evaluated by a non-destructive method, and the anti-magnetic interference capability of the power supply network can be quickly evaluated in the back-end stage of the circuit design.

[0035] It should be understood that the foregoing general description and the following detailed description are only exemplary and explanatory, and are not limiting of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0036] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments consistent with the present application and, together with the description, further serve to explain the principles of the application. It is to be understood that the drawings are designed solely for purposes of illustration to be used in conjunction with the description in

[0037] Figure 1 A schematic diagram of a method for evaluating a power network of a digital integrated circuit in a strong magnetic field pulse environment according to an example embodiment of the present application is shown schematically;

[0038] Figure 2 A schematic diagram of a GDS layout of a digital integrated circuit according to an example embodiment of the present application is shown schematically;

[0039] Figure 3 A schematic diagram of a power network composed of a power ring and a strip line according to an example embodiment of the present application is shown schematically;

[0040] Figure 4 A schematic diagram of a simplified two-dimensional model according to an example embodiment of the present application is shown schematically;

[0041] Figure 5 A schematic diagram of a magnetic field hyperbola according to an example embodiment of the present application is shown schematically;

[0042] Figure 6 A schematic diagram of a spatially uniform magnetic field according to an example embodiment of the present application is shown schematically;

[0043] Figure 7 A schematic diagram of a 2D model simulation voltage of a ground line at 16 kHz according to an example embodiment of the present application is shown schematically;

[0044] Figure 8 A schematic diagram of a 2D model simulation voltage of a power line at 16 kHz according to an example embodiment of the present application is shown schematically;

[0045] Figure 9 A schematic diagram of an evaluation device for a power network of a digital integrated circuit in a strong magnetic field pulse environment according to an example embodiment of the present application is shown schematically;

[0046] Figure 10 A schematic diagram of an electronic device according to an example embodiment of the present application is shown schematically. DETAILED DESCRIPTION

[0047] Example implementations will now be described more fully with reference to the accompanying drawings. Example implementations can, however, be implemented in many different forms and should not be considered limited to the examples set forth herein; rather, these implementations are provided so that this disclosure will be thorough and complete, and will fully convey the inventive concept to those skilled in the art. The described features, structures, or characteristics can be combined in one or more implementations.

[0048] In addition, the accompanying drawings are included to provide a thorough understanding of the present application and are not intended to be exhaustive or to limit the application to the precise outline described herein. The same or similar reference numerals in different drawings represent the same or similar elements, and thus repeated description thereof will be omitted. Some of the block diagrams shown in the drawings are functional entities, which do not necessarily have to correspond to physically or logically independent entities. These functional entities can be implemented in the form of software, or in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0049] In the related art, the existing technology mainly measures the inductance, resistance, capacitance and other parameters of the integrated circuit port through experimental testing, and substitutes passive device simulation for direct simulation of the chip power supply network, lacking a strong magnetic field simulation evaluation method for the power supply network at the design initial stage.

[0050] In view of the shortcomings and deficiencies of the prior art, the present example implementation provides a strong magnetic field pulse environment digital integrated circuit power supply network evaluation method. The reliability of the digital integrated circuit power supply network is evaluated by a non-destructive method, and the anti-magnetic interference capability of the power supply network can be quickly evaluated at the back-end stage of the circuit design.

[0051] In the present example implementation, referring to Figure 1 The strong magnetic field simulation evaluation method for the power supply network at the design initial stage can include the following steps:

[0052] Step S11, extracting the power supply network data of the digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power supply network model;

[0053] Step S12, based on the equivalent relationship between the time domain data and the frequency domain data, performing equivalent conversion processing on the strong magnetic field pulse data to obtain corresponding frequency domain magnetic field data;

[0054] Step S13, based on the frequency domain magnetic field data, applying a spatially uniform strong magnetic field to the digital integrated circuit to obtain the induced potential of the two-dimensional power supply network;

[0055] Step S14, calculating the reduction value of the voltage margin based on the induced potential, and determining the correction data of the voltage margin of the digital integrated circuit based on the reduction value of the voltage margin.

[0056] The method for evaluating the power network of a digital integrated circuit in a pulsed high magnetic field environment will be described in more detail below in connection with the drawings and examples.

[0057] In step S11, the power network data of the digital integrated circuit to be analyzed is extracted to obtain a corresponding two-dimensional power network model.

[0058] For example, a user can select a digital integrated circuit to be analyzed on a smart terminal device and create a corresponding circuit analysis task. The terminal device can send a corresponding task request to the server side, which processes the task and generates a corresponding evaluation result feedback to the terminal device. Alternatively, the task can also be executed locally on the terminal device and a corresponding evaluation result is generated.

[0059] For example, in step S11, the power network data of the digital integrated circuit to be analyzed is extracted to obtain a corresponding two-dimensional power network model, which includes:

[0060] In step S21, the original power network model is extracted from the digital integrated circuit GDS file.

[0061] In step S22, the original power network model is simplified to obtain a simplified three-dimensional power network model. The power network model includes power ring lines and power strip lines.

[0062] In step S23, the three-dimensional power network model is converted to obtain a two-dimensional power network model.

[0063] For example, the two-dimensional power network model includes two-dimensional power ring lines and power strip lines.

[0064] Specifically, the digital integrated circuit to be analyzed can use a corresponding digital integrated circuit GDS (Graphic Data System) file. The digital integrated circuit GDS file includes power supply lines, I / O ports and signal lines of the power network. In the power network, the power ring line and the power strip line are the most important power supply network. The power ring line reduces the impedance of the power network through a ring structure to ensure that the voltage is basically the same at all parts of the chip. The power strip line supplies power to the standard cells of the digital integrated circuit through a strip structure to ensure that the standard cells can be arranged at the highest density. Referring to Figure 2 As shown, it is a GDS layout file of an open source LEON2 processor under a 130 nm process.

[0065] For example, in step S22, the original power network model is simplified, which includes removing the signal lines and I / O ports of the original power network, retaining a number of wiring layers corresponding to the power strip lines and power ring lines, and constructing a three-dimensional power network model based on the number of wiring layers.

[0066] Specifically, in order to facilitate the analysis of the power network, the signal lines and I / O ports in the GDS file are removed, and the 1st, 5th, and 6th layer wiring representing the power line loop is retained to obtain the power network model. The power loops and lines in the power network are shown in the GDS layout file as follows: Figure 3 As shown in Figure 1, the power and ground wire structures of the power network are highly similar. In a ring line, the power line occupies the outer ring, while the ground line occupies the inner ring, with the two lines arranged closely together. In a power strip line, the power and ground lines are arranged alternately to provide power between the two strips.

[0067] In digital integrated circuits, the power network is a highly planar structure. The length and width of the power network can exceed 1000um, while the height of each line is less than 1um, and the total height is less than 10um. In order to simplify the model calculation and reduce the difficulty of model analysis caused by the deformed structure, the influence of the through-hole is ignored, the power line and the ground line of the power network are separated, and only part of the power line is retained and extracted as a 2D model; imported into the COMSOL tool, and the transition boundary condition of the COMSOL tool is used to simulate the power network model, which is a method of processing thin layer models. The power line distribution of the simplified two-dimensional power network model is as follows Figure 4 shown.

[0068] In step S12, based on the equivalent relationship between time domain data and frequency domain data, the strong magnetic field pulse data is equivalently converted to obtain corresponding frequency domain magnetic field data.

[0069] Specifically, in a power network with a fixed loop area, Faraday's law of electromagnetic induction can be expressed as:

[0070]

[0071] Where B is the magnetic field strength, S is the loop area, and t is the time.

[0072] As can be seen from the above formula, the magnitude of the induced potential is proportional to the rate of change of the magnetic field strength ΔB / Δt. The maximum induced potential corresponds to the maximum value of the rate of change of the magnetic field strength.

[0073] Under magnetic field conditions above 1T, the magnetic field is generated by a large current passing through the coil, and the current can reach thousands of amperes. The circuit cannot withstand the heat caused by this current for a long time, so the magnetic field above 1T appears in the form of pulses.

[0074] In order to convert the magnetic field pulse in the time domain into the frequency domain and ensure the efficiency and accuracy of the evaluation, the frequency domain simulation with the same maximum value of the magnetic field intensity change rate can be used to replace the time domain simulation.

[0075] For example, to simplify the time-domain waveform of the strong magnetic field pulse into the frequency domain for calculation, the equivalent relationship between the time-domain maximum value and the frequency-domain maximum value needs to be obtained. The maximum change rate of the frequency-domain waveform is transformed as follows:

[0076] B(t) = B0sin(ωt + φ)

[0077] where t represents time, ω represents angular frequency, φ represents phase, and B0 represents amplitude.

[0078] Since the cosine component of the signal can be represented by the real part of the frequency-domain function, B(t) in the above formula can be written as the real part of the frequency-domain function, which is represented by a vector. The specific formula can include:

[0079]

[0080] where Re() represents the real part, and j represents the imaginary unit. The derivative of the formula is calculated.

[0081] The derivative of the formula is calculated to obtain the derivative formula of the magnetic field strength B, which includes:

[0082]

[0083] Based on the above, the maximum value is taken at t = 0, and the expression of the maximum value of B(t) in the frequency domain can be:

[0084]

[0085] At t = 0, the maximum magnetic field change rate is:

[0086]

[0087] Through the above calculation, the maximum change rate value of the frequency-domain magnetic field is 2πfB0. For a known strong magnetic field pulse, we can convert the maximum change rate of the strong magnetic field pulse into the slope of a sine waveform with a maximum magnetic field of B0 and a frequency of f when t = 0.

[0088] For the required example, the magnetic field is expressed as follows:

[0089] B = 1 × (e -1000t -e -100000t )

[0090] The corresponding expression curve is shown in Figure 5 According to the above conversion calculation, the maximum slope of the curve can be converted into a sine waveform calculation with a maximum magnetic field of B0 = 1T and a frequency of 16 kHz in the frequency domain.

[0091] Exemplarily, when the digital integrated circuit is subjected to a spatially uniform strong magnetic field based on the frequency domain magnetic field data, the method further comprises:

[0092] configuring the surface current density of the digital integrated circuit and the ideal magnetic conductor condition.

[0093] Specifically, because the integrated circuit is small in volume, in a strong magnetic field pulse radiation environment, it can be considered that the magnetic field size at the same time at each place of the integrated circuit in space is the same. A spatially uniform magnetic field can be generated by the surface current density + ideal magnetic conductor condition. After calculation, the surface current density on the annular boundary of the air domain is set as:

[0094]

[0095] wherein J S0 Need to be written as r-phi-a three direction vector, unit A / m. BX is the magnetic field to be generated here, mu0_const is the vacuum permeability, all set to dimensionless number.

[0096] That is, a uniform magnetic field with a size of BX Tesla can be generated in the air domain. We set the upper and lower surfaces as ideal magnetic conductor conditions to ensure that the magnetic field vertically penetrates the upper and lower surfaces of the air domain, and the spatial magnetic field size is uniform, as shown in Figure 6 .

[0097] In step S14, a reduction value of the voltage margin is calculated based on the induced potential, and a correction data of the voltage margin of the digital integrated circuit is determined based on the reduction value of the voltage margin.

[0098] Exemplarily, the reduction value of the voltage margin based on the induced potential comprises: determining the reduction value of the voltage margin based on the change amount of the imaginary voltage.

[0099] For example, referring to Figure 7 The simulation results of the power network ground line model under 16 kHz are shown. As can be seen from the figure, the maximum value of the imaginary voltage representing the induced potential is about 0.004 V, and the minimum value is about -0.0038 V. That is, the maximum rise of the power ground line is 0.004 V, and the decrease is 0.0038 V. Figure 8 The simulation results of the power network power line model under 16 kHz are shown. As can be seen from the figure, the imaginary voltage representing the induced electromotive force changes by a maximum of 0.077 V, and the voltage does not increase.

[0100] In summary, the minimum power supply voltage fluctuation of the circuit is 1.2V-0.077V-0.004V=1.119V, which is about 93% of the original power supply voltage. Through analysis, we determine that for this strong magnetic pulse, the digital integrated circuit power supply network design needs to increase the voltage tolerance by 7% to cope with the impact of the strong magnetic pulse.

[0101] For example, for the application of circuit back-end design, it can include:

[0102] S1: Extract the power supply network from the GDS layout, keep the model two-dimensional, separate the power lines and ground lines.

[0103] S2: Convert the strong magnetic field pulse into the corresponding frequency domain magnetic field by the change formula of the frequency domain magnetic field maximum change rate value 2πfB0.

[0104] S3: Set the surface current density + ideal magnetic conductor condition, and simulate the induced potential of the power supply network using COMSOL.

[0105] S4: Based on the simulation results, calculate the reduction of voltage tolerance, and propose the voltage tolerance margin that the digital integrated circuit should increase.

[0106] The method provided by the embodiment of the application effectively simplifies the complexity of the calculation by converting the time domain strong magnetic field pulse into the frequency domain magnetic field for calculation. The spatially uniform magnetic field is generated by configuring the surface current density + ideal magnetic conductor condition, thereby ensuring the effectiveness of the strong magnetic field and the accuracy of the data. By determining the maximum induced potential of the power supply network, it is determined whether the maximum induced potential will affect the operation of the circuit, thereby accurately evaluating the magnetic interference resistance of the power supply network.

[0107] The method can quickly evaluate the magnetic interference resistance of the power supply network in the circuit design back-end stage, help the designers improve and enhance the anti-interference ability of the power supply network, and help the medical nuclear magnetic resonance instrument, military electromagnetic gun, and industrial digital integrated circuit to perform reliability evaluation in the design stage.

[0108] It should be noted that the above-mentioned figures are only schematic illustrations of the processes included in the method according to the exemplary embodiments of the application, and are not for limitation purposes. It is easy to understand that the processes shown in the above-mentioned figures do not indicate or limit the time sequence of these processes. In addition, it is also easy to understand that these processes can be executed synchronously or asynchronously, for example, in multiple modules.

[0109] Further, with reference to Figure 9 shown, the embodiment of the present example also provides an evaluation device 90 for the power supply network of a digital integrated circuit in a strong magnetic field pulse environment, comprising:

[0110] The two-dimensional power supply network model construction module 901 is configured to extract power supply network data of the digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power supply network model.

[0111] The magnetic field conversion module 902 is configured to perform equivalent conversion processing on the strong magnetic field pulse data based on an equivalent relationship between time domain data and frequency domain data to obtain corresponding frequency domain magnetic field data.

[0112] The magnetic field application module 903 is configured to apply a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data to obtain an induced potential of the two-dimensional power supply network.

[0113] The correction data calculation module 904 is configured to calculate a reduction value of the voltage margin based on the induced potential, and determine correction data of the voltage margin of the digital integrated circuit based on the reduction value of the voltage margin.

[0114] The functions of the modules in the evaluation device 90 are implemented in the corresponding method embodiments, which have been described in detail, and will not be repeated here.

[0115] It should be noted that, although several modules or units of the device for action execution are mentioned in the above detailed description, such division is not mandatory. In fact, according to the embodiments of the present application, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided into embodied by multiple modules or units.

[0116] Figure 10 A schematic diagram of an electronic device suitable for implementing embodiments of the present application is shown.

[0117] It should be noted that, Figure 10 The electronic device 1000 shown is only an example, and should not bring any limitation to the functions and use range of the embodiments of the present application.

[0118] As Figure 10As shown, electronic device 1000 includes a central processing unit (CPU) 1001, which can perform various appropriate actions and processes according to the program stored in read-only memory (ROM) 1002 or the program loaded from storage portion 1008 into random access memory (RAM) 1003. Various programs and data required for system operation are also stored in RAM 1003. CPU 1001, ROM 1002 and RAM 1003 are connected to each other via bus 1004. Input / output (I / O) interface 1005 is also connected to bus 1004.

[0119] The following components are connected to the I / O interface 1005: an input section 1006 including a keyboard, a mouse, and the like; an output section 1007 including devices such as a cathode ray tube (CRT), a liquid crystal display (LCD), and a speaker; a storage section 1008 including a hard disk and the like; and a communication section 1009 including a network interface card such as a LAN (Local Area Network) card or a modem. The communication section 1009 performs communication processing via a network such as the Internet. A drive 1010 is also connected to the I / O interface 1005 as needed. Removable media 1011, such as a magnetic disk, an optical disk, a magneto-optical disk, or a semiconductor memory, is installed in the drive 1010 as needed, so that computer programs read therefrom can be installed into the storage section 1008 as needed.

[0120] In particular, according to an embodiment of the present invention, the process described below with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present invention includes a computer program product that includes a computer program carried on a storage medium, the computer program containing program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network via the communication section 1009 and / or installed from a removable medium 1011. When the computer program is executed by the central processing unit (CPU) 1001, the various functions defined in the system of the present application are performed.

[0121] It should be noted that the storage medium shown in the embodiments of the present application can be a computer readable signal medium or a computer readable storage medium or any combination of the above two. The computer readable storage medium may, for example, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or component, or any combination of the above. More specific examples of the computer readable storage medium can include, but are not limited to, an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a flash memory, an optical fiber, a portable compact disk read-only memory (Compact Disc Read-Only Memory, CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present application, the computer readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, device or component. In the present application, the computer readable signal medium can include a data signal carried in a baseband or as a part of a carrier wave, which carries computer readable program code. Such a propagated data signal can take various forms, including but not limited to an electromagnetic signal, an optical signal or any suitable combination of the above. The computer readable signal medium can also be any storage medium other than the computer readable storage medium, which can send, propagate or transmit a program for use by or in conjunction with an instruction execution system, device or component. The program code contained in the storage medium can be transmitted by any suitable medium, including but not limited to wireless, wired, etc., or any suitable combination of the above.

[0122] The flowcharts and block diagrams in the drawings illustrate the possible implementation architectures, functions and operations of the systems, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowcharts or block diagrams can represent a module, a program segment, or a part of code containing one or more executable instructions for implementing the specified logical functions. It should also be noted that in some alternative implementations, the functions noted in the blocks can occur in different orders than that shown in the drawings. For example, two blocks that are shown in succession can actually be executed substantially in parallel, and sometimes in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams or flowcharts, and the combination of blocks in the block diagrams or flowcharts, can be implemented by a dedicated hardware-based system for performing the specified functions or operations, or can be implemented by a combination of dedicated hardware and computer instructions.

[0123] The units described in the embodiments of the present application can be implemented by software, or by hardware, or by a combination of software and hardware. The units described may

[0124] It should be noted that, as another aspect, the present application also provides a storage medium, which can be included in an electronic device, or can exist independently without being assembled into the electronic device. The storage medium carries one or more programs, and when the one or more programs are executed by an electronic device, the electronic device implements the method described in the embodiments. For example, the electronic device can implement each step of the method as shown in Figure 1

[0125] In one embodiment, the present application provides a computer program product, including a computer program, which, when executed by a processor, implements the steps in the above method embodiments.

[0126] In addition, the above figures are only schematic illustrations of the processes included in the method according to the exemplary embodiments of the present application, and are not for limiting purposes. It is easy to understand that the processes shown in the above figures do not indicate or limit the time sequence of the processes. In addition, it is also easy to understand that the processes can be executed synchronously or asynchronously, for example, in multiple modules.

[0127] Other embodiments of the present application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. It is intended that the present application cover any and all variations of the application that come within the scope of the claims and their equivalents. It is intended that the specification and examples be considered exemplary only, with the true scope and spirit of the application being indicated by the following claims.

[0128] It should be understood that the present application is not limited to the precise construction that has been described above and illustrated in the accompanying drawings, and that various modifications and changes can be made by those skilled in the art without departing from the scope of the present application. The scope of the present application is limited only by the appended claims.​

Claims

1. A method for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment, characterized in that: The method comprises: Extracting power network data from the digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power network model; Based on the equivalent relationship between time domain data and frequency domain data, the strong magnetic field pulse data is equivalently converted to obtain the corresponding frequency domain magnetic field data; Apply a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data to obtain the induced potential of the two-dimensional power network; A reduction value of the voltage margin is calculated based on the induced potential, and correction data of the voltage margin of the digital integrated circuit is determined based on the reduction value of the voltage margin.

2. The method according to claim 1, characterized in that The two-dimensional power supply network model includes two-dimensional power supply loops and power supply strips.

3. The method according to claim 1, characterized in that Extracting power supply network data from the digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power supply network model includes: Extract the original power network model from the digital integrated circuit GDS file; The original power network model is simplified to obtain a simplified three-dimensional power network model; the power network model includes: power loop lines and power strip lines; The three-dimensional power network model is converted to obtain a two-dimensional power network model.

4. The method according to claim 3, characterized in that The original power network model is simplified, including: The signal lines and I / O ports of the original power network are removed, and several wiring layers corresponding to the power strip lines and power loop lines are retained to construct a three-dimensional power network model based on the several wiring layers.

5. The method according to claim 1, wherein When applying a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data, the method further includes: Configure the surface current density and ideal magnetic conductor conditions of digital integrated circuits.

6. The method according to claim 1, characterized in that The step of calculating the reduced value of the voltage tolerance based on the induced potential includes: A reduction value of the voltage margin is determined based on the amount of change in the imaginary voltage.

7. An evaluation device for a digital integrated circuit power supply network in a strong magnetic field pulse environment, characterized in that: The device comprises: A two-dimensional power network model building module is used to extract power network data of the digital integrated circuit to be analyzed to obtain the corresponding two-dimensional power network model; The magnetic field conversion module is used to perform equivalent conversion processing on the strong magnetic field pulse data based on the equivalent relationship between time domain data and frequency domain data to obtain the corresponding frequency domain magnetic field data; A magnetic field application module is used to apply a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data to obtain the induced potential of the two-dimensional power supply network; The correction data calculation module is used to calculate the reduced value of the voltage tolerance based on the induced potential, and determine the correction data of the voltage tolerance of the digital integrated circuit based on the reduced value of the voltage tolerance.

8. A storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment according to any one of claims 1 to 6 is implemented.

9. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the method for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment according to any one of claims 1 to 6 is implemented.

10. An electronic device, characterized in that: include: processor; as well as a memory for storing executable instructions of the processor; The processor is configured to execute the method for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment according to any one of claims 1 to 6 by executing the executable instructions.

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