QFN packaging structure and QFN packaging method

Abstract

The invention provides a QFN packaging structure and a QFN packaging method, in the QFN packaging structure, a chip welding surface is flush with a first surface of a lead frame, the lead frame surrounds a chip, and an active surface of the chip is bonded with a pin lead on a second surface of the lead frame; the plastic packaging layer wraps the active surface of the chip, the bonding wire, the second surface of the lead frame and a gap between the bonding wire and the second surface. According to the invention, the base island for bearing the chip in the lead frame of the QFN package is removed, the total thickness of the QFN package is reduced, and the miniaturization of the QFN package is facilitated; meanwhile, the base islands are removed to expose the welding surfaces of the chips, so that the heat dissipation thermal resistance of the chips is reduced, and the heat dissipation efficiency is improved; in addition, the base islands and the chip mounting glue which is connected with the base islands and is poor in heat conductivity coefficient are removed at the same time, and the heat dissipation efficiency of the chip is further improved. And finally, the chip is fixed in the lead frame by using the adhesive film before the plastic packaging layer is arranged, so that the film removal efficiency is improved, the influence of film removal on the chip and other structures is reduced, and the performance reliability and the production yield of the QFN packaging structure are improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor integrated circuit manufacturing, and in particular relates to a QFN packaging structure and a QFN packaging method. Background Art

[0002] The mainstream packaging forms that can currently achieve miniaturization of package size include QFN (Quad Flat No-leads Package). The QFN package structure mainly includes chips, bonding leads, pins, base islands and plastic packaging layers. The main process flow of the existing QFN package structure includes: welding or bonding the chip to the surface of the base island through patch materials; then connecting the circuit on the active surface of the chip to the lead frame through bonding leads as the pin lead of the QFN package structure; finally, the chip, lead frame, bonding leads and their gaps are plastic-sealed with plastic packaging materials such as resin; finally, a punching machine is used to form and cut to obtain a finished product of the QFN package structure.

[0003] However, as the requirements for chip packaging miniaturization become higher and higher, the size of traditional QFN packages is increasingly difficult to meet the current higher-end miniaturization application needs; at the same time, as the requirements for chip integration become higher and higher, the heat dissipation of the chip in the QFN packaging structure is also increasing, causing the chip temperature to rise faster and reach a higher temperature in the same working time, which is more likely to affect the product yield, service life and performance reliability of the QFN packaging structure.

[0004] Therefore, there is an urgent need for a structure or method that can further reduce the package size of the QFN package structure and improve its heat dissipation efficiency.

[0005] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because these solutions are described in the background technology part of the present application. Summary of the invention

[0006] In view of the above shortcomings of the prior art, an object of the present invention is to provide a QFN packaging structure and a QFN packaging method, so as to solve the problem that the QFN packaging structure in the prior art is difficult to miniaturize and has poor heat dissipation efficiency.

[0007] To achieve the above object, the present invention provides a QFN packaging structure, which includes: a chip, a lead frame, bonding wires and a plastic packaging layer;

[0008] The chip includes an active surface and a welding surface relative to each other, and the lead frame includes a first surface and a second surface relative to each other; the welding surface of the chip is flush with the first surface of the lead frame, the lead frame surrounds the chip, and the active surface of the chip forms an effective electrical connection with the pins on the second surface of the lead frame through the bonding wires; the plastic encapsulation layer wraps the active surface of the chip, the bonding wires, the second surface of the lead frame and the gaps therebetween.

[0009] Optionally, the active surface of the chip is flush with the second surface of the lead frame.

[0010] Optionally, a minimum distance between a side of the plastic packaging layer away from the welding surface and the bonding wire is greater than 50 microns.

[0011] The present invention also provides a QFN packaging method, the QFN packaging method is used to obtain any one of the above-mentioned QFN packaging structures, the QFN packaging method comprising:

[0012] Providing a frame substrate; patterning the frame substrate to obtain a lead frame including pins but not including a base island, wherein the lead frame includes a first surface and a second surface opposite to each other;

[0013] Disposing an adhesive film on the first surface of the lead frame;

[0014] Mounting a chip into the lead frame so that the soldering surface of the chip is bonded to the adhesive film;

[0015] bonding the active surface of the chip to the pins on the second surface of the lead frame by bonding wires;

[0016] Plastic encapsulating the wire-bonded chip and the lead frame, so that the obtained plastic encapsulation layer wraps the active surface of the chip, the bonding wires and the second surface of the lead frame and the gaps therebetween;

[0017] The adhesive film on the first surface of the lead frame is removed.

[0018] Optionally, the frame substrate is patterned by chemical etching.

[0019] Optionally, before the chip is mounted on the lead frame, the back side of the soldering surface of the chip is metallized to obtain a soldering metal layer on the soldering surface.

[0020] Optionally, the material of the adhesive film is polyimide.

[0021] Optionally, the adhesive film is made of a high temperature resistant material, and the temperature range of the adhesive film is greater than or equal to 250°C.

[0022] Optionally, when wire bonding is performed, a pressing plate is provided to perform vacuum adsorption on the adhesive film, and the adsorption and fixing position of the adhesive film by the pressing plate corresponds to the position of the lead frame.

[0023] Optionally, after removing the adhesive film, the obtained structure is cut to obtain a QFN packaging structure of a preset size.

[0024] As described above, the QFN packaging structure and QFN packaging method of the present invention have the following beneficial effects:

[0025] The present invention reduces the total thickness required in the QFN package by removing the base island for carrying the chip in the lead frame in the QFN package, which is beneficial to further miniaturization of the QFN package structure.

[0026] The present invention removes the base island to expose the welding surface of the chip, thereby accelerating the heat transfer of the chip, reducing the thermal resistance in the chip heat dissipation path, and improving the heat dissipation efficiency;

[0027] The present invention further improves the heat dissipation efficiency of the chip by removing the base island and the chip mounting glue with poor thermal conductivity used to connect the chip and the base island.

[0028] The present invention uses a sticky film to fix the chip in a lead frame before setting a plastic sealing layer, thereby improving the efficiency of removing the film, reducing the impact of removing the film on structures such as the chip, and improving the performance reliability and production yield of the QFN packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 Shown is a schematic side cross-sectional view of a QFN package structure in the prior art.

[0030] Figure 2 Shown is a schematic diagram of the heat dissipation path of a QFN packaging structure in the prior art.

[0031] Figure 3 Shown is a schematic side cross-sectional view of the QFN package structure of the present invention.

[0032] Figure 4 Shown is a schematic perspective view of the QFN package structure of the present invention.

[0033] Figure 5 Shown is a schematic diagram of the heat dissipation path of the QFN packaging structure in the present invention.

[0034] Figure 6 It is a schematic structural diagram of providing a frame substrate in step 1 of the QFN packaging method of the present invention.

[0035] Figure 7It is a schematic diagram of the structure presented by patterning the frame substrate in step 1 of the QFN packaging method of the present invention.

[0036] Figure 8 It is a schematic diagram showing the structure presented by setting the adhesive film in step 2 of the QFN packaging method of the present invention.

[0037] Fig. 9 It is a schematic diagram showing the structure of the chip mounted in step 3 of the QFN packaging method of the present invention.

[0038] Fig.10 It is a schematic diagram showing the structure presented by wire bonding in step 4 of the QFN packaging method of the present invention.

[0039] Fig.11 It is a schematic diagram of the structure presented by setting the plastic packaging layer in step 5 of the QFN packaging method of the present invention.

[0040] Fig.12 It is a schematic diagram showing the structure presented by removing the sticky film in step 6 of the QFN packaging method of the present invention.

[0041] Description of Figure Numbers

[0042] 1. Chip; 11. Active surface; 12. Welding surface; 2. Lead frame; 21. Base island; 22. Pin; 23. First surface;

[0043] 24. Second surface; 3. Bonding wire; 4. Plastic sealing layer; 5. Frame substrate; 6. Adhesive film; 7. Heat. DETAILED DESCRIPTION

[0044] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0045] For example, when describing the embodiments of the present invention in detail, for the sake of convenience, the schematic diagrams showing the device structure will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional dimensions of length, width and depth should be included.

[0046] For convenience of description, spatially relative terms such as "under", "below", "below", "below", "above", "on", etc. may be used herein to describe the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that these spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the drawings.

[0047] In the context of the present application, a structure in which a first feature is described as being "above" a second feature may include embodiments in which the first and second features are in direct contact, and may also include embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0048] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0049] like Figure 1 As shown in the figure, the heat generated by the traditional QFN package structure during operation is 7, and the main path for heat dissipation is as follows Figure 2 As shown, the chip 1 is fanned out downward to the PCB (Printed Circuit Board) or other heat sink under the chip 1 through the patch material and the base island 21 under the chip 1; however, since the thermal conductivity of the patch glue is generally poor, and the thickness of the base island 21 itself will greatly increase the thermal resistance of the chip 1 during heat dissipation, the heat dissipation efficiency of the chip 1 in the traditional QFN packaging structure is low, and it is difficult to meet the heat dissipation requirements of higher performance products in the prior art; at the same time, the overall thickness of the QFN packaging structure mainly includes the thickness of the base island 21, the thickness of the chip 1, the height of the line arc and the reserved space at the top. Due to the existence of the base island 21, it is difficult to further reduce the overall thickness of the QFN packaging structure, which is not conducive to the further miniaturization application of the QFN packaging structure.

[0050] The present invention provides a QFN packaging structure, such as Figure 3-Figure 4 As shown, Figure 3 is a side cross-sectional view of the QFN package structure, Figure 4 It is a three-dimensional perspective view of the QFN packaging structure, and the QFN packaging structure includes: a chip 1, a lead frame 2, bonding wires 3 and a plastic packaging layer 4;

[0051] The chip 1 includes a relative active surface 11 and a welding surface 12, and the lead frame 2 includes a relative first surface 23 and a second surface 24; the welding surface 12 of the chip 1 is flush with the first surface 23 of the lead frame 2, the lead frame 2 surrounds the chip 1, and the active surface 11 of the chip 1 forms an effective electrical connection with the pins 22 on the second surface 24 of the lead frame 2 through the bonding wires 3; the plastic encapsulation layer 4 wraps the active surface 11 of the chip 1, the bonding wires 3 and the second surface 24 of the lead frame 2 and the gaps therebetween.

[0052] The present invention removes the base island 21 carrying the chip 1 in the lead frame 2 in the QFN package, thereby greatly reducing the total thickness required in the QFN package. Experiments have shown that the thickness can be reduced by 0.15 mm to 0.2 mm, which is conducive to further miniaturization of the QFN package structure. At the same time, by removing the setting of the base island 21, the welding surface 12 of the chip 1 is exposed, and can be directly connected to the heat dissipation structure or PCB connected to the welding surface 12 of the chip 1, such as Figure 5 As shown, the transfer of heat 7 of the chip 1 can be accelerated, the thermal resistance in the heat dissipation path of the chip 1 can be reduced, and the heat dissipation efficiency can be improved. In addition, by removing the base island 21 and directly using the plastic packaging layer 4 as the only structure for connecting and fixing the chip 1 to the pins 22 of the lead frame 2, the chip mounting glue with poor thermal conductivity used to connect the chip 1 to the base island 21 can be removed, thereby further improving the heat dissipation efficiency of the chip 1.

[0053] In one embodiment, Figure 3 As shown, the active surface 11 of the chip 1 is flush with the second surface 24 of the lead frame 2 .

[0054] The present invention maximizes space utilization and realizes miniaturization of the QFN packaging structure to the greatest extent by arranging the active surface 11 of the chip 1 to be flush with the second surface 24 of the lead frame 2 and the welding surface 12 of the chip 1 to be flush with the first surface 23 of the lead frame 2.

[0055] In one embodiment, a minimum distance L between a side of the plastic encapsulation layer 4 away from the welding surface 12 and the bonding wire 3 is greater than 50 micrometers.

[0056] The present invention ensures the reliability of the bonding wire 3 and the yield of the QFN packaging structure by setting the distance between the bonding wire 3 and the top surface of the plastic packaging layer 4.

[0057] The present invention also provides a QFN packaging method, the QFN packaging method is used to obtain any one of the above-mentioned QFN packaging structures, the QFN packaging method comprising:

[0058] Step 1: providing a frame substrate 5; patterning the frame substrate 5 to obtain a lead frame 2 including pins 22 but not including a base island 21, wherein the lead frame 2 includes a first surface 23 and a second surface 24 opposite to each other;

[0059] Step 2: Disposing an adhesive film 6 on the first surface 23 of the lead frame 2;

[0060] Step 3: Mount the chip 1 into the lead frame 2 so that the welding surface 12 of the chip 1 is bonded to the adhesive film 6;

[0061] Step 4: wire-bonding the active surface 11 of the chip 1 to the pins 22 on the second surface 24 of the lead frame 2 through the bonding wires 3;

[0062] Step 5: plastic-encapsulating the chip 1 and the lead frame 2 after wire bonding, so that the obtained plastic encapsulation layer 4 wraps the active surface 11 of the chip 1, the bonding wires 3 and the second surface 24 of the lead frame 2 and the gaps therebetween;

[0063] Step 6: removing the adhesive film 6 on the first surface 23 of the lead frame 2 .

[0064] The QFN packaging method of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the above sequence does not strictly represent the sequence of the QFN packaging method protected by the present invention, and those skilled in the art may change it according to the actual packaging steps.

[0065] First, proceed to step 1, such as Figure 6 As shown, a frame substrate 5 is provided; Figure 7 As shown, the frame substrate 5 is patterned to obtain a lead frame 2 including pins 22 but not including a base island 21 . The lead frame 2 includes a first surface 23 and a second surface 24 that are opposite to each other.

[0066] In one embodiment, the frame substrate 5 is patterned by chemical etching.

[0067] Specifically, the frame substrate 5 is generally patterned by chemical etching, and other suitable methods may be selected to pattern the frame substrate 5 as required.

[0068] Specifically, in the prior art, after the frame substrate 5 is patterned, a lead frame 2 including a base island 21 and pins 22 is obtained. However, in the present invention, after the frame substrate 5 is patterned, only the lead frame 2 including the pins 22 is left, thereby realizing a QFN packaging structure without a base island 21.

[0069] Then, proceed to step 2, such as Figure 8As shown, an adhesive film 6 is disposed on the first surface 23 of the lead frame 2 .

[0070] Since the base island 21 is removed in the present invention, the chip 1 has no carrier before the plastic packaging layer 4 is set, and it is difficult to align the bottom surface with the lead frame 2. Therefore, the present invention sets an adhesive film 6 to support the chip 1, and uses the viscosity of the adhesive film 6 to preliminarily fix the relative position of the chip 1 in the lead frame 2.

[0071] In one embodiment, the adhesive film 6 is made of polyimide (PI).

[0072] In one embodiment, the adhesive film 6 is made of a high temperature resistant material, and the temperature range of the adhesive film 6 is greater than or equal to 250°C.

[0073] The present invention sets the adhesive film 6 to be a high temperature resistant material to prevent the adhesive film 6 from being affected by high temperature during subsequent wire bonding and its bearing and fixing effect on the chip 1, thereby ensuring the position stability of the chip 1 during the wire bonding process.

[0074] Next, proceed to step 3, such as Fig. 9 As shown, the chip 1 is mounted into the lead frame 2 so that the soldering surface 12 of the chip 1 is bonded to the adhesive film 6 .

[0075] In one embodiment, the adhesive film 6 is a polyimide film pressure-sensitive tape.

[0076] The present invention fixes the chip 1 in the lead frame 2 before setting the plastic sealing layer 4 by using a sticky film 6 with convenient adhesion such as pressure-sensitive tape. Compared with the structures such as the mounting glue and the carrier used in the prior art, which need to be removed by high-temperature heating or chemical corrosion, this type of sticky film 6 can be directly peeled off without other operations, which greatly improves the efficiency of removing the film, reduces the impact of removing the film on the chip 1 and other structures, and improves the performance reliability and production yield of the QFN packaging structure.

[0077] In one embodiment, before the chip 1 is mounted on the lead frame 2 , the back side of the soldering surface 12 of the chip 1 is metallized to obtain a soldering metal layer on the soldering surface 12 .

[0078] Specifically, the welding metal layer is used for subsequent conductive processing of the back electrode of the chip 1 or welding through solder paste when the SMT (Surface-Mount Technology) patch needs to be combined with the pad on the PCB board.

[0079] In one embodiment, the back side of the chip 1 is metallized by sputtering to obtain a welding metal layer.

[0080] Then, proceed to step 4, such as Fig.10 As shown, the active surface 11 of the chip 1 is wire-bonded to the pins 22 on the second surface 24 of the lead frame 2 through the bonding wires 3 .

[0081] In one embodiment, when wire bonding is performed, a pressing plate is provided to vacuum adsorb the adhesive film 6 , and the adsorption and fixing position of the adhesive film 6 by the pressing plate corresponds to the position of the lead frame 2 .

[0082] Specifically, in the QFN packaging structure including the base island 21 in the prior art, when wire bonding is performed, the pressure plate often vacuum adsorbs the lead frame 2 including the base island 21 to achieve relative position fixation of the lead frame 2 during the wire bonding process; however, in the present invention, since the base island 21 is removed, the pressure plate can only vacuum adsorb the pins 22 of the lead frame 2, so it is necessary to design the position distribution of the vacuum adsorption of the lead frame 2 by the pressure plate to ensure the adsorption stability of the lead frame 2 by the pressure plate.

[0083] In one embodiment, the bonding wire 3 is bonded to the pin 22 of the lead frame 2 by a thermosonic device.

[0084] Next, proceed to step 5, such as Fig.11 As shown, the chip 1 and the lead frame 2 are plastic-encapsulated and wire-bonded, so that the obtained plastic encapsulation layer 4 wraps the active surface 11 of the chip 1, the bonding wires 3 and the second surface 24 of the lead frame 2 and the gaps therebetween.

[0085] In one embodiment, the material of the plastic sealing layer 4 is resin. Specifically, the plastic sealing layer 4 may also be made of other suitable materials, which are all within the protection scope of the present invention.

[0086] Finally, proceed to step 6, such as Fig.12 As shown, the adhesive film 6 on the first surface 23 of the lead frame 2 is removed.

[0087] Specifically, the present invention selects the material of the adhesive film 6 so that when removing the adhesive film 6, it does not require a large peeling force or heating, chemical corrosion, etc., and the adhesive film 6 can be removed by just gently peeling it off.

[0088] In one embodiment, after removing the adhesive film 6 , the obtained structure is cut to obtain a QFN packaging structure of a preset size.

[0089] In one embodiment, the resulting structure is cut by a grinder.

[0090] In summary, the QFN packaging structure and the QFN packaging method of the present invention can reduce the total thickness required in the QFN package by removing the base island that carries the chip in the lead frame in the QFN package, which is beneficial to the further miniaturization of the QFN packaging structure; at the same time, by removing the setting of the base island, the welding surface of the chip is exposed, thereby accelerating the transfer of heat from the chip, reducing the thermal resistance in the chip heat dissipation path, and improving the heat dissipation efficiency; in addition, by removing the base island, the chip mounting glue with poor thermal conductivity used to connect the chip and the base island is also removed, thereby further improving the heat dissipation efficiency of the chip; finally, by using a sticky film to fix the chip in the lead frame before setting the plastic sealing layer, the efficiency of removing the film is improved, and the influence of removing the film on the chip and other structures is reduced, thereby improving the performance reliability and production yield of the QFN packaging structure.

[0091] Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

[0092] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A QFN packaging structure, characterized in that: The QFN packaging structure includes: a chip, a lead frame, bonding wires and a plastic packaging layer; The chip includes an active surface and a welding surface relative to each other, and the lead frame includes a first surface and a second surface relative to each other; the welding surface of the chip is flush with the first surface of the lead frame, the lead frame surrounds the chip, and the active surface of the chip forms an effective electrical connection with the pins on the second surface of the lead frame through the bonding wires; the plastic encapsulation layer wraps the active surface of the chip, the bonding wires, the second surface of the lead frame and the gaps therebetween.

2. The QFN package structure according to claim 1, characterized in that: The active surface of the chip is flush with the second surface of the lead frame.

3. The QFN package structure according to claim 1, characterized in that: The minimum distance between the bonding wire and the side of the plastic packaging layer away from the welding surface is greater than 50 microns.

4. A QFN packaging method, characterized in that: The QFN packaging method is used to obtain the QFN packaging structure according to any one of claims 1 to 3, and the QFN packaging method comprises: Providing a frame substrate; patterning the frame substrate to obtain a lead frame including pins but not including a base island, wherein the lead frame includes a first surface and a second surface opposite to each other; Disposing an adhesive film on the first surface of the lead frame; Mounting a chip into the lead frame so that the soldering surface of the chip is bonded to the adhesive film; bonding the active surface of the chip to the pins on the second surface of the lead frame by bonding wires; Plastic encapsulating the wire-bonded chip and the lead frame, so that the obtained plastic encapsulation layer wraps the active surface of the chip, the bonding wires and the second surface of the lead frame and the gaps therebetween; The adhesive film on the first surface of the lead frame is removed.

5. The QFN packaging method according to claim 4, characterized in that: The frame substrate is patterned by chemical etching.

6. The QFN packaging method according to claim 4, characterized in that: Before the chip is mounted on the lead frame, the soldering surface of the chip is back-metallized to obtain a soldering metal layer on the soldering surface.

7. The QFN packaging method according to claim 4, characterized in that: The material of the adhesive film is polyimide.

8. The QFN packaging method according to claim 4, characterized in that: The adhesive film is made of a high temperature resistant material, and the temperature range of the adhesive film is greater than or equal to 250°C.

9. The QFN packaging method according to claim 4, characterized in that: When wire bonding is performed, a pressing plate is arranged to vacuum adsorb the adhesive film, and the adsorption and fixing position of the adhesive film by the pressing plate corresponds to the position of the lead frame.

10. The QFN packaging method according to claim 4, characterized in that: After removing the sticky film, the obtained structure is cut to obtain a QFN packaging structure of a preset size.

Images