Packaging method and device of vertical cavity surface emitting laser

Abstract

The invention discloses a packaging method and device of a vertical cavity surface emitting laser, and belongs to the field of semiconductor laser chip packaging processes. The packaging heat dissipation cover is additionally arranged on the top of the VCSEL chip, the VCSEL chip is surrounded up and down by the packaging heat dissipation cover, the supporting connecting block and the bottom heat sink component, and the heat dissipation mode of the top of the device is adjusted from low-efficiency heat radiation to air to heat conduction through a high-heat-conductivity solid material. Compared with the prior art, the heat conduction capability of a medium near the center of a heat source can be effectively improved, and the blocking effect of a top DBR material on heat is remarkably reduced. In addition, the transverse component of heat flow at the top is further increased by using a chamfering structure in the through hole and a two-dimensional transparent heat conduction material, and the efficiency of the heat of the VCSEL chip flowing to the two sides of the top is improved.

Description

Technical field:

[0001] The invention belongs to a semiconductor laser chip packaging process, and in particular relates to a packaging method and device for a vertical cavity surface emitting laser. Background technology:

[0002] Vertical Cavity Surface Emitting Laser (VCSEL) has many advantages such as small mode volume, good spot quality, low threshold current, and the ability to achieve single longitudinal mode and single transverse mode. It has important applications in many fields, especially in optical communications, optical sensing, and consumer electronics.

[0003] However, the heat dissipation problem of VCSEL has long been a key bottleneck limiting the stable operation of the device. Due to the small size of VCSEL, the power density of the heat source increases, and the thermal resistance of the device increases significantly. In addition, in order to prevent the opaque heat sink from blocking the laser emitted from the top surface of the VCSEL, the common VCSEL is a bottom-mounted package. The heat needs to pass through the DBR, substrate, and metal solder in sequence to reach the heat sink, which increases the distance of the heat dissipation channel. More importantly, the DBR in the VCSEL device not only has extremely low thermal conductivity, but is also distributed exactly on the path where heat flows from the active area to the heat sink. Even if the flip-chip package is used, the DBR will inevitably narrow the area of ​​the heat dissipation channel. VCSEL devices are very sensitive to the mismatch between gain and mode. The increase in heat will affect the cavity mode and gain wavelength at the same time, and in severe cases, it may even cause the VCSEL to fail to work at all. Therefore, compared with EEL, VCSEL is more urgent for a packaging form with efficient heat dissipation. Since the cavity length of the VCSEL chip is short and the side area is much smaller than the surface area of ​​the top, the heat radiation to the air on the upper surface and the heat conduction to the lower surface are the main heat dissipation channels. Moreover, unlike edge-emitting lasers, most of the surface of the heat source can be eutectic welded with the thermally conductive heat sink. The light emitting direction of the VCSEL is consistent with the main heat flow direction. The existing bottom-surface mounting technology always separates the DBR with extremely poor thermal conductivity, making it difficult to achieve effective heat dissipation.

[0004] The existing methods for improving the heat dissipation of VCSEL packaging are mainly the following. 1. Use transition heat sink materials with higher thermal conductivity, such as diamond, silicon carbide, etc. 2. Increase the area of ​​the VCSEL chip, increase the cavity length of the VCSEL, and reduce the thickness of the heat dissipation bottleneck in the VCSEL. 3. Use a flip-chip package with the front side of the VCSEL chip facing down and the laser emitted from one side of the substrate to reduce the heat dissipation distance between the heat source and the heat sink. 4. Use active heat dissipation to bond the back of the VCSEL device to a semiconductor refrigeration device or a microchannel water cooling device to improve the heat dissipation efficiency. The above schemes have achieved certain improvement effects in practical applications, but there are still certain limitations and shortcomings in terms of cost, yield, power consumption, etc. In addition, due to the need for light to be emitted from the top of the laser, the above schemes are all single-sided packaging forms, the heat dissipation bottleneck of the VCSEL has not been completely broken, and the heat dissipation performance of the device still has a lot of room for improvement. Summary of the invention:

[0005] In order to overcome the above difficulties, the present invention proposes a packaging method and device for a vertical cavity surface emitting laser, which can significantly reduce the thermal resistance of the device packaging and improve the optoelectronic performance and thermal stability of the device.

[0006] The technical solution provided by the present invention is as follows:

[0007] A packaging method for a vertical cavity surface emitting laser, characterized in that a packaging heat dissipation cover and a bottom heat sink component are used to surround the upper and lower parts of a VCSEL chip, the packaging heat dissipation cover comprises a support connection block and a heat dissipation bridge structure, wherein the support connection block is a hollow column, the heat dissipation bridge structure is a cover, the heat dissipation bridge structure is arranged on the top of the support connection block and the VCSEL chip, a chamfered through hole is arranged in the central area of ​​the heat dissipation bridge structure, and a plurality of metal buried holes are arranged on the heat dissipation bridge structure, and the specific packaging steps include the following:

[0008] 1) Align the bottom heat sink component with the center of the package socket to bond the die;

[0009] 2) Fix the VCSEL chip and the supporting connection block to the bottom heat sink component through alloy solder;

[0010] 3) placing a heat dissipation bridge structure above the VCSEL chip and the supporting connection block, wherein the DBR of the VCSEL chip is located in the chamfered through hole, the P-type metal electrode of the VCSEL chip is located below the heat dissipation bridge structure, and the heat dissipation bridge structure is fixedly connected to the supporting connection block through an alloy solder layer;

[0011] 4) The buried metal via of the heat dissipation bridge structure is connected to the P-type metal electrode of the VCSEL chip through the alloy solder, the positive electrode terminal is connected to the buried metal via of the heat dissipation bridge structure with a first gold wire, and the negative electrode terminal is connected to the alloy solder on the bottom heat sink component with a second gold wire to form an electrical path.

[0012] Furthermore, a suction nozzle with a sleeve structure is used to place the VCSEL chip in the hollow core of the supporting connection block, wherein the inner surface of the supporting connection block is 60 to 80 um away from the outer side surface of the VCSEL chip, and the internal groove of the suction nozzle is used to strictly align the heat dissipation bridge structure with the supporting connection block.

[0013] Furthermore, a transparent thermally conductive material layer is added above the DBR of the VCSEL chip. The transparent thermally conductive material layer is a two-dimensional material of graphene and boron nitride. The edge of the transparent thermally conductive material layer contacts the side wall of the chamfered through hole.

[0014] Furthermore, the alloy solder layer is composed of a metal layer evaporated on the lower surface of the heat dissipation bridge structure and a metal layer evaporated on the upper surface of the supporting connection block, and the metal layer is Au, In or silver.

[0015] Furthermore, the bottom diameter of the chamfered through hole is 10-20 um larger than the diameter of the DBR on the VCSEL chip.

[0016] Furthermore, the present invention provides a packaging heat dissipation cover for a vertical cavity surface emitting laser, comprising a supporting connection block and a heat dissipation bridge structure, wherein the supporting connection block is a hollow columnar body, the heat dissipation bridge structure is a cover body, the heat dissipation bridge structure is arranged on the top of the supporting connection block, a chamfered through hole is provided in the central area of ​​the heat dissipation bridge structure, and a plurality of metal buried holes are provided on the heat dissipation bridge structure as metal contacts for connecting pin terminals.

[0017] Furthermore, the heat dissipation bridge structure and the supporting connection block materials are insulating thermal conductive materials such as diamond, SiC, and AlN.

[0018] Furthermore, the thickness of the heat dissipation bridge structure is in the range of 50 to 80 um; and the chamfering angle of the chamfered through hole is in the range of 30° to 45°.

[0019] The beneficial effects of the present invention are as follows:

[0020] By adopting the packaging method of the present invention, when the VCSEL chip is working, the heat generated inside is transferred downward through the VCSEL chip DBR, substrate, and heat sink components. On the other hand, the heat generated on the top of the device can be transferred to the bottom heat sink along the heat dissipation bridge-support connection block. Compared with the traditional packaging structure, the upper and lower surrounding packaging structure of the present invention not only effectively breaks through the heat dissipation bottleneck at the top of the device; it also uses the chamfered through-hole structure to bring the heat dissipation medium as close to the center of the heat source as possible without affecting the light output of the device, thereby increasing the effective heat flux density through the heat dissipation bridge. In addition, the addition of a two-dimensional transparent thermal conductive material with a higher lateral thermal conductivity can further increase the flow efficiency of heat from the core area of ​​the device to the heat dissipation bridges at both ends.

[0021] The beneficial effects of the present invention are:

[0022] (1) The design of adding a heat sink fully considers the spatial distribution of chip temperature and effectively increases the utilization efficiency of the transition heat sink. It can achieve better heat dissipation effect with the same chip and heat sink area and reduce the overall packaging cost.

[0023] (2) The present invention has the functions of electrical shielding and supporting protection for the chip, which can effectively reduce the probability of damage to the chip caused by static electricity and external mechanical stress during the process, and improve the packaging yield as well as the stability and reliability of the device operation.

[0024] (3) The present invention is not only compatible with the existing packaging process, but also has strong adaptability and flexibility. The above packaging form can be used for both P-side light-emitting and substrate-light-emitting VCSEL structures.

[0025] (4) Since the distance between the through hole of the heat dissipation bridge structure and the light emitting area of ​​the VCSEL is within the Rayleigh length range, the VCSEL near-field optical parameters can be flexibly modulated by optical lenses or electro-optical and thermo-optical effects. Description of the drawings:

[0026] Figure 1 A schematic diagram of a VCSEL structure according to a specific embodiment of the present invention;

[0027] Figure 2 It is a three-dimensional schematic diagram of a heat dissipation cover according to a specific embodiment of the present invention;

[0028] Figure 3 Schematic diagram of the packaging structure of VCSEL according to a specific embodiment of the present invention;

[0029] Figure 4 It is a three-dimensional schematic diagram of a VCSEL packaging structure according to a specific embodiment of the present invention;

[0030] Figure 5 This is a heat simulation distribution diagram of a VCSEL packaged using the present invention;

[0031] Among them, 1-DBR; 2-transparent thermal conductive material; 3-P-type metal electrode; 4-P+GaN contact layer; 5-P-type GaN layer; 6-AlGaN electron blocking layer; 7-InGaN quantum well; 8-N-type GaN layer; 9-N-type DBR; 10-N-type metal electrode; 11-SiO2 current limiting hole; 12-ITO current spreading layer; 21-through hole of heat dissipation bridge structure; 22-metal buried hole of heat dissipation bridge structure; 23-heat dissipation bridge structure; 24-alloy solder; 25-support connection block; 26-VCSEL chip; 27-first gold wire; 28-second gold wire; 29-bottom heat sink component. Specific implementation method:

[0032] In order to further illustrate the effects of the packaging device and packaging method of the present invention, this embodiment takes a GaN-based VCSEL chip with a lasing wavelength of 460nm as an example. Figure 1 As shown, the doping concentration of the n-GaN electron injection layer in the VCSEL chip structure is 1*10 18 cm -3 The InGaN quantum well active region consists of two pairs of In 0.20 Ga 0.80 N / GaN, the quantum well thickness is 2.5nm, and the quantum barrier thickness is 2.5nm. After the epitaxy is completed, ICP / RIE is first used to etch a cylindrical table with a diameter of 50um to expose the n-GaN conductive layer. Then PECVD is used to deposit a 200nm SiO2 insulating layer on the table, and a circular current injection aperture with an aperture diameter of 12um is etched by RIE. Then a transparent electrode ITO with a thickness of 50nm is deposited. Then p-type and n-type electrodes, Ni / Au and Ti / Al / Ni / Au are deposited on the top of the table and the surface of n-GaN respectively. Then SiO2 / Ta2O5 is deposited on the p-type electrode as the DBR of the VCSEL chip, and the current injection aperture is covered to form a complete VCSEL device. Finally, the wafer is divided into VCSEL chips with a length and width of 100um*100um and a thickness of 80um using a cutting knife and film expansion equipment. At the same time, a 30nm two-dimensional boron nitride transparent thermal conductive material layer is evaporated on the upper surface of the DBR of the VCSEL chip as a heat transfer layer.

[0033] The packaging heat dissipation cover provided by the present invention is as follows: Figure 2As shown, the heat dissipation cover is composed of a heat dissipation bridge structure and a support connection block. The materials of the heat dissipation bridge structure and the support connection block are preferably insulating thermal conductive materials such as diamond, graphite, SiC, AlN, and boron nitride. Take the use of laser cutting to process SiC support connection blocks and SiC heat dissipation bridge structures as an example. The support connection block is a hollow cylinder, wherein the inner diameter of the support connection block is 200*200um, the outer diameter is 400*400um, and the side wall thickness of the support connection block is 80um. The heat dissipation bridge structure is a cover body, and the size of the heat dissipation bridge structure is 400*400um and the thickness is 80um. The support and connection block is a cofferdam structure surrounding the VCSEL chip. The outer boundary of the support and connection block is consistent with the outer boundary of the heat dissipation bridge structure. The heat dissipation bridge structure is arranged on the top of the support and connection block to form a cover. The height of the support and connection block is equal to the height of the VCSEL chip. A chamfered through hole is provided in the central area of ​​the heat dissipation bridge structure. The through hole is prepared by a photoresist thermal reflow method. The bottom diameter of the through hole is 30um and the chamfer size is 45°. At the same time, a plurality of metal buried holes are provided on the heat dissipation bridge structure, which are used as metal contacts for lead connection pin terminals. Preferably, the filling material of the metal buried hole is one of Au, Ag, Al, and Cu.

[0034] like Figure 3 As shown, the package heat dissipation cover and the bottom heat sink component are located above and below the VCSEL chip, wherein the inner surface of the supporting connection block is about 60 to 80 um away from the outer side of the VCSEL chip, the diameter of the chamfered through hole is 10 to 20 um larger than the diameter of the DBR of the VCSEL chip, and the DBR of the VCSEL chip is located in the through hole of the heat dissipation bridge structure as the emission of the top laser, wherein the edge of the transparent thermal conductive material on the DBR of the VCSEL chip contacts the inner wall of the chamfered through hole. The lower surface of the heat dissipation bridge structure is provided with an alloy solder layer, and the heat dissipation bridge structure and the supporting connection block are tightly connected by the alloy solder, the P-type metal electrode of the VCSEL chip is located below the heat dissipation bridge structure, and the metal buried hole of the heat dissipation bridge structure is connected to the P-type metal electrode of the VCSEL chip through the alloy solder.

[0035] The packaging method of the vertical cavity surface emitting laser VCSEL provided by the present invention is as follows: Figure 4 As shown, the core is to use a packaging heat dissipation cover and a bottom heat sink component to surround the VCSEL chip from top to bottom. The specific steps include the following:

[0036] 1) First, suck the package TO56 tube holder to the preheating table and heat the tube holder to 380℃. Then suck the SiC bottom heat sink component and align it with the center of the tube holder to bond the crystal. The bonding time is 10 seconds and the pressure is 200g;

[0037] 2) Place the VCSEL chip with the front side facing up and the supporting connection block on the surface of the alloy solder layer on the SiC bottom heat sink component. The VCSEL chip is located in the hollow core of the supporting connection block. The inner surface of the supporting connection block is 60 to 80 μm away from the outer surface of the VCSEL chip. Raise the temperature of the hot stage to 350°C, press the nozzle downward with a pressure of 50 g, and place it for 10 seconds.

[0038] 3) 10um Au and 4um In metal layers are respectively deposited on the lower surface of the heat dissipation bridge structure and the upper surface of the supporting connection block as alloy solder layers. When waiting to cool to room temperature, the heat dissipation bridge structure is sucked to the preheating table and heated to 350°C, and the heat dissipation bridge structure is fixed to the VCSEL chip and the supporting connection block. The Au and In metals between the heat dissipation bridge structure and the supporting connection block reach a pre-melted state. The heat dissipation bridge structure and the supporting connection block are strictly aligned by using the internal groove of the suction nozzle. The DBR of the VCSEL chip is located in the chamfered through-hole structure, and the P-type metal electrode of the VCSEL chip is located below the heat dissipation bridge structure. The suction nozzle is pressed down with a pressure of 100g and the placement time is 30s. The heat dissipation bridge structure is fixedly connected to the supporting connection block through the alloy solder layer.

[0039] 4) After cooling, the encapsulated heat dissipation cover and the bottom heat sink component surround the VCSEL chip on the top and bottom, the metal buried vias of the heat dissipation bridge structure are connected to the P-type metal electrode of the VCSEL chip through the alloy solder, the positive electrode terminal is connected to the metal buried via of the heat dissipation bridge structure with a first gold wire, and the negative electrode terminal is connected to the alloy solder on the bottom heat sink component with a second gold wire to form an electrical path.

[0040] Figure 5 The temperature distribution diagram of the VCSEL chip after packaging using the present invention. It can be clearly seen that the lateral component of the heat flow in the central area of ​​the VCSEL device has increased significantly, and the heat generated in the active area is discharged outward through the top heat dissipation. The overall thermal resistance of the top is reduced from 1281K / W to 880K / W, and the junction temperature is reduced by more than 6°C. Compared with the prior art, the present invention effectively increases the thermal conductivity of the medium near the center of the heat source by adding a heat dissipation cover structure, and significantly reduces the heat barrier effect of the top DBR material. In addition, the chamfered through-hole structure is used to further increase the lateral component of the top heat flow, thereby maximizing the efficiency of the heat flow of the VCSEL chip to the support columns on both sides of the top.

[0041] Finally, it should be noted that the purpose of publishing the embodiments is to help further understand the present invention, but those skilled in the art can understand that various substitutions and modifications are possible without departing from the spirit and scope of the present invention and the appended claims. Therefore, the present invention should not be limited to the contents disclosed in the embodiments, and the scope of protection claimed by the present invention shall be subject to the scope defined in the claims.

Claims

1. A packaging method for a vertical cavity surface emitting laser, characterized in that: The VCSEL chip is surrounded at the top and bottom by a package heat dissipation cover and a bottom heat sink component. The package heat dissipation cover includes a support connection block and a heat dissipation bridge structure, wherein the support connection block is a hollow column, the heat dissipation bridge structure is a cover, the heat dissipation bridge structure is arranged on the top of the support connection block and the VCSEL chip, a chamfered through hole is arranged in the central area of ​​the heat dissipation bridge structure, and a plurality of metal buried holes are arranged on the heat dissipation bridge structure. The specific packaging steps include the following: 1) Align the bottom heat sink component with the center of the package socket to bond the die; 2) Fix the VCSEL chip and the supporting connection block to the bottom heat sink component through alloy solder; 3) placing a heat dissipation bridge structure above the VCSEL chip and the supporting connection block, wherein the DBR of the VCSEL chip is located in the chamfered through hole, the P-type metal electrode of the VCSEL chip is located below the heat dissipation bridge structure, and the heat dissipation bridge structure is fixedly connected to the supporting connection block through an alloy solder layer; 4) The buried metal via of the heat dissipation bridge structure is connected to the P-type metal electrode of the VCSEL chip through the alloy solder, the positive electrode terminal is connected to the buried metal via of the heat dissipation bridge structure with a first gold wire, and the negative electrode terminal is connected to the alloy solder on the bottom heat sink component with a second gold wire to form an electrical path.

2. The packaging method of a vertical cavity surface emitting laser according to claim 1, characterized in that: The VCSEL chip is placed in the hollow core of the supporting and connecting block by using a suction nozzle with a sleeve structure, wherein the inner surface of the supporting and connecting block is 60 to 80 um away from the outer side surface of the VCSEL chip.

3. The packaging method of a vertical cavity surface emitting laser according to claim 1, characterized in that: A transparent thermal conductive material layer is added above the DBR of the VCSEL chip. The transparent thermal conductive material layer is a two-dimensional material of graphene and boron nitride. The edge of the transparent thermal conductive material layer contacts the side wall of the chamfered through hole.

4. The packaging method of a vertical cavity surface emitting laser according to claim 1, characterized in that: The alloy solder layer is composed of a metal layer evaporated on the lower surface of the heat dissipation bridge structure and a metal layer evaporated on the upper surface of the supporting connection block.

5. The packaging method of a vertical cavity surface emitting laser according to claim 4, characterized in that: The metal layer is Au, In or silver.

6. The packaging method of a vertical cavity surface emitting laser according to claim 1, characterized in that: The bottom diameter of the chamfered through hole is 10-20 um larger than the diameter of the DBR on the VCSEL chip.

7. A packaging heat dissipation cover for a vertical cavity surface emitting laser, characterized in that: It includes a supporting connection block and a heat dissipation bridge structure, wherein the supporting connection block is a hollow columnar body, the heat dissipation bridge structure is a cover body, the heat dissipation bridge structure is arranged on the top of the supporting connection block, a chamfered through hole is arranged in the central area of ​​the heat dissipation bridge structure, and a plurality of metal buried holes are arranged on the heat dissipation bridge structure as metal contacts for connecting pin terminals.

8. The packaging heat dissipation cover of the vertical cavity surface emitting laser according to claim 7, characterized in that: The heat dissipation bridge structure and the supporting connection block materials are all made of diamond, SiC, and AlN insulating thermal conductive materials.

9. The package heat dissipation cover of the vertical cavity surface emitting laser according to claim 7, characterized in that: The thickness of the heat dissipation bridge structure ranges from 50 to 80 um.

10. The package heat dissipation cover of the vertical cavity surface emitting laser according to claim 7, characterized in that: The chamfering range of the chamfered through hole is 30° to 45°.

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