High-voltage substrate selection circuit and charging device

Abstract

The invention provides a high-voltage substrate selection circuit and a charging device, the high-voltage substrate selection circuit comprises a charging power tube, a charging judgment circuit and a substrate voltage switching circuit, the charging judgment circuit judges the charging state of the circuit according to the voltage states of VCC voltage and VBAT voltage, and the substrate voltage switching circuit switches the charging power tube to the VCC voltage. When the charging state of the circuit is that VCC voltage is not accessed or the VCC voltage is lower than VBAT voltage, an enable signal output by the charging judgment circuit is a low-level signal, so that charging power tube substrate voltage bulk voltage is equal to the VBAT voltage, a first switching circuit output end of the substrate voltage switching circuit outputs first voltage, the first voltage is the VBAT voltage, and a second switching circuit output end of the substrate voltage switching circuit outputs second voltage. Therefore, voltage switching is completed, the charging function is closed, the substrate voltage switching circuit outputs VBAT voltage, the normal discharging requirement when the circuit charging state is that VCC voltage is not connected or the VCC voltage is lower than the VBAT voltage is met, and the condition of voltage backward flowing is avoided.

Description

Technical Field

[0001] The present invention relates to the technical field of power management chips, and in particular to a high-voltage substrate selection circuit and a charging device. Background Art

[0002] The power management chip generally has two voltage sources, namely the charging power supply and the battery power supply. The charging power supply provides the VCC voltage and the battery provides the VBAT voltage. When the charging device is lower than the battery voltage VBAT or is not connected, the power management chip is still in a normal discharge working state, but there may be a situation where the battery voltage is reversed. Therefore, it is necessary to switch the charging power tube substrate voltage in time and turn off the charging module.

[0003] Existing substrate switching circuits, such as Figure 1 As shown, it is composed of two diodes, the VCC input terminal and the VBAT input terminal are respectively connected to the positive ends of the two diodes, and the negative ends of the two diodes are connected together to form the output terminal, which outputs the substrate voltage.

[0004] However, this structural defect is also quite obvious, because the substrate voltage is always lower than the highest voltage by a PN junction threshold voltage Vth. When the VCC voltage and the VBAT voltage are close, the voltage difference is easy to be lower than the PN junction threshold voltage Vth, and the substrate switching circuit cannot complete the voltage switching function, and even cause a latch effect. Summary of the invention

[0005] In view of the deficiencies in the prior art, the present invention provides a high-voltage substrate selection circuit and a charging device, which solves the problem that the circuit structure of the substrate switching circuit in the prior art cannot complete the voltage switching function when the voltage provided by the charging power source is close to that provided by the battery, and may even cause a latch effect.

[0006] According to an embodiment of the present invention, there is provided a high voltage substrate selection circuit, comprising:

[0007] A charging power tube, wherein a source of the charging power tube is connected to a VBAT voltage, a drain of the charging power tube is connected to a VCC voltage, a gate of the charging power tube is connected to an enable signal, and a substrate of the charging power tube is connected to a substrate voltage;

[0008] A charging judgment circuit, the charging judgment circuit comprising a first judgment circuit input terminal connected to the VBAT voltage, a second judgment circuit input terminal connected to the VCC voltage, a third judgment circuit input terminal and a fourth judgment circuit input terminal connected to an external power supply, and the charging judgment circuit outputs the enable signal;

[0009] A substrate voltage switching circuit, the substrate voltage switching circuit comprising a first switching circuit input terminal connected to an enable signal, a second switching circuit input terminal connected to a substrate voltage, and a first switching circuit output terminal outputting a first voltage;

[0010] The charging judgment circuit judges the charging state of the circuit through the VCC voltage and the VBAT voltage, and when the charging state of the circuit is that the VCC voltage is not connected or the VCC voltage is lower than the VBAT voltage, the enable signal output by the charging judgment circuit is a low-level signal, so that the substrate voltage connected to the substrate of the charging power tube is equal to the VBAT voltage, and the first switching circuit output end of the substrate voltage switching circuit outputs a first voltage, which is the VBAT voltage.

[0011] Optionally, the substrate voltage switching circuit further comprises a second switching circuit output terminal outputting a second voltage;

[0012] When the circuit charging state is a normal charging state, the enable signal output by the charging judgment circuit is a high-level signal, the substrate voltage connected to the substrate of the charging power tube is equal to the VCC voltage, and the second switching circuit output end of the substrate voltage switching circuit outputs a second voltage, and the second voltage is the VCC voltage.

[0013] Optionally, in the charging judgment circuit, the sixth PMOS tube and the seventh PMOS tube form a high-voltage P-type diode using the N-well of the high-voltage PMOS tube.

[0014] Optionally, the charging judgment circuit includes: a first NMOS tube, a second NMOS tube, a third NMOS tube, a fourth NMOS tube, a fifth NMOS tube, a sixth NMOS tube, a seventh NMOS tube, an eighth NMOS tube, a second PMOS tube, a third PMOS tube, a fourth PMOS tube, a fifth PMOS tube, a sixth PMOS tube, a seventh PMOS tube, a first resistor, a second resistor, a driver and a Schmitt trigger;

[0015] The source of the first NMOS tube is grounded, the drain of the first NMOS tube is connected to current, the gate of the first NMOS tube is connected to the gate of the second NMOS tube, the source of the second NMOS tube is grounded, the drain of the second NMOS tube is connected to the source of the third NMOS tube, the drain of the third NMOS tube is connected to the source of the sixth PMOS tube, and the gate of the third NMOS tube is connected to an external power supply;

[0016] The drain of the sixth PMOS tube is connected to the drain of the second PMOS tube, the drain of the second PMOS tube is connected to the gate of the second PMOS tube, the gate of the second PMOS tube is also connected to the gate of the third PMOS tube, the source of the second PMOS tube and the source of the third PMOS are connected to one end of the first resistor, the other end of the first resistor is connected to the VBAT voltage, and the drain of the third PMOS tube is connected to the drain of the eighth NMOS tube;

[0017] The gate of the sixth PMOS tube is connected to the gate of the seventh PMOS tube, the source of the sixth PMOS tube is also connected to the source of the seventh PMOS tube, and the gate of the sixth PMOS tube and the gate of the seventh PMOS tube are also connected to the source of the sixth PMOS tube and the source of the seventh PMOS tube;

[0018] The drain of the seventh PMOS tube is connected to the drain of the fourth PMOS tube, the gate of the fourth PMOS tube is connected to the drain, the gate of the fourth PMOS tube is also connected to the gate of the fifth PMOS tube, the source of the fourth PMOS tube and the source of the fifth PMOS tube are connected to one end of the second resistor, and the other end of the second resistor is connected to the VCC voltage;

[0019] The drain of the fifth PMOS tube is connected to the drain of the fourth NMOS tube, the gate of the fourth NMOS tube is connected to an external power supply, the source of the fourth NMOS tube is connected to the drain of the fifth NMOS tube, the gate of the sixth NMOS tube, the gate of the seventh NMOS tube and the gate of the eighth NMOS tube, the source of the fifth NMOS tube is connected to the drain of the sixth NMOS tube, the source of the sixth NMOS tube is grounded, the gate of the fifth NMOS tube is connected to one end of the driver, and the other end of the driver is connected to the input end of the Schmitt trigger; the source of the fourth NMOS tube is also connected to the drain of the seventh NMOS tube, the source of the seventh NMOS tube is grounded, the gate of the seventh NMOS tube is connected to the gate of the eighth NMOS tube, the source of the eighth NMOS tube is grounded, and the drain of the eighth NMOS tube and the drain of the third PMOS tube are connected to the input end of the Schmitt trigger.

[0020] Optionally, the charging judgment circuit further includes a first current source, which is connected to the drain of the first NMOS tube to provide current.

[0021] Optionally, the third NMOS tube, the fourth NMOS tube, the second PMOS tube, the third PMOS tube, the fourth PMOS tube, the fifth PMOS tube, the sixth PMOS tube, and the seventh PMOS tube are 40V high-voltage tubes, and the first NMOS tube, the second NMOS tube, the fifth NMOS tube, the sixth NMOS tube, the seventh NMOS tube, and the eighth NMOS tube are 5V low-voltage tubes.

[0022] Optionally, the substrate voltage switching circuit includes: a ninth NMOS transistor, a tenth NMOS transistor, an eleventh NMOS transistor, an eighth PMOS transistor, a ninth PMOS transistor, a tenth PMOS transistor, a third resistor and a fourth resistor;

[0023] The drain of the eleventh NMOS tube is connected to the current, the source of the eleventh NMOS tube is grounded, the gate and drain of the eleventh NMOS tube are connected, the gate of the eleventh NMOS tube is connected to the gate of the tenth NMOS tube, the source of the tenth NMOS tube is grounded, the drain of the tenth NMOS tube is connected to the source of the ninth NMOS tube, the substrate of the ninth NMOS tube is grounded, the gate of the ninth NMOS tube is connected to the access enable signal, the drain of the ninth NMOS tube is connected to the gate of the tenth PMOS tube and one end of the third resistor, the other end of the third resistor is connected to the source of the tenth PMOS tube and the source of the ninth PMOS tube, the drain of the tenth PMOS tube is connected to the gate of the ninth PMOS tube and one end of the fourth resistor, the other end of the fourth resistor is grounded, and the drain of the ninth PMOS tube is connected to the VBAT voltage;

[0024] The source of the ninth PMOS tube and the source of the eighth PMOS tube are also connected to the BLUK voltage, the drain of the eighth PMOS tube is connected to the VCC voltage, and the potential of the gate of the eighth PMOS tube is the same as the potential of the gate of the tenth PMOS tube.

[0025] Optionally, the substrate voltage switching circuit further includes a second current source, which is connected to the drain of the eleventh NMOS tube to provide current.

[0026] The current of the MN11 is provided by a second current source.

[0027] Optionally, the ninth NMOS tube, the eighth PMOS tube, the ninth PMOS tube, and the tenth PMOS tube are 40V high-voltage tubes, and the tenth NMOS tube, the eleventh NMOS tube, the twelfth NMOS tube, and the thirteenth NMOS tube are 5V low-voltage tubes.

[0028] On the other hand, according to an embodiment of the present invention, there is also provided a charging device, comprising: a charger housing and a power management chip disposed in the charger housing;

[0029] The power management chip includes a charging power supply, a battery power supply and the high-voltage substrate selection circuit as described above, the charging power supply outputs a VCC voltage, and the battery power supply outputs a VBAT voltage.

[0030] The technical principle of the present invention is: the charging judgment circuit judges the charging state of the circuit through the voltage states of the VCC voltage and the VBAT voltage, and when the circuit charging state indicates that the VCC voltage is not connected or the VCC voltage is lower than the battery voltage VBAT, the enable signal output by the charging judgment circuit is a low-level signal, so that the substrate voltage connected to the substrate of the charging power tube is equal to the VBAT voltage, and the first switching circuit output end of the substrate voltage switching circuit outputs the first voltage, and the first voltage is the VBAT voltage, thereby completing the voltage switching and turning off the charging function, and the substrate voltage switching circuit outputs the VBAT voltage, realizing the normal discharge requirement when the circuit charging state is that the VCC voltage is not connected or the VCC voltage is lower than the VBAT voltage, and avoiding the situation of voltage backflow.

[0031] Compared with the prior art, the present invention has the following beneficial effects: by adding a charging judgment circuit, an enable signal for charging judgment is generated, and the substrate voltage switching circuit makes the substrate voltage equal to the maximum value of the VCC voltage and the VBAT voltage according to the enable signal, thereby avoiding the problem that the substrate voltage cannot be switched normally when the VCC voltage is close to the VBAT voltage. In addition, the charging judgment circuit increases the hysteresis of the substrate voltage switching circuit, thereby avoiding the phenomenon that the substrate voltage is repeatedly switched when a small peak appears in the VCC voltage when the VCC voltage is close to the VBAT voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is a structural schematic diagram of an existing substrate switching circuit;

[0033] Figure 2 A schematic diagram of the structure of a high voltage substrate selection circuit according to an embodiment of the present invention;

[0034] Figure 3 Schematic diagram of the circuit structure of a high voltage substrate selection circuit according to an embodiment of the present invention. DETAILED DESCRIPTION

[0035] The technical solution of the present invention is further described below in conjunction with the accompanying drawings and embodiments.

[0036] like Figure 2 As shown, the embodiment of the present invention proposes a high-voltage substrate selection circuit, including a charging power tube 1, a charging judgment circuit 2 and a substrate voltage switching circuit 3. The embodiment of the present invention describes the connection relationship of the above-mentioned parts:

[0037] Among them, the charging power tube is a PMOS tube. Figure 2 The first PMOS tube MP1 is shown in the figure, the charging power tube 1, that is, the source of the PMOS tube MP1 is connected to the VBAT voltage, the drain is connected to the VCC voltage, the gate is connected to the enable signal ch_en, and the substrate of the charging power tube 1 is connected to the substrate voltage, that is, the bulk voltage. The charging judgment circuit 2 includes a first judgment circuit input terminal 21 connected to the VBAT voltage, a second judgment circuit input terminal 22 connected to the VCC voltage, a second judgment circuit input terminal 23 connected to the external power supply, and a fourth judgment circuit input terminal 24, and the charging judgment circuit 2 outputs the enable signal ch_en. The substrate voltage switching circuit 3 includes a first switching circuit input terminal 31 connected to the enable signal ch_en, a second switching circuit input terminal 32 connected to the bulk voltage, and a first switching circuit output terminal 33 outputting the first voltage.

[0038] It should be noted that the high-voltage substrate selection circuit provided in the embodiment of the present invention is applied to a power management chip, the VCC voltage is provided by the charging power supply of the power management chip, and the VBAT voltage is provided by the battery power supply of the power management chip.

[0039] Therefore, the output of the charging judgment circuit 2 is connected to the gate of the charging power tube 1 and the first switching circuit input terminal 31 of the substrate voltage switching circuit 3, and the output of the charging power tube 1 is connected to the second switching circuit input terminal 32 of the substrate voltage switching circuit 3.

[0040] The detailed working process of the embodiment of the present invention is as follows:

[0041] The charging judgment circuit 2 judges the charging state of the circuit through the VCC voltage and the VBAT voltage, and when the charging state of the circuit is that the VCC voltage is not connected or the VCC voltage is lower than the VBAT voltage, the enable signal ch_en output by the charging judgment circuit 2 is a low-level signal, so that the substrate voltage output by the charging power tube 1, that is, the bulk voltage, is equal to the VBAT voltage, and the first switching circuit output terminal 33 of the substrate voltage switching circuit 3 outputs a first voltage, which is the VBAT voltage, thereby completing the voltage switching and turning off the charging function. The substrate voltage switching circuit 3 outputs the VBAT voltage, which realizes the normal discharge requirement when the circuit charging state is that the VCC voltage is not connected or the VCC voltage is lower than the VBAT voltage, avoiding the situation of voltage backflow and affecting the charging power supply.

[0042] Since the charging judgment circuit 2 is added, the charging judgment circuit 2 generates an enable signal ch_en for charging judgment. The substrate voltage switching circuit 3 makes the substrate voltage, i.e., the bulk voltage, equal to the maximum value of the VCC and VBAT voltages according to the enable signal ch_en, so as to avoid the phenomenon that the bulk voltage switches repeatedly when a small peak appears in VCC when the VCC voltage is close to the VBAT voltage.

[0043] like Figure 2 As shown, in one embodiment, the substrate voltage switching circuit 3 also includes a second switching circuit output terminal 34 that outputs a second voltage; when the circuit charging state is a normal charging state, the enable signal ch_en output by the charging judgment circuit 2 is a high-level signal, the bulk voltage output by the charging power tube 1 is equal to the VCC voltage, and the second switching circuit output terminal 34 of the substrate voltage switching circuit 3 outputs a second voltage, and the second voltage is the VCC voltage. In the above process, the substrate voltage switching circuit 3 completes the voltage switching and starts the charging function, and finally the charging power supply outputs the charging voltage required by the load, that is, the VCC voltage.

[0044] It should be noted that when the circuit charging state is that the VCC voltage is not connected or the VCC voltage is lower than the VBAT voltage, it refers to the internal circuit state of a device including a power management chip, such as a charging device, in which no external power supply is connected or the external power supply connected is lower than the battery voltage VBAT. At this time, the charging device needs to be in a normal discharge working state; the circuit charging state is a normal charging state, which means that the charging device can output the charging voltage required by the load.

[0045] like Figure 3As shown, an embodiment of the present invention provides a detailed circuit structure of a charging judgment circuit 2, wherein the charging judgment circuit 2 includes: a first NMOS tube MN1, a second NMOS tube MN2, a third NMOS tube MN3, a fourth NMOS tube MN4, a fifth NMOS tube MN5, a sixth NMOS tube MN6, a seventh NMOS tube MN7, an eighth NMOS tube MN8, a second PMOS tube MP2, a third PMOS tube MP3, a fourth PMOS tube MP4, a fifth PMOS tube MP5, a sixth PMOS tube MP6, a seventh PMOS tube MP7, a first resistor R1, and a second resistor R2. , driver buffer and Schmitt trigger SMT; the source of the first NMOS tube MN1 is grounded, the drain of the first NMOS tube MN1 is connected to the current, the gate of the first NMOS tube MN1 is connected to the gate of the second NMOS tube MN2, the source of the second NMOS tube MN2 is grounded, the drain of the second NMOS tube MN2 is connected to the source of the third NMOS tube MN3, the drain of the third NMOS tube MN3 is connected to the source of the sixth PMOS tube MP6, and the gate of the third NMOS tube MN3 is connected to the external power supply VDDA; the drain of the sixth PMOS tube MP6 is connected to the second PMOS tube MP2 The drain of the second PMOS tube MP2 is connected to the gate of the second PMOS tube MP2, and the gate of the second PMOS tube MP2 is also connected to the gate of the third PMOS tube MP3. The source of the second PMOS tube MP2 and the source of the third PMOS tube MP3 are connected to one end of the first resistor R1, and the other end of the first resistor R1 is connected to the VBAT voltage. The drain of the third PMOS tube MP3 is connected to the drain of the eighth NMOS tube MN8; the gate of the sixth PMOS tube MP6 is connected to the gate of the seventh PMOS tube MP7, and the source of the sixth PMOS tube MP6 is also connected to the gate of the seventh PMOS tube MP7. The gate of the sixth PMOS tube MP6 and the gate of the seventh PMOS tube MP7 are also connected to the source of the sixth PMOS tube MP6 and the source of the seventh PMOS tube MP7; the drain of the seventh PMOS tube MP7 is connected to the drain of the fourth PMOS tube MP4, the gate of the fourth PMOS tube MP4 is connected to the drain, the gate of the fourth PMOS tube MP4 is also connected to the gate of the fifth PMOS tube MP5, the source of the fourth PMOS tube MP4 and the source of the fifth PMOS tube MP5 are connected to one end of the second resistor R2, and the other end of the second resistor R2 is connected to the VCC voltage;The drain of the fifth PMOS tube MP5 is connected to the drain of the fourth NMOS tube MN4, the gate of the fourth NMOS tube MN4 is connected to the external power supply VDDA, the source of the fourth NMOS tube MN4 is connected to the drain of the fifth NMOS tube MN5, the gate of the sixth NMOS tube MN6, the gate of the seventh NMOS tube MN7 and the gate of the eighth NMOS tube MN8, the source of the fifth NMOS tube MN5 is connected to the drain of the sixth NMOS tube MN6, the source of the sixth NMOS tube MN6 is grounded, the gate of the fifth NMOS tube MN5 is connected to one end of the driver buffer, and the other end of the driver buffer is connected to the input end of the Schmitt trigger SMT; the source of the fourth NMOS tube MN4 is also connected to the drain of the seventh NMOS tube MN7, the source of the seventh NMOS tube MN7 is grounded, the gate of the seventh NMOS tube MN7 is connected to the gate of the eighth NMOS tube MN8, the source of the eighth NMOS tube MN8 is grounded, and the drain of the eighth NMOS tube MN8 and the drain of the third PMOS tube MP3 are connected to the input end of the Schmitt trigger SMT. ;

[0046] In a better implementation, in the above-mentioned charging judgment circuit 2, the sixth PMOS tube MP6 and the seventh PMOS tube MP7 use the N well of the high-voltage PMOS tube to form a parasitic high-voltage P-type diode, thereby obtaining a high-voltage resistant diode. Through the above-mentioned circuit, on the one hand, the charging power supply can be a wide range of voltage input, that is, the VCC voltage is a wide range of voltage input; on the other hand, it can avoid the formation of a path between VCC and VBAT when VBAT is reversely connected for charging, which burns the chip. In a specific application, if there is no such diode, in the charging judgment circuit 2, the potentials of the N1 and N2 nodes are equal. When VBAT is reversely connected, the moment VCC is powered on, the parasitic diode between the MP2 N well and the drain is turned on, and a path is formed between VCC and VBAT, which burns the chip.

[0047] In one embodiment, the charging judgment circuit 2 further includes a first current source idc1 connected to the drain of the first NMOS transistor MN1 to provide current, and realize current mirroring with the second current source idc2 providing current in the substrate voltage switching circuit 3 described below.

[0048] In a better implementation, the third NMOS tube MN3, the fourth NMOS tube MN4, the second PMOS tube MP2, the third PMOS tube MP3, the fourth PMOS tube MP4, the fifth PMOS tube MP5, the sixth PMOS tube MP6, and the seventh PMOS tube MP7 are 40V high-voltage tubes, and the first NMOS tube MN1, the second NMOS tube MN2, the fifth NMOS tube MN5, the sixth NMOS tube MN6, the seventh NMOS tube MN7, and the eighth NMOS tube MN8 are 5V low-voltage tubes. Therefore, the embodiment of the present invention adds two normally open high-voltage tubes MN3 and MN4 to isolate the high voltage from the VCC terminal, so that the first NMOS tube MN1, the second NMOS tube MN2, the fifth NMOS tube MN5, the sixth NMOS tube MN6, the seventh NMOS tube MN7, and the eighth NMOS tube MN8 are designed as low-voltage tubes to save layout area.

[0049] It should be noted that in the embodiment of the present invention, the limited environment of high voltage and low voltage is the common BCD process, and the high voltage device is above 7V and below 40V, and the low voltage device is below 5V.

[0050] According to the above-mentioned charging judgment circuit 2, the fifth NMOS tube MN5, the sixth NMOS tube MN6 and the driver buffer constitute a charging judgment enable ch_en feedback loop, and the ch_en flip voltage hysteresis size is changed by setting the device size of the sixth NMOS tube MN6 and the seventh NMOS tube MN7, especially the W / L size ratio. Therefore, by setting a certain hysteresis voltage, it can be avoided that when the VCC voltage is close to the VBAT voltage, if a small peak appears in VCC, the bulk voltage will switch repeatedly.

[0051] like Figure 3As shown, the embodiment of the present invention provides a detailed circuit structure of a substrate voltage switching circuit 3, wherein the substrate voltage switching circuit 3 includes a ninth NMOS tube MN9, a tenth NMOS tube MN10, an eleventh NMOS tube MN11, an eighth PMOS tube MP8, a ninth PMOS tube MP9, a tenth PMOS tube MP10, a third resistor R3 and a fourth resistor R4; the drain of the eleventh NMOS tube MN11 is connected to the current, the source of the eleventh NMOS tube MN11 is grounded, the gate and drain of the eleventh NMOS tube MN11 are connected, the gate of the eleventh NMOS tube MN11 is connected to the gate of the tenth NMOS tube MN10, the source of the tenth NMOS tube MN10 is grounded, the drain of the tenth NMOS tube MN10 is connected to the source of the ninth NMOS tube MN9, and the substrate of the ninth NMOS tube MN9 is grounded. , the gate of the ninth NMOS tube MN9 is connected to the access enable signal ch_en, the drain of the ninth NMOS tube MN9 is connected to the gate of the tenth PMOS tube MP10 and one end of the third resistor R3, the other end of the third resistor R3 is connected to the source of the tenth PMOS tube MP10 and the source of the ninth PMOS tube MP9, the drain of the tenth PMOS tube MP10 is connected to the gate of the ninth PMOS tube MP9 and one end of the fourth resistor R4, the other end of the fourth resistor R4 is grounded, and the drain of the ninth PMOS tube MP9 is connected to the VBAT voltage; the source of the ninth PMOS tube MP9 and the source of the eighth PMOS tube MP8 are also connected to the BLUK voltage, the drain of the eighth PMOS tube MP8 is connected to the VCC voltage, and the potential of the gate of the eighth PMOS tube MP8 is the same as the potential of the gate of the tenth PMOS tube MP10.

[0052] In one embodiment, the substrate voltage switching circuit 3 further includes a second current source idc2, which is connected to the drain of the eleventh NMOS transistor MN11 to provide current, and realizes current mirroring with the first current source idc1 providing current in the above-mentioned charging judgment circuit 2, thereby avoiding the existence of a large current path between VCC, VBAT, bulk and ground when the third NMOS transistor MN3 and the ninth NMOS transistor MN9 are turned on.

[0053] In a preferred implementation, the ninth NMOS tube MN9, the eighth PMOS tube MP8, the ninth PMOS tube MP9, and the tenth PMOS tube MP10 are 40V high-voltage tubes, and the tenth NMOS tube MN10, the eleventh NMOS tube MN11, the twelfth NMOS tube, and the thirteenth NMOS tube MN13 are 5V low-voltage tubes.

[0054] based on Figure 3The embodiment of the present invention also describes the working principles of the charging judgment circuit 2 and the substrate voltage switching circuit 3 under two circuit charging states, namely, when the VCC voltage is not connected or the VCC voltage is lower than the VBAT voltage and in the normal charging state.

[0055] according to Figure 3 When the circuit charging state is normal charging, the VCC voltage is greater than the VBAT voltage, and the current flowing through MP6 is less than the current flowing through MP7. Therefore, MN8 is turned on and the voltage of the N5 node is pulled down to a low level. After passing through the Schmitt trigger SMT, the enable signal ch_en is at a high level, the ninth NMOS tube MN9 is turned on, and the gate potential of the tenth NMOS tube MN10, that is, the enn node is at a low level. Therefore, the first PMOS tube, the eighth PMOS tube MP8 and the tenth PMOS tube MP10 are turned on, and the bulk voltage is equal to the VCC voltage. Based on the N6 node of the drain of the tenth PMOS tube, the voltage is equal to the VCC voltage, so the ninth PMOS tube MP9 is turned off, thereby completing the voltage switching and starting the charging function.

[0056] When the circuit charging state is that the VCC voltage is not connected or the VCC voltage is lower than the VBAT voltage, since the VCC voltage is lower than the VBAT voltage, the current flowing through MP6 is greater than the current flowing through MP7, so MP3 is turned on and the voltage of the N5 node is pulled up to a high level. At the same time, after the N5 node passes through the Schmitt trigger SMT, the enable signal ch_en is at a low level, and at this time the N3 node is at a low level, the ninth PMOS tube MP9 is turned on, and the bulk voltage is equal to the VBAT voltage, and the gate potential of the eighth PMOS tube MP8, that is, the enn node is at a high level, so the eighth PMOS tube MP8 and the tenth PMOS tube MP10 are turned off, and the charging power supply does not charge the battery, and the ninth PMOS tube MP9 outputs the VBAT voltage, thereby completing the voltage switching and turning off the charging function, and finally the battery power supply outputs the VBAT voltage, realizing the normal discharge requirement when the circuit charging state is that the VCC voltage is not connected or the VCC voltage is lower than the VBAT voltage, avoiding the situation of voltage backflow and affecting the charging power supply.

[0057] Another embodiment of the present invention provides a charging device, comprising: a charger housing and a power management chip placed in the charger housing; the power management chip includes a charging power supply, a battery power supply and a high-voltage substrate selection circuit as in the above embodiment, the charging power supply outputs a VCC voltage, and the battery power supply outputs a VBAT voltage.

[0058] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solution of the present invention, which should be included in the scope of the claims of the present invention.

Claims

1. A high voltage substrate selection circuit, characterized in that: include: A charging power tube, wherein a source of the charging power tube is connected to a VBAT voltage, a drain of the charging power tube is connected to a VCC voltage, a gate of the charging power tube is connected to an enable signal, and a substrate of the charging power tube is connected to a substrate voltage; A charging judgment circuit, the charging judgment circuit comprising a first judgment circuit input terminal connected to the VBAT voltage, a second judgment circuit input terminal connected to the VCC voltage, a third judgment circuit input terminal and a fourth judgment circuit input terminal connected to an external power supply, and the charging judgment circuit outputs the enable signal; A substrate voltage switching circuit, the substrate voltage switching circuit comprising a first switching circuit input terminal connected to an enable signal, a second switching circuit input terminal connected to a substrate voltage, and a first switching circuit output terminal outputting a first voltage; The charging judgment circuit judges the charging state of the circuit through the VCC voltage and the VBAT voltage, and when the charging state of the circuit is that the VCC voltage is not connected or the VCC voltage is lower than the VBAT voltage, the enable signal output by the charging judgment circuit is a low-level signal, so that the substrate voltage connected to the substrate of the charging power tube is equal to the VBAT voltage, and the first switching circuit output end of the substrate voltage switching circuit outputs a first voltage, which is the VBAT voltage.

2. The high voltage substrate selection circuit according to claim 1, characterized in that: The substrate voltage switching circuit further comprises a second switching circuit output terminal that outputs a second voltage; When the circuit charging state is a normal charging state, the enable signal output by the charging judgment circuit is a high-level signal, the substrate voltage connected to the substrate of the charging power tube is equal to the VCC voltage, and the second switching circuit output end of the substrate voltage switching circuit outputs a second voltage, and the second voltage is the VCC voltage.

3. The high voltage substrate selection circuit according to claim 1, characterized in that: In the charging judgment circuit, the sixth PMOS tube and the seventh PMOS tube form a high-voltage P-type diode using the N-well of the high-voltage PMOS tube.

4. The high voltage substrate selection circuit according to claim 3, characterized in that: The charging judgment circuit includes: a first NMOS tube, a second NMOS tube, a third NMOS tube, a fourth NMOS tube, a fifth NMOS tube, a sixth NMOS tube, a seventh NMOS tube, an eighth NMOS tube, a second PMOS tube, a third PMOS tube, a fourth PMOS tube, a fifth PMOS tube, a sixth PMOS tube, a seventh PMOS tube, a first resistor, a second resistor, a driver and a Schmitt trigger; The source of the first NMOS tube is grounded, the drain of the first NMOS tube is connected to current, the gate of the first NMOS tube is connected to the gate of the second NMOS tube, the source of the second NMOS tube is grounded, the drain of the second NMOS tube is connected to the source of the third NMOS tube, the drain of the third NMOS tube is connected to the source of the sixth PMOS tube, and the gate of the third NMOS tube is connected to an external power supply; The drain of the sixth PMOS tube is connected to the drain of the second PMOS tube, the drain of the second PMOS tube is connected to the gate of the second PMOS tube, the gate of the second PMOS tube is also connected to the gate of the third PMOS tube, the source of the second PMOS tube and the source of the third PMOS are connected to one end of the first resistor, the other end of the first resistor is connected to the VBAT voltage, and the drain of the third PMOS tube is connected to the drain of the eighth NMOS tube; The gate of the sixth PMOS tube is connected to the gate of the seventh PMOS tube, the source of the sixth PMOS tube is also connected to the source of the seventh PMOS tube, and the gate of the sixth PMOS tube and the gate of the seventh PMOS tube are also connected to the source of the sixth PMOS tube and the source of the seventh PMOS tube; The drain of the seventh PMOS tube is connected to the drain of the fourth PMOS tube, the gate of the fourth PMOS tube is connected to the drain, the gate of the fourth PMOS tube is also connected to the gate of the fifth PMOS tube, the source of the fourth PMOS tube and the source of the fifth PMOS tube are connected to one end of the second resistor, and the other end of the second resistor is connected to the VCC voltage; The drain of the fifth PMOS tube is connected to the drain of the fourth NMOS tube, the gate of the fourth NMOS tube is connected to an external power supply, the source of the fourth NMOS tube is connected to the drain of the fifth NMOS tube, the gate of the sixth NMOS tube, the gate of the seventh NMOS tube and the gate of the eighth NMOS tube, the source of the fifth NMOS tube is connected to the drain of the sixth NMOS tube, the source of the sixth NMOS tube is grounded, the gate of the fifth NMOS tube is connected to one end of the driver, and the other end of the driver is connected to the input end of the Schmitt trigger; the source of the fourth NMOS tube is also connected to the drain of the seventh NMOS tube, the source of the seventh NMOS tube is grounded, the gate of the seventh NMOS tube is connected to the gate of the eighth NMOS tube, the source of the eighth NMOS tube is grounded, and the drain of the eighth NMOS tube and the drain of the third PMOS tube are connected to the input end of the Schmitt trigger.

5. The high voltage substrate selection circuit according to claim 4, characterized in that: The charging judgment circuit also includes a first current source, which is connected to the drain of the first NMOS tube to provide current.

6. The high voltage substrate selection circuit according to claim 4, characterized in that: The third NMOS tube, the fourth NMOS tube, the second PMOS tube, the third PMOS tube, the fourth PMOS tube, the fifth PMOS tube, the sixth PMOS tube, and the seventh PMOS tube are 40V high-voltage tubes, and the first NMOS tube, the second NMOS tube, the fifth NMOS tube, the sixth NMOS tube, the seventh NMOS tube, and the eighth NMOS tube are 5V low-voltage tubes.

7. The high voltage substrate selection circuit according to claim 1, characterized in that: The substrate voltage switching circuit includes: a ninth NMOS transistor, a tenth NMOS transistor, an eleventh NMOS transistor, an eighth PMOS transistor, a ninth PMOS transistor, a tenth PMOS transistor, a third resistor and a fourth resistor; The drain of the eleventh NMOS tube is connected to the current, the source of the eleventh NMOS tube is grounded, the gate and drain of the eleventh NMOS tube are connected, the gate of the eleventh NMOS tube is connected to the gate of the tenth NMOS tube, the source of the tenth NMOS tube is grounded, the drain of the tenth NMOS tube is connected to the source of the ninth NMOS tube, the substrate of the ninth NMOS tube is grounded, the gate of the ninth NMOS tube is connected to the access enable signal, the drain of the ninth NMOS tube is connected to the gate of the tenth PMOS tube and one end of the third resistor, the other end of the third resistor is connected to the source of the tenth PMOS tube and the source of the ninth PMOS tube, the drain of the tenth PMOS tube is connected to the gate of the ninth PMOS tube and one end of the fourth resistor, the other end of the fourth resistor is grounded, and the drain of the ninth PMOS tube is connected to the VBAT voltage; The source of the ninth PMOS tube and the source of the eighth PMOS tube are also connected to the BLUK voltage, the drain of the eighth PMOS tube is connected to the VCC voltage, and the potential of the gate of the eighth PMOS tube is the same as the potential of the gate of the tenth PMOS tube.

8. The high voltage substrate selection circuit according to claim 7, characterized in that: The substrate voltage switching circuit also includes a second current source, which is connected to the drain of the eleventh NMOS transistor to provide current. The current of the MN11 is provided by a second current source.

9. The high voltage substrate selection circuit according to claim 8, characterized in that: The ninth NMOS tube, the eighth PMOS tube, the ninth PMOS tube, and the tenth PMOS tube are 40V high-voltage tubes, and the tenth NMOS tube, the eleventh NMOS tube, the twelfth NMOS tube, and the thirteenth NMOS tube are 5V low-voltage tubes.

10. A charging device, characterized in that: include: A charger housing and a power management chip disposed in the charger housing; The power management chip comprises a charging power supply, a battery power supply and a high-voltage substrate selection circuit as claimed in any one of claims 1 to 9, the charging power supply outputs a VCC voltage, and the battery power supply outputs a VBAT voltage.

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