An adaptive bias circuit for millimeter wave amplifiers with improved linearity

Abstract

The invention relates to the technical field of circuit structure design of radio frequency amplifiers in the field of wireless communication, and in particular to an adaptive bias circuit of a millimeter wave amplifier for improving linearity. Adaptive bias is achieved by setting a feedback module to offset gain reduction under high power. Input impedance is optimized by a coupling module, linear components are reduced, and a third-order intermodulation intercept point is improved. While achieving bias adaptation and ensuring high power gain, saturated output power and efficiency, amplifier linearity is improved by constructing a coupling path to overcome the contradiction between efficiency and linearity. When input power increases, a feedback signal is received by a feedback module to gradually increase an output bias voltage and keep the gain from decreasing. When input power continues to increase, the series-parallel structure of diodes further enhances the bias voltage increase trend and increases the saturated output power.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit structure design of radio frequency amplifiers in the field of wireless communications, and in particular to an adaptive bias circuit of a millimeter wave amplifier for improving linearity. Background Art

[0002] With the continuous development of mobile communication technology, the fifth generation of mobile communication technology has gradually matured. High power handling capability and good linearity of communication systems have become important indicators, and the performance requirements for amplifiers under high power have gradually increased.

[0003] As the input power increases, the gain of the amplifier will gradually decrease. The power when the gain decreases by 1dB is called the 1dB compression point. By setting the static operating point of the amplifier in deep class AB, not only can the DC power consumption be reduced and the efficiency be improved, but the gain compression can also be slowed down. However, the disadvantage is that a large nonlinear component will be generated and the linearity is poor, resulting in a compromise between efficiency and linearity. Summary of the invention

[0004] Aiming at the problem that the existing adaptive bias structure will generate a large nonlinear component and poor linearity, the present invention proposes a millimeter wave amplifier adaptive bias circuit with improved linearity; adaptive bias is achieved by setting a feedback module to offset the gain drop under high power; input impedance is optimized by a coupling module, the linear component is reduced and the third-order intermodulation intercept point is improved; while achieving bias adaptation and ensuring high power gain, saturated output power and efficiency, the linearity of the amplifier is improved by constructing a coupling path to overcome the contradiction between efficiency and linearity.

[0005] The specific implementation contents of the present invention are as follows: A millimeter wave amplifier adaptive bias circuit for improving linearity, comprising a feedback module and a coupling module; The input end of the feedback module inputs the amplifier input signal and the power supply voltage VDD, and the output end of the feedback module is connected to the input end of the coupling module; The input end of the coupling module inputs the supply voltage VDD, and the output end of the coupling module is connected to the bias voltage output end; The feedback module is used to generate a feedback signal according to the acquired amplifier input signal and power supply voltage signal, and adaptively adjust the bias voltage signal according to the feedback signal; The coupling module is used to construct a coupling path between the feedback module and the bias voltage output terminal and connected in parallel to the ground, and adjust the impedance to improve the linearity.

[0006] In order to better implement the present invention, further, the feedback module includes an NMOS tube M1 and a PMOS tube M2; The gate of the NMOS tube M1 is connected to the bias voltage output terminal and the ground terminal, the drain of the NMOS tube M1 is connected to the power supply VDD, and the source of the NMOS tube M1 is connected to the gate of the PMOS tube M2 and the ground terminal; The source of the PMOS tube M2 is connected to the bias voltage output terminal and the power supply VDD, the gate of the PMOS tube M2 is connected to the source of the NMOS tube M1 and the ground terminal, and the drain of the PMOS tube M2 is connected to the ground terminal.

[0007] In order to better implement the present invention, further, the feedback module also includes a resistor R1, a resistor R2, a capacitor C1, and a resistor R3; One end of the capacitor C1 is connected between the feedback module and the bias voltage output terminal, and the other end is connected to the gate of the NMOS tube M1; One end of the resistor R1 is connected between the gate of the NMOS tube M1 and the capacitor C1, and the other end is connected between the resistor R2 and the ground. One end of the resistor R2 is connected between the source of the NMOS tube M1 and the gate of the PMOS tube M2, and the other end is connected to the drain of the PMOS tube M2; One end of the resistor R3 is connected to the power supply VDD, and the other end of the resistor R3 is connected to the source of the PMOS tube M2 and the coupling module.

[0008] In order to better implement the present invention, further, the coupling module includes a first coupling unit and a second coupling unit; The input end of the first coupling unit is connected to the power supply VDD, and the output end of the first coupling unit is connected to the input end of the second coupling unit; The input end of the second coupling unit is connected to the source of the PMOS tube M2, and the output end of the second coupling unit is connected to the bias voltage output end.

[0009] In order to better implement the present invention, further, the first coupling unit includes a diode D1 and a capacitor C2; One end of the diode D1 is connected between the power supply VDD and the input end of the resistor R3, and the other end of the diode D1 is connected between the output end of the resistor R3 and the source of the PMOS tube M2; One end of the capacitor C2 is connected between the diode D1 and the power supply VDD, and the other end of the capacitor C2 is connected between the diode D1 and the source of the PMOS tube M2.

[0010] In order to better implement the present invention, further, the second coupling unit includes a diode D2, a resistor R4, a resistor R5, and a capacitor C3; One end of the diode D2 is connected between the output end of the resistor R3 and the source of the PMOS tube M2, and the other end of the diode D2 is connected to the input end of the resistor R4; The output end of the resistor R4 is connected between the bias voltage output end and the capacitor C1; One end of the resistor R5 is connected between the diode D2 and the source of the PMOS tube M2, and the other end of the resistor R5 is connected between the output end of the resistor R4 and the bias voltage output end; One end of the capacitor C3 is connected between the diode D1 and the input end of the resistor R5 , and the other end of the capacitor C3 is connected between the output end of the resistor R5 and the bias voltage output end.

[0011] The present invention has the following beneficial effects: (1) The present invention realizes adaptive bias through NMOS, PMOS switches and diodes, offsets the gain drop under high power, improves the saturated output power and 1dB compression point, solves the problem of amplifier gain drop when the power increases, and improves the output power and linearity of the amplifier.

[0012] (2) The present invention optimizes the input impedance and reduces the nonlinear component through the ground coupling path composed of diodes, resistors and capacitors, thereby increasing the third-order intermodulation intercept point without changing the size of the amplifier transistor.

[0013] (3) When the input power of the present invention increases, the switch composed of the NMOS tube and the PMOS tube receives the coupled signal, so that the output bias voltage gradually increases, and the gain does not decrease; when the input power continues to increase, the series-parallel structure of the diode further enhances the trend of V_bias increase, so that the saturated output power increases. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 A schematic diagram of the structure of a millimeter wave amplifier adaptive bias circuit for improving linearity provided by the present invention. DETAILED DESCRIPTION

[0015] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. It should be understood that the described embodiments are only part of the embodiments of the present invention, not all of the embodiments, and therefore should not be regarded as limiting the scope of protection. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technical personnel in this field without making creative work are within the scope of protection of the present invention.

[0016] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "disposed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0017] Embodiment 1: This embodiment provides a millimeter wave amplifier adaptive bias circuit for improving linearity, including a feedback module and a coupling module; The input end of the feedback module inputs the amplifier input signal and the power supply voltage VDD, and the output end of the feedback module is connected to the input end of the coupling module; The input end of the coupling module inputs the supply voltage VDD, and the output end of the coupling module is connected to the bias voltage output end; The feedback module is used to generate a feedback signal according to the acquired amplifier input signal and power supply voltage signal, and adaptively adjust the bias voltage signal according to the feedback signal; The coupling module is used to construct a coupling path between the feedback module and the bias voltage output terminal and connected in parallel to the ground, and adjust the impedance to improve the linearity.

[0018] Working principle: This embodiment realizes adaptive bias by setting a feedback module to offset the gain drop under high power; optimizes the input impedance through the coupling module, reduces the linear component and improves the third-order intermodulation intercept point; while realizing the adaptive bias and ensuring high power gain, saturated output power and efficiency, the linearity of the amplifier is improved by constructing a coupling path to overcome the contradiction between efficiency and linearity.

[0019] Embodiment 2: This embodiment is based on the above embodiment 1. Figure 1 As shown, the specific structure of the feedback module is described in detail.

[0020] The feedback module includes an NMOS tube M1 and a PMOS tube M2; The gate of the NMOS tube M1 is connected to the bias voltage output terminal and the ground terminal, the drain of the NMOS tube M1 is connected to the power supply VDD, and the source of the NMOS tube M1 is connected to the gate of the PMOS tube M2 and the ground terminal; The source of the PMOS tube M2 is connected to the bias voltage output terminal and the power supply VDD, the gate of the PMOS tube M2 is connected to the source of the NMOS tube M1 and the ground terminal, and the drain of the PMOS tube M2 is connected to the ground terminal.

[0021] The feedback module also includes a resistor R1, a resistor R2, a capacitor C1, and a resistor R3; One end of the capacitor C1 is connected between the feedback module and the bias voltage output terminal, and the other end is connected to the gate of the NMOS tube M1; One end of the resistor R1 is connected between the gate of the NMOS tube M1 and the capacitor C1, and the other end is connected between the resistor R2 and the ground. One end of the resistor R2 is connected between the source of the NMOS tube M1 and the gate of the PMOS tube M2, and the other end is connected to the drain of the PMOS tube M2; One end of the resistor R3 is connected to the power supply VDD, and the other end of the resistor R3 is connected to the source of the PMOS tube M2 and the coupling module.

[0022] Working principle: The feedback module provided in this embodiment includes a feedback circuit composed of an NMOS tube and a PMOS tube and a coupling path composed of a capacitor, a resistor and a diode.

[0023] Bias circuit such as Figure 1 As shown, capacitor C1 is a coupling capacitor, M1 and M2 are NMOS tube and PMOS tube respectively, NMOS tube M1 is grounded through large resistors R1 and R2, and PMOS tube M2 is connected to the power supply voltage VDD through resistor R3.

[0024] The input end of the amplifier couples the input power to the gate of the NMOS tube M1 through the capacitor C1, and feeds back to the source of the PMOS tube M2 to output the bias voltage.

[0025] V_bias is the bias voltage output terminal, which is connected to the gate of the amplifier common source tube to provide bias. The bias circuit realizes adaptive bias by coupling the amplifier input signal, feedback through the switch composed of NMOS tube and PMOS tube, and the chopping effect of the diode, so that the bias voltage changes with the input power, solves the problem of gain compression when the power increases, and adjusts the impedance by forming a coupling path to improve linearity.

[0026] The adaptive function of the bias circuit is implemented in two parts. The first part is composed of NMOS tube M1 and PMOS tube M2. This structure connects the source and gate of NMOS tube M1 to ground with a large resistor, making it in the off state, and couples the input signal of the input amplifier to its gate through capacitor C1 from the bias voltage output end, that is, the amplifier signal input end. When the input power increases, the coupled signal is input to the off M1, and the nonlinear component of DC is output, generating a gradually increasing DC current, which flows through resistor R2, so that the source voltage of M1, which was originally grounded, gradually rises from 0. The source of M1 is connected to the gate of PMOS tube M2. When the signal is small, the gate of PMOS tube M2 is grounded through resistor R2, and PMOS tube M2 is in the on state, so that the current flows through R3 to generate a voltage drop, keeping the voltage output from the source of PMOS tube M2 at a lower potential required for small signal bias. When the input power increases, the gate voltage of the PMOS tube M2 gradually rises along with the source voltage of the NMOS tube M1, so that the PMOS tube M2 is gradually turned off, the current decreases, and the voltage drop on the resistor R3 decreases, thereby increasing the voltage output from the source of the PMOS tube M2. This embodiment realizes the switch function by combining NMOS and PMOS, so that the currents flowing through the two switches change in the opposite direction during the power increase process, and realizes the bias and voltage adaptation of small signals only by dividing the VDD without additional bias voltage.

[0027] The other parts of this embodiment are the same as those of the above-mentioned embodiment 1, and thus will not be described in detail.

[0028] Embodiment 3: This embodiment is based on any one of the above embodiments 1 to 2. Figure 1 As shown, the specific structure of the coupling module is described in detail.

[0029] The coupling module includes a first coupling unit and a second coupling unit; The input end of the first coupling unit is connected to the power supply VDD, and the output end of the first coupling unit is connected to the input end of the second coupling unit; The input end of the second coupling unit is connected to the source of the PMOS tube M2, and the output end of the second coupling unit is connected to the bias voltage output end.

[0030] Further, the first coupling unit includes a diode D1 and a capacitor C2; One end of the diode D1 is connected between the power supply VDD and the input end of the resistor R3, and the other end of the diode D1 is connected between the output end of the resistor R3 and the source of the PMOS tube M2; One end of the capacitor C2 is connected between the diode D1 and the power supply VDD, and the other end of the capacitor C2 is connected between the diode D1 and the source of the PMOS tube M2.

[0031] Further, the second coupling unit includes a diode D2, a resistor R4, a resistor R5, and a capacitor C3; One end of the diode D2 is connected between the output end of the resistor R3 and the source of the PMOS tube M2, and the other end of the diode D2 is connected to the input end of the resistor R4; The output end of the resistor R4 is connected between the bias voltage output end and the capacitor C1; One end of the resistor R5 is connected between the diode D2 and the source of the PMOS tube M2, and the other end of the resistor R5 is connected between the output end of the resistor R4 and the bias voltage output end; One end of the capacitor C3 is connected between the diode D1 and the input end of the resistor R5 , and the other end of the capacitor C3 is connected between the output end of the resistor R5 and the bias voltage output end.

[0032] Working principle: The parallel grounding structure formed by diode D1 and capacitor C2 and the series structure formed by diode D2, resistor R4, resistor R5 and capacitor C3 together form a coupling path equivalent to parallel to the ground. VDD serves as a bias voltage to turn on diode D1 while supplying power, serving as an AC ground.

[0033] This embodiment is implemented by diode D1 and diode D2. Diode D1 is connected in parallel to the bias voltage output path, and is turned on by power supply VDD, and diode D2 is connected in parallel to the bias resistor R5 in series. When the signal is small, diode D1 and diode D2 are both turned off, and the large resistor R5 inputs the bias voltage converted by the previous circuit into the gate of M1; when the DC input power continues to increase to gradually approach the saturation power, diode D1 and diode D2 begin to turn on when the input signal is negative, discharge the signal, clip the signal, thereby generating a positive DC component, and raising the output bias voltage. This structure can not only realize the change of the bias voltage increasing with the increase of input power, but also the change amplitude is greater than the adaptive effect of NMOS tube M1 and PMOS tube M2, which can significantly raise the bias voltage near the saturation power, and significantly improve the saturated output power. Resistor R4 connected in series with diode D2 is used to control the DC current of diode D2, thereby controlling the voltage change amplitude to prevent the amplifier tube from being broken down due to excessive voltage. The disadvantage of this structure is that the input power required to turn on the diode is relatively large, making it difficult for its effect to cover the required power range. The present invention solves this problem by adding NMOS tube M1 and PMOS tube M2 to form dual adaptation with diode D1 and diode D2.

[0034] Another technical point of this embodiment is that the diode D1 connected in parallel to the resistor R5 reduces the resistance on the bias path, and the input signal is input to the diode D2 connected to VDD through the diode D1, so that the series-parallel structure of the diode D1 and the diode D2 forms a coupling path connected in parallel to the ground through the AC ground VDD. A large capacitor C2 is connected in parallel to the diode D1, which plays the role of a large grounding capacitor, and then the capacitor C3 is added to provide capacitance, which is equivalent to increasing the gate-source capacitance of the common source amplifier tube, so that it plays the same effect of reducing the input impedance as increasing the size of the amplifier tube, and the nonlinear component is shunted at a specific power, thereby reducing the third-order intermodulation component and improving the third-order intermodulation intercept point of the amplifier. The added capacitor C3 plays a role in controlling the third-order intermodulation performance. By adjusting the size of the capacitor C3, the input impedance can be optimized, and the power range and frequency response where the maximum value of the third-order intermodulation intercept point appears can be adjusted, so that the linearity within the required power and frequency range is improved. Because the principle of improving linearity is to build a path parallel to the ground, changing the series-parallel structure to a parallel structure, or removing the diode D1 and the diode D2 can achieve similar functions, but cannot achieve the effect of raising the bias voltage of the series-parallel structure of the present invention. The advantage of the present invention is that it realizes the function of improving linearity on the basis of adaptive bias. Therefore, the present invention adds a series-parallel structure of a diode, a capacitor, and a resistor at the output end of the bias circuit, while realizing adaptive bias, improving the gain 1dB compression point and the saturated output power, and can also build a coupling path to achieve the function of improving linearity.

[0035] This embodiment is used to solve the problem of amplifier gain decreasing when power increases, and improve the output power and linearity of the amplifier; when the input power increases, the switch composed of the NMOS tube and the PMOS tube receives the coupled signal, so that the output bias voltage gradually increases, and the gain is kept from decreasing; when the input power continues to increase, the series-parallel structure of the diode further enhances the trend of V_bias increasing, so that the saturated output power increases; the coupling path composed of the diode, the resistor and the capacitor reduces the input impedance, and improves the third-order intermodulation intercept point without changing the size of the amplifier transistor.

[0036] This embodiment realizes adaptive bias through NMOS, PMOS switches and diodes, offsets the gain drop under high power, and improves the saturated output power and 1dB compression point; through the ground coupling path composed of diodes, resistors and capacitors, the input impedance is optimized, the nonlinear component is reduced, and the third-order intermodulation intercept point is improved.

[0037] Based on the implementation cases of the present invention, increasing or decreasing the number of resistors, capacitors and diodes should be within the protection scope of the present invention.

[0038] Based on this implementation case, replacement of capacitors and diodes should be within the protection scope of the present invention.

[0039] The other parts of this embodiment are the same as any one of the above-mentioned embodiments 1-2, so they will not be repeated here.

[0040] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Any simple modification or equivalent change made to the above embodiment based on the technical essence of the present invention shall fall within the protection scope of the present invention.

Claims

1. A millimeter wave amplifier adaptive bias circuit for improving linearity, characterized in that: Including feedback module and coupling module; The input end of the feedback module inputs the amplifier input signal and the power supply voltage VDD, and the output end of the feedback module is connected to the input end of the coupling module; The input end of the coupling module inputs the supply voltage VDD, the output end of the coupling module is connected to the bias voltage output end, and the bias voltage output end is connected to the amplifier input end; The feedback module is used to generate a feedback signal according to the acquired amplifier input signal and power supply voltage signal, and adaptively adjust the bias voltage signal according to the feedback signal; The coupling module is used to construct a coupling path between the feedback module and the bias voltage output terminal and connected in parallel to the ground, and adjust the impedance to improve the linearity.

2. The millimeter wave amplifier adaptive bias circuit for improving linearity according to claim 1, characterized in that: The feedback module includes an NMOS tube M1 and a PMOS tube M2; The gate of the NMOS tube M1 is connected to the bias voltage output terminal and the ground terminal, the drain of the NMOS tube M1 is connected to the power supply VDD, and the source of the NMOS tube M1 is connected to the gate of the PMOS tube M2 and the ground terminal; The source of the PMOS tube M2 is connected to the bias voltage output terminal and the power supply VDD, the gate of the PMOS tube M2 is connected to the source of the NMOS tube M1 and the ground terminal, and the drain of the PMOS tube M2 is connected to the ground terminal.

3. The millimeter wave amplifier adaptive bias circuit for improving linearity according to claim 2, characterized in that: The feedback module also includes a resistor R1, a resistor R2, a capacitor C1, and a resistor R3; One end of the capacitor C1 is connected between the feedback module and the bias voltage output terminal, and the other end is connected to the gate of the NMOS tube M1; One end of the resistor R1 is connected between the gate of the NMOS tube M1 and the capacitor C1, and the other end is connected between the resistor R2 and the ground. One end of the resistor R2 is connected between the source of the NMOS tube M1 and the gate of the PMOS tube M2, and the other end is connected to the drain of the PMOS tube M2; One end of the resistor R3 is connected to the power supply VDD, and the other end of the resistor R3 is connected to the source of the PMOS tube M2 and the coupling module.

4. The millimeter wave amplifier adaptive bias circuit for improving linearity according to claim 2, characterized in that: The coupling module includes a first coupling unit and a second coupling unit; The input end of the first coupling unit is connected to the power supply VDD, and the output end of the first coupling unit is connected to the input end of the second coupling unit; The input end of the second coupling unit is connected to the source of the PMOS tube M2, and the output end of the second coupling unit is connected to the bias voltage output end.

5. The millimeter wave amplifier adaptive bias circuit for improving linearity according to claim 4, characterized in that: The first coupling unit includes a diode D1 and a capacitor C2; One end of the diode D1 is connected between the power supply VDD and the input end of the resistor R3, and the other end of the diode D1 is connected between the output end of the resistor R3 and the source of the PMOS tube M2; One end of the capacitor C2 is connected between the diode D1 and the power supply VDD, and the other end of the capacitor C2 is connected between the diode D1 and the source of the PMOS tube M2.

6. The millimeter wave amplifier adaptive bias circuit for improving linearity according to claim 5, characterized in that: The second coupling unit includes a diode D2, a resistor R4, a resistor R5, and a capacitor C3; One end of the diode D2 is connected between the output end of the resistor R3 and the source of the PMOS tube M2, and the other end of the diode D2 is connected to the input end of the resistor R4; The output end of the resistor R4 is connected between the bias voltage output end and the capacitor C1; One end of the resistor R5 is connected between the diode D2 and the source of the PMOS tube M2, and the other end of the resistor R5 is connected between the output end of the resistor R4 and the bias voltage output end; One end of the capacitor C3 is connected between the diode D1 and the input end of the resistor R5 , and the other end of the capacitor C3 is connected between the output end of the resistor R5 and the bias voltage output end.

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