Low-complexity ADC calibration method and system

By building an ADC calibration model of a convolutional network and a fully connected network, extracting and integrating multi-order nonlinear features, the problems of many parameters and high computing requirements in the existing technology are solved, and efficient ADC calibration performance and low-complexity computing requirements are achieved.

CN119788073AActive Publication Date: 2025-04-08OCEAN UNIV OF CHINA
View PDF 9 Cites 0 Cited by

Patent Information

Application Number
CN202510228114.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-28
Publication Date
2025-04-08
Estimated Expiration
2045-02-28

AI Technical Summary

Technical Problem

The existing neural network-based ADC calibration methods have many parameters and high computing requirements, which leads to excessive complexity and difficulty in running on resource-constrained devices.

Method used

ADC calibration model (VICNN) is constructed using convolutional network (CNN) and fully connected network (FCNN). Error characteristics are extracted through first-order Volterra convolution kernel to P-order Volterra convolution kernel, and multi-order nonlinear features are integrated through fully connected networks to achieve accurate calibration of ADC digital sampling values.

Benefits of technology

ADC calibration performance comparable to existing neural network-based methods is achieved, while significantly reducing computational complexity, reduced number of parameters, and reduced computational requirements.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119788073A_ABST
    Figure CN119788073A_ABST
Patent Text Reader

Abstract

The invention relates to the technical field of ADC calibration, and particularly discloses a low-complexity ADC calibration method and system, an ADC calibration model (VICNN) is constructed, and the VICNN comprises a convolutional network and a full-connection network; the convolutional network comprises first to Pth convolution branches which are respectively used for carrying out convolution on an input ADC digital sampling value by adopting first-order to P-order Volterra convolution kernels to obtain P error characteristics, and P is greater than or equal to 3; the full-connection network is used for integrating the P error features to obtain a total error feature. According to the constructed VICNN, inherent nonlinear features of ADC digital sampling values are efficiently extracted through a simplified structure, meanwhile, the problem that a Volterra kernel is directly solved is remarkably avoided, accurate nonlinear representation and adaptive learning across different orders are achieved, ADC calibration performance equivalent to that of an existing method based on a neural network is achieved, and the method is suitable for being applied to ADC calibration. And the calculation complexity is obviously reduced.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the technical field of ADC calibration, and in particular to a low-complexity ADC calibration method and system. Background Art

[0002] High-speed analog-to-digital converters (ADCs) are key components in a variety of applications, including radar communications, precision instrumentation, and automotive electronics. However, they are susceptible to a variety of errors caused by process, voltage, and temperature (PVT) fluctuations, which severely degrade their performance. To this end, numerous calibration methods have been proposed in the past few decades. Despite some progress, there are still significant limitations: most traditional calibration techniques are only effective for specific error types and certain ADC architectures.

[0003] Traditional neural networks have shown significant potential in high-speed analog-to-digital converter (ADC) calibration due to their powerful nonlinear modeling capabilities, and are able to model a variety of errors. Specifically, an additive neural network has been developed to correct amplitude- and phase-related errors in pipeline ADCs and time-interleaved ADCs (TIADCs). A vector recovery mapping neural network has been introduced to address single-channel errors and channel-to-channel mismatch problems in time-interleaved ADCs. A neural network has been proposed that can effectively correct errors and minimize harmonic distortion and spurious in pipeline ADCs and time-interleaved ADCs. In fact, due to the presence of multiple frequency-related errors in the ADC itself, these conventional neural networks often require a large number of parameters to achieve acceptable calibration performance. For example, for a 12-bit, 3000-megasample-per-second time-interleaved ADC, the calibration performance of a convolutional neural network (CNN) gradually improves as the convolutional layers are stacked, but once the number of parameters exceeds 8100, its performance peaks and then decreases. Similarly, by increasing the number of nodes in a three-layer fully connected neural network (FCNN), its calibration performance steadily improves until it reaches saturation. These observations suggest that simply increasing the capacity of neural networks can lead to underfitting and significantly increase the computational complexity (both the number of parameters and floating-point operations per second), which limits their operation on resource-constrained devices. Summary of the invention

[0004] The present invention provides a low-complexity ADC calibration method and system, which solves the technical problem that the existing neural network-based ADC calibration method uses many parameters and has high calculation requirements.

[0005] In order to solve the above technical problems, the present invention provides a low-complexity ADC calibration method, comprising the steps of: Construct training and test sets for ADC calibration; Construct an ADC calibration model, wherein the ADC calibration model includes a convolutional network and a fully connected network; the convolutional network includes a first convolutional branch, a second convolutional branch to a P The convolution branch is used to apply the first-order Volterra convolution kernel and the second-order Volterra convolution kernel to the input ADC digital sampling value. P Convolution is performed with a Volterra convolution kernel of order , and we get P The error characteristics, P ≥3; the fully connected network is used for P The error characteristics are integrated to obtain the total error characteristics; Subtracting the total error characteristic from the input ADC digital sampling value to obtain a calibrated ADC digital sampling value for output; Using the training set to train the ADC calibration model and using the test set to test the trained ADC calibration model; The ADC digital sampling value to be calibrated is calibrated using the tested ADC calibration model, and the calibrated ADC digital sampling value is output.

[0006] Furthermore, the first-order Volterra convolution kernel is P The first-order nonlinear error of the ADC digital sampling value is modeled by the Volterra convolution kernel of order P Order nonlinear error.

[0007] Furthermore, each convolution branch adopts multi-channel input, and the convolution result of each convolution branch is modeled as the concatenation of the convolution results of all channels of the convolution branch.

[0008] Further, p The convolution branch c The convolution result of channels is calculated as , Indicates p The convolution branch uses p The Volterra convolution kernel of order, x (c) Represents the convolution branch c The input signal of each channel is p =1,2,…, P , c =1,2,…, C , C It is p The number of channels of the convolution branch.

[0009] Further, p All channels of the convolutional branches use the same number of p The Volterra convolution kernel isp The convolution branch uses p The number of Volterra convolution kernels is related to p The memory depth of the 1.1-order Volterra kernel matches that of the 1.1-order Volterra kernel.

[0010] Furthermore, the fully connected network P The error characteristics are integrated to obtain the total error characteristics, which include: The extracted P error features are concatenated into a single feature vector a( n ); Through the first fully connected layer, the feature vector a( n ) is mapped to a high-dimensional space, where a nonlinear activation function is applied for transformation; The transformed features are passed through the second fully connected layer to perform weighted summation and combination operations to obtain the total error features.

[0011] Furthermore, the size of the first-order Volterra convolution kernel is the largest; the first convolution branch to the P The number of channels of the convolution branches gradually increases.

[0012] Furthermore, the loss function used in the training process is , h represents the parameters of each Volterra convolution kernel in the convolutional network, w and b Respectively represent the weight and bias of the fully connected network, D error = X - D gt Represents network input X Its true value D gt The difference between D cali represents the output of the fully connected network, N Indicates the sample size.

[0013] Furthermore, a training set and a test set for ADC calibration are constructed, specifically including: A simulation data set was constructed using a multi-channel time-interleaved analog-to-digital converter; Use the parameter measurement method based on spectrum information to construct the true value and obtain the real data set; A training set and a test set are constructed based on the simulation data set and the real data set.

[0014] The present invention also provides a low-complexity ADC calibration system, which applies the low-complexity ADC calibration method, and the key lies in: comprising a data set construction module, a model construction module, a model training and testing module and a model application module; The data set construction module is used to construct a training set and a test set for ADC calibration; The model building module is used to build an ADC calibration model; The model training and testing module is used to train the ADC calibration model using the training set and to test the trained ADC calibration model using the test set; The model application module is used to calibrate the ADC digital sampling values ​​to be calibrated by using the tested ADC calibration model, and output the calibrated ADC digital sampling values.

[0015] The present invention provides a low-complexity ADC calibration method and system, constructs an ADC calibration model (VICNN), and the ADC calibration model (VICNN) includes a convolutional network (CNN) and a fully connected network (FCNN); the convolutional network includes a first convolution branch, a second convolution branch to a first convolution branch. P The convolution branch is used to apply the first-order Volterra convolution kernel and the second-order Volterra convolution kernel to the input ADC digital sampling value. P Convolution is performed with a Volterra convolution kernel of order , and we get P The error characteristics, P ≥3; fully connected network is used for P The error features are integrated to obtain the total error feature. The VICNN constructed by the present invention efficiently extracts the inherent nonlinear features of the ADC digital sampling value with a simplified structure, and significantly avoids the difficulty of directly solving the Volterra kernel. By fusing multi-order nonlinear features through a fully connected network, VICNN achieves accurate nonlinear representation and adaptive learning across different orders, achieving ADC calibration performance comparable to that of existing neural network-based methods, and significantly reducing computational complexity. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a schematic diagram of a low-complexity ADC calibration method and system provided by an embodiment of the present invention;

[0017] Figure 2 is a graph of SFDR and SNDR results before ADC calibration provided by an embodiment of the present invention;

[0018] Figure 3 It is a graph of SFDR and SNDR results after ADC calibration provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0019] The following specifically illustrates the implementation mode of the present invention in conjunction with the accompanying drawings. The embodiments are provided for illustrative purposes only and cannot be understood as limiting the present invention. The accompanying drawings are provided for reference and illustration only and do not constitute a limitation on the scope of patent protection of the present invention, because many changes can be made to the present invention without departing from the spirit and scope of the present invention.

[0020] For discrete-time input signals x ( n )( n represents the current moment) (ADC digital sampling value), the general form of the Volterra series without the zero-order term can be expressed as: , , y ( n )express x ( n ), y p ( n )express p Volterra series of order, P is the maximum nonlinear order, h p ( k 1,…, k p )express p Volterra kernel of order 2 L 1+1,…,2 L p +1 defines the order from 1 to p The memory depth of the Volterra kernel of order, k i express p The Volterra kernel of i The sampling moments of the Volterra kernel of order .

[0021] Without loss of generality, the Volterra kernel is assumed to be symmetric, which can further simplify the representation of nonlinear interactions. Based on this symmetry, p Volterra kernel h p ( k 1,…, k p ) can be approximated as p The product of symmetric one-dimensional kernels: , hp ( k i ) means corresponding x ( n - k i )of p The one-dimensional symmetric convolution kernel of order .

[0022] Based on the above decomposition, p Volterra series y p ( n ) can be converted into a p ( n ): , From a mathematical point of view, a p ( n ) is equivalent to replacing the input with p A symmetric one-dimensional convolution kernel is used to perform convolution operation.

[0023] Based on the above theoretical analysis, an embodiment of the present invention provides a low-complexity ADC calibration method, such as Figure 1 As shown in the flowchart, the specific steps include: Construct training and test sets for ADC calibration; Construct an ADC calibration model (VICNN), which includes a convolutional network (CNN) and a fully connected network (FCNN); the convolutional network includes the first convolution branch, the second convolution branch to the P The convolution branch is used to apply the first-order Volterra convolution kernel and the second-order Volterra convolution kernel to the input ADC digital sampling value. P Convolution is performed with a Volterra convolution kernel of order , and we get P The error characteristics, P ≥3; fully connected network is used for P The error characteristics are integrated to obtain the total error characteristics; Subtract the total error characteristic from the input ADC digital sampling value to obtain the calibrated ADC digital sampling value for output; Using the training set to train the ADC calibration model and using the test set to test the trained ADC calibration model; The ADC digital sampling value to be calibrated is calibrated using the tested ADC calibration model, and the calibrated ADC digital sampling value is output.

[0024] If each convolution branch uses a single channel input, then pThe convolution result of the convolution branches a p ( n ) can be modeled as p The product of a one-dimensional symmetric convolution kernel of order: , in, f p Representation and p The one-dimensional convolution kernel corresponding to the Volterra kernel of order ( p order Volterra convolution kernel), * represents the convolution operation.

[0025] If each convolution branch uses multi-channel input, then p The convolution result of the convolution branches a p ( n ) can be modeled as: , in, Indicates p The convolution branch c The convolution kernel of channels, x (c) Representative channel c The input signal, C is the number of input channels, and || represents the channel concatenation operation.

[0026] Since the high-speed analog-to-digital converter (ADC) exhibits weak nonlinear characteristics, the error components are mainly limited to the first-order, second-order and third-order nonlinear characteristics. Therefore, in this embodiment, the order of the one-dimensional convolution kernel is set to 3 (i.e. P =3), the convolution network is correspondingly provided with the first convolution branch, the second convolution branch to the third convolution branch to extract the error characteristics of the three orders of the input signal. Figure 1 As shown in , if each convolution branch has only one convolution channel, then each convolution branch contains multiple one-dimensional convolution kernels matching the memory depth of the corresponding order, that is, the first convolution branch, the second convolution branch, and the third convolution branch have 2 L 1+1, 2 L 2+1, 2 L 3+1 one-dimensional convolution kernels.

[0027] In order to fully utilize the representation power of the Volterra series while avoiding exponential growth of memory, the network extracts error features through multiple convolution channels for each order. While keeping the order and memory depth constant, the convolution channels can also be expanded to obtain a more comprehensive representation of the first-order, second-order, and third-order potential error features. Figure 1As shown, the first convolution branch, the second convolution branch, and the third convolution branch have m 1. m 2. m 3 channels. Each channel of the first convolution branch has 2 L 1+1 one-dimensional convolution kernel, 2 for the first channel L 1+1 one-dimensional convolution kernel is represented as , No. m 1 channel of 2 L 1+1 one-dimensional convolution kernel is represented as , and so on. Similarly, the convolution kernel representation of each convolution channel of the three convolution branches can be obtained.

[0028] For each convolution channel, the convolution operation is performed with a second-order memory depth of 2 L 2+1= s As an example, by expanding the channel and expanding the quadratic expression Get the output of the first channel of the second convolution branch, x 1 to x s Represents a discrete-time input signal x ( n )of s discrete data, that is x ( nL 2) to x ( n+ L 2). Similarly, the output of each convolution channel of the three convolution branches can be obtained.

[0029] Then, during the training process, the weights of the one-dimensional convolution are optimized by backpropagation to determine the parameters of the corresponding Volterra kernel. h .

[0030] In high-speed analog-to-digital converters (ADCs), linear errors are usually more significant than higher-order nonlinear errors. In order to strike a balance between accuracy and computational complexity, the size of the convolution kernel has been optimized: the first-order convolution kernel size is set to 9 (need to be set to the maximum) to accurately extract the dominant linear error characteristics, while the second-order and third-order convolution kernel sizes are set to 7, which can simplify the network and fully extract the nonlinear error characteristics. As the ADC bandwidth increases, the dynamic nonlinear error becomes more obvious, which requires a richer representation of high-order errors. To solve this problem, this embodiment expands the convolution channel to enhance its representation capability, and the convolution branch from the first to the third is extended. P The number of channels in the convolution branch gradually increases. Figure 1For example, in this example, the first convolution branch is set to 8 channels, the second convolution branch is set to 12 channels, and the third convolution branch is set to 16 channels, so that complex error features can be effectively extracted.

[0031] Fully connected network P The error characteristics are integrated to obtain the total error characteristics, which include: The extracted P error features are concatenated into a single feature vector a( n ); Through the first fully connected layer, the feature vector a( n ) is mapped to a high-dimensional space, where a nonlinear activation function is applied for transformation; The transformed features are passed through the second fully connected layer to perform weighted summation and combination operations to obtain the total error features.

[0032] In order to fuse nonlinear features of different orders, the fully connected network uses a splicing unit to extract one error feature to P Error characteristics a 1( n )to a P ( n ) into a single feature vector a( n ) to obtain the contributions of all orders: , The superscript T indicates matrix transposition.

[0033] Although one-dimensional convolution performs well in extracting error features from ADCs, it is insufficient in effectively integrating these features for calibration tasks. To overcome this limitation, a fully connected network uses a fully connected neural network (FCNN) to fuse the error features extracted by the three branches of one-dimensional convolution to achieve effective ADC calibration. First, the error feature vector a( n ) is mapped to a high-dimensional space through the first fully connected layer, where a nonlinear activation function is applied for transformation. Secondly, these features are adaptively fused through the second fully connected layer, which performs weighted summation and combination operations to finally obtain the integrated feature representation. The final output z of the fully connected network can be expressed as: , in, , W are the weight matrices of the first and second fully connected layers respectively, is the bias matrix of the first fully connected layer, b 1 is the bias term of the second fully connected network, F [ ] is a non-linear activation function.

[0034] Therefore, a fully connected neural network (FCNN) is designed as a two-layer fully connected network. The first fully connected layer as the input layer has 48 nodes, which is the minimum number of nodes used without degrading the performance, so as to achieve richer feature interactions. The second fully connected layer as the output layer has only one node, representing the final output. Each neuron in FCNN processes the input signal through weighted summation and applies a nonlinear activation function to generate its output. In addition, FCNN effectively reduces the dimensionality of the physical features generated by the convolution operation.

[0035] Finally, VICNN is trained through back propagation to minimize the deviation between the FCNN output and the error (the error is defined as the difference between the actual output of the analog-to-digital converter (ADC) and the true value), and finally the calibration result is obtained. The loss function of this embodiment adopts the MSE loss function, which is specifically expressed as: , in, h Represents the parameters of each Volterra convolution kernel in the convolutional network, w and b Represent the weight and bias of the fully connected network respectively, D error = X - D gt Represents network input X Its true value D gt The difference between D cali represents the output of the fully connected network, N Indicates the sample size.

[0036] Specifically, during the training process, the optimal parameters are obtained by using the back propagation algorithm. h , w , b To minimize the loss, the complexity associated with directly determining the parameters of the Volterra series is avoided.

[0037] By using one-dimensional convolution operations to model the Volterra kernel, VICNN efficiently extracts the inherent nonlinear characteristics of ADC digital sampling values ​​with a simplified structure, while significantly avoiding the difficulty of directly solving the Volterra kernel. By fusing multi-order nonlinear features through a fully connected network, VICNN achieves accurate nonlinear representation and adaptive learning across different orders. These advantages make VICNN a low-complexity, efficient nonlinear modeling method with broad application potential in ADC calibration and other related fields.

[0038] Building a high-quality data set is crucial for applying artificial intelligence algorithms, because the performance of the neural network and parameter tuning are directly affected by the quality of the training data set. This embodiment constructs a training set and a test set for ADC calibration, specifically including: A simulation data set was constructed using a multi-channel time-interleaved analog-to-digital converter; Use the parameter measurement method based on spectrum information to construct the true value and obtain the real data set; Construct training sets and test sets based on simulated data sets and real data sets.

[0039] This example first uses a 14-bit, 4000MS / s, 4-channel time-interleaved analog-to-digital converter (TIADC) model to build a simulation data set. Specifically, the timing mismatch, gain, and offset of each channel are set. The timing mismatch of each channel is [0.16%T S ,-0.21%T S ,0.04%T S ,-0.43%T S ], where T S is the sampling period of TIADC. The gain of each channel is [1.003, 1.002, 0.999, 0.995]. And the offset of each channel is [0.1mV, 2mV, -5mV, -1mV]. In this embodiment, 1430 sets of data are collected and annotated to construct a data set, in which the input frequency is evenly distributed over the entire Nyquist sampling rate spectrum, as the training set and test set of VICNN.

[0040] Generally speaking, the true value can be obtained from the simulation model of the analog-to-digital converter (ADC), but its practical application faces significant limitations. Some neural network calibration methods use a low-speed and high-precision reference channel ADC to obtain ideal data, which introduces unnecessary analog circuits. The method of directly fitting the discrete sampled values ​​output by the ADC in the time domain is susceptible to outliers. When the errors in the ADC are abnormal, they will seriously affect the fitting results. In the frequency domain, it is easier to identify and filter out noise, reduce its interference, and then extract a pure ideal signal. Therefore, this embodiment adopts a parameter measurement method based on spectrum information to construct the true value. It should be noted that traditional Fourier analysis is affected by spectrum leakage and fence effect. This embodiment uses a fourth-order five-term Nuttall window function for windowed Fourier transform to reduce spectrum leakage, and applies a three-line spectrum line interpolation algorithm to offset the fence effect. Then, the ideal amplitude, frequency and phase of the input signal are estimated. Since the gain error affects the amplitude, this embodiment uses a statistical method to optimize the estimated amplitude and reconstruct the ideal input signal based on the optimized parameters.

[0041] Figure 2 , Figure 3 The following are the SFDR (spurious-free dynamic range) and SNDR (signal-to-noise-distortion ratio) results before and after ADC calibration. Figure 2 and Figure 3 As shown in the figure, the SFDR and SNDR of the VICNN model are improved from 50.61dB and 45.43dB to 84.13dB and 65.12dB respectively. And this method only contains 2.73 thousand parameters and 21.55 million floating point operations.

[0042] Experimental results show that this method achieves comparable ADC calibration performance to existing neural network-based methods while significantly reducing the computational complexity.

[0043] Based on the above method, an embodiment of the present invention further provides a low-complexity ADC calibration system, which includes a data set construction module, a model construction module, a model training and testing module, and a model application module; The dataset construction module is used to construct training sets and test sets for ADC calibration; The model building module is used to build the ADC calibration model; The model training and testing module is used to train the ADC calibration model using the training set and to test the trained ADC calibration model using the test set; The model application module is used to calibrate the ADC digital sampling value to be calibrated using the tested ADC calibration model, and output the calibrated ADC digital sampling value.

[0044] The system and method described in this embodiment can be implemented in a digital electronic circuit system, an integrated circuit system, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), an application specific standard product (ASSP), a system on a chip (SOC), a complex programmable logic device (CPLD), computer hardware, firmware, software, and / or a combination thereof. These various implementations may include: being implemented in one or more computer programs, which may be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general programmable processor, which may receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0045] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0046] In summary, the embodiment of the present invention provides a low-complexity ADC calibration method and system, which constructs an ADC calibration model (VICNN), which includes a convolutional network (CNN) and a fully connected network (FCNN); the convolutional network includes a first convolution branch, a second convolution branch to a third convolution branch. P The convolution branch is used to apply the first-order Volterra convolution kernel and the second-order Volterra convolution kernel to the input ADC digital sampling value. P Convolution is performed with a Volterra convolution kernel of order , and we get P The error characteristics, P ≥3; fully connected network is used for P The error features are integrated to obtain the total error feature. The VICNN constructed by the present invention efficiently extracts the inherent nonlinear features of the ADC digital sampling value with a simplified structure, and significantly avoids the difficulty of directly solving the Volterra kernel. By fusing multi-order nonlinear features through a fully connected network, VICNN achieves accurate nonlinear representation and adaptive learning across different orders, achieving ADC calibration performance comparable to that of existing neural network-based methods, and significantly reducing computational complexity.

[0047] The above embodiments are preferred implementation modes of the present invention, but the implementation modes of the present invention are not limited to the above embodiments. Any other changes, modifications, substitutions, combinations, and simplifications that do not deviate from the spirit and principles of the present invention should be equivalent replacement methods and are included in the protection scope of the present invention.

Claims

1. A low-complexity ADC calibration method, characterized in that: Includes steps: Construct training and test sets for ADC calibration; Construct an ADC calibration model, wherein the ADC calibration model includes a convolutional network and a fully connected network; the convolutional network includes a first convolutional branch, a second convolutional branch to a P The convolution branch is used to apply the first-order Volterra convolution kernel and the second-order Volterra convolution kernel to the input ADC digital sampling value. P Convolution is performed with a Volterra convolution kernel of order , and we get P The error characteristics, P ≥3; the fully connected network is used for P The error characteristics are integrated to obtain the total error characteristics; Subtracting the total error characteristic from the input ADC digital sampling value to obtain a calibrated ADC digital sampling value for output; Using the training set to train the ADC calibration model and using the test set to test the trained ADC calibration model; The ADC digital sampling value to be calibrated is calibrated using the tested ADC calibration model, and the calibrated ADC digital sampling value is output.

2. The low-complexity ADC calibration method according to claim 1, characterized in that: First-order Volterra convolution kernel to P The first-order nonlinear error of the ADC digital sampling value is modeled by the Volterra convolution kernel of order P Order nonlinear error.

3. The low-complexity ADC calibration method according to claim 2, characterized in that: Each convolution branch uses multi-channel input, and the convolution result of each convolution branch is modeled as the concatenation of the convolution results of all channels of the convolution branch.

4. The low-complexity ADC calibration method according to claim 3, characterized in that: No. p The convolution branch c The convolution result of channels is calculated as , Indicates p The convolution branch uses p The Volterra convolution kernel of order, x (c) Represents the convolution branch c The input signal of each channel, p =1,2,…, P , c =1,2,…, C , C It is p The number of channels of the convolution branch.

5. A low-complexity ADC calibration method according to claim 4, characterized in that: No. p All channels of the convolutional branches use the same number of p The Volterra convolution kernel is p The convolution branch uses p The number of Volterra convolution kernels is related to p The memory depth of the 1.1-order Volterra kernel matches that of the 1.1-order Volterra kernel.

6. A low-complexity ADC calibration method according to claim 5, characterized in that: The fully connected network P The error characteristics are integrated to obtain the total error characteristics, which include: The extracted P error features are concatenated into a single feature vector a( n ); Through the first fully connected layer, the feature vector a( n ) is mapped to a high-dimensional space; The transformed features are passed through the second fully connected layer to perform weighted summation and combination operations to obtain the total error features.

7. The low-complexity ADC calibration method according to claim 6, characterized in that: The size of the first-order Volterra convolution kernel is the largest; the first convolution branch to the P The number of channels of the convolutional branches gradually increases.

8. The low-complexity ADC calibration method according to claim 7, characterized in that: The loss function used in the training process is , h represents the parameters of each Volterra convolution kernel in the convolutional network, w and b Respectively represent the weight and bias of the fully connected network, D error = X - D gt Represents network input X Its true value D gt The difference between D cali represents the output of the fully connected network, N Indicates the sample size.

9. A low-complexity ADC calibration method according to claim 1, characterized in that: Construct training and test sets for ADC calibration, including: A simulation data set was constructed using a multi-channel time-interleaved analog-to-digital converter; Use the parameter measurement method based on spectrum information to construct the true value and obtain the real data set; A training set and a test set are constructed based on the simulation data set and the real data set.

10. A low-complexity ADC calibration system, applying the low-complexity ADC calibration method according to any one of claims 1 to 9, characterized in that: The system includes a data set construction module, a model construction module, a model training and testing module, and a model application module; The data set construction module is used to construct a training set and a test set for ADC calibration; The model building module is used to build an ADC calibration model; The model training and testing module is used to train the ADC calibration model using the training set and to test the trained ADC calibration model using the test set; The model application module is used to calibrate the ADC digital sampling values ​​to be calibrated by using the tested ADC calibration model, and output the calibrated ADC digital sampling values.

Citation Information

Patent Citations

  • Nonlinear system correction method and device thereof and electronic equipment

    CN111988046A

  • Bridge monitoring method of Volterra series model based on time domain identification

    CN112101228A

  • Nonlinear correction method and device for analog-to-digital converter and electronic device

    CN112187266A

  • Estimation calibration system and method for mismatch error of four-channel TIADC (Time Interleaved Analog to Digital Converter) system

    CN115733491A

  • Simplified second-order Volterra nonlinear equalization algorithm and device

    CN115865573A