Method for improving PCB positive film process clamping film

Abstract

The invention discloses a method for improving a PCB positive film process clamping film, and the method comprises the steps: carrying out the optimization design of the circuit layout of a BAG region, an open region, a large substrate region, and a board edge region of a circuit board; comprising the design of line width and line spacing of a BAG area, the design of conductor spacing of an open area, the design of conductor spacing of a large base material area, and the layout design of board edge dense lines, branch current conductors, slotted hole isolation rings and the like, so that too dense lines or non-uniform distribution of the lines is avoided, uniform current distribution is ensured, the thickness of a plating layer is consistent with the thickness of a dry film, and the film clamping phenomenon is improved.

Description

Technical Field

[0001] The invention relates to the technical field of printed circuit board manufacturing, and in particular to a method for improving the film clamping process of a PCB positive film. Background Art

[0002] In the PCB manufacturing process, it is necessary to lay out the outer layer circuits, which mainly uses positive film to make the board, that is, the area covered by the cured dry film on the PCB is the non-circuit area. The PCB positive film process is: first stick a layer of photoreactive dry film on the front and back of the circuit board, expose the position to be retained through exposure and development, and then electroplate thickened copper and electroplate tin (the purpose of tin plating is to protect the part that needs to be retained during etching), and after completion, first strip the film (strip off the dry film to expose the unwanted position), etch (bite the exposed part of the film stripping clean, and the required part will not be bitten because it is protected by the tin layer), and finally remove the tin layer to expose the position protected by the tin layer.

[0003] In the actual production process, due to the electroplating edge effect, the coating on the edge of the board will be 3-5mm thicker than that in the middle of the board, forming a plating protrusion above the circuit that needs to be electroplated. The dry film is embedded between the circuits, forming a sandwich film, which makes it difficult to remove the film cleanly and easily forms a short circuit defect between the circuits.

[0004] The object of the present invention is to provide a method for improving the lamination of a PCB positive film process. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a method for improving the film clamping of the PCB positive film process. By reasonably designing the circuit board pattern, the circuits are avoided to be too dense or unevenly distributed, and the current distribution is ensured to be uniform, so that the coating thickness is consistent with the dry film thickness, thereby improving the film clamping phenomenon.

[0006] The technical solution of the present invention is as follows:

[0007] A method for improving PCB positive film process lamination, comprising:

[0008] BAG area design: reduce line width compensation, when the line width is ≥6.0mil, compensate it by +0.4mil of the original manuscript. If the spacing is still not satisfied, cut the PAD on one side, and the minimum single-sided hole ring of the via is designed to be 2.2mil;

[0009] When the line spacing is ≤3.05mil, use BAG clamping wire, the single-side compensation of BAG is 0.8mil, the single-side compensation of clamping wire is 0.4mil, the minimum spacing from BAG to clamping wire is 1.75mil, the solder mask window is 0.5mil, and the cover wire is 1.25mil;

[0010] Open area design: the line is moved 3mil, the via ring is designed to be at least 3.5mil, and the plug-in hole ring is designed to be at least 5mil, ensuring that the conductor-to-conductor spacing is ≥6.0mil;

[0011] Design of large substrate areas within the board: The area adjacent to the large substrate area is designed as an open area, and the area containing dense lines and PAD clip lines is designed as a conductor spacing ≥ 6.0 mil. If the design requirement of conductor spacing ≥ 6.0 mil is not met, the PAD is cut. If the spacing is still not met after cutting the PAD, the line width is controlled according to the lower limit;

[0012] Dense line design on the board edge: Move the dense non-impedance line on the board edge so that the line spacing of the three rows of wires on the board edge are 6mil, 5mil, and 4mil respectively, and the spacing gradually decreases towards the inside of the board. The remaining line spacing is designed to be 3mil; add current grabbing copper foil on the board edge;

[0013] Design of current-dividing conductors at the edge of the board: The conductor at the edge of the board is 2.1mm away from the outside of the forming line, and the conductor width is 1.2mm. When the conductor intersects with the line alignment hole, the conductor is cut off; the size of the conductive PAD in the copper-free area is 60mil, and the spacing is 60mil; the long strips, long arcs, triangles, trapezoids, quadrilaterals or irregular figures with a gap of ≤6mil at the edge of the board are filled;

[0014] Board edge slot isolation ring design: the spacing is designed to 8mil.

[0015] Furthermore, in the design process of the large substrate area within the board, the maximum PAD reduction range is calculated as 10% of the original PAD size.

[0016] Compared with the prior art, the method for improving the lamination of PCB positive film process provided by the present invention has the following beneficial effects:

[0017] The method for improving the film clamping of the PCB positive film process provided by the present invention optimizes the circuit layout of the BAG area, open area, large substrate area, and board edge area of ​​the circuit board, thereby avoiding over-crowding or uneven distribution of the circuits, ensuring uniform current distribution, thereby making the coating thickness consistent with the dry film thickness, and improving the film clamping phenomenon. DETAILED DESCRIPTION

[0018] In order to enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention and to make the above-mentioned objects, features and advantages of the present invention more obvious and understandable, the specific implementation modes of the present invention are further described below.

[0019] It should be noted that the description of these embodiments is used to help understand the present invention, but does not constitute a limitation of the present invention. In addition, the technical features involved in each embodiment of the present invention described below can be combined with each other as long as there is no conflict between them.

[0020] A method for improving PCB positive film process lamination, comprising:

[0021] BAG area design: reduce line width compensation, when the line width is ≥6.0mil, compensate it by +0.4mil of the original manuscript. If the spacing is still not satisfied, cut the PAD on one side, and the minimum single-sided hole ring of the via is designed to be 2.2mil;

[0022] When the line spacing is ≤3.05mil, use BAG clamping wire, the single-side compensation of BAG is 0.8mil, the single-side compensation of clamping wire is 0.4mil, the minimum spacing from BAG to clamping wire is 1.75mil, the solder mask window is 0.5mil, and the cover wire is 1.25mil;

[0023] Open area design: the line moves 3mil, the via ring is designed to be at least 3.5mil, and the plug-in hole ring is designed to be at least 5mil, ensuring that the conductor-to-conductor spacing is ≥6.0mil; it should be noted that the moving line is a non-impedance line;

[0024] Design of large substrate area within the board: The area adjacent to the large substrate area is designed as an open area, and the area containing dense lines and PAD clips is designed with a conductor spacing of ≥6.0mil. If the design requirement of conductor spacing ≥6.0mil is not met, the PAD is cut. If the spacing is still not met after PAD cutting, the line width is controlled according to the lower limit; among which, the maximum PAD cutting range is calculated as 10% of the original PAD size, such as: if the PAD size is 10*10mil, the maximum PAD cutting amount is 10*10%=1mil; the line width is controlled according to the lower limit, and the specific implementation method is as follows: if the line width control value is 127um±10%, that is, the control range value is 114.3um~139.7um, and controlling according to the lower limit means that the line width is controlled as close to 114.3um as possible, but not less than 114.3um, because 114.3um is the minimum limit value.

[0025] Dense line design at the edge of the board: Move the dense non-impedance line at the edge of the board so that the line spacing of the three rows of wires at the edge of the board are 6mil, 5mil, and 4mil respectively, and the spacing gradually decreases toward the inside of the board, and the remaining line spacing is designed to be 3mil. Because the copper thickness of the board edge is thick and uneven during etching, it will lead to incomplete etching and small spacing between lines after etching, which will cause quality problems such as short circuits. During the design, the line spacing of the board edge is designed to decrease from the edge of the board to the middle, in order to balance the corresponding impact of the electroplating edge, so as to achieve the effect of consistent spacing between the unit at the edge of the board and the middle of the board.

[0026] The method of adding copper foil to the edge of the board is as follows: when printing the circuit film, all the edges of the board are designed to retain copper except for the tool hole position and the alignment PAD position; corresponding copper blocks are also designed near the empty area of ​​the board edge unit or the forming gong hole position. The purpose of retaining copper on the edge of the board is to retain the current in the copper area during electroplating, and the copper is relatively more, and these areas will be gonged off and discarded during forming.

[0027] Design of current-dividing conductors at the edge of the board: The conductor at the edge of the board is 2.1mm away from the outside of the forming line, and the conductor width is 1.2mm. When the conductor intersects with the line alignment hole, the conductor is cut off; the size of the conductive PAD in the copper-free area is 60mil, and the spacing is 60mil; the long strips, long arcs, triangles, trapezoids, quadrilaterals or irregular figures with a gap of ≤6mil at the edge of the board are filled;

[0028] Board edge slot isolation ring design: the spacing is designed to 8mil.

[0029] The optimized design of the present invention avoids over-dense or uneven distribution of circuits, ensures uniform current distribution, and thus makes the coating thickness consistent with the dry film thickness, thereby improving the film clamping phenomenon.

[0030] The embodiments of the present invention are described in detail above, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions and variations made to these embodiments without departing from the principles and spirit of the present invention are still within the protection scope of the present invention.

Claims

1. A method for improving PCB positive film process lamination, characterized in that: include: BAG area design: reduce line width compensation, when the line width is ≥6.0mil, compensate it by +0.4mil of the original manuscript. If the spacing is still not satisfied, cut the PAD on one side, and the minimum single-sided hole ring of the via is designed to be 2.2mil; When the line spacing is ≤3.05mil, use BAG clamping wire, the single-side compensation of BAG is 0.8mil, the single-side compensation of clamping wire is 0.4mil, the minimum spacing from BAG to clamping wire is 1.75mil, the solder mask window is 0.5mil, and the cover wire is 1.25mil; Open area design: the line moves 3mil, the via ring is designed to be at least 3.5mil, and the plug-in hole ring is designed to be at least 5mil, ensuring that the conductor-to-conductor spacing is ≥6.0mil; Design of large substrate areas within the board: The area adjacent to the large substrate area is designed as an open area, and the area containing dense lines and PAD clip lines is designed as a conductor spacing ≥ 6.0 mil. If the design requirement of conductor spacing ≥ 6.0 mil is not met, the PAD is cut. If the spacing is still not met after cutting the PAD, the line width is controlled according to the lower limit; Dense line design on the board edge: Move the dense non-impedance line on the board edge so that the line spacing of the three rows of wires on the board edge are 6mil, 5mil, and 4mil respectively, and the spacing gradually decreases towards the inside of the board. The remaining line spacing is designed to be 3mil; add current grabbing copper foil on the board edge; Design of current-dividing conductors at the edge of the board: The conductor at the edge of the board is 2.1mm away from the outside of the forming line, and the conductor width is 1.2mm. When the conductor intersects with the line alignment hole, the conductor is cut off; the size of the conductive PAD in the copper-free area is 60mil, and the spacing is 60mil; the long strips, long arcs, triangles, trapezoids, quadrilaterals or irregular figures with a gap of ≤6mil at the edge of the board are filled; Board edge slot isolation ring design: the spacing is designed to 8mil.

2. The method for improving PCB positive film process lamination according to claim 1, characterized in that: In the design process of large substrate areas within the board, the maximum PAD reduction range is calculated as 10% of the original PAD size.