Manufacturing method of self-aligned T-type P-GaN gate GaN-based radio frequency HEMT

Abstract

The invention discloses a manufacturing method of a self-aligned T-type P-GaN gate GaN-based radio frequency HEMT (High Electron Mobility Transistor), which comprises the following steps: firstly, sequentially growing a composite buffer layer, a GaN channel layer, an isolation layer, a barrier layer and a P-GaN cap layer material on a substrate, and forming two-dimensional electron gas between a GaN channel and the isolation layer; then removing the P-GaN cap layer in a partial region to remain a rectangular P-GaN gate pin, and depositing and annealing source electrode metal and drain electrode metal on two sides of the P-GaN gate pin to form ohmic contact of the source electrode and the drain electrode; next, depositing a layer of medium on the surface, accurately etching the medium above the P-GaN gate pin by using photoresist as a mask, obtaining a medium-P-GaN gate pin-medium support structure by using the characteristic that the medium on the side wall of the P-GaN gate pin is thicker, then depositing gate metal and stripping, and finally obtaining the T-shaped gate electrode with the P-GaN gate pin combined with the gate metal head. According to the scheme, a submicron T-shaped gate electrode with a short gate length is obtained by using a self-alignment etching process, and an enhanced working GaN radio frequency HEMT device is realized.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor devices, and in particular to a method for manufacturing a self-aligned T-type P-GaN gate GaN-based radio frequency HEMT. Background Art

[0002] As a typical material of the third-generation semiconductor, GaN has the advantages of large bandgap (3.4eV), high electron mobility, and high electron saturation velocity, so it has broad application potential in the fields of next-generation radio frequency devices, power and electrical devices, etc. Due to the unique polarization effect of the III-GalN heterojunction structure, even when the material is not intentionally doped, a two-dimensional electron gas (2DEG) with high concentration and high electron mobility can be formed at the junction interface. Therefore, the high electron mobility transistor (HEMT) prepared based on the GaN heterojunction structure has the characteristics of high breakdown voltage, low on-resistance, high switching frequency, and small size, making it the preferred solution for the research and development of high-performance, low-power, and low-cost microwave devices, especially in the fields of wireless charging, lidar, electric vehicles, and intelligent transportation.

[0003] Since the concentration of two-dimensional electron gas at the interface of nitride heterojunction is very high and has been formed when the heterojunction structure is formed, the traditional GaN-based HEMT device often behaves as a depletion type because it cannot completely deplete the two-dimensional electron gas under the gate, that is, the threshold voltage is negative, and a negative bias voltage needs to be designed to turn off the device, which is very inconvenient for the safe operation of the device and the simplification of circuit design. Enhancement-mode devices can avoid the risk of false start-up and reduce the complexity of gate drive, which has greater advantages. P-GaN gate technology in enhancement-mode devices has gained widespread attention because it can obtain advantages such as stable threshold voltage, strong process controllability, and is suitable for large-scale production and commercial use. It is called the most promising method for preparing enhancement-mode HEMT devices. However, this technology still has shortcomings. In order to make the performance of the device better at high frequencies, a self-aligned etching process can be used to realize a T-type gate electrode with a short gate length and sub-micron, and realize an enhancement-mode GaN RF HEMT device. At the same time, the reduction of gate length can greatly improve the RF performance of the device. Summary of the invention

[0004] In order to solve the above technical problems, the present invention provides a method for manufacturing a self-aligned T-type P-GaN gate GaN-based RF HEMT, which comprises, from bottom to top, a substrate, a composite buffer layer, a channel layer, an isolation layer, a barrier layer and a P-GaN gate foot, wherein a two-dimensional electron gas is formed between the interface of the channel layer and the isolation layer; the P-GaN gate foot is a rectangle remaining after etching away a part of the P-GaN cap layer; a source electrode and a drain electrode are arranged on the upper end faces of the barrier layer on both sides of the P-GaN gate foot, and the source electrode, the drain electrode and the barrier layer form an ohmic contact; the dielectric-P-GaN gate foot-dielectric support structure is a support structure obtained after depositing a dielectric and performing precise etching due to the relatively thick dielectric on the side wall of the P-GaN gate foot; a gate metal gate head is arranged above the dielectric-P-GaN gate foot-dielectric support structure, and a T-type gate electrode is formed in combination with the P-GaN gate foot below.

[0005] To achieve the above object, the present invention is implemented according to the following technical solutions:

[0006] A method for manufacturing a self-aligned T-type P-GaN gate GaN-based radio frequency HEMT, comprising the following steps:

[0007] S1: Cleaning the substrate surface, sequentially growing a composite buffer layer, a channel layer, an isolation layer, a barrier layer and a P-GaN cap layer on the substrate; forming a two-dimensional electron gas between the channel layer and the isolation layer;

[0008] S2: Isolate the device;

[0009] S3: Use photolithography to define the pattern and remove the P-GaN cap layer in some areas, leaving the rectangular P-GaN gate foot;

[0010] S4: using photolithography to define the pattern, depositing source and drain electrode metals on both sides of the P-GaN gate foot, and performing annealing to form ohmic contacts between the source and drain electrodes;

[0011] S5: depositing a dielectric layer on the surface of the barrier layer to form a dielectric layer, using a photoresist as a mask, accurately etching the dielectric above the P-GaN gate foot, and obtaining a dielectric-P-GaN gate foot-dielectric support structure by taking advantage of the fact that the dielectric on the side wall of the P-GaN gate foot is relatively thick;

[0012] S6: A photolithography process is used to define the gate head pattern, and a gate metal is deposited on the upper surface of the dielectric-P-GaN gate foot-dielectric support structure to form a gate metal gate head, and then peeled off to obtain a T-type gate electrode of a P-GaN gate foot combined with a gate metal gate head, thereby realizing an enhanced-mode GaN RF HEMT device.

[0013] Furthermore, the substrate is made of one of silicon, silicon carbide, sapphire and diamond.

[0014] Furthermore, the composite buffer layer includes three layers, namely, a nucleation layer, a transition layer and a buffer layer from bottom to top. The material of the nucleation layer is AlN or GaN with a thickness of 100-300nm; the material of the transition layer is AlGaN with a thickness of 200-1000nm; the material of the buffer layer is AlGaN or GaN with a thickness of 100-3000nm.

[0015] Furthermore, the channel layer is made of GaN or InGaN with a thickness of 50-500nm; the isolation layer is made of AlN with a thickness of 0.5-2nm; the barrier layer is made of one of AlGaN, InGaN, AlN, and InAlGaN with a thickness of 5-40nm.

[0016] Furthermore, the metal layer of the gate metal head is one of Ni / Au / Ni, Ti / Au / Ni, TiN / Au / Ni from bottom to top; the metal layer of the source electrode and the drain electrode is one of Ti / Al / Ni / Au, Ta / Al / W, Ti / Al / Ti / TiN, Ta / Al / Ni / Au from bottom to top.

[0017] Furthermore, the P-GaN cap layer is formed by high temperature annealing of a Mg-doped GaN cap layer, wherein the concentration of Mg is 1×10 18 -1×10 20 cm -3 , with a thickness of 30-150nm; the material of the dielectric layer is SiO2 or SiN, with a thickness of 20-500nm.

[0018] Compared with the prior art, the present invention has the following beneficial effects:

[0019] First, the present invention uses a self-aligned etching process to first define the range of the gate foot, obtain a sub-micron T-type gate electrode with a short gate length, and realize a GaN radio frequency HEMT device operating in an enhanced mode.

[0020] Secondly, the present invention improves the radio frequency performance of the device due to the reduction of the gate length. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic structural diagram of the self-aligned T-type P-GaN gate GaN-based radio frequency HEMT of the present invention.

[0022] Figure 2 1 is a schematic flow chart of a method for preparing a self-aligned T-type P-GaN gate GaN-based RF HEMT according to the present invention: (a) to (g) are the manufacturing steps in sequence.

[0023] Reference numerals in the figure: 1-substrate; 2-composite buffer layer; 3-channel layer; 4-isolation layer; 5-barrier layer; 6-P-GaN cap layer; 61-P-GaN gate foot; 7-source electrode; 8-drain electrode; 9-dielectric layer; 10-gate metal gate head. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with embodiments. The specific embodiments described herein are only used to explain the present invention and are not used to limit the invention.

[0025] like Figure 1 As shown, this embodiment exemplarily shows a self-aligned T-type P-GaN gate GaN-based RF HEMT device, which includes a substrate 1, a composite buffer layer 2, a channel layer 3, an isolation layer 4, a barrier layer 5 and a P-GaN gate foot 61 from bottom to top, and a two-dimensional electron gas is formed between the interface of the channel layer 3 and the isolation layer 4; the P-GaN gate foot 61 is a rectangle left by etching away a part of the P-GaN cap layer 6; the upper end surfaces of the barrier layer 5 on both sides of the P-GaN gate foot 61 are provided with a source electrode 7 and a drain electrode 8, and the source electrode 7, the drain electrode 8 and the barrier layer 5 form an ohmic contact; the dielectric-P-GaN gate foot-dielectric support structure is a support structure obtained after depositing a dielectric and performing precise etching due to the relatively thick dielectric on the side wall of the P-GaN gate foot 61; a gate metal gate head 10 is provided above the dielectric-P-GaN gate foot-dielectric support structure, and a T-type gate electrode is formed in combination with the P-GaN gate foot 61 below.

[0026] In this embodiment, the substrate 1 is made of one of silicon, silicon carbide, sapphire and diamond. The composite buffer layer 2 includes three layers, namely, a nucleation layer 21, a transition layer 22 and a buffer layer 23 from bottom to top. The material of the nucleation layer 21 is AlN or GaN with a thickness of 100-300nm; the material of the transition layer 22 is AlGaN with a thickness of 200-1000nm; the material of the buffer layer 23 is AlGaN or GaN with a thickness of 100-3000nm. The channel layer 3 is made of GaN or InGaN with a thickness of 50-500nm. The isolation layer 4 is made of AlN with a thickness of 0.5-2nm. The barrier layer 5 is made of one of AlGaN, InGaN, AlN and InAlGaN with a thickness of 5-40nm. A heterojunction is formed between it and the channel layer 3, and a two-dimensional electron gas channel is formed on one side of the channel layer 3 due to the polarization effect. The P-GaN cap layer 6 is formed by high temperature annealing of the Mg-doped GaN cap layer, wherein the concentration of Mg is 1×10 18 -1×10 20 cm -3, with a thickness of 30-150nm. The dielectric layer 9 is made of any one of SiO2 and SiN, with a thickness of 20-500nm. The metal layer of the gate electrode 10 is Ni / Au / Ni, Ti / Au / Ni, or TiN / Au / Ni. The metal layer of the source electrode 7 and the drain electrode 8 is any one of Ti / Al / Ni / Au, Ta / Al / W, Ti / Al / Ti / TiN, or Ta / Al / Ni / Au.

[0027] Example 1

[0028] In this embodiment, the material of the substrate 1 is P-type silicon with a thickness of 800 μm; the composite buffer layer 2 is divided into three parts, namely, a 200 nm AlN nucleation layer 21, an 800 nm transition layer 22, and a 1000 nm GaN buffer layer 23; the material of the channel layer 3 is GaN with a thickness of 200 nm; the isolation layer 4 is AlN with a thickness of 1 nm; the barrier layer 5 is AlGaN with an aluminum component of 0.21 and a thickness of 15 nm; the thickness of the P-GaN gate foot 61 is 70 nm, and the doping impurity is Mg with a doping concentration of 2.5×10 19 cm -3 ; The material of the dielectric layer 9 is SiN with a thickness of 100 nm; the source electrode 7 and the drain electrode 8 are both made of Ti / Al / Ni / Au, and the gate metal gate head 10 is made of Ni / Au / Ni alloy.

[0029] Reference Figure 2 The specific production process is as follows:

[0030] Step 1: Clean the surface of the selected 800 μm thick silicon substrate 1, such as Figure 2 As shown in (a) in .

[0031] At a high temperature of 1000° C., hydrogen is introduced into the reaction chamber to remove pollutants on the surface of the substrate 1 and to form a microscopic step structure on the surface of the substrate 1 so as to facilitate the subsequent epitaxial growth of various epitaxial layers.

[0032] Step 2: On the substrate 1, a composite buffer layer 2, a channel layer 3, an isolation layer 4, a barrier layer 5, and a P-GaN cap layer 6 are sequentially grown by metal organic chemical vapor deposition. Figure 2 As shown in (b) in .

[0033] The composite buffer layer 2 includes three layers. First, a 200nm AlN nucleation layer 21 is grown on the substrate by MOCVD method at a low temperature of 600°C, then the temperature is raised to 1000°C, and an 800nm ​​transition layer 22 is grown on the nucleation layer by MOCVD method, and finally a 1000nm GaN buffer layer 23 is grown on the transition layer 22.

[0034] Step 3: Grow a 200 nm GaN channel layer 3 on the composite buffer layer 2 by MOCVD at 1000°C.

[0035] Then, a 1 nm thick isolation layer 4 is epitaxially grown on the channel layer 3 , and a 15 nm thick AlGaN barrier layer 5 is epitaxially grown on the isolation layer 4 .

[0036] Step 4: Then, a GaN cap layer is grown on the barrier layer 5 and doped with Mg at a concentration of 2.5×10 19 cm -3 , and annealing is performed to form a P-GaN cap layer 6.

[0037] Step 5: Clean the epitaxial wafer. The work mainly includes cleaning organic and inorganic substances. Use acetone solution to ultrasonically clean the sample for 5 minutes, then put the sample into isopropanol solution for ultrasonic cleaning for 2 minutes to remove the residual acetone solution on the surface of the sample. Finally, blow dry with a nitrogen gun.

[0038] Step 6: Isolate the countertop, such as Figure 2 As shown in (c) in .

[0039] Specifically, the inductively coupled plasma etching technology (ICP) is used to etch away the entire P-GaN cap layer 6, the AlGaN barrier layer 5, the AlN isolation layer 4, and part of the GaN channel layer 3. The etching depth is 180nm, and the terrace should have neat edges and steep side walls.

[0040] Step 7: Use photolithography to make a photoresist mask, and use reactive ion etching equipment and technology (RIE) to etch away the P-GaN cap layer 6 without photoresist shielding, and etch into a table with neat edges and steep side walls, such as Figure 2 As shown in (d) in .

[0041] Step 8: Use photolithography ohmic process to make photoresist mask, and make source electrode 7 and drain electrode 8 by electron beam evaporation. The multilayer metal used is Ti / Al / Ni / Au (Au is on the top layer), and the thickness of Ti / Al / Ni / Au is 20nm / 120nm / 40nm / 50nm. Finally, perform rapid annealing in nitrogen atmosphere at 850℃ for 30s to make source electrode 7 and drain electrode 8 form ohmic contact with barrier layer 5, as shown in FIG. Figure 2 As shown in (e) in .

[0042] Step 9: A 100nm SiN dielectric layer is grown on the device surface by LPCVD technology, a photolithography gate process is used to make a photoresist mask, and a reactive ion etching device and technology (RIE) is used to etch away the dielectric layer without photoresist shielding, and the dielectric layer 9 on the side wall of the P-GaN gate foot 61 is relatively thick to obtain a composite support structure of dielectric-P-GaN gate foot-dielectric, such as Figure 2 As shown in (f) in .

[0043] Step 11: Define the gate head pattern by photolithography process, deposit the gate metal gate head 10 on the upper surface of the dielectric-P-GaN gate foot-dielectric support structure by electron beam evaporation, the gate metal gate head 10 uses a multilayer metal Ni / Au / Ni, the thickness of Ni / Au / Ni is 50nm / 300nm / 10nm, and then peel off to form a T-shaped gate electrode of the P-GaN gate foot combined with the gate metal gate head, such as Figure 2 As shown in (g) in .

[0044] After the above steps, a sub-micron T-type gate electrode with a short gate length can be obtained to realize a GaN radio frequency HEMT device operating in enhancement mode.

[0045] Example 2

[0046] like Figure 2 As shown, this embodiment exemplarily describes another self-aligned T-type P-GaN gate GaN-based RF HEMT, which is different from Example 1 in that: silicon carbide material is selected as the substrate 1, P-type doping, and the thickness is 300μm; the composite buffer layer 2 is divided into three parts, namely, a 200nm GaN nucleation layer 21, a 500nm Al 0.55 Ga 0.25 N transition layer 22, wherein the aluminum composition is 0.55, 1000nm Al 0.05 Ga 0.25 N buffer layer 23, in which the aluminum content is 0.05; the channel layer material is GaN, with a thickness of 300nm; the isolation layer 4 is made of AlN, with a thickness of 1.5nm; the barrier layer 5 is made of Al 0.15 GaN, in which the aluminum content is 0.15 and the thickness is 15nm; the thickness of the P-GaN cap layer 6 is 60nm, the doping impurity is Mg, and the doping concentration is 5×10 19 cm -3 ; The material of the dielectric layer 9 is SiN with a thickness of 100nm; the source electrode 7 and the drain electrode 8 are made of Ta / Al / Ni / Au (Au is on the top layer, and the thickness of Ta / Al / Ni / Au is 20nm / 120nm / 40nm / 50nm), and the gate metal gate head 10 is made of Ti / Au / Ni alloy (the thickness of Ni / Au / Ni is 50nm / 150nm / 10nm).

[0047] Continue to refer to Figure 2 The same manufacturing method as in Example 1 can also be used to obtain a T-type gate electrode with a short gate length and submicron thickness, thereby realizing a GaN RF HEMT device operating in enhancement mode.

[0048] The technical solution of the present invention is not limited to the above-mentioned specific embodiments. All technical variations made according to the technical solution of the present invention fall within the protection scope of the present invention.

Claims

1. A method for manufacturing a self-aligned T-type P-GaN gate GaN-based RF HEMT, characterized in that: The following steps are involved: S1: cleaning the surface of the substrate (1), and sequentially growing a composite buffer layer (2), a channel layer (3), an isolation layer (4), a barrier layer (5), and a P-GaN cap layer (6) on the substrate (1); forming a two-dimensional electron gas between the channel layer (3) and the isolation layer (4); S2: Isolate the device; S3: using a photolithography process to define a pattern, removing the P-GaN cap layer (6) in a partial area, and leaving a rectangular P-GaN gate foot (61); S4: using a photolithography process to define a pattern, depositing source electrode (7) and drain electrode (8) metal on both sides of the P-GaN gate foot (61), and performing annealing to form ohmic contacts between the source electrode (7) and the drain electrode (8); S5: depositing a dielectric layer on the surface of the barrier layer (5) to form a dielectric layer (9), using a photoresist as a mask, accurately etching the dielectric above the P-GaN gate foot (61), and obtaining a dielectric-P-GaN gate foot-dielectric support structure by taking advantage of the fact that the dielectric (9) on the side wall of the P-GaN gate foot (61) is relatively thick; S6: A gate head pattern is defined by a photolithography process, a gate metal is deposited on the upper surface of the dielectric-P-GaN gate foot-dielectric support structure to form a gate metal gate head (10), and then stripping is performed to obtain a T-shaped gate electrode that combines the P-GaN gate foot (61) and the gate metal gate head (10).

2. The method for manufacturing a self-aligned T-type P-GaN gate GaN-based RF HEMT according to claim 1, characterized in that: The material of the substrate (1) is one of silicon, silicon carbide, sapphire and diamond.

3. The method for manufacturing a self-aligned T-type P-GaN gate GaN-based RF HEMT according to claim 1, characterized in that: The composite buffer layer (2) comprises three layers, which are, from bottom to top, a nucleation layer (21), a transition layer (22) and a buffer layer (23); the material of the nucleation layer (21) is AlN or GaN, with a thickness of 100-300 nm; the material of the transition layer (22) is AlGaN, with a thickness of 200-1000 nm; and the material of the buffer layer (23) is AlGaN or GaN, with a thickness of 100-3000 nm.

4. The method for manufacturing a self-aligned T-type P-GaN gate GaN-based RF HEMT according to claim 1, characterized in that: The material of the channel layer (3) is GaN or InGaN, and the thickness is 50-500nm; The material of the isolation layer (4) is AlN, with a thickness of 0.5-2 nm; the material of the barrier layer (5) is one of AlGaN, InGaN, AlN, and InAlGaN, with a thickness of 5-40 nm.

5. The method for manufacturing a self-aligned T-type P-GaN gate GaN-based RF HEMT according to claim 1, characterized in that: The metal layers of the gate metal gate head (10) are one of Ni / Au / Ni, Ti / Au / Ni, and TiN / Au / Ni from bottom to top; the metal layers of the source electrode (7) and the drain electrode (8) are one of Ti / Al / Ni / Au, Ta / Al / W, Ti / Al / Ti / TiN, and Ta / Al / Ni / Au from bottom to top.

6. The method for manufacturing a self-aligned T-type P-GaN gate GaN-based RF HEMT according to claim 1, characterized in that: The P-GaN cap layer (6) is formed by high temperature annealing of a Mg-doped GaN cap layer, wherein the concentration of Mg is 1×10 18 -1×10 20 cm -3 , with a thickness of 30-150nm; the material of the dielectric layer (9) is SiO2 or SiN, with a thickness of 20-500nm.

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