Semiconductor device manufacturing method and semiconductor substrate
By designing a marking structure with depression edges and concave patterns on the SiC substrate, the problem of marking deformation and difficulty in identifying after SiC epitaxial layer is solved, uniform growth of the SiC epitaxial layer and clear identification of markings are achieved, and the alignment accuracy of semiconductor components and the automation of manufacturing process are improved.
Patent Information
- Application Number
- CN202380062940.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-07-31
- Filing Date
- 2023-11-17
- Publication Date
- 2025-04-08
AI Technical Summary
After the mark is formed on the SiC substrate, the growth of the SiC epitaxial layer causes the mark to penetrate and deform in the image, making it difficult to recognize with the image, affecting the alignment of the semiconductor element and the automation of the manufacturing process.
A marking structure is designed which is recessed from a direction generally perpendicular to the first surface of the SiC substrate and surrounded by a side extending in a direction orthogonal to this direction, the first side having a concave pattern recessed in a third side direction of the opposite side to ensure uniform growth of the SiC epitaxial layer and suppressing the formation of the facet.
With this marking structure, it is possible to achieve uniform growth of the SiC epitaxial layer on the SiC substrate, reduce the appearance of facets, thereby improving the recognition of marks and the alignment accuracy of semiconductor elements, and simplifying the semiconductor manufacturing process.
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Figure CN119790352A_ABST
Abstract
Description
Technical Field
[0001] This embodiment relates to a method for manufacturing a semiconductor device and a semiconductor substrate. Background Art
[0002] Silicon carbide (SiC) has a larger band gap than silicon, and therefore has a high dielectric breakdown electric field strength and low on-resistance. Therefore, SiC semiconductors are being developed as materials for power semiconductor devices for electric power.
[0003] When forming semiconductor elements on a SiC substrate, alignment marks and other marks are required. Sometimes, after forming marks on a SiC substrate, a SiC epitaxial layer is grown on the surface of the SiC substrate. At this time, a specific crystal plane called a facet appears on the SiC epitaxial layer, and the mark of the SiC substrate penetrates and deforms in the image. As a result, it is difficult to identify the mark with an image in each process, and the alignment of the pattern may become difficult.
[0004] Prior art literature
[0005] Patent Literature
[0006] Patent Document 1: Japanese Patent No. 6705670
[0007] Patent Document 2: Japanese Patent No. 6696248
[0008] Patent Document 3: Japanese Patent Application Publication No. 2015-207595
[0009] Patent Document 4: Japanese Patent No. 6041292
[0010] Patent Document 5: Japanese Patent Application Publication No. 2000-252189 Summary of the invention
[0011] Technical problem to be solved by the invention
[0012] Provided are a method for manufacturing a semiconductor device and a semiconductor substrate capable of reliably identifying a mark on a semiconductor substrate.
[0013] Means for solving technical problems
[0014] The method for manufacturing a semiconductor device of the present embodiment forms a first mark, the first mark being recessed from a first direction substantially perpendicular to a first surface of a SiC substrate, and being surrounded by a first side and a third side extending in a second direction perpendicular to the first direction, and a second side and a fourth side extending in a third direction perpendicular to the first direction and the second direction, on the first surface, and having at least one recessed pattern recessed in a third direction from the first side toward a third side that is an opposite side to the first side. A SiC layer is epitaxially grown on the first mark of the SiC substrate. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 It is a plan view showing a structural example of a silicon carbide (SiC) substrate according to the first embodiment.
[0016] Figure 2 It is a plan view showing an example of marking according to the first embodiment.
[0017] Figure 3 It is a top view showing a structural example of a mark.
[0018] Figure 4 It is along Figure 2 A cross-sectional view of line 4-4.
[0019] Figure 5 It is a cross-sectional view of a SiC substrate of a comparative example.
[0020] Figure 6 This is a diagram showing an image of a faceted mark.
[0021] Figure 7 A diagram showing an image of a mark without facets.
[0022] Figure 8 It is a cross-sectional view showing an example of the method for manufacturing the semiconductor device according to the first embodiment.
[0023] Fig. 9 It is a plan view showing a structural example of a mark in the second embodiment.
[0024] Fig.10 It is a top view showing a plurality of marks.
[0025] Fig.11 It is a plan view showing a structural example of a mark according to the third embodiment.
[0026] Fig.12 It is a plan view showing a structural example of a mark according to the fourth embodiment.
[0027] Fig.13 It is a plan view showing a structural example of a mark according to the fifth embodiment.
[0028] Fig.14 It is a plan view showing a structural example of a mark according to the sixth embodiment. DETAILED DESCRIPTION
[0029] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. The embodiments do not limit the present invention. The accompanying drawings are schematic or conceptual. In the specification and the accompanying drawings, the same reference numerals are used for the same elements.
[0030] (First Embodiment)
[0031] Figure 1 1 is a top view showing a structural example of a silicon carbide (SiC) substrate of the first embodiment. SiC substrate 1 is an example of a semiconductor substrate. SiC substrate 1 is, for example, an n-type silicon carbide single crystal substrate composed of four-layer periodic hexagonal crystals (4H-SiC) of silicon carbide. SiC substrate 1 can be used as a semiconductor substrate for power semiconductor devices such as Schottky barrier diodes, MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), PN diodes, IGBTs (Insulated Gate Bipolar Transistors), and GTOs (Gate Turn-Off thyristors) for electric power.
[0032] The SiC substrate 1 has a first surface F1. A dicing line 3 is provided on the first surface F1 of the SiC substrate 1 so as to divide a plurality of semiconductor chips C. The dicing line 3 is a position where dicing is to be performed in a dicing process. The semiconductor chips C are singulated by dicing the SiC substrate 1 along the dicing line 3. The dicing line 3 includes, for example, a dicing line 3a extending in the X direction parallel to the orientation plane 4 and a dicing line 3b extending in the Y direction orthogonal to the X direction.
[0033] The semiconductor chip C may be provided with a semiconductor element (not shown) or may be provided with a pattern in the middle of the manufacturing process.
[0034] Figure 2 1 is a top view showing an example of a mark of the first embodiment. The mark 10 is a mark provided on the cutting line 3a of the first surface F1 of the SiC substrate 1. The mark 10 may be, for example, an alignment mark used when aligning the processing of the SiC substrate 1 in the semiconductor manufacturing process. A semiconductor manufacturing device such as an exposure device in a photolithography process aligns the SiC substrate 1 by automatically recognizing the mark 10. If the mark 10 cannot be clearly recognized, the semiconductor manufacturing device cannot automatically align using the image of the mark 10, and the semiconductor device may not be manufactured, or may become a cause of failure.
[0035] The plurality of marks 10 are arranged at a predetermined second interval in the X direction. Each mark 10 extends in the Y direction. The mark 10 is formed into a concave-convex shape in the Z direction (first direction) substantially perpendicular to the first surface F1. For example, the mark 10 is formed into a shape that is a groove recessed by etching the first surface F1 of the SiC substrate 1 from the Z direction.
[0036] Figure 31 is a top view showing a structural example of a mark. The mark 10 is a mark of an elongated shape having a first side 11, a second side 12, a third side 13 and a fourth side 14. The mark 10 is surrounded by the first to fourth sides 11 to 14 when viewed from above from the Z direction. The first side 11 and the third side 13 are long sides extending in the Y direction (second direction) orthogonal to the Z direction. The third side 13 is the opposite side of the first side 11. The second side 12 and the fourth side 14 are short sides extending in the X direction (third direction) orthogonal to the Z direction and the Y direction. The fourth side 14 is the opposite side of the second side 12. The first side 11 and the third side 13 are longer than the second side 12 and the fourth side 14.
[0037] The first side 11 and the third side 13 have a plurality of concave patterns P1 that are concave in the X direction when viewed from the Z direction. The concave pattern P1 of the first side 11 is a pattern that is concave from the first side 11 to the direction toward the third side 13 when viewed from the Z direction, and the concave pattern P1 of the third side 13 is a pattern that is concave from the third side 13 to the direction toward the first side 11 when viewed from the Z direction. The concave pattern P1 is concave (narrowed) from the length of the second side 12 and the fourth side 14 (the maximum width of the mark 10 in the X direction) in the X direction, and is periodically repeated in the Y direction in the first side 11 and the third side 13.
[0038] For example, the length (width) W10 of the second side 12 and the fourth side 14 is, for example, about 6 μm, and the length (the length of the mark 10 in the Y direction) L10 of the first side 11 and the third side 13 is, for example, about 50 μm. In this case, the concave pattern P1 is periodically repeated in the first side 11 and the third side 13 in the Y direction with a length of Lp1. The length Lp1 is, for example, 1 μm to 2 μm. Each concave pattern P1 is composed of two inclined edges inclined relative to the Y direction or the X direction. Therefore, the first side 11 and the third side 13 are not composed of edges parallel to the Y direction, but are composed of edges inclined relative to the Y direction. As a result, when viewed from above from the Z direction, the first side 11 and the third side 13 are composed of edges inclined relative to the Y direction and are processed into a serrated shape.
[0039] The concave width Wp1 of the concave pattern P1 in the X direction is less than half the length of the second side 12 and the fourth side 14. For example, if the length of the second side 12 and the fourth side 14 is about 6 μm, the concave width Wp1 of the concave pattern P1 is less than 3 μm. Thus, the mark 10 is not divided in the Y direction but is continuously connected.
[0040] Figure 2 The multiple marks 10 shown have Figure 3 The structure shown.
[0041] Figure 4 It is along Figure 2The cross-sectional view of the line 4-4 of FIG. The mark 10 is a groove formed by processing the first surface F1 of the SiC substrate 1 in the Z direction. The first surface F1 is formed into a concavo-convex shape by the mark 10. The SiC epitaxial layer 20 is provided on the mark 10 provided on the SiC substrate 1. The SiC epitaxial layer 20 covers the side and bottom surfaces of the mark 10 and also covers the first surface F1.
[0042] Here, in a vertical section relative to the Y direction, the first face F1 is inclined at an angle θ from the (0001) crystal plane of the SiC substrate 1 in the <11-20> direction. However, the inclination of the first face F1 is not limited to the inclination in this direction, and it can also be inclined in other directions. Angle θ is called the deviation angle of the SiC substrate 1. The deviation angle θ is, for example, less than 8 degrees, specifically 4 degrees. In addition, a SiC substrate having a deviation angle is also referred to as a deviation angle substrate. The direction (+X direction) in which the inclination of the deviation angle θ as the third direction decreases is also referred to as the upstream side of the deviation direction. The direction (-X direction) in which the inclination of the deviation angle θ as the direction opposite to the third direction increases is also referred to as the downstream side of the deviation direction.
[0043] According to the present embodiment, the first side 11 and the third side 13 of the mark 10 have the concave pattern P1 in a plan view from the Z direction. Thus, even when the SiC substrate 1 has an off angle θ, the SiC epitaxial layer 20 can be formed with a substantially uniform film thickness on the mark 10 and the first surface F1.
[0044] When the first side 11 and the third side 13 of the mark 10 do not have the concave pattern P1 in a plan view from the Z direction but are straight lines parallel to the Y direction, a crystal plane called a facet is formed in the SiC epitaxial layer 20. For example, Figure 5 1 is a cross-sectional view of a SiC substrate of a comparative example. In this comparative example, the first side 11 and the third side 13 of the mark 10 are formed as straight lines parallel to the Y direction when viewed from the Z direction. In this case, depending on the off angle θ of the SiC substrate 1, a facet FC is generated at the upper end of the groove of the mark 10.
[0045] Figure 6 FIG. 1 is a diagram showing an image of a faceted mark. A facet FC is generated on the first side 11 of the mark 10. In this case, Figure 6 As shown, the image of the first side 11 is blurred and blurred. Therefore, the semiconductor manufacturing apparatus may not be able to automatically recognize the mark 10.
[0046] In contrast, Figure 71 is a diagram showing an image of a mark without facets. In the present embodiment, the first side 11 and the third side 13 of the mark 10 have a concave pattern P1 when viewed from the Z direction. Since the SiC substrate 1 is an offset substrate, facets are slightly generated in the SiC epitaxial layer 20. However, the facets are small and hardly noticeable. In this case, Figure 7 As shown, the images of the first side 11 and the third side 13 are not blurred and are clear. Thus, the semiconductor manufacturing apparatus can automatically recognize the mark 10. As a result, pattern alignment and the like are facilitated in each process.
[0047] Next, a method for manufacturing the semiconductor device according to the first embodiment will be described.
[0048] Figure 8 It is a cross-sectional view showing an example of the method for manufacturing the semiconductor device according to the first embodiment.
[0049] The first surface F1 of the SiC substrate 1 having an offset angle θ is processed using etching techniques such as photolithography and RIE (Reactive Ion Etching). The offset angle θ is, for example, 4 degrees. Thus, a groove of the mark 10 is formed on the first surface F1 of the SiC substrate 1. When viewed from the top in the Z direction, the structure of the mark 10 is as shown in FIG. Figure 2 and Figure 3 As described.
[0050] Next, the SiC epitaxial layer 20 is formed on the first surface F1 of the SiC substrate 1 by using an epitaxial growth method. Figure 2 and Figure 3 As shown, the mark 10 has a concave pattern P1 when viewed from the Z direction. As a result, the SiC epitaxial layer 20 is formed with a substantially uniform film thickness on the mark 10 and the first surface F1, and faceting is suppressed. Figure 4 The SiC epitaxial layer 20 is shown.
[0051] Then, in Figure 1 In the region of the semiconductor chip C, a semiconductor element is formed on the SiC substrate 1 or the SiC epitaxial layer 20. The semiconductor element is a power semiconductor element for electric power such as a Schottky barrier diode, a MOSFET, a PN diode, an IGBT, or a GTO.
[0052] After semiconductor elements are formed on the SiC substrate 1 or the SiC epitaxial layer 20, the SiC substrate 1 is singulated into semiconductor chips C in a dicing process. The mark 10 is used as an alignment mark used when aligning the SiC substrate 1 in each semiconductor manufacturing process, and is formed on the dicing line 3. Therefore, in the dicing process, the mark 10 is cut together with the dicing line 3 in the dicing process.
[0053] The individualized semiconductor chips C are mounted on another substrate or the like and packaged. Thus, the semiconductor device of the present embodiment is completed.
[0054] In the present embodiment, the mark 10 has a concave pattern P1 when viewed from the Z direction. Thus, even if the SiC substrate 1 is an off-angle substrate, the facets of the SiC epitaxial layer 20 are suppressed and inconspicuous. In this case, the images of the first side 11 and the third side 13 become clear, and the semiconductor manufacturing device can automatically recognize the mark 10. As a result, pattern alignment and the like become easy in each process.
[0055] (Second Embodiment)
[0056] Fig. 9 1 is a top view showing a structural example of a mark of the second embodiment. The mark 10 of the second embodiment is composed of a plurality of partial marks 10a of a first length L10a arranged at a first interval D10a in the Y direction. The first interval D10a is, for example, 4 μm. The first length L10a is, for example, 4 μm. The width W10 is, for example, 4 μm. In addition, the first interval D10a, the first length L10a, and the width W10 are not limited thereto.
[0057] Each partial mark 10a has a first side 11, a second side 12, a third side 13, and a fourth side 14. Each partial mark 10a is surrounded by the first side 11 to the fourth side 14 when viewed from the Z direction. The first side 11 and the third side 13 are sides extending in the Y direction. The third side 13 is the opposite side of the first side 11. The second side 12 and the fourth side 14 are sides extending in the X direction. The fourth side 14 is the opposite side of the second side 12.
[0058] The first side 11 and the third side 13 have a plurality of concave patterns P1 that are concave in the X direction when viewed from the Z direction. The concave patterns P1 are concave (narrowed) in the X direction from the length of the second side 12 and the fourth side 14 (the maximum width of the mark 10 in the X direction), and are periodically repeated in the Y direction in the first side 11 and the third side 13.
[0059] For example, the concave pattern P1 appears periodically and repeatedly at a length of 1 μm to 2 μm in the Y direction on the first side 11 and the third side 13. Thus, the first side 11 and the third side 13 are processed into a zigzag shape with respect to the Y direction when viewed from the Z direction.
[0060] Each concave pattern P1 is composed of two inclined sides inclined with respect to the Y direction or the X direction, similarly to the first embodiment. Therefore, the first side 11 and the third side 13 are not sides parallel to the Y direction but are inclined sides.
[0061] In addition, the concave width Wp1 of the concave pattern P1 in the X direction is smaller than half the length of the second side 12 and the fourth side 14. For example, if the length of the second side 12 and the fourth side 14 is about 4 μm, the concave width Wp1 of the concave pattern P1 is smaller than 2 μm. Thus, the partial mark 10a itself is continuously connected in the Y direction.
[0062] Fig.10 is a top view showing a plurality of marks. In the second embodiment, the plurality of marks 10 respectively have Fig. 9 The structure shown. Therefore, Fig.10 As shown in FIG. 1 , the plurality of partial marks 10 a are two-dimensionally arranged on the first surface F1 . That is, in a plan view viewed from the Z direction, the plurality of partial marks 10 a are two-dimensionally arranged in a dot shape.
[0063] Even with such a structure, when the SiC substrate 1 is an off-angle substrate, the facets of the SiC epitaxial layer 20 are suppressed and inconspicuous. Therefore, the images of the first side 11 and the third side 13 of the mark 10 of the second embodiment become clear, and the semiconductor manufacturing device can automatically recognize the mark 10. Therefore, the second embodiment can obtain the same effect as the first embodiment. In addition, the mark 10 of the second embodiment can be manufactured in the same manner as the first embodiment as long as the mask pattern in the photolithography is changed.
[0064] (Third Embodiment)
[0065] Fig.11 1 is a top view showing a structural example of a mark according to the third embodiment. In the mark 10 of the third embodiment, the concave pattern P1 is provided on the first side 11, but not provided on the third side 13. The first side 11 is the side that depends on the third side 13 of the mark 10. Figure 8 One side of the (0001) crystal plane of the SiC substrate 1 shown in the figure is tilted in the direction of the (0001) crystal plane. Figure 8 When the first surface F1 of the SiC substrate 1 is set horizontally, the concave pattern P1 is formed on the (0001) crystal plane ( Figure 8 In addition, the first surface F1 of the SiC substrate 1 is set to be inclined by 4 degrees from the (0001) crystal plane of the SiC substrate 1 toward the SiC substrate 1.
[0066] For example, if Figure 8As shown, the deviation angle θ is an acute angle, and the mark 10 repeats the unevenness as it advances in the direction of the slope rise of the (0001) crystal plane of the SiC substrate 1 (approximately -X direction: downstream side of the deviation direction) when the first surface F1 is horizontal. In the direction of the slope rise of the (0001) crystal plane of the SiC substrate 1 (approximately -X direction), the facets of the SiC epitaxial layer 20 are easily conspicuous on the first side 11 that stands up from the bottom surface of the groove of the mark 10 toward the first surface F1 among the first side 11 and the third side 13.
[0067] Therefore, in the third embodiment, it is assumed that Figure 8 Thus, the off angle θ is acute, and the concave pattern P1 is formed on the first side 11 where the mark 10 stands in the direction of the slope rise of the (0001) crystal plane of the SiC substrate 1 (approximately -X direction). Thus, the facets of the SiC epitaxial layer 20 are effectively suppressed and become inconspicuous.
[0068] In the direction in which the slope of the (0001) crystal plane of the SiC substrate 1 decreases (approximately in the +X direction: upstream of the deviation direction), even if the third side 13 rising from the bottom surface of the groove of the mark 10 to the first surface F1 is linear, the facets of the SiC epitaxial layer 20 are not conspicuous. Therefore, the concave pattern P1 may not be formed on the third side 13.
[0069] Even with such a structure, the images of the first side 11 and the third side 13 of the mark 10 become clear, and the semiconductor manufacturing device can automatically recognize the mark 10. Therefore, the third embodiment can obtain the same effect as the first embodiment. In addition, the mark 10 of the third embodiment can be manufactured in the same manner as the first embodiment as long as the mask pattern in the photolithography is changed.
[0070] (Fourth Embodiment)
[0071] Fig.12 1 is a top view showing a structural example of a mark of the fourth embodiment. The fourth embodiment is a combination of the second embodiment and the third embodiment. Therefore, in the fourth embodiment, when viewed from the top in the Z direction, a plurality of partial marks 10a are arranged in a two-dimensional dotted shape. The arrangement of the plurality of partial marks 10a may be the same as that of the second embodiment.
[0072] Each partial mark 10a has a concave pattern P1 on the first side 11 similarly to the mark 10 of the third embodiment, but does not have a concave pattern P1 on the third side 13. The first side 11 is formed on one of the two sides 11 and 13 of the partial mark 10a depending on the tilt direction of the (0001) crystal plane of the SiC substrate 1.
[0073] For example, in the fourth embodiment, it is assumed that Figure 8Thus, the off angle θ is acute, and the concave pattern P1 is formed on the first side 11 where the mark 10 stands in the direction of the slope rise of the (0001) crystal plane of the SiC substrate 1 (approximately -X direction). Thus, the facets of the SiC epitaxial layer 20 are effectively suppressed and become inconspicuous.
[0074] In the direction in which the slope of the (0001) crystal plane of the SiC substrate 1 decreases (approximately in the +X direction), even if the third side 13 where the mark 10 stands is linear, the facets of the SiC epitaxial layer 20 are not noticeable. Therefore, the concave pattern P1 need not be formed on the third side 13 .
[0075] Even with such a structure, the images of the first side 11 and the third side 13 of the mark 10 become clear, and the semiconductor manufacturing device can automatically recognize the mark 10. Therefore, the fourth embodiment can obtain the same effect as the first embodiment. In addition, the mark 10 of the fourth embodiment can be manufactured in the same manner as the first embodiment as long as the mask pattern in the photolithography is changed.
[0076] (Fifth Embodiment)
[0077] Fig.13 1 is a top view showing a structural example of a mark according to the fifth embodiment. In each mark 10 of the fifth embodiment, when viewed from the Z direction, one concave pattern P1 is provided on the first side 11. When viewed from the Z direction, the concave pattern P1 is composed of two straight lines inclined relative to the Y direction. The two straight lines constituting the concave pattern P1 are inclined in a manner that the center of the mark 10 in the Y direction is concave toward the center of the mark 10 in the X direction. In this way, the number of concave patterns P1 provided on the first side 11 is not limited.
[0078] The recess width Wp1 of the recessed pattern P1 in the X direction may be substantially equal to the width in the X direction of the facets generated in the SiC epitaxial layer 20. Thus, the blurring of the image caused by the facets can be eliminated.
[0079] As described above, also in the fifth embodiment, the facets of the SiC epitaxial layer 20 on the first side 11 can be softened and made less noticeable.
[0080] (Sixth Embodiment)
[0081] Fig.14 1 is a top view showing a structural example of a mark according to the sixth embodiment. In each mark 10 of the sixth embodiment, when viewed from the Z direction, one concave pattern P1 is provided on the first side 11. When viewed from the Z direction, the concave pattern P1 is configured to be substantially arc-shaped. The arc of the concave pattern P1 is formed so as to be concave from the center of the mark 10 in the Y direction toward the center of the mark 10 in the X direction. In this way, the shape of the concave pattern P1 provided on the first side 11 may also be configured by a curve.
[0082] The recess width Wp1 of the recessed pattern P1 in the X direction may be substantially equal to the width in the X direction of the facets generated in the SiC epitaxial layer 20. Thus, the blurring of the image caused by the facets can be eliminated.
[0083] As described above, also in the sixth embodiment, the facets of the SiC epitaxial layer 20 on the first side 11 can be softened and made less noticeable.
[0084] The fifth embodiment and the sixth embodiment can also be applied to the second embodiment or the fourth embodiment. That is, the first side 11 of each partial mark 10a may have one concave pattern P1.
[0085] (Note) (1)
[0087] A method for manufacturing a semiconductor device comprises the following steps: forming a first mark, the first mark being recessed from a first direction substantially perpendicular to a first surface of a SiC substrate, and being surrounded on the first surface by a first side and a third side extending in a second direction orthogonal to the first direction, and a second side and a fourth side extending in a third direction orthogonal to the first direction and the second direction, and having at least one concave pattern on the first side being recessed in the third direction from the first side toward the third side which is an opposite side to the first side; and epitaxially growing a SiC layer on the first mark of the SiC substrate. (2)
[0089] The method according to (1), wherein the first surface is inclined from a (0001) crystal plane of the SiC substrate in a direction opposite to the third direction. (3)
[0091] The method according to (1) or (2), wherein a plurality of the concave patterns are formed on the first side. (4)
[0093] The method according to (1) or (2), wherein a recessed width of the concave pattern in the third direction is smaller than half of a length of the second side. (5)
[0095] The method according to any one of (1) to (4), wherein the first side and the third side are sides in the long side direction of the first mark,
[0096] The second side and the fourth side are shorter than the first side and the third side. (6)
[0098] The method according to any one of (1) to (4), wherein a plurality of the first marks are arranged at first intervals in the second direction. (7)
[0100] The method according to any one of (1) to (6), wherein the concave pattern is composed of straight lines inclined with respect to the second direction when viewed from the first direction. (8)
[0102] The method according to any one of (1) to (6), wherein the concave pattern has a substantially arc shape when viewed from above as seen from the first direction. (9)
[0104] The method according to any one of (1) to (8), wherein the plurality of first marks are arranged along the second direction or the third direction when viewed from above in the first direction. (10)
[0106] The method according to (1), wherein the first surface is inclined from the (0001) plane toward a <11-20> direction. (11)
[0108] A semiconductor substrate comprising:
[0109] a SiC substrate having a first surface, the SiC substrate having a first mark recessed in a first direction substantially perpendicular to the first surface; and
[0110] A SiC epitaxial layer is disposed on the first mark,
[0111] The first mark in the first surface is surrounded by a first side and a third side extending in a second direction orthogonal to the first direction, and a second side and a fourth side extending in a third direction orthogonal to the first direction and the second direction, and the first side has at least one concave pattern that is recessed in the third direction from the first side toward the third side that is the opposite side of the first side. (12)
[0113] The semiconductor substrate according to (11), wherein the first face is inclined from a (0001) crystal plane of the SiC substrate in a direction opposite to the third direction. (13)
[0115] The semiconductor substrate according to (11) or (12), wherein a plurality of the concave patterns are formed on the first side. (14)
[0117] The semiconductor substrate according to any one of (11) to (13), wherein a recessed width of the concave pattern in the third direction is smaller than half of a length of the second side. (15)
[0119] The semiconductor substrate according to any one of (11) to (14), wherein the first side and the third side are sides in the longitudinal direction of the first mark,
[0120] The second side and the fourth side are shorter than the first side and the third side. (16)
[0122] The semiconductor substrate according to any one of (11) to (15), wherein a plurality of the first marks are arranged at first intervals in the second direction. (17)
[0124] The semiconductor substrate according to any one of (11) to (16), wherein the concave pattern is composed of straight lines inclined with respect to the second direction when viewed from the first direction. (18)
[0126] The semiconductor substrate according to any one of (11) to (16), wherein the concave pattern has a substantially arc shape when viewed from above as seen from the first direction. (19)
[0128] The semiconductor substrate according to any one of (11) to (18), wherein a plurality of the first marks are arranged along the second direction or the third direction when viewed from above in the first direction. (20)
[0130] The semiconductor substrate according to (11), wherein the first surface is inclined from the (0001) plane in a <11-20> direction.
[0131] Description of Reference Numerals
[0132] 1: SiC substrate
[0133] 10: Marking
[0134] 20: SiC epitaxial layer
[0135] F1: First side
[0136] C: Semiconductor chip
[0137] 3: Cutting line
[0138] 11-14: First side to fourth side.
Claims
1. A method for manufacturing a semiconductor device, comprising the following steps: forming a first mark, the first mark being recessed from a first direction substantially perpendicular to a first surface of the SiC substrate, being surrounded by a first side and a third side extending in a second direction perpendicular to the first direction, and a second side and a fourth side extending in a third direction perpendicular to the first direction and the second direction, and having at least one concave pattern recessed in the third direction from the first side toward the third side which is an opposite side to the first side, on the first side; and A SiC layer is epitaxially grown on the first mark of the SiC substrate.
2. The method according to claim 1, wherein: The first surface is inclined from a (0001) crystal plane of the SiC substrate in a direction opposite to the third direction.
3. The method according to claim 1, wherein: A plurality of the concave patterns are formed on the first side.
4. The method according to claim 1, wherein: A recessed width of the concave pattern in the third direction is smaller than half of a length of the second side.
5. The method according to any one of claims 1 to 4, wherein: The first side and the third side are sides in the long side direction of the first mark, The second side and the fourth side are shorter than the first side and the third side.
6. The method according to any one of claims 1 to 4, wherein: A plurality of the first marks are arranged at first intervals in the second direction.
7. The method according to any one of claims 1 to 4, wherein: The concave pattern is formed of straight lines inclined with respect to the second direction in a plan view seen from the first direction.
8. The method according to any one of claims 1 to 4, wherein: The concave pattern has a substantially arc shape when viewed from above as viewed from the first direction.
9. The method according to any one of claims 1 to 4, wherein: In a plan view viewed from the first direction, the plurality of first marks are arranged along the second direction or the third direction.
10. The method according to any one of claims 1 to 4, wherein: The first surface is inclined from the (0001) plane toward the <11-20> direction.
11. A semiconductor substrate comprising: a SiC substrate having a first surface, the SiC substrate having a first mark recessed in a first direction substantially perpendicular to the first surface; and A SiC epitaxial layer is disposed on the first mark, The first mark in the first surface is surrounded by a first side and a third side extending in a second direction orthogonal to the first direction, and a second side and a fourth side extending in a third direction orthogonal to the first direction and the second direction, and the first side has at least one concave pattern that is recessed in the third direction from the first side toward the third side that is the opposite side of the first side.
Citation Information
Patent Citations
Panel mounting device
JP1985041292A
Alignment pattern forming method of epitaxial wafer
JP2000252189A
Method for manufacturing silicon carbide semiconductor device
JP2015207595A