Semiconductor package model generation system and related method

Through the object file module and the three-dimensional modeling module combined with the dynamic stacking method, the precise three-dimensional model of semiconductor packages is automatically generated, solving the problems of low generation model efficiency and difficult to express complex structures in the prior art, and achieving fast and accurate model generation.

CN119790393APending Publication Date: 2025-04-08SEMICON COMPONENTS IND LLC
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Patent Information

Application Number
CN202480003802.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-04-29
Filing Date
2024-05-08
Publication Date
2025-04-08

AI Technical Summary

Technical Problem

The prior art is difficult to automatically and efficiently generate accurate three-dimensional models for semiconductor package design, especially when dealing with complex clip structures and multi-component coupling situations.

Method used

By using the object file module and the three-dimensional modeling module, combined with the dynamic stacking method, each component of the semiconductor package and its relative positional relationship is identified to generate an object file containing component reference objects and characteristics. This method allows users to select and place components such as semiconductor dies, electrical connectors, and automatically allocate their position and relationships in the three-dimensional model through a computer interface.

Benefits of technology

It realizes the rapid and automated generation of accurate three-dimensional models of semiconductor packages, reducing the time and errors of manual data input, and accurately representing complex physical relationships and component structures.

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Abstract

A particular implementation of an object file modeled using a three-dimensional modeling module may include: a first object defined as a root object and corresponding to a first component of a semiconductor package; a second object corresponding to a second component of the semiconductor package directly physically coupled to the first component of the semiconductor package, the second object including a reference to the root object; and at least a third object corresponding to a third component of the semiconductor package and including a reference to the root object, the third component of the semiconductor package being directly coupled to a fourth component of the semiconductor package, the indirect physical coupling of the semiconductor package to the second component of the semiconductor package.
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Description

[0001] Cross-references to related patent applications

[0002] This document claims the benefit of the filing date of U.S. Provisional Patent Application No. 63 / 509,729, filed on June 22, 2023, entitled “MFIT Automated 3D Model Generation of Arbitrary Power Modules,” granted to Neumaier et al., the disclosure of which is hereby incorporated by reference in its entirety. background 1. Technical Field

[0004] Aspects of this document generally relate to systems and methods for use in semiconductor package design. 2. Background technology

[0005] Semiconductor packages have been designed to provide an air connection between a semiconductor die and a circuit or motherboard to which the semiconductor package is attached. Some semiconductor packages mechanically protect the semiconductor die from shock or vibration. Other semiconductor packages assist in protecting the semiconductor die from electrostatic discharge. Summary of the invention

[0006] A specific implementation of a method for generating an object file for modeling using a three-dimensional modeling module may include: using one or more processors: receiving a drawing interchange format file from a user using a first computer interface, the drawing interchange format file including a plurality of objects; and using a second computer interface, receiving a selection of a semiconductor package type from the user; receiving a selection of a SPICE model of at least one semiconductor die from the user; receiving coordinates of a location of the at least one semiconductor die; and receiving coordinates of a location of at least one electrical connector. The method may include: using an object file module, determining a root object of the plurality of objects in the drawing interchange format file; and using the coordinates of the location of the at least one semiconductor die, assigning a relationship of the at least one semiconductor die relative to the root object or any one of the plurality of objects. The method may include: recording a reference object of the at least one semiconductor die and one or more properties of the at least one semiconductor die in an object file; and using the coordinates of the location of the at least one electrical connector, assigning a relationship of the at least one electrical connector relative to the root object or any one of the plurality of objects. The method may include: recording a reference object of the at least one electrical connector and one or more characteristics of the at least one electrical connector in the object file; and for each of the multiple objects: assigning a relationship to each object relative to the root object or another object in the multiple objects to establish a reference object for each object; and recording the reference object of each object and one or more characteristics of each object in the object file; and storing the object file.

[0007] A specific implementation of a method for generating an object file for modeling using a three-dimensional modeling module may include one, all, or any of the following:

[0008] The at least one electrical connector may be one of or both of at least one bonding wire and at least one clip.

[0009] The method may include: receiving a selection of one of a resistor, a gate driver, a capacitor, or any combination thereof from the user using the second computer interface; receiving coordinates of a location of the one of the resistor, the gate driver, the capacitor, or any combination thereof; assigning a relationship of the one of the resistor, the gate driver, the capacitor, or any combination thereof relative to the root object or any one of the multiple objects using the coordinates of the location of the one of the resistor, the gate driver, the capacitor, or any combination thereof; and recording a reference object of the one of the resistor, the gate driver, the capacitor, or any combination thereof and one or more characteristics of the one of the resistor, the gate driver, the capacitor, or any combination thereof in the object file.

[0010] The second computer interface may include a canvas portion on which the plurality of objects from the drawing interchange format file may be displayed, and on which the user places the at least one semiconductor die and the at least one electrical connector at desired locations relative to the plurality of objects to determine the coordinates of the location of the at least one semiconductor die and the coordinates of the at least one electrical connector.

[0011] The second computer interface may include a button configured to execute the object file module using a current configuration of the plurality of objects, the at least one semiconductor die, and the at least one electrical connector displayed on the canvas portion.

[0012] The second computer interface may include a button configured to transfer the object file to the three-dimensional modeling module for processing.

[0013] A specific implementation of an object file modeled using a three-dimensional modeling module may include: a first object, which is defined as a root object and corresponds to a first component of a semiconductor package; a second object, which corresponds to a second component of the semiconductor package that is directly physically coupled to the first component of the semiconductor package, and the second object includes a reference to the root object; and at least a third object, which corresponds to a third component of the semiconductor package and includes a reference to the root object, and the third component of the semiconductor package is directly coupled to a fourth component of the semiconductor package that is indirectly physically coupled to the second component of the semiconductor package.

[0014] A specific implementation of an object file modeled using a three-dimensional modeling module may include one, all, or any of the following:

[0015] The fourth component of the semiconductor package may correspond to a fourth object including a reference to one of the root object, the second object, or the third object.

[0016] The first object, the second object, and the third object may each include one or more properties of the first component, the second component, and the third component, respectively.

[0017] The one or more characteristics may include one of size, material, or name.

[0018] The second object may include a Z position relative to the root object.

[0019] The third object may include a Z position relative to the root object.

[0020] The fourth object may include a Z position relative to one of the root object, the second object, or the third object.

[0021] The three-dimensional modeling module may be configured to start modeling from the root object.

[0022] A specific implementation of a method for designing a clip may include: using one or more processors: receiving a drawing interchange format file from a user using a first computer interface, the drawing interchange format file including a plurality of objects; and receiving a selection of a semiconductor package type from the user using a second computer interface. The method may include: receiving a selection of at least one semiconductor die from the user; receiving a selection of a clip from the user; and receiving coordinates of a location of the at least one semiconductor die using the second computer interface. The method may include: receiving coordinates of an outer boundary of the clip; receiving a thickness of the clip; and receiving coordinates of at least one fixed portion of the clip within the outer boundary of the clip. The method may also include: receiving coordinates of a first transition region of the clip within the outer boundary of the clip.

[0023] A specific implementation of a method for designing a clip may include one, all, or any of the following:

[0024] Receiving coordinates of the outer boundary of the clip may further include receiving a distance from a clip reference.

[0025] The method may include receiving coordinates of a hole in the clip within the outer boundary of the clip.

[0026] The method may include receiving coordinates of a second transition region of the clip within the outer boundary of the clip and defining a flexible region between the first transition region and the second transition region.

[0027] The method may further include receiving a selection of a portion of the first transition region of the clip, and in response, receiving coordinates of a line where the first transition region may not exist.

[0028] The method may include generating, using an object file module, a plurality of objects corresponding to the clip, and storing the plurality of objects in an object file.

[0029] The foregoing and other aspects, features and advantages will be apparent to those skilled in the art from the detailed description and accompanying drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Specific implementations will be described below in conjunction with the accompanying drawings, in which like reference numerals represent like elements, and:

[0031] Figure 1is a perspective view of a particular implementation of a semiconductor package prior to being molded or included in a housing;

[0032] Figure 2 yes Figure 1 a side view of a semiconductor package;

[0033] Figure 3 yes Figure 1 a detailed perspective view of a portion of a semiconductor package;

[0034] Figure 4 yes Figure 1 An exploded perspective view of a specific implementation of a semiconductor package;

[0035] Figure 5 yes Figure 1 a detailed exploded view of a portion of a semiconductor package;

[0036] Figure 6 yes Figure 1 a detailed exploded view of a portion of a semiconductor package;

[0037] Figure 7 yes Figure 1 a detailed exploded view of a portion of a semiconductor package;

[0038] Figure 8 yes Figure 1 A side exploded view of a semiconductor package;

[0039] Fig. 9 is a schematic diagram of a stackup for modeling a specific implementation of a semiconductor package;

[0040] Fig.10 is a schematic diagram of a stackup for modeling another specific implementation of a semiconductor package;

[0041] Fig.11 It is a graph of the six objects relative to the coordinate axes;

[0042] Fig.12 A printout that is part of the implementation of an object file;

[0043] Fig.13 is a drawing of the computer interface, where the outer boundaries of the clip are drawn;

[0044] Fig.14 yes Fig.13 A drawing of a computer interface showing Fig.13 The range of the clip;

[0045] Fig.15 yes Fig.13 A drawing of a computer interface illustrating the location of a fixed portion of a clip;

[0046] Fig.16 yes Fig.13 A drawing of a computer interface illustrating the four fixed parts;

[0047] Fig.17 yes Fig.13 A drawing of a computer interface illustrating two holes;

[0048] Fig.18 yes Fig.13 Drawing of a computer interface for , illustrating a deselection transition at the edge of two fixed parts;

[0049] Fig.19 yes Fig.13 A drawing of a computer interface illustrating a user's storage selection;

[0050] Fig. 20 is a flow chart of a first specific implementation of a method for modeling a semiconductor package;

[0051] Fig.21 is a flow chart of a second specific implementation of a method for modeling a semiconductor package;

[0052] Fig. 22 is a block diagram of the components of a system used to model a power electronics module;

[0053] Fig.23 is a drawing that includes multiple objects in a drawing interchange format view when viewed using a computer interface;

[0054] Fig.24 is a drawing of a computer interface for receiving and processing drawing interface files; and

[0055] Fig.25 A drawing of a computer interface used to lay out package components, process object files, and generate three-dimensional models. DETAILED DESCRIPTION

[0056] The present disclosure, its aspects, and specific implementations are not limited to the specific components, assembly processes, or method elements disclosed herein. Many additional components, assembly processes, and / or method elements known in the art that meet the expectations of a semiconductor package model generation system will be obviously used with specific specific implementations of the present disclosure. Thus, for example, although the present invention discloses specific embodiments, such specific implementations and implementation components may include any shape, size, style, type, model, version, measurement, concentration, material, quantity, method element, step, etc., and implementation components and methods known in the art for such semiconductor package model generation system that meet the expected operation and method.

[0057] refer to Figure 1 , illustrates a perspective view of a specific implementation of a semiconductor package 2. In this particular implementation, the structure of the semiconductor package 2 is illustrated before molding with a molding compound, wherein the molding exposes the leads 4, 6 or the housing is fastened to the leads 4, 6, which also exposes the leads 4, 6. Figure 2 A side view of a semiconductor package 2 is illustrated showing the relative heights of the package components including the leads 4 , 6 , the substrate 8 , and the clips 10 , 12 . Figure 1 to Figure 2 Also illustrated are bond wires that provide electrical connections between the various dies and the assembly of leads and / or clips.

[0058] refer to Figure 3 , illustrates a detailed perspective view of a semiconductor package 2 showing a semiconductor die 14 bonded / attached to a substrate 8. In this view, it can be seen that the leads 4 are attached to a component 16, which is then attached to the substrate 8 and bonding wires 18. In this view, the structure of the clip 12 is also visible, showing it having fixed portions 20, 22, portions that are attached to the semiconductor die 14 and the substrate 8, holes 24 passing therethrough, and transition portions 26, 28, wherein the structure of the clip 12 rises between one height level above the substrate 8 to another height level, thereby forming a bridge between the two semiconductor dies 14.

[0059] Figure 4 The semiconductor package 2 is illustrated in an exploded view. Although the leads 4, 6 are illustrated as being made of separate components in this view, this is a product of the explosion of the three-dimensional structure of the schematic diagram. In various specific implementations, the leads 4, 6 can be made of a single lead frame stamped from a single metal sheet. The upwardly directed portion of the lead is formed by bending. The lead frame forming the leads can then be soldered / fused / sintered to the substrate 8. Figure 6 A detailed view of the exploded structure of lead 4 is illustrated. Figure 6 , another detailed view of the exploded structure of semiconductor package 2 provides more details regarding the location of semiconductor die 14 . Figure 7 Another detailed view of the exploded structure of the clip 12 is shown, indicating that the clip includes a main planar portion 30; transition portions 26, 28; additional planar portions 32, 34 between the transition portions 26, 28; contact portions 36, 38; and descending portions 40, 42 transitioning between the contact portions 36, 38 and the main planar portion 30. Figure 8 The side view illustrated in exemplifies the relative Z-axis / direction positioning of various portions of the clips 10 , 12 and the die 14 .

[0060] like Figures 1 to 8As illustrated by the various views of the semiconductor package design in FIG. 1 , there are a number of portions of the semiconductor package that are not directly physically attached to the semiconductor die or substrate. Most of the components of the clips 10, 12 (e.g., including the main planar portion 30; transition portions 24, 28; and additional planar portions 32, 34) are not directly physically coupled to the semiconductor die, but are instead coupled through other portions of the clip (including descending portions 40, 42). This disconnection between these portions and the substrate / die means that it is difficult to view the structure of the semiconductor package as a simple stack of components 44 (e.g., FIG. 1 ). Fig. 9 Detailed implementation of various modeling modules of the semiconductor package (schematic diagram of FIG. 4 ) fails to successfully construct a structural model of the semiconductor package with respect to electrical, parasitic, and / or thermal performance. While a simple layer stack 44 is suitable for a substrate / die combination having an electrical connector in the form of a bond wire or a single layer clip, the layer stack does not work when a more complex clip is employed or for more than one lead (e.g., leads 4, 6) that includes a component that is directly coupled to the substrate.

[0061] Various system and method implementations disclosed in this document employ a dynamic stackup approach that specifies a relationship of at least a Z distance / position coordinate for each component of a semiconductor package relative to another component or relative to a root / reference layer / component. In various other implementations, X distance / position and / or Y distance / position relationships may also be specified. Reference Fig.10 , illustrates this approach where layer 0 is defined as the root layer and therefore has no other reference layers. The position of layer 1 is then specified relative to layer 0, and the position of layer 12 is specified relative to layer 1. However, layer 37 is illustrated as having the option of being specified relative to layer 1 or layer 12, depending on whether layer 37 is directly physically connected to either layer, or whether it is more convenient to define the position of layer 37 relative to layer 1 or layer 12. For example, if the semiconductor package component that forms layer 37 is physically closer to layer 1, the Z position of layer 37 involves smaller amplitude values ​​than if the position of layer 37 was defined relative to layer 12. However, if layer 37 is directly physically coupled to layer 12, it would be more convenient to define the Z position of layer 37 relative to layer 12. Because this technology can be used to identify each component of a semiconductor package (including each subcomponent of each component) as a "layer" and identify that component in space in relationship to another nearby or convenient component, substrate components, die, resistors, capacitors, controllers, and other electrical connectors (such as (as a non-limiting example) bonding wires, wire bonds, pins, leads, clips, intermediate circuit boards, intermediate leads, or any other electrical connection structures) can be represented in this manner.

[0062] As a result of using this technique to define the relationships between different components of a semiconductor package as a single root layer / component, an object file module in the system is able to collect and store information about each component of the semiconductor package in the form of an object corresponding to each component. In various specific implementations, the object includes an identification of a reference object (reference layer) for the object and one or more characteristics of the component. The one or more characteristics may include (as non-limiting examples) the type of component, one or more coordinates of the component in a coordinate system covering the semiconductor package, the type of material, the size of the component, the name of the component, or any other desired characteristics of a particular component of the semiconductor package. By identifying the reference object and the one or more characteristics, the three-dimensional modeling module is then able to begin the process of building one or more models of the semiconductor package, as will be discussed below.

[0063] refer to Fig.11 , illustrates a schematic representation of components of a semiconductor package as objects. A root object 46 has been identified here. Although the root object is the lowest object in the Z direction according to the axis on the left, this is not necessarily the case in all specific implementations, and this is only for convenience because Fig.11 Any object in the schematic diagram in can be declared as a root object (because the Z direction coordinate can be positive or negative). Object 1 (48) is specified relative to the root object in its X coordinate value, Y coordinate value, and Z coordinate value, as is object 3 (50), even though the component of the semiconductor package corresponding to object 3 is not directly physically coupled to the component corresponding to the root object 46. Object 4 (52) is specified by reference to object 1 (48), while object 5 (54) is specified by reference to object 3 (50), even though its corresponding semiconductor package component is not directly physically coupled to object 3 (50). Finally, object 2 (56) is specified relative to object 3 (50). This flexibility in specifying a reference object as a root object or any other object in a set of objects corresponding to a component of a semiconductor package provides great flexibility for components that are connected to components other than several components or at a certain distance from the components of the root object. The data structure also allows the three-dimensional modeling module to accurately determine the physical connections and relationships between different components when using the object representation as input data.

[0064] This object-oriented / object-driven approach ultimately provides a better representation of each component in the semiconductor package relative to the root object itself, thereby including data in the object file formed by the object file module and then used by the 3D modeling module for modeling. Fig.12, illustrates a portion of an implementation of an object file 58 in a human-readable format, which shows data associated with two objects 60 and 62. The format of this particular object file implementation is JavaScript Object Notation (JSON), but other formats may also be used in various method and system implementations, such as (as a non-limiting example) plain text, Extensible Markup Language (XML), Hypertext Markup Language (HTML), a database rather than a flat file, or any other format that can store data in a retrievable format. Object 60 is a root object because the key "Reference" is set to a null value, indicating that a reference object value is stored here. Object 60 also stores properties, including its height, the presence of a cutout, the material type, the name, the type, the shape type (here a polygon), and the X / Y coordinate values ​​of the polygon corners. Object 60 is also illustrated as also including a distance from a reference object, which in this case is 0.0 because object 60 is a root object.

[0065] Object 62 contains similar properties, except that its reference object is indicated as object 60 because the value of the string name listed in the reference key is the name of object 60, "OBJECT_SiC_DBC_BOTTOM_COPPER_SiC_1". The distance from the reference object is indicated as 0.0, which makes sense because object 62 corresponds to a ceramic layer in a double-bonded ceramic substrate, where object 60 is the first copper layer. This same format, the distance from the reference object in one, all, or any of the X, Y, or Z coordinates, and one or more properties of the object for each of the objects including the reference object may be included in the object file. A specific implementation of an object file module is used to collect, organize into object files, and store corresponding object files in a machine-readable electronic memory coupled to the object file module. One or more processors can be used to operate machine-readable instructions that direct the operation of the object file module in various system specific implementations.

[0066] With the object file in hand, system and method implementations can begin the process of developing various modules, including a three-dimensional model for a semiconductor package, so that various electrical and thermal parameters of the semiconductor package can be determined. Fig. 20, a flow chart illustrating a specific implementation of a method for generating a model of a semiconductor package 64. The output of the method involves creating a SPICE model of the semiconductor package and various models of the thermal and electrical properties of the semiconductor package (including the semiconductor die included in the package). The goal of this work is to create sufficiently accurate electrical and / or thermal models to allow circuit designers to reliably incorporate the resulting semiconductor package into a circuit board / motherboard design and avoid discovering failures due to incorrect / unsatisfactory performance of the semiconductor package when the device / system is finally built. Additional information regarding package modeling activities in dashed blocks 66, 68, 70, and 72 can be found in the following references: U.S. Patent No. 11,481,532, serial number 17 / 076,039, filed on October 21, 2020, and issued on October 25, 2022, to Victory et al., entitled “Systems and methods for designing a discrete device product” (the '532 patent); U.S. Patent No. 11,481,533, serial number 17 / 076,072, filed on October 21, 2020, and issued on October 25, 2022, to Victory et al., entitled “Systems and methods for designing a discrete device product” (the '533 patent); and U.S. Patent No. 11,481,534, serial number 17 / 076,073, filed on October 21, 2020, and issued on October 25, 2022, to Xiao et al., entitled “Automated power discrete and module model generation for system-level simulators” (the '534 patent). Model Generation for System Level Simulators)”, serial number 18 / 058,382, filed on November 23, 2022 (the '382 application); the disclosure of each of these applications is hereby incorporated by reference in its entirety.

[0067] In this document, the work of the object file module is represented by the dashed box 74, and the work of the three-dimensional modeling module is represented by the dashed box 76. Fig. 20In the specific implementation of the method illustrated in the process flow of the flowchart of the process flow, the process first transmits a drawing interchange format file (DXF file) of a specific semiconductor package design to a specific system user. The specific system user has the experience and system access rights to use the system to perform manual data processing and formatting operations to input appropriate information about the semiconductor from the DXF file so that it can be selected in the system by other system users as the basis for additional modeling package designs (boxes 78, 80, 82). Since this is a manual process involving quality assurance (QA), the process of inputting and preparing semiconductor package designs from DXF files may require 1 to 2 weeks of manual work. After the semiconductor package design is incorporated into the system, the system user can select the semiconductor package (box 84), specify a specific semiconductor die and import the associated modeling die SPICE model and graphic design system (GDS) model (box 86). In the system, the computer interface allows the user to arrange various electrical connectors (bonding wires, clips, pins, etc.) on the semiconductor package design and place a specific semiconductor die (box 88), while assigning material properties (box 90) and assigning one or more ports to the design (box 92). At this point, the object file module is ready to obtain coordinate information about each object in the design and generate an object file, which is formatted as a JSON file in this specific implementation (block 74). The object file is then forwarded to the 3D modeling module, which begins analyzing the object file and uses it to build a 3D model of the semiconductor package design, including all components of the package (semiconductor die, wire bonds, clips, leads, and substrate), which is then used to Fig. 20 , and subsequent thermal, electrical, and model development operations as illustrated in FIG. 7 (block 76 ).

[0068] However, this manual data entry process is very time-consuming and even with manual data entry, it is not possible to understand how Figures 1 to 8 The semiconductor package design illustrated in FIG. 1 is a semiconductor package design illustrated in FIG. 1 , because the object file module in the specific implementation of the method is only based on Fig. 9 The layer model builds and references the objects in the semiconductor package. Therefore, Fig. 20 The method implementation 64 illustrated in the example cannot construct an object file that can be used to construct an accurate three-dimensional model for subsequent modeling operations even through manual data entry.

[0069] refer to Fig.21 , a flowchart illustrating another specific implementation of a method for generating a model of a semiconductor package 94 is shown. Fig. 20Compared to the method implementation 64 illustrated in FIG. 64 , the method utilizes automated DXF file processing operations that allow a general system user to import a DXF file and perform the required setup activities to make the associated semiconductor package design available in the system (block 96). In this process, various material properties of semiconductor package components can be assigned so that the user does not need to enter these properties when designing a specific semiconductor package based on the semiconductor package design (see the processes of blocks 98, 100, 102, and 104, each of which is similar to Fig. 20 In the specific implementation of this method, use Fig.10 and Fig.11 The layer / object referencing method of the semiconductor package relates the resulting multiple objects associated with the components of the semiconductor package. As previously described, the method allows the physical relationships of the semiconductor package to be accurately represented using this flexible reference object method based on the root object. In a specific implementation of the method, the object file module is configured to create a corresponding object file, in this case a JSON formatted file (box 106), using the root object and reference object assigned to each of the multiple objects corresponding to the multiple components in the semiconductor package. The resulting object file is received by the three-dimensional modeling module and used to build an accurate three-dimensional model including the physical relationships of all semiconductor package components (box 108). The specific implementation of the method 94 is capable of creating a physical model such as Figures 1 to 8 The semiconductor package model illustrated in Figure 1 is created in a fraction of the time it takes to create a new package, as the use of root objects and flexible referencing techniques also facilitates the import and creation of new packages into the system without requiring manual work by experienced users. The resulting 3D model is then converted to Fig. 20 Similar method elements illustrated in the method implementation are used in a similar manner in this method implementation.

[0070] refer to Fig. 22 , illustrating a schematic diagram of the self-service process illustrated in 96 to box 106. Here, the semiconductor package (here, the power electronic module 110) can be described as including both a static portion 112 and a flexible portion 114. Those parts that are considered static are those included in the DXF file associated with the package design because these parts are the result of separate design activities that ultimately create the DXF file itself. These static components are not those components whose positions are designed to be adjusted in the specific implementation of the method, so they are processed as multiple objects in the system, each object corresponding to a semiconductor package component that has a defined physical relationship with one or more other components of the semiconductor package. The multiple objects and associated relationships (static parts / objects) are collected / formed by processing the DXF file.

[0071] The flexible portions 114 include those parts (clip, die, bonding wires, etc. 116) that a user can select and place using a specific implementation of the systems and methods disclosed herein to accommodate a desired level of performance or customize the package design to a particular customer's specifications / configuration / performance requirements. As illustrated, the system creates a computer interface (network interface 118) that can allow a DXF file to be imported and processed in a first computer interface, and allow a user to add / specify locations for flexible portions in a second computer interface. After processing the DXF file and placing the flexible portions, an object file module 120 processes the objects and assigns / uses corresponding reference objects (including root objects) to these objects to form an object file (generated in JSON format in this case) 122.

[0072] refer to Fig.23 , illustrating the inclusion of Figures 1 to 8 A two-dimensional graphical representation 124 of a semiconductor package design in a DXF file corresponding to the semiconductor package design of FIG. The pattern of the top layer 126 of the double bond copper (DBC) substrate and the positions and sizes of the various components of the leads 4, 6 oriented horizontally / parallel to the included substrate are illustrated here. All of these components need to be associated with corresponding objects so that they can be assembled into a three-dimensional model of the package for subsequent modeling.

[0073] Fig.24 A specific implementation of a first computer interface 128 is illustrated, which is used by a user to import a DXF file and provide the required processing feedback so that multiple objects corresponding to the components of the semiconductor package included in the DXF file can be properly created and referenced using the root object and each other. The first computer interface also allows the user to create / import the package design into the system via automatic selection to perform operations that an experienced user must perform manually using various selectors and drop-down menus so that it is available to all users of the system. As illustrated, the user can use the first computer interface 128 to adjust / set / assign various options, material types, equipment specifications, and other parameters.

[0074] After uploading the DXF file and processing it using the first computer interface 128, the system references Fig.25A second computer interface 130 is generated. As illustrated, the second computer interface provides a user with a visual two-dimensional canvas on which objects in the DXF file are drawn, and allows the user to select and place various flexible objects, such as semiconductor dies, gate drivers, resistors, capacitors, bonding wires, clips, or any other desired package components that the system allows the user to include. As each flexible component is selected and placed, its coordinates (X, Y, Z) and related properties are received by the system and included in the associated object of the component, including assigning a relationship between the component and a root object or another object in a plurality of objects of the semiconductor package. When the placement of the flexible component is completed, a button (here, a "Save Plan" button) is used to initiate the generation of the object, record the coordinates, assign the relationship, and record one or more properties of the objects in the package into memory. Another button (here, a "Transfer to ONBDS" button) is used to transfer the object and associated data to an object file module, which then obtains the plurality of objects and completes the assignment of data to each object and formatting the object into a desired object file format, such as any format disclosed herein (here, a JSON formatted file). When the process is completed, the second computer interface also includes a button (here "Submit Ansys 3D Model"), which starts processing the object file through the three-dimensional modeling model to form a three-dimensional model used by other system components, thereby completing the modeling of the designed semiconductor package.

[0075] As illustrated, the second computer interface also includes various buttons / selectors that allow the user to add semiconductor dies, rotate semiconductor dies, add gate drivers or other operating components, add resistors, add capacitors, and enter a routing mode where bonding wires and clips can be placed. In the second computer interface, a package design is selected to populate the canvas with information about objects created by processing the DXF file. In addition, when a semiconductor die is selected and placed, the system also selects a die SPICE model in the system that corresponds to the die and associates the die SPICE model with the semiconductor package being created for later model processing.

[0076] The aforementioned second computer interface can be used in various system and method implementations. The second computer interface can also include an option / interface design that allows a user to design a clip for one or more dies / components of a package, which can then be used Figure 10 to Figure 11 The clip design interface is accessed by the user by pressing a button on a second computer interface, such as Advanced Clip, which places the canvas in a mode that calls up the additional interface components needed to complete the clip design. Fig.13, illustrates an example of a clip design interface 132 including a canvas 134 that includes a two-dimensional view of the static and flexible components placed so far in the design process. Fig.13 , the user has drawn a box 136 that represents the outer boundaries of the clip being designed. The user then sets the pixel resolution 138 in microns, which allows the system to correctly calculate the size and coordinate location of the clip components during the design process and during the object file creation process. The user can also set the reference object for the clip using the Clip Reference drop-down menu 140, which is any component located below the bounding box just drawn. The user can also set the thickness of the clip using the Thickness drop-down menu 142 in the interface view. The user then presses the Next button to bring up a new interface component for designing the rest of the clip.

[0077] refer to Fig.14 , illustrates the updated computer interface 132, and also illustrates the change in color of the bounding box 136 drawn for the clip. In this specific implementation, the color of the bounding box 136 has changed to green, indicating that the area of ​​the clip is not in contact with any other object of the package. When the clip is in this state, the "Distance from Clip Reference" box 144 allows the user to specify the distance between the flexible portion of the clip and the clip reference. Different flexible areas can be set to different distances from the clip reference to help the system capture changes in the shape of the clip vertically (in the Z direction) from the clip reference. Since the flexible portion is now represented as a collection or portion of "pixels" set at the previously set pixel resolution, each pixel can be individually assigned a clip reference distance or state, or can be assigned to a group of selected pixels during the clip design process. Each pixel can be changed to a fixed state, which means that the corresponding area of ​​the clip is not fixed to the object below it, or to a hole (void) state, which means that the pixel corresponds to a hole in the clip. The color of each pixel changes to orange (fixed) and transparent (hole) accordingly. While these colors are used in this implementation, in various implementations, a variety of other contrasting color schemes may be employed. When the fixation / aperture areas are identified by selecting the appropriate pixels in the flexible region of the clip, the user presses the set button 146 to record the coordinates of these features of the clip in memory.

[0078] Fig.15 The computer interface 132 is illustrated after selecting the fixing region 148 and then setting it using the setting button 146. The fixing region 148 has been set to be fixed to directly physically contact M1, which is a semiconductor die in this specific implementation. The fixing region 148 is bounded by dark lines 150, which indicate that there are transition areas in the clip as the material of the clip bends / extends downward to reach the fixing region 148 in contact with the die M1. Fig.15It is illustrated that after selecting a region of the clip, when the "Clip Status Dropdown" menu 152 is set to Fixed, an additional dropdown menu contact 154 appears, which allows the user to select the component below the clip to which the clip is fixed. The "Set" button is then pressed to save the assignment of the configuration of the clip.

[0079] Fig.16 The computer interface 132 is illustrated after the four fixed regions 148, 156, 158, 160 are allocated. Fig.16 , regions 162, 164 are also assigned distances from the clip reference that are different from the clip reference height that was initially set, and therefore their color changes to a different green (a different color) than the color of the remaining flexible portion of the clip. The transition regions marking the transition to these different height regions are represented by lines 163 between these regions 162, 164. As illustrated, the height of region 164 has been set to 2000 microns, which is higher than the original 1000 micron height that was set for the original flexible region of the clip. In various implementations, the mouse can be hovered over those regions of the clip that have defined states and heights, and a pop-up box / window indicates the distance from the clip reference value, and / or the state is included in the pop-up box / window to assist the user.

[0080] Fig.17 The computer interface 132 is illustrated after selecting associated pixels and setting those pixels to the hole state to form the hole region 166. Fig.18 , illustrates the computer interface 132 after selecting lines 168 adjacent to the fixed area 158. In this particular interface design, selecting lines 168 changes these lines from a solid black to a gray state. This indicates that the transition edge on these lines no longer exists, and therefore there is no transition along that edge. Not all edges in a clip need to transition, so the ability to remove transition edges is provided in various method implementations disclosed herein. For example, a clip structure can include a downward transition on two opposing edges while the other two opposing edges remain unconnected to the lower surface. This situation may occur where the downward transition is achieved by cutting metal along unconnected opposing edges, which allows the material of the clip to transition downward on two sides while leaving openings on the other two sides.

[0081] Fig.19 The computer interface 132 is illustrated when the design process of the clip is complete. The user then presses the store button 170 and the system records the coordinates and attributes of all elements of the clip that have been designed and creates corresponding objects for inclusion in the object file using the object file module and various methods and system components described herein.

[0082] Various system implementations disclosed herein utilize various specific implementations of a method for generating an object file for modeling with a three-dimensional modeling module. The method includes: using one or more processors to receive a DXF file from a user using a first computer interface (such as the interface disclosed herein), wherein the DXF file includes a plurality of objects. The method also includes: using a second computer interface to receive a selection of a semiconductor package type from a user and receiving a selection of a SPICE model of at least one semiconductor die. In various method implementations, when a user selects a specific semiconductor die type that is already available in the system, the SPICE model can be automatically selected because the SPICE model of the die is also associated with the die and loaded into the system.

[0083] The method also includes: using a second computer interface to receive coordinates of a position of at least one semiconductor die (when the die is placed at a desired position on the canvas) and receiving coordinates of a position of at least one electrical connector (when a particular electrical connector is placed at a desired position on the canvas). The method also includes: using an object file module to determine a root object among a plurality of root objects of the DXF file, and using the coordinates of the position of the at least one semiconductor die to assign a relationship of the at least one semiconductor die relative to the root object or any one of the plurality of objects. Although the method includes this element, if the semiconductor die is the root object, various method implementations will instead include assigning relationships of other objects among the plurality of objects to the at least one semiconductor die because the semiconductor die is the root object.

[0084] The method also includes: using an object file module to record a reference object of at least one semiconductor die (if the semiconductor die is not a root object) and one or more characteristics of at least one semiconductor die (which may be any characteristics disclosed in this document) in an object file. The method also includes: using an object file module to use the coordinates of the position of at least one electrical connector to assign a relationship of at least one electrical connector relative to a root object (if at least one electrical connector itself is not a root object) or any one of a plurality of objects. The method also includes: using an object file module to record a reference object of at least one electrical connector and one or more characteristics of at least one electrical connector (which may be any characteristics disclosed in this document) in an object file. The method also includes: for each of a plurality of objects: assigning a relationship relative to a root object or another object in a plurality of objects to establish a reference object for each object. The method also includes: for each of a plurality of objects, recording a reference object of each object and one or more characteristics of each object in an object file. The method also includes: storing the object file in any format disclosed herein for subsequent use by a three-dimensional modeling module.

[0085] Various system and method implementations disclosed herein utilize a specific implementation of an object file for modeling through a three-dimensional modeling module. A specific implementation of an object file includes (in the form of machine-readable information / code / instructions) a first object, which is defined as a root object and corresponds to a first component of a semiconductor package. In various specific implementations, the first component can be any component of a semiconductor package that includes a semiconductor die. The object file also includes: a second object, the second object corresponds to a second component of the semiconductor package that is directly physically coupled to the first component of the semiconductor package, wherein the second object includes a reference to the root object. Similarly, the second object can correspond to any other component in the semiconductor package that is not a component corresponding to the root object. The object file also includes: at least a third object, the at least third object corresponds to a third component of the semiconductor package, wherein the third object has a reference to the root object, wherein the third component of the semiconductor package is directly coupled to a fourth component of the semiconductor package that is indirectly physically coupled to the second component of the semiconductor package. Here, the structure of the objects in the object file reflects the structure of the semiconductor package disclosed herein, wherein the various components are not directly physically coupled to the root object, but are only indirectly coupled through other objects that are ultimately coupled to the root object. The indirect physical coupling of the fourth component hinders the use of the 3D modeling module Fig. 9 The layered approach accurately models the package structure.

[0086] In various object file implementations, the fourth component corresponds to a fourth object. The fourth object includes a reference to a root object, a second object, or a third object. In various implementations, the second object includes a Z position relative to the root object, the third object includes a Z position relative to the root object, and / or the fourth object includes a Z position relative to the root object, the second object, or the third object.

[0087] In another specific implementation of a method for designing a clip, the method includes: using one or more processors to receive a DXF file from a user using a first computer interface, wherein the DXF file includes a plurality of objects. The method also includes: using a second computer interface to receive a selection of a semiconductor package type, at least one semiconductor die type, and a clip from a user. The method also includes: using the second computer interface to receive coordinates of a location of at least one semiconductor die, receiving coordinates of an outer boundary of the clip, and receiving coordinates of a thickness of the clip. The method also includes: receiving coordinates of at least one fixed portion of the clip within the outer boundary of the clip; and receiving coordinates of a first transition region of the clip. As disclosed herein, coordinates may be received upon selection of respective pixel regions of the second computer interface, then set, and then saved to an object file associated with a corresponding object using an object file module.

[0088] In various method implementations, the method includes receiving a distance from a clip reference of an outer boundary region. The method may also include receiving a distance from the clip reference for any specified region of the clip that has been identified from the flexible region within the outer boundary region of the clip. The method may also include receiving coordinates of one or more holes in the clip. The method may also include receiving a selection of the first transition region of the clip, and in response, receiving coordinates of a line where the first transition region no longer exists.

[0089] The one or more processors and related system components used in the various method implementations disclosed herein and for operating the various modules can be any remote platform, computing platform, electronic storage type, processor, external resource, computing device and / or network component disclosed in the '532 patent, the '533 patent and / or the '382 application previously incorporated by reference. The object file module and three-dimensional modeling module implementation disclosed herein can be added to the various module types disclosed in the '532 patent, the '533 patent and / or the '382 application previously incorporated by reference. For the three-dimensional modeling module, the three-dimensional modeling module can be any similar module, including a three-dimensional simulation module that utilizes the various three-dimensional modeling systems / techniques disclosed in the '532 patent, the '533 patent and / or the '382 application previously incorporated by reference.

[0090] In the above description involving specific implementations of the semiconductor package model generation system and the implementation components, sub-components, methods and sub-methods, it should be apparent that various modifications can be made without departing from the essence thereof, and that these specific implementations, implementation components, sub-components, methods and sub-methods can be applied to other semiconductor packages and related methods.

Claims

1. A method for generating an object file for modeling using a three-dimensional modeling module, the method comprising: Use one or more processors: receiving a drawing interchange format file from a user using a first computer interface (128), the drawing interchange format file comprising a plurality of objects; Using the second computer interface (130): receiving a selection of a semiconductor package type from the user; receiving from the user a selection of a SPICE model of at least one semiconductor die; receiving coordinates of a location of the at least one semiconductor die; as well as receiving coordinates of a location of at least one electrical connector; Using object file modules: determining a root object among the plurality of objects of the drawing interchange format file; assigning a relationship of the at least one semiconductor die relative to the root object or any one of the plurality of objects using the coordinates of the position of the at least one semiconductor die; recording a reference object of the at least one semiconductor die and one or more characteristics of the at least one semiconductor die in an object file; assigning a relationship of the at least one electrical connector relative to the root object or any one of the plurality of objects using the coordinates of the position of the at least one electrical connector; recording in the object file a reference object of the at least one electrical connector and one or more characteristics of the at least one electrical connector; as well as For each object in the plurality of objects: assigning a relationship to each object relative to one of the root object or another object in the plurality of objects to establish a reference object for each object; as well as recording in the object file a reference object for each object and one or more characteristics of each object; as well as The object file is stored. 2 . The method of claim 1 , wherein the at least one electrical connector is one of: at least one bonding wire, at least one clip, or both at least one bonding wire and at least one clip.

3. The method according to claim 1, further comprising: receiving, using the second computer interface (130), from the user a selection of one of a resistor, a gate driver, a capacitor, or any combination thereof; receiving coordinates of a location of said one of a resistor, a gate driver, a capacitor, or any combination thereof; assigning a relationship of the one of a resistor, a gate driver, a capacitor, or any combination thereof relative to the root object or any one of the plurality of objects using the coordinates of the position of the one of a resistor, a gate driver, a capacitor, or any combination thereof; as well as A reference object of the one of a resistor, a gate driver, a capacitor, or any combination thereof, and one or more characteristics of the one of a resistor, a gate driver, a capacitor, or any combination thereof are recorded in the object file.

4. The method of claim 1 , wherein the second computer interface ( 130 ) includes a canvas portion on which the plurality of objects from the drawing interchange format file are displayed, and the user places the at least one semiconductor die and the at least one electrical connector at desired locations relative to the plurality of objects on the canvas portion to establish the coordinates of the location of the at least one semiconductor die and the coordinates of the at least one electrical connector.

5. The method of claim 1, wherein the second computer interface (130) includes a button configured to execute the object file module using a current configuration of the plurality of objects, the at least one semiconductor die, and the at least one electrical connector displayed on the canvas portion.

6. The method of claim 1, wherein the second computer interface (130) includes a button configured to transfer the object file to the three-dimensional modeling module for processing.

7. An object file for modeling using a three-dimensional modeling module, the object file comprising: a first object defined as a root object and corresponding to a first component of a semiconductor package; a second object corresponding to a second component of the semiconductor package that is directly physically coupled to the first component of the semiconductor package, the second object including a reference to the root object; and At least a third object, the at least third object corresponding to a third component of the semiconductor package and including a reference to the root object, the third component of the semiconductor package being directly coupled to a fourth component of the semiconductor package, and the fourth component being indirectly physically coupled to the second component of the semiconductor package. 8 . The object file of claim 7 , wherein the fourth component of the semiconductor package corresponds to a fourth object, the fourth object including a reference to one of the root object, the second object, or the third object.

9. The object file of claim 7, wherein the first object, the second object, and the third object each include one or more properties of the first component, the second component, and the third component, respectively.

10. The object file of claim 9, wherein the one or more characteristics include one of size, material, or name.

11. The object file of claim 7, wherein the second object comprises a Z position relative to the root object.

12. The object file of claim 7, wherein the third object comprises a Z position relative to the root object.

13. The object file of claim 8, wherein the fourth object comprises a Z position relative to one of the root object, the second object, or the third object.

14. The object file according to claim 7, wherein the 3D modeling module is configured to start modeling from the root object.

15. A method for designing a clip, the method comprising: Use one or more processors: receiving a drawing interchange format file from a user using a first computer interface (128), the drawing interchange format file comprising a plurality of objects; Using the second computer interface (130): receiving a selection of a semiconductor package type from the user; as well as receiving a selection of at least one semiconductor die from the user; receiving a selection of a clip from the user; as well as Using the second computer interface (130): receiving coordinates of a location of the at least one semiconductor die; as well as receiving coordinates of an outer boundary of the clip; receiving a thickness of the clip; receiving, within the outer boundary of the clip, coordinates of at least one fixed portion of the clip; as well as Within the outer boundary of the clip, coordinates of a first transition region of the clip are received.

16. The method of claim 15, wherein receiving coordinates of the outer boundary of the clip further comprises receiving a distance from a clip reference.

17. The method of claim 15, further comprising receiving coordinates of a hole in the clip within the outer boundary of the clip.

18. The method of claim 15, further comprising receiving coordinates of a second transition region of the clip within the outer boundary of the clip and defining a flexible region between the first transition region and the second transition region.

19. The method of claim 15, further comprising receiving a selection of a portion of the first transition region of the clip, and in response, receiving coordinates of a line where the first transition region does not exist.

20. The method of claim 15, further comprising generating a plurality of objects corresponding to the clip using an object file module, and storing the plurality of objects in an object file.

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