Capacitance detection circuit, method and equipment

Abstract

The invention discloses a capacitance detection circuit, method and equipment, and belongs to the technical field of capacitance touch detection.According to the capacitance detection circuit, method and equipment, charging / discharging is synchronously conducted on a measurement capacitor, then charge transfer is synchronously conducted on an integrator, the interference phase difference is avoided, the interference influence is effectively reduced, the conversion time is remarkably shortened, and the detection precision is improved; according to the circuit, the integrator and the ADC are combined, and a capacitance difference value is synchronously converted into a digital value while charge transfer is carried out, so that additional system overhead is avoided; according to the invention, charging / discharging polarities are exchanged and residual errors are overturned in each clock period by utilizing a chopping principle, so that the anti-interference capability is further improved, and the null drift requirement on the operational amplifier is further improved.

Description

Technical Field

[0001] The present invention belongs to the field of capacitive touch detection technology, and is also applicable to fields such as capacitive pressure sensors, and specifically relates to a capacitive touch detection circuit and method. Background Art

[0002] In the field of capacitive touch detection, capacitance detection is the key to achieving touch detection. When a conductor, such as a finger or wrist, approaches or touches a detection electrode, the capacitance corresponding to the detection electrode will change. By detecting the change in capacitance, information about the conductor approaching or touching the detection electrode can be obtained, thereby determining the user's operation.

[0003] In the prior art, when the self-capacitance detection circuit works, it is divided into multiple time periods within a detection cycle. In the previous time period, the capacitance to be measured is offset by using a compensation capacitor, and the capacitance is detected again in the next time period; or the capacitance change value is obtained by comparing the previously recorded capacitance value with the current capacitance value, and after the circuit converts the capacitance value into voltage (or current), an additional high-precision ADC is required to convert it into a digital signal.

[0004] In the above-mentioned method of detecting in different time periods, there is a phase difference between the interference in the two time periods and it cannot be eliminated, which easily leads to inaccurate capacitance detection and affects the overall performance of the capacitance detection circuit; in the method of comparing with the recorded value, the temperature, power supply, and interference when recording the initial capacitance value and detecting the current capacitance value are not consistent, which leads to inaccurate capacitance detection and affects the overall performance of the circuit. The additional high-precision ADC also increases the system overhead.

[0005] On the other hand, in traditional capacitive touch detection, capacitive pressure detection and other applications, the absolute value of capacitance is often not of concern, but the capacitance change value before and after touch / pressing. The capacitance change value before and after touch / pressing is very different from the absolute value of capacitance, so very high ADC accuracy is often required, or the accuracy of capacitance change value will be sacrificed. Summary of the invention

[0006] In view of the above-mentioned deficiencies in the prior art, the capacitive touch detection circuit and method provided by the present invention solve the problem that the capacitance detection in the existing time-division detection method is inaccurate, thereby affecting the overall performance of the circuit.

[0007] In order to achieve the above-mentioned invention object, the technical solution adopted by the present invention is: a capacitance detection circuit, including a measuring capacitance branch, a standard capacitance Crst, an operational amplifier OPA and a comparator CMP; The measuring capacitor branch includes a measuring capacitor, one end of the measuring capacitor is grounded, the other end of the measuring capacitor is respectively connected to one end of a first charge and discharge switch, one end of a second charge and discharge switch and one end of a charge transfer switch, the other end of the first charge and discharge switch is connected to a first reference level Vref1, the other end of the second charge and discharge switch is connected to a second reference level Vref2, and the other end of the charge transfer switch is connected to an inverting input end of an operational amplifier OPA; One end of the standard capacitor Crst is grounded, the other end of the standard capacitor Crst is respectively connected to one end of a switch K9 and one end of a switch K8, the other end of the switch K9 is connected to the inverting input end of the operational amplifier OPA, the other end of the switch K8 is connected to the fixed end of a single-pole double-throw switch K7, and two active ends of the single-pole double-throw switch K7 are respectively connected to a first reference level Vref1 and a second reference level Vref2; The reference voltage Vcm is input to the non-inverting input terminal of the operational amplifier OPA, the voltage V_ is input to the inverting input terminal of the operational amplifier OPA, and they are respectively connected to one end of the switch K0, one end of the switch K11, and one end of the switch K22; the output terminal of the operational amplifier OPA is respectively connected to the other end of the switch K0, one end of the switch K12, and one end of the switch K21; the other end of the switch K11 and the other end of the switch K12 are both connected to one end of the integral capacitor Cf, and the other end of the switch K22 and the other end of the switch K21 are both connected to the other end of the integral capacitor Cf; The output terminal of the operational amplifier OPA outputs a voltage Vout and is connected to the non-inverting input terminal of the comparator CMP. The inverting input terminal of the comparator CMP inputs a reference voltage Vcm. The output terminal of the comparator CMP outputs Dout.

[0008] Further, when detecting the absolute capacitance value of the capacitor, the measured capacitance in the measuring capacitance branch is the capacitance to be measured Cp; One end of the capacitor Cp to be measured is grounded, and the other end of the capacitor Cp to be measured is respectively connected to one end of the first charge and discharge switch K1, one end of the second charge and discharge switch K2, and one end of the charge transfer switch K3, the other end of the first charge and discharge switch K1 is connected to the first reference level Vref1, the other end of the second charge and discharge switch K2 is connected to the second reference level Vref2, and the other end of the charge transfer switch K3 is connected to the inverting input terminal of the operational amplifier OPA.

[0009] Further, when detecting the relative capacitance value of the capacitor, the measuring capacitor in the measuring capacitance branch includes the capacitance to be measured Cp and the reference capacitance Cn; One end of the capacitor Cp to be measured is grounded, and the other end of the capacitor Cp to be measured is respectively connected to one end of the first charge and discharge switch K1, one end of the second charge and discharge switch K2, and one end of the charge transfer switch K3, the other end of the first charge and discharge switch K1 is connected to the first reference level Vref1, the other end of the second charge and discharge switch K2 is connected to the second reference level Vref2, and the other end of the charge transfer switch K3 is connected to the inverting input end of the operational amplifier OPA; One end of the reference capacitor Cn is grounded, and the other end of the reference capacitor Cn is respectively connected to one end of the first charge and discharge switch K4, one end of the second charge and discharge switch K5, and one end of the charge transfer switch K6. The other end of the first charge and discharge switch K4 is connected to the first reference level Vref1, the other end of the second charge and discharge switch K5 is connected to the second reference level Vref2, and the other end of the charge transfer switch K6 is connected to the inverting input terminal of the operational amplifier OPA.

[0010] The beneficial effects of the present invention are: (1) In the capacitance detection circuit of the present invention, for the detection of relative capacitance value, the difference between the capacitance to be measured Cp and the reference capacitance Cn is converted in the same cycle without being affected by the absolute values ​​of the capacitance to be measured Cp and the reference capacitance Cn, and the requirements for the operational amplifier OPA in the circuit are relatively low; compared with the traditional capacitance detection circuit, there is no need to convert the capacitance to be measured Cp and the reference capacitance Cn separately, which significantly shortens the conversion time.

[0011] (2) In the capacitance detection circuit of the present invention, the ADC is integrated with the integrator, and the converted digital value is directly output in the above circuit structure.

[0012] (3) In the capacitance detection circuit of the present invention, by adding channel switches for the capacitor to be tested Cp and the reference capacitor Cn, charging to different levels is allowed. A switching switch is also introduced for the integral capacitor Cf to flip the residual voltage temporarily stored in the integral capacitor Cf to adapt to the capacitance flip during chopping, thereby eliminating the effects of zero drift and interference of the operational amplifier.

[0013] A capacitance detection method comprises the following steps: S1, clear the charge of the integral capacitor Cf to complete the circuit initialization; S2, during the first level period of the clock cycle, the measurement capacitor is charged to the corresponding reference level; at the same time, according to the level state of the output Dout of the comparator CMP in the previous clock cycle, the standard capacitor Crst is charged to the first reference level Vref1 or the second reference level Vref2; S3, during the second level period of the clock cycle, the charge-discharge switch and the switch K8 are disconnected, and then the charge transfer switch and the switch K9 are closed, so as to complete the charge transfer between the measuring capacitor, the standard capacitor Crst and the integrating capacitor Cf, and obtain the output voltage Vout of the operational amplifier OPA; Wherein, the clock levels corresponding to the first level and the second level are opposite; S4, based on the output voltage Vout of the operational amplifier OPA, the output Dout of the comparator CMP in the current clock cycle is obtained, and the charging level of the single-pole double-throw switch K7 is controlled according to the output voltage Vout of the operational amplifier OPA; S5, based on steps S2 to S4, repeat the measurement capacitor charging and charge transfer process, and accumulate the output Dout of the comparator CMP in each clock cycle, and after the set clock cycle, obtain the count value corresponding to the measurement capacitor; S6. Calculate the capacitance value of the detection capacitor according to the count value corresponding to the measured capacitance.

[0014] Furthermore, when the absolute capacitance value of the capacitor is detected: In the step S1, the charge transfer switch that is disconnected is the charge transfer switch K3; In the step S2, the capacitor Cp to be measured is charged to a first reference level Vref1; In step S3, the disconnected charge-discharge switch is the first charge-discharge switch K1, and the closed charge transfer switch is the charge transfer switch K3; In step S5, the count value obtained is a count value corresponding to the absolute capacitance value of the capacitor Cp to be measured; When the detected capacitance is a relative capacitance value: In step S1, the charge transfer switches that are disconnected are the charge transfer switch K3 and the charge transfer switch K6; In the step S2, the capacitor to be measured Cp and the reference capacitor Cn are charged to a first reference level Vref1 and a second reference level Vref2 respectively; In step S3, the charge and discharge switches that are disconnected are the first charge and discharge switch K1 and the second charge and discharge switch K5; In the step S5, the count value obtained is the count value corresponding to the capacitance difference between the detection capacitor Cp and the reference capacitor Cn.

[0015] Furthermore, in step S5, within N conversion cycles, the count value D corresponding to the measured capacitance satisfies:

[0016] Wherein, V_ represents the voltage at the inverting input terminal of the operational amplifier, Vref1 represents the first reference level, Vref2 represents the second reference level, Vcm represents the reference voltage, Cp represents the capacitance value of the capacitor to be measured, Cn represents the capacitance value of the reference capacitor, Cf represents the integral capacitor used for charge transfer and temporarily storing the residual voltage of each conversion, Crst represents the internal standard capacitor for measuring the difference between the external capacitor Cp and Cn, and Vresi represents the residual voltage finally stored on the integral capacitor; For the count value D: Considering the zero drift, , the count value D is:

[0017] In the formula, represents the zero drift voltage of the operational amplifier OPA, ; When the measured capacitance is the capacitance to be measured Cp and the detected capacitance is an absolute capacitance value, the capacitance value Cn of the reference capacitance is 0.

[0018] Furthermore, the capacitance detection method further includes: eliminating zero drift in the capacitance detection process by introducing chopping, including the following steps: T1. After a set clock cycle, the charging direction of the measuring capacitor and the standard capacitor Crst is adjusted, and the capacitance polarity of the integral capacitor Cf is adjusted; T2, after going through the set clock cycle again, the charging direction of the measuring capacitor and the standard capacitor Crst, as well as the polarity of the integral capacitor Cf are adjusted to be opposite to those in T1; T3. Repeat steps T1 to T2 to eliminate the interference of the capacitance detection process and the influence of the zero drift of the operational amplifier OPA by adjusting the charging direction and polarity.

[0019] Furthermore, in step T1: When the measured capacitance is the capacitance to be measured Cp, the method for adjusting the charging direction of the measured capacitance and the standard capacitance Crst, and adjusting the capacitance polarity of the integral capacitance Cf is as follows: The charging switch of the detection capacitor Cp is adjusted from the first charging and discharging switch K1 to the second charging and discharging switch K2, and the charging voltage is adjusted from the first reference level Vref1 to the second reference level Vref2; The charging direction of the standard capacitor Crst is adjusted from the second / first reference level Vref2 / Vref1 when the output Dout of the comparator is 0 / 1 to the first / second reference level Vref1 / Vref2 when the output Dout is 0 / 1; Switch the integral capacitor Cf from switch K11 and switch K21 to switch K12 and switch K22; When the measured capacitance includes the measured capacitance Cp and the reference capacitance Cn, the method of adjusting the charging direction of the measured capacitance standard capacitance Crst and adjusting the capacitance polarity of the integral capacitance Cf is as follows: The charging switch of the detection capacitor Cp is adjusted from the first charging and discharging switch K1 to the second charging and discharging switch K2, and the charging voltage is adjusted from the first reference level Vref1 to the second reference level Vref2; The charging switch of the reference capacitor Cn is adjusted from the second charging and discharging switch K5 to the first charging and discharging switch K4, and the charging voltage is adjusted from the second reference level Vref2 to the first reference level Vref1; The charging direction of the standard capacitor Crst is adjusted from the second / first reference level Vref2 / Vref1 when the output Dout of the comparator is 0 / 1 to the first / second reference level Vref1 / Vref2 when the output Dout is 0 / 1; The switch of the integral capacitor Cf is switched from switch K11 and switch K21 to switch K12 and switch K22.

[0020] Furthermore, by introducing chopping to eliminate zero drift in the capacitor detection process, after adjusting the charging direction and polarity multiple times, the final count value D is obtained as follows:

[0021] In the formula, , , represents the zero drift voltage of the operational amplifier OPA; When the measured capacitance is the capacitance to be measured Cp and the detected capacitance is an absolute capacitance value, the capacitance value Cn of the reference capacitance is 0.

[0022] The beneficial effects of the present invention are: In the capacitance detection method of the present invention, the two-port capacitance is charged / discharged to different levels respectively, corresponding to the difference detection, which is only sensitive to the capacitance difference, greatly improves the detection accuracy and reduces the requirements for ADC; specifically: (1) In the capacitance detection method of the present invention, the process of relative capacitance value detection is realized, and the difference detection of corresponding capacitance is independent of the absolute value of the capacitance to be measured Cp and the reference capacitance Cn, and is completed in one conversion. Compared with the traditional detection method (first detecting the value of the reference capacitance Cn, and then detecting the value of the capacitance to be measured Cp), the conversion time is shortened by half, the conversion efficiency is improved, and the power consumption is reduced; and because the values ​​of Cp and Cn are generally much larger than the change value of the capacitance to be measured (in the present invention, the initial Cp and Cn are configured to the same capacitance, and the change value of Cp is Cp-Cn), the driving capability requirements of the operational amplifier OPA are greatly reduced, and the power consumption is reduced. In the traditional structure, in the charge transfer stage, the operational amplifier OPA charges and discharges Cp and Cn through the capacitor Cf (taking Cp≈Cn≈Cbase), and charges and discharges the terminal voltages of Cp and Cn to Vcm+Vos within time t, then the output current capability of the operational amplifier is required to be , while in the present invention, when detecting the relative capacitance value, it is not related to the absolute value of the capacitance, but only sensitive to the capacitance difference (taking Cp-Cn= ), the output current capability of the op amp is required to be ,because It is much smaller than Cbase, so the output current requirement of the operational amplifier is greatly reduced, saving the power consumption and area of ​​the operational amplifier.

[0023] (2) In the capacitance detection method of the present invention, the integrator is integrated with the ADC. In traditional detection, after the capacitance is converted into voltage (or current), an additional high-precision ADC is required for conversion, which increases the power consumption and area of ​​the ADC part. In the present invention, the integrator is integrated with the ADC, which reduces power consumption and saves area.

[0024] (3) In the capacitance detection method of the present invention, a chopping function is introduced. According to the formula It can be seen that the zero drift of the operational amplifier has a great influence on the output; in the present invention, the charging and discharging levels (or modes) are dynamically switched by chopping, and the residual stored in the integral capacitor Cf is flipped, which effectively overcomes the influence of the zero drift and reduces the design requirements of the operational amplifier.

[0025] A capacitance detection device, comprising: A capacitance detection circuit, wherein the capacitance detection circuit uses a capacitance detection method to control the turning off and on of a switch in the capacitance detection circuit to control an output Dout of a comparator in the capacitance detection circuit; The logic control circuit is used to control the switch state in the capacitance detection circuit, and accumulate the output Dout of the comparator to obtain a final count value D, and calculate the capacitance value of the detection capacitor based on the final count value D.

[0026] The beneficial effects of the present invention are: In the present invention, by deploying the above-mentioned capacitance detection circuit and its corresponding detection method in a capacitance detection device, the device achieves a high-precision capacitance detection effect, while reducing the requirements for ADC, and by introducing chopping to dynamically switch the charging and discharging polarities, overcomes the influence of zero drift on capacitance detection, has good linearity, and is easy to achieve high resolution. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 This is a structural diagram of the capacitance (absolute capacitance value) detection circuit provided by the present invention.

[0028] Figure 2 This is a structural diagram of the capacitance (relative capacitance value) detection circuit provided by the present invention.

[0029] Figure 3 This is a flow chart of the capacitance detection method provided by the present invention.

[0030] Figure 4 The output conversion values ​​of the conventional circuit and the circuit of the present invention are compared with those of the circuit of the present invention as the zero drift voltage of the operational amplifier changes.

[0031] Figure 5 The present invention provides The output value of the circuit of the present invention changes with the change of .

[0032] Figure 6 The output value of the circuit of the present invention changes with the change of Cbase provided by the present invention. DETAILED DESCRIPTION

[0033] The specific implementation modes of the present invention are described below so that those skilled in the art can understand the present invention. However, it should be clear that the present invention is not limited to the scope of the specific implementation modes. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations utilizing the concept of the present invention are protected.

[0034] The present application provides a capacitance detection circuit, such as Figure 1-Figure 2 As shown, it includes a measuring capacitor branch, a standard capacitor Crst, an operational amplifier OPA and a comparator CMP; The measuring capacitor branch includes a measuring capacitor, one end of which is grounded, and the other end of which is respectively connected to one end of a first charge-discharge switch, one end of a second charge-discharge switch, and one end of a charge transfer switch, the other end of the first charge-discharge switch is connected to a first reference level Vref1, the other end of the second charge-discharge switch is connected to a second reference level Vref2, and the other end of the charge transfer switch is connected to an inverting input end of an operational amplifier OPA; One end of the standard capacitor Crst is grounded, the other end of the standard capacitor Crst is respectively connected to one end of the switch K9 and one end of the switch K8, the other end of the switch K9 is connected to the inverting input end of the operational amplifier OPA, the other end of the switch K8 is connected to the fixed end of the single-pole double-throw switch K7, and two active ends of the single-pole double-throw switch K7 are respectively connected to the first reference level Vref1 and the second reference level Vref2; The reference voltage Vcm is input to the non-inverting input terminal of the operational amplifier OPA, the voltage V_ is input to the inverting input terminal of the operational amplifier OPA, and they are respectively connected to one end of the switch K0, one end of the switch K11, and one end of the switch K22; the output terminal of the operational amplifier OPA is respectively connected to the other end of the switch K0, one end of the switch K12, and one end of the switch K21; the other end of the switch K11 and the other end of the switch K12 are both connected to one end of the integral capacitor Cf, and the other end of the switch K22 and the other end of the switch K21 are both connected to the other end of the integral capacitor Cf; The output terminal of the operational amplifier OPA outputs a voltage Vout and is connected to the non-inverting input terminal of the comparator CMP. The inverting input terminal of the comparator CMP inputs a reference voltage Vcm. The output terminal of the comparator CMP outputs Dout.

[0035] Among them, the voltage V_ at the inverting input terminal of the operational amplifier OPA is determined by the virtual short characteristic of the operational amplifier and the zero-drift voltage Vos. Ideally, the voltage V_ is equal to the reference voltage Vcm; when the zero-drift voltage Vos is considered, the voltage V_ is equal to the sum of the reference voltage Vcm and the zero-drift voltage Vos.

[0036] Among them, for the output voltage Vout of the operational amplifier OPA = V- + Vcf, where Vcf is the voltage across the integrating capacitor Cf; therefore, the output voltage Vout of the operational amplifier represents the residual of the previous n conversions, as well as the charge transfer amount between the difference capacitance of Cp and Cn and the Crst capacitance and Cf.

[0037] The output Dout of the comparator CMP indicates whether the OPA output voltage Vout exceeds the reference voltage Vcm.

[0038] In one embodiment, the above-mentioned measuring capacitor branch can be configured as a measuring capacitor branch composed of a single capacitor branch to be measured or a measuring capacitor branch composed of a capacitor to be measured and a reference capacitor according to the applicable scenario of capacitance detection. In different applicable scenarios, except for the difference in the configuration of the measuring capacitor branch, other standard capacitors Crst, operational amplifiers OPA and comparators CMP and their same circuit structures are the same and will not be repeated here.

[0039] In one embodiment, if Figure 1As shown, the measuring circuit includes when detecting the absolute capacitance value of the capacitor, the measuring capacitance in the measuring capacitance branch is the capacitance to be measured Cp; One end of the capacitor Cp to be measured is grounded, and the other end of the capacitor Cp to be measured is respectively connected to one end of the first charge and discharge switch K1, one end of the second charge and discharge switch K2, and one end of the charge transfer switch K3, the other end of the first charge and discharge switch K1 is connected to the first reference level Vref1, the other end of the second charge and discharge switch K2 is connected to the second reference level Vref2, and the other end of the charge transfer switch K3 is connected to the inverting input terminal of the operational amplifier OPA.

[0040] In one embodiment, if Figure 2 As shown, when detecting the relative capacitance value of the capacitor, the measuring capacitor in the measuring capacitor branch includes the capacitor to be measured Cp and the reference capacitor Cn; One end of the capacitor Cp to be measured is grounded, the other end of the capacitor Cp to be measured is respectively connected to one end of the first charge and discharge switch K1, one end of the second charge and discharge switch K2 and one end of the charge transfer switch K3, the other end of the first charge and discharge switch K1 is connected to the first reference level Vref1, the other end of the second charge and discharge switch K2 is connected to the second reference level Vref2, and the other end of the charge transfer switch K3 is connected to the inverting input end of the operational amplifier OPA; One end of the reference capacitor Cn is grounded, and the other end of the reference capacitor Cn is respectively connected to one end of the first charge and discharge switch K4, one end of the second charge and discharge switch K5, and one end of the charge transfer switch K6. The other end of the first charge and discharge switch K4 is connected to the first reference level Vref1, the other end of the second charge and discharge switch K5 is connected to the second reference level Vref2, and the other end of the charge transfer switch K6 is connected to the inverting input terminal of the operational amplifier OPA.

[0041] In one embodiment, in the above capacitance detection circuit, for the standard capacitor Crst, the single-pole double-throw switch K7 is used as a charge and discharge level switch, the switch K8 is used as a charge and discharge switch, and the switch K9 is used as a charge transfer switch; for the operational amplifier OPA, the switch K0 is used as a reset switch.

[0042] In one embodiment, in the above-mentioned capacitance detection circuit, a chopping function is introduced while considering factors such as interference and OPA zero drift. During the implementation process, the charging direction of the measuring capacitor and the standard capacitor Crst is periodically adjusted, and the capacitance polarity of the integral capacitor Cf is adjusted; after experiencing the set clock cycle again, the charging direction of the measuring capacitor and the standard capacitor Crst, and the polarity of the integral capacitor Cf are adjusted to the initial state; and so on, by adjusting the charging direction and polarity, the interference of the capacitance detection process and the influence of the zero drift of the operational amplifier OPA are eliminated.

[0043] In one embodiment, Figure 1 and Figure 2 In the embodiment, the second charge and discharge switch K2, the second charge and discharge switch K4, the switch K11, the switch K12, the switch K21 and the switch K22 are switch devices introduced to realize the chopping function.

[0044] In a specific embodiment, when the measured capacitor is the capacitor to be measured Cp, the method for adjusting the charging direction of the measured capacitor and the standard capacitor Crst, and adjusting the capacitance polarity of the integral capacitor Cf is: The charging switch of the detection capacitor Cp is adjusted from the first charging and discharging switch K1 to the second charging and discharging switch K2, and the charging voltage is adjusted from the first reference level Vref1 to the second reference level Vref2; The charging direction of the standard capacitor Crst is adjusted from the second / first reference level Vref2 / Vref1 when the output Dout of the comparator is 0 / 1 to the first / second reference level Vref1 / Vref2 when the output Dout is 0 / 1; The switch of the integral capacitor Cf is switched from switch K11 and switch K21 to switch K12 and switch K22.

[0045] In another specific embodiment, when the measured capacitance includes the measured capacitance Cp and the reference capacitance Cn, in addition to the above adjustment, the charging direction of the reference capacitance Cn is also adjusted, and the adjustment method is: The charging switch of the reference capacitor Cn is adjusted from the second charging and discharging switch K5 to the first charging and discharging switch K4, and the charging voltage is adjusted from the second reference level Vref2 to the first reference level Vref1.

[0046] In one embodiment, in Figure 2 In the capacitance detection circuit shown, the difference between the capacitance to be measured Cp and the reference capacitance Cn is converted in the same cycle without being affected by the absolute values ​​of the capacitance to be measured Cp and the reference capacitance Cn; compared with the traditional capacitance detection circuit, the capacitance to be measured Cp and the reference capacitance Cn are converted twice by channel switching, and are affected by Cp and Cn, so the requirements for the operational amplifier OPA in the circuit are relatively low. At the same time, in the circuit of the present invention, the ADC is integrated with the integrator, and the converted digital value is directly output in the above circuit structure.

[0047] like Figure 3 FIG. 1 is a flow chart of an embodiment of a capacitance detection method provided by the present application. The method is based on Figure 1 or Figure 2 The capacitance detection circuit shown is implemented, comprising the following steps: S1, clear the charge of the integral capacitor Cf to complete the circuit initialization; In one embodiment, the charge of the integral capacitor Cf is cleared by closing the switch K0, and after the circuit initialization is completed, the switch K0 is opened; S2, during the first level period of the clock cycle, the measurement capacitor is charged to the corresponding reference level; at the same time, according to the level state of the output Dout of the comparator CMP in the previous clock cycle, the standard capacitor Crst is charged to the first reference level Vref1 or the second reference level Vref2; S3, during the second level period of the clock cycle, the charge-discharge switch and the switch K8 are disconnected, and then the charge transfer switch and the switch K9 are closed, so as to complete the charge transfer between the measuring capacitor, the standard capacitor Crst and the integrating capacitor Cf, and obtain the output voltage Vout of the operational amplifier OPA; Wherein, the clock levels corresponding to the first level and the second level are opposite; S4, based on the output voltage Vout of the operational amplifier OPA, the output Dout of the comparator CMP in the current clock cycle is obtained, and the charging level of the single-pole double-throw switch K7 is controlled according to the output voltage Vout of the operational amplifier OPA; S5, based on steps S2 to S4, repeat the measurement capacitor charging and charge transfer process, and accumulate the output Dout of the comparator CMP in each clock cycle, and after the set clock cycle, obtain the count value D corresponding to the measurement capacitor; S6. Calculate the capacitance value of the detection capacitor according to the count value D corresponding to the measured capacitance.

[0048] In one embodiment, based on Figure 1 The circuit structure shown, when detecting the absolute capacitance value of the capacitor: In step S1, the charge transfer switch that is disconnected is the charge transfer switch K3; In step S2, the capacitor Cp to be measured is charged to a first reference level Vref1; In step S3, the open charge-discharge switch is the first charge-discharge switch K1, and the closed charge transfer switch is the charge transfer switch K3; In step S5, the count value obtained is a count value corresponding to the absolute capacitance value of the capacitor Cp to be measured.

[0049] In one embodiment, based on Figure 2 In the circuit structure shown, when the detection capacitance is a relative capacitance value (the difference between the capacitance to be measured and the reference capacitance): In step S1, the charge transfer switches that are disconnected are the charge transfer switch K3 and the charge transfer switch K6; In step S2, the capacitor to be measured Cp and the reference capacitor Cn are charged to a first reference level Vref1 and a second reference level Vref2 respectively; In step S3, the charge and discharge switches that are disconnected are the first charge and discharge switch K1 and the second charge and discharge switch K5; In step S5, the count value obtained is the count value corresponding to the capacitance difference between the detection capacitor Cp and the reference capacitor Cn.

[0050] In one embodiment, in step S5, within N conversion cycles, the count value D corresponding to the measured capacitance satisfies:

[0051] Wherein, V_ represents the voltage at the inverting input terminal of the operational amplifier, Vref1 represents the first reference level, Vref2 represents the second reference level, Vcm represents the reference voltage, Cp represents the capacitance value of the capacitor to be measured, Cn represents the capacitance value of the reference capacitor, Cf represents the integral capacitor used for charge transfer and temporarily storing the residual voltage of each conversion, Crst represents the internal standard capacitor for measuring the difference between the external capacitors (Cp-Cn), and Vresi represents the residual voltage finally stored on the integral capacitor. After multiple clock cycles, the influence of the residual voltage on the final result can be ignored, so it is directly taken as 0 in subsequent calculations.

[0052] In one embodiment, in the first conversion cycle of the capacitance detection process, the standard capacitance Crst has two situations, namely: when the standard capacitance Crst is not charged and the charge is not transferred, then remains unchanged. When the standard capacitor Crst is charged and the charge is transferred, then Adjust to .

[0053] In one embodiment, for the count value D: Considering the zero drift, , the count value D is:

[0054] In the formula, represents the zero drift voltage of the operational amplifier OPA, ; It can be seen from the above formula that the output of the present invention is related to the difference between the capacitor to be tested Cp and the reference capacitor Cn, the value of the capacitor Crst, and the number of conversion cycles N, and has nothing to do with other factors (such as power supply voltage, temperature, process and interference).

[0055] It should be noted that when the measured capacitance is only the capacitance to be measured Cp, and the detected capacitance is an absolute capacitance value, the capacitance value Cn of the reference capacitance in the above formula is 0.

[0056] In one embodiment, in a typical solution, in the above formula for eliminating zero drift in the capacitance detection process by introducing chopping, , or , .

[0057] It can be seen from the above formula that the operational amplifier OPA will cause two parts of error, resulting in an unsatisfactory output. One part is proportional to the ideal output, and the ratio is , part of which is irrelevant to the ideal output, and the proportion is .

[0058] In this embodiment, considering factors such as interference and zero drift of the operational amplifier, a chopping function is introduced in the present invention. Based on this, the capacitance detection method also includes eliminating zero drift in the capacitance detection process by introducing chopping, including the following steps: T1, after a set clock cycle, adjust the charging direction of the measuring capacitor and the standard capacitor Crst, and adjust the capacitance polarity of the integral capacitor Cf; T2, after going through the set clock cycle again, the charging direction of the measuring capacitor and the standard capacitor Crst, as well as the polarity of the integral capacitor Cf are adjusted to be opposite to those in T1; T3. Repeat steps T1 to T2 to eliminate the interference of the capacitance detection process and the influence of the zero drift of the operational amplifier OPA by adjusting the charging direction and polarity.

[0059] Specifically, in one embodiment, in step T1, when the measured capacitor is the capacitor to be measured Cp, the method of adjusting the charging direction of the measured capacitor and the standard capacitor Crst, and adjusting the capacitance polarity of the integral capacitor Cf is: The charging switch of the detection capacitor Cp is adjusted from the first charging and discharging switch K1 to the second charging and discharging switch K2, and the charging voltage is adjusted from the first reference level Vref1 to the second reference level Vref2; The charging direction of the standard capacitor Crst is adjusted from the second / first reference level Vref2 / Vref1 when the output Dout of the comparator is 0 / 1 to the first / second reference level Vref1 / Vref2 when the output Dout is 0 / 1; Switch the integral capacitor Cf from switch K11 and switch K21 to switch K12 and switch K22; In another embodiment, when the measured capacitance includes the measured capacitance Cp and the reference capacitance Cn, in addition to the above adjustment, the charging direction of the reference capacitance Cn is further adjusted, and the adjustment method is: The charging switch of the reference capacitor Cn is adjusted from the second charging and discharging switch K5 to the first charging and discharging switch K4, and the charging voltage is adjusted from the second reference level Vref2 to the first reference level Vref1.

[0060] In one embodiment, when the zero drift in the capacitor detection process is eliminated by introducing chopping, the charging and discharging directions of the capacitor to be tested Cp, the reference capacitor Cn and the standard capacitor Crst are considered to be opposite within N clock cycles. When the zero drift is considered, the final count value D is obtained by adjusting the polarity multiple times to eliminate the error introduced by the zero drift; wherein the count value D is:

[0061] In the formula, , , represents the zero drift voltage of the operational amplifier OPA.

[0062] The above results do not include the zero drift Vos term. Therefore, the introduction of the chopping function based on the above capacitor polarity adjustment method can eliminate the influence of the zero drift.

[0063] It should be noted that when the measured capacitance is the capacitance to be measured Cp and the detected capacitance is an absolute capacitance value, the capacitance value Cn of the reference capacitance in the above formula is 0.

[0064] In one embodiment, in a typical solution, in the above formula for eliminating zero drift in the capacitance detection process by introducing chopping, , or , .

[0065] In the embodiment of the present invention, for Figure 1-2 The capacitance detection circuit shown and Figure 3 The capacitance detection method shown, the embodiment of the present invention provides a capacitance detection device, including the circuit elements of the above capacitance detection circuit, and a logic control circuit; Among them, the capacitance detection circuit adopts the above-mentioned capacitance detection method to control the turning off and on of the switch in the capacitance detection circuit to control the output Dout of the comparator in the capacitance detection circuit; the logic control circuit is used to control the switch state in the capacitance detection circuit, and accumulate the output Dout of the comparator to obtain the final count value D, and calculate the capacitance value of the detection capacitor based on it.

[0066] In the embodiment of the present invention, Figure 4 As shown, as the zero drift voltage of the op amp changes from -20mV to 20mV, the output conversion value of the traditional structure (black) and the output conversion value after the chopping is introduced by the present invention (red); it can be clearly seen that the present invention has the beneficial effect of effectively eliminating the error introduced by the zero drift of the op amp compared with the traditional structure.

[0067] like Figure 5 As shown, as the capacitance difference The change of the output value; it can be seen that the result of the present invention has good linearity.

[0068] like Figure 6 As shown, the output value changes with the change of Cbase (approximately equal to Cp and Cn). At this time, the capacitance difference Remain unchanged; it can be seen that the structure of the present invention has nothing to do with Cbase and does not affect the output.

[0069] The present invention uses specific embodiments to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

[0070] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific variations and combinations that do not deviate from the essence of the present invention based on the technical revelations disclosed by the present invention, and these variations and combinations are still within the protection scope of the present invention.

Claims

1. A capacitance detection circuit, characterized in that: It includes a measuring capacitance branch, a standard capacitance Crst, an operational amplifier OPA and a comparator CMP; The measuring capacitor branch includes a measuring capacitor, one end of the measuring capacitor is grounded, the other end of the measuring capacitor is respectively connected to one end of a first charge and discharge switch, one end of a second charge and discharge switch and one end of a charge transfer switch, the other end of the first charge and discharge switch is connected to a first reference level Vref1, the other end of the second charge and discharge switch is connected to a second reference level Vref2, and the other end of the charge transfer switch is connected to an inverting input end of an operational amplifier OPA; One end of the standard capacitor Crst is grounded, the other end of the standard capacitor Crst is respectively connected to one end of a switch K9 and one end of a switch K8, the other end of the switch K9 is connected to the inverting input end of the operational amplifier OPA, the other end of the switch K8 is connected to the fixed end of a single-pole double-throw switch K7, and two active ends of the single-pole double-throw switch K7 are respectively connected to a first reference level Vref1 and a second reference level Vref2; The reference voltage Vcm is input to the non-inverting input terminal of the operational amplifier OPA, the voltage V_ is input to the inverting input terminal of the operational amplifier OPA, and they are respectively connected to one end of the switch K0, one end of the switch K11, and one end of the switch K22; the output terminal of the operational amplifier OPA is respectively connected to the other end of the switch K0, one end of the switch K12, and one end of the switch K21; the other end of the switch K11 and the other end of the switch K12 are both connected to one end of the integral capacitor Cf, and the other end of the switch K22 and the other end of the switch K21 are both connected to the other end of the integral capacitor Cf; The output terminal of the operational amplifier OPA outputs a voltage Vout and is connected to the non-inverting input terminal of the comparator CMP. The inverting input terminal of the comparator CMP inputs a reference voltage Vcm. The output terminal of the comparator CMP outputs Dout.

2. The capacitance detection circuit according to claim 1, characterized in that: When detecting the absolute capacitance value of the capacitor, the measuring capacitance in the measuring capacitance branch is the capacitance to be measured Cp; One end of the capacitor Cp to be measured is grounded, and the other end of the capacitor Cp to be measured is respectively connected to one end of the first charge and discharge switch K1, one end of the second charge and discharge switch K2, and one end of the charge transfer switch K3, the other end of the first charge and discharge switch K1 is connected to the first reference level Vref1, the other end of the second charge and discharge switch K2 is connected to the second reference level Vref2, and the other end of the charge transfer switch K3 is connected to the inverting input terminal of the operational amplifier OPA.

3. The capacitance detection circuit according to claim 1, characterized in that: When detecting the relative capacitance value of the capacitor, the measuring capacitor in the measuring capacitance branch includes the capacitance to be measured Cp and the reference capacitance Cn; One end of the capacitor Cp to be measured is grounded, and the other end of the capacitor Cp to be measured is respectively connected to one end of the first charge and discharge switch K1, one end of the second charge and discharge switch K2, and one end of the charge transfer switch K3, the other end of the first charge and discharge switch K1 is connected to the first reference level Vref1, the other end of the second charge and discharge switch K2 is connected to the second reference level Vref2, and the other end of the charge transfer switch K3 is connected to the inverting input end of the operational amplifier OPA; One end of the reference capacitor Cn is grounded, and the other end of the reference capacitor Cn is respectively connected to one end of the first charge and discharge switch K4, one end of the second charge and discharge switch K5, and one end of the charge transfer switch K6. The other end of the first charge and discharge switch K4 is connected to the first reference level Vref1, the other end of the second charge and discharge switch K5 is connected to the second reference level Vref2, and the other end of the charge transfer switch K6 is connected to the inverting input terminal of the operational amplifier OPA.

4. A capacitance detection method, implemented based on the capacitance detection circuit according to any one of claims 1 to 3, characterized in that: The following steps are involved: S1, clear the charge of the integral capacitor Cf to complete the circuit initialization; S2, during the first level of the clock cycle, charging the measurement capacitor to a corresponding reference level; At the same time, according to the level state of the output Dout of the comparator CMP in the previous clock cycle, the standard capacitor Crst is charged to the first reference level Vref1 or the second reference level Vref2; S3, during the second level period of the clock cycle, the charge-discharge switch and the switch K8 are disconnected, and then the charge transfer switch and the switch K9 are closed, so as to complete the charge transfer between the measuring capacitor, the standard capacitor Crst and the integrating capacitor Cf, and obtain the output voltage Vout of the operational amplifier OPA; Wherein, the clock levels corresponding to the first level and the second level are opposite; S4, based on the output voltage Vout of the operational amplifier OPA, the output Dout of the comparator CMP in the current clock cycle is obtained, and the charging level of the single-pole double-throw switch K7 is controlled according to the output voltage Vout of the operational amplifier OPA; S5, based on steps S2 to S4, repeat the measurement capacitor charging and charge transfer process, and accumulate the output Dout of the comparator CMP in each clock cycle, and after the set clock cycle, obtain the count value corresponding to the measurement capacitor; S6. Calculate the capacitance value of the detection capacitor according to the count value corresponding to the measured capacitance.

5. The capacitance detection method according to claim 4, characterized in that: When detecting the absolute capacitance value of a capacitor: In the step S1, the charge transfer switch that is disconnected is the charge transfer switch K3; In the step S2, the capacitor Cp to be measured is charged to a first reference level Vref1; In step S3, the disconnected charge-discharge switch is the first charge-discharge switch K1, and the closed charge transfer switch is the charge transfer switch K3; In step S5, the count value obtained is a count value corresponding to the absolute capacitance value of the capacitor Cp to be measured; When the detected capacitance is a relative capacitance value: In step S1, the charge transfer switches that are disconnected are the charge transfer switch K3 and the charge transfer switch K6; In the step S2, the capacitor to be measured Cp and the reference capacitor Cn are charged to a first reference level Vref1 and a second reference level Vref2 respectively; In step S3, the charge and discharge switches that are disconnected are the first charge and discharge switch K1 and the second charge and discharge switch K5; In the step S5, the count value obtained is the count value corresponding to the capacitance difference between the detection capacitor Cp and the reference capacitor Cn.

6. The capacitance detection method according to claim 4, characterized in that: In step S5, within N conversion cycles, the count value D corresponding to the measured capacitance satisfies: Wherein, V_ represents the voltage at the inverting input terminal of the operational amplifier, Vref1 represents the first reference level, Vref2 represents the second reference level, Vcm represents the reference voltage, Cp represents the capacitance value of the capacitor to be measured, Cn represents the capacitance value of the reference capacitor, Cf represents the integral capacitor used for charge transfer and temporarily storing the residual voltage of each conversion, Crst represents the internal standard capacitor for measuring the difference between the external capacitor Cp and Cn, and Vresi represents the residual voltage finally stored on the integral capacitor; For the count value D: Considering the zero drift, , the count value D is: In the formula, represents the zero drift voltage of the operational amplifier OPA, ; When the measured capacitance is the capacitance to be measured Cp and the detected capacitance is an absolute capacitance value, the capacitance value Cn of the reference capacitance is 0.

7. The capacitance detection method according to claim 4, characterized in that: The capacitance detection method further includes: eliminating zero drift in the capacitance detection process by introducing chopping, including the following steps: T1, after a set clock cycle, adjust the charging direction of the measuring capacitor and the standard capacitor Crst, and adjust the capacitance polarity of the integral capacitor Cf; T2, after going through the set clock cycle again, the charging direction of the measuring capacitor and the standard capacitor Crst, as well as the polarity of the integral capacitor Cf are adjusted to be opposite to those in T1; T3. Repeat steps T1 to T2 to eliminate the interference of the capacitance detection process and the influence of the zero drift of the operational amplifier OPA by adjusting the charging direction and polarity.

8. The capacitance detection method according to claim 7, characterized in that: In step T1: When the measured capacitance is the capacitance to be measured Cp, the method for adjusting the charging direction of the measured capacitance and the standard capacitance Crst, and adjusting the capacitance polarity of the integral capacitance Cf is as follows: The charging switch of the detection capacitor Cp is adjusted from the first charging and discharging switch K1 to the second charging and discharging switch K2, and the charging voltage is adjusted from the first reference level Vref1 to the second reference level Vref2; The charging direction of the standard capacitor Crst is adjusted from the second / first reference level Vref2 / Vref1 when the output Dout of the comparator is 0 / 1 to the first / second reference level Vref1 / Vref2 when the output Dout is 0 / 1; Switch the integral capacitor Cf from switch K11 and switch K21 to switch K12 and switch K22; When the measured capacitance includes the measured capacitance Cp and the reference capacitance Cn, the method of adjusting the charging direction of the measured capacitance standard capacitance Crst and adjusting the capacitance polarity of the integral capacitance Cf is as follows: The charging switch of the detection capacitor Cp is adjusted from the first charging and discharging switch K1 to the second charging and discharging switch K2, and the charging voltage is adjusted from the first reference level Vref1 to the second reference level Vref2; The charging switch of the reference capacitor Cn is adjusted from the second charging and discharging switch K5 to the first charging and discharging switch K4, and the charging voltage is adjusted from the second reference level Vref2 to the first reference level Vref1; The charging direction of the standard capacitor Crst is adjusted from the second / first reference level Vref2 / Vref1 when the output Dout of the comparator is 0 / 1 to the first / second reference level Vref1 / Vref2 when the output Dout is 0 / 1; The switch of the integral capacitor Cf is switched from switch K11 and switch K21 to switch K12 and switch K22.

9. The capacitance detection method according to claim 7, characterized in that: By introducing chopping to eliminate zero drift in the capacitor detection process, after adjusting the charging direction and polarity multiple times, the final count value D is obtained as follows: In the formula, , , represents the zero drift voltage of the operational amplifier OPA; When the measured capacitance is the capacitance to be measured Cp and the detected capacitance is an absolute capacitance value, the capacitance value Cn of the reference capacitance is 0.

10. A capacitance detection device, characterized in that: include: The capacitance detection circuit according to any one of claims 1 to 3, wherein the capacitance detection circuit uses the capacitance detection method according to any one of claims 4 to 9 to control the turning off and on of a switch in the capacitance detection circuit, so as to control the output Dout of the comparator in the capacitance detection circuit; The logic control circuit is used to control the switch state in the capacitance detection circuit, and accumulate the output Dout of the comparator to obtain a final count value D, and calculate the capacitance value of the detection capacitor based on the final count value D.

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