Method and system for calculating insulation resistance value of storage battery pack

Abstract

The invention relates to a method and system for calculating the insulation resistance value of a storage battery pack, and belongs to the field of storage battery detection. The method comprises the following steps of: firstly, cutting out a positive side resistor of a balance bridge and then cutting out a negative side resistor of the balance bridge by utilizing a balance bridge circuit which is connected to the positive electrode and the negative electrode of a storage battery pack; when the positive side resistor is cut out, determining a first voltage difference value between the positive bus and the negative bus; sampling the current of the positive bus; when the negative side resistor is cut out, a second voltage difference value between the positive bus and the negative bus is determined; sampling the current of the negative bus; and calculating the insulation resistance value of the storage battery pack according to the first voltage difference value, the second voltage difference value, the current of the positive bus and the current of the negative bus. According to the method, the problem of inaccurate calculation of the insulation resistance of the storage battery pack due to zero drift of the mutual inductor can be reduced, the accuracy of calculation of the insulation resistance is improved, and the complexity of calculation of the insulation resistance can be reduced due to the simple process.

Description

Technical Field

[0001] The invention relates to a method and a system for calculating the insulation resistance value of a battery pack, belonging to the field of battery detection. Background Art

[0002] The battery pack is an important part of the DC power supply system for power plants, substations, and converter stations. Its good operating condition is crucial to the safe and reliable operation of the power system. Therefore, real-time monitoring of the insulation status of the battery pack is a necessary means to ensure the normal operation of the power system. The current method used in the industry to determine whether a battery pack has a ground fault is mainly to determine the magnitude of the current collected by the current transformer CT passing through the battery pack circuit. You can refer to Figure 1 .

[0003] Figure 1 This is a schematic diagram of the structure of an existing battery pack having a ground fault, such as Figure 1 As shown in the figure, when the electrolyte of the single cell inside the battery pack leaks, the insulation layer is damaged and the insulation resistance R X The resistance value is reduced, and a conductive path is formed between the battery module and the ground. The current collected by the current transformer CT is used for judgment. Since the transformer is affected by many factors during operation, zero drift will occur. When the transformer has zero drift, it will cause the insulation resistance R X The calculation is inaccurate.

[0004] The Chinese invention patent application publication with application publication number CN106645963A discloses an insulation resistance detection circuit and a detection method thereof. The method is based on judging whether the sampled positive bus voltage to ground or the sampled negative bus voltage to ground is greater than a predetermined threshold when entering the earth cut-in state, and when the sampled positive bus voltage to ground or the sampled negative bus voltage to ground is greater than the predetermined threshold, using the first-stage amplified positive bus voltage to ground or the first-stage amplified negative bus voltage to ground as the first positive bus voltage to ground or the first negative bus voltage to ground, and when the sampled positive bus voltage to ground or the sampled negative bus voltage to ground is less than or equal to the predetermined threshold, using the second-stage amplified positive bus voltage to ground or the second-stage amplified negative bus voltage to ground as the first positive bus voltage to ground or the first negative bus voltage to ground; when entering the positive pole resistor cut-in state, judging whether the sampled positive bus voltage to ground or the sampled negative bus voltage to ground is greater than the predetermined threshold, and when the sampled positive bus voltage to ground or the sampled negative bus voltage to ground is greater than the predetermined threshold, using the first-stage amplified positive bus voltage to ground or the first-stage amplified negative bus voltage to ground as the second positive bus voltage to ground or the second negative bus-to-ground voltage, when the sampled positive bus-to-ground voltage or the sampled negative bus-to-ground voltage is less than or equal to the predetermined threshold, the secondary amplified positive bus-to-ground voltage or the secondary amplified negative bus-to-ground voltage is used as the second positive bus-to-ground voltage or the second negative bus-to-ground voltage; when entering the negative electrode resistor cut-in state, it is determined whether the sampled positive bus-to-ground voltage or the sampled negative bus-to-ground voltage is greater than the predetermined threshold, when the sampled positive bus-to-ground voltage or the sampled negative bus-to-ground voltage is greater than the predetermined threshold When the positive bus-to-ground voltage amplified by the first level or the negative bus-to-ground voltage amplified by the first level is used as the third positive bus-to-ground voltage or the third negative bus-to-ground voltage; when the sampled positive bus-to-ground voltage or the sampled negative bus-to-ground voltage is less than or equal to the predetermined threshold, the positive bus-to-ground voltage amplified by the second level or the negative bus-to-ground voltage amplified by the second level is used as the third positive bus-to-ground voltage or the third negative bus-to-ground voltage; the positive electrode insulation resistance and the negative electrode insulation resistance are calculated by the following equation: R + =R2*[PV1 - *PV3 + ÷(PV1 + *PV3 - )-1],R - =R12*[PV1 + *PV2 - ÷(PV1 - *PV2 + )-1], where R + Indicates the positive insulation resistance, R - Indicates the negative insulation resistance, PV1 + and PV1 -Respectively represent the first positive bus voltage to ground and the first negative bus voltage to ground, PV2 + and PV2 - Respectively represent the second positive bus voltage to ground and the second negative bus voltage to ground, PV3 + and PV3 - They respectively represent the third positive bus voltage to ground and the third negative bus voltage to ground.

[0005] Although this method can improve the accuracy of calculating the insulation resistance, the circuit is complicated and the calculation process is complicated. Summary of the invention

[0006] The object of the present invention is to provide a method and system for calculating the insulation resistance of a battery pack, so as to solve the problem in the prior art that the insulation resistance calculation process is relatively complicated when a single cell in the battery pack has a grounding fault.

[0007] To achieve the above object, the solution of the present invention includes:

[0008] A method for calculating the insulation resistance of a battery pack according to the present invention comprises the following steps:

[0009] Using a balancing bridge circuit connected to the positive and negative terminals of the battery pack, the positive resistance of the balancing bridge is cut out first, and then the negative resistance of the balancing bridge is cut out;

[0010] When the positive side resistor is cut out, a first voltage difference between the positive bus and the negative bus is determined; and the current of the positive bus is sampled;

[0011] When the negative side resistor is cut out, a second voltage difference between the positive bus and the negative bus is determined; and the current of the negative bus is sampled;

[0012] The insulation resistance of the battery pack is calculated according to the first voltage difference, the second voltage difference, the current of the positive bus and the current of the negative bus.

[0013] Further, when the positive side resistor is cut out, a first voltage difference is determined according to a first voltage between the positive busbar and the ground and a first voltage between the negative busbar and the ground;

[0014] When the negative side resistor is cut out, the second voltage difference is determined according to the second voltage between the positive busbar and the ground and the second voltage between the negative busbar and the ground.

[0015] Furthermore, the insulation resistance of the battery pack=(the second voltage difference-the first voltage difference)÷[2*(the current of the negative bus-the current of the positive bus)].

[0016] Furthermore, it is characterized in that it also includes: when the insulation resistance value is less than the preset resistance value, the system issues a first alarm message; when the insulation resistance value is greater than the preset resistance value, the system issues a second alarm message;

[0017] The first alarm information includes the insulation resistance value and the first alarm signal; the second alarm information includes the insulation resistance value and the second alarm signal.

[0018] Furthermore, when a ground fault occurs in a single cell in the battery pack, the method further includes: determining a first bus voltage according to a first voltage of the positive bus to ground and a first voltage of the negative bus to ground;

[0019] Determine the forward fault voltage when the positive side resistor is cut out according to the first voltage of the positive busbar to the ground, the insulation resistance value and the current of the positive busbar;

[0020] Determine the number of the first forward fault battery according to the first bus voltage, the forward fault voltage when the positive side resistor is cut out, and the total number of battery cells of the battery pack;

[0021] Determine the second bus voltage according to the second voltage of the positive bus to the ground and the second voltage of the negative bus to the ground;

[0022] Determine the forward fault voltage when the negative side resistor is cut out according to the second voltage of the positive busbar to the ground, the insulation resistance value and the current of the negative busbar;

[0023] Determine the number of the second positive fault battery according to the second bus voltage, the positive fault voltage when the negative side resistor is switched on and off, and the total number of battery cells of the battery pack;

[0024] Determining a ground fault location according to the number of first forward faulty batteries and the number of second forward faulty batteries;

[0025] Among them, the forward fault voltage is the voltage from the positive electrode of the single cell connected to the positive bus in the battery pack to the position where the ground fault occurs; the number of the first forward fault battery is the total number of single cells from the single cell connected to the positive bus in the battery pack to the ground fault position when the positive side resistor is cut out; the number of the second forward fault battery is the total number of single cells from the single cell connected to the positive bus in the battery pack to the ground fault position when the negative side resistor is cut out.

[0026] Further, the first bus voltage=the first voltage of the positive bus to the ground-the first voltage of the negative bus to the ground;

[0027] The second bus voltage = the second voltage of the positive bus to the ground - the second voltage of the negative bus to the ground;

[0028] Among them, the voltage reference direction of the first voltage of the negative bus to the ground is opposite to the voltage reference direction of the first voltage of the positive bus to the ground; the voltage reference direction of the second voltage of the negative bus to the ground is opposite to the voltage reference direction of the first voltage of the positive bus to the ground.

[0029] Furthermore, the forward fault voltage when the positive side resistor is cut out = the first voltage of the positive bus to the ground - the insulation resistance value * the current of the positive bus;

[0030] The positive fault voltage when the negative side resistor is cut out = the second voltage of the positive bus to the ground - the insulation resistance value * the current of the negative bus.

[0031] Furthermore, the number of the first forward fault battery cells = the forward fault voltage when the positive side resistor is cut out / the first bus voltage * the total number of battery cells in the battery pack;

[0032] The number of the second positive fault battery = the positive fault voltage when the negative side resistor is switched ÷ the second bus voltage * the total number of battery cells in the battery pack.

[0033] Further, when the sum of the number of the first forward fault battery and the number of the second forward fault battery divided by 2 is an integer, the ground fault position is located on a single battery in the battery pack, and the value is the number of the single battery where the ground fault occurs;

[0034] When the value obtained by dividing the sum of the number of cells of the first forward faulty battery and the number of cells of the second forward faulty battery by 2 is a decimal, the ground fault position is located on the connecting line between two single cells numbered by two integers adjacent to the value.

[0035] A system for calculating the insulation resistance value of a battery pack of the present invention comprises a processor, and the processor executes a computer program to implement the steps of the aforementioned method for calculating the insulation resistance value of a battery pack.

[0036] The beneficial effects of the present invention are as follows: as a pioneering invention, the present invention provides a method and system for calculating the insulation resistance of a battery pack, using a balancing bridge circuit connected to the positive and negative ends of the battery pack, first cutting out the positive resistance of the balancing bridge, and then cutting out the negative resistance of the balancing bridge; when the positive resistance is cut out, determining the first voltage difference between the positive bus and the negative bus; sampling the current of the positive bus; when the negative resistance is cut out, determining the second voltage difference between the positive bus and the negative bus; sampling the current of the negative bus; calculating the insulation resistance of the battery pack according to the first voltage difference, the second voltage difference, the current of the positive bus and the current of the negative bus. By calculating the insulation resistance of the battery pack using the current difference and voltage difference before and after the switching when the system switches the positive resistance and the negative resistance, not only can the problem of inaccurate insulation resistance calculation of the battery pack due to the zero drift of the mutual inductor be reduced, and the accuracy of the insulation resistance calculation is improved, but also the complexity of calculating the insulation resistance can be reduced due to the simple process. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 It is a structural schematic diagram of an existing battery pack having a ground fault;

[0038] Figure 2 It is a flow chart of a method for calculating the insulation resistance value of a battery pack provided by an embodiment of the present invention;

[0039] Figure 3 It is a structural schematic diagram of an equivalent principle of a battery pack grounding fault provided by an embodiment of the present invention;

[0040] Figure 4 is a structural schematic diagram of a balanced bridge circuit provided by an embodiment of the present invention;

[0041] Figure 5 It is a structural schematic diagram of a DC bus-to-ground current sampling circuit provided by an embodiment of the present invention;

[0042] Figure 6 It is a structural schematic diagram of a positive bus-to-ground voltage sampling circuit provided by an embodiment of the present invention;

[0043] Figure 7 It is a structural schematic diagram of a negative bus-to-ground voltage sampling circuit provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0044] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments.

[0045] The concept of the present invention is to accurately calculate the insulation resistance of the battery group by using the current difference and the voltage difference when the mutual inductor is used to add the positive side resistance and the negative side resistance of the system.

[0046] Specifically, by using a balancing bridge circuit connected to the positive and negative ends of a battery pack, the positive resistance of the balancing bridge is cut out first, and then the negative resistance of the balancing bridge is cut out; when the positive resistance is cut out, the first voltage difference between the positive bus and the negative bus is determined, and the current of the positive bus when the positive resistance is cut out is sampled by a current transformer; when the negative resistance is cut out, the second voltage difference between the positive bus and the negative bus is determined; the current of the negative bus when the negative resistance is cut out is sampled by a current transformer; and the insulation resistance of the battery pack is calculated according to the first voltage difference, the second voltage difference, the current of the positive bus, and the current of the negative bus. By calculating the insulation resistance of the battery pack by using the current difference and voltage difference before and after the switching when the system switches the positive resistance and the negative resistance, not only can the problem of inaccurate insulation resistance calculation of the battery pack due to the zero drift of the transformer be reduced, and the accuracy of the insulation resistance calculation is improved, but also the complexity of calculating the insulation resistance can be reduced due to the simple process.

[0047] An embodiment of a method for calculating the insulation resistance value of a battery pack:

[0048] A method for calculating the insulation resistance value of a battery pack provided in an embodiment of the present invention can be applied to the calculation of the insulation resistance when no ground fault occurs in a single cell in the battery pack, and can also be applied to the calculation of the insulation resistance when a ground fault occurs in a single cell in the battery pack. The present invention does not make any special limitation to this, and an exemplary explanation is given below using the calculation of the insulation resistance when a ground fault occurs in a single cell in the battery pack as an example.

[0049] Among them, whether a ground fault occurs can be determined by judging the voltage of the positive and negative busbars.

[0050] Among them, when a single cell in the battery pack between the positive and negative busbars has a ground fault, it can be that the single cell itself has a ground fault, or it can be that the connecting line between two single cells has a ground fault. The present invention does not specifically limit this, and the ground fault of the connecting line between two single cells is taken as an example for exemplary description.

[0051] Figure 2 FIG. 1 is a flow chart of a method for calculating the insulation resistance of a battery pack provided by an embodiment of the present invention. Figure 2 As shown, the calculation method includes the following steps S101 to S109.

[0052] Steps S101 to S109 are described in detail below.

[0053] S101, using a balancing bridge circuit connected to the positive and negative terminals of a battery pack, firstly cut out the positive resistance of the balancing bridge, and then cut out the negative resistance of the balancing bridge.

[0054] Figure 3 is a structural schematic diagram of an equivalent principle of a battery pack grounding fault provided by an embodiment of the present invention, such as Figure 3 As shown, specifically, the battery pack includes a number of single cells connected in series, the total number of single cells connected in series is N (N is known), the positive electrode KM+ of the battery pack is connected to the positive bus, and the negative electrode KM- of the battery pack is connected to the negative bus. Among them, the voltage of each single cell in the battery pack is Vbat (Vbat is known), and the voltage Vbat of each single cell is equal; it is stipulated that the single cell connected to the positive bus in the battery pack is the first battery, the single cell connected to the first battery is the second battery... The single cell connected to the negative bus is the last battery.

[0055] When a ground fault occurs in the connecting line between two single cells, there will be an insulation resistance R between the fault location a and the ground GND. X , the total number of all cells from the positive starting point of the battery pack (i.e., the cell connected to the positive bus) to the fault position a is N1, and the total number of all cells from the fault position a to the end of the battery pack (i.e., the cell connected to the negative bus) is N2. In this embodiment, the earth potential is specified as the reference potential, i.e., the zero potential. The positive direction of the leakage current at the fault point a of the battery pack is from the battery pack through the insulation resistance R X Flows to ground GND.

[0056] R+ is equivalent to the positive resistance of the balanced circuit, and R- is equivalent to the negative resistance of the balanced circuit. Figure 4 . Figure 4 is a structural diagram of a balanced bridge circuit provided by an embodiment of the present invention, such as Figure 4 As shown, the balancing bridge circuit includes: a positive side resistor connected to the positive electrode KM+ of the battery pack, a negative side resistor connected to the negative electrode KM- of the battery pack, a positive side switching switch KMV+ for controlling the positive side resistor to be cut out and then to be switched in after a first preset time, and a negative side switching switch KMV- for controlling the negative side resistor to be cut out after a second preset time after the positive side resistor is switched in and then to be switched in after a third preset time.

[0057] In order to facilitate maintenance personnel to understand whether a ground fault occurs, as an optional implementation, the balanced bridge circuit further includes a sampling resistor R8 connected between the balance point AGND of the balanced bridge circuit and the ground GND. The sampling resistor R8 samples the current at the balance point AGND. When current appears at the balance point AGND, it indicates that a ground fault occurs. When no current appears at the balance point AGND, it indicates that no ground fault occurs.

[0058] Among them, both the positive side resistor and the negative side resistor include a plurality of resistors connected in series, and the number of resistors connected in series included in the positive side resistor and the number of resistors connected in series included in the negative side resistor may be the same or different, but it is necessary to ensure that the sum of the resistances of the positive side resistor is equal to the sum of the resistances of the negative side resistor. In order to obtain a larger voltage difference and achieve more accurate calculation when a ground fault occurs in the connecting line between two single cells, this embodiment is hereinafter described by taking the case where the number of resistors connected in series included in the positive side resistor and the number of resistors connected in series included in the negative side resistor as an example for exemplary explanation.

[0059] In order to clarify the specific structure of the balanced bridge circuit, this embodiment is hereinafter described by taking the positive side resistor including three resistors connected in series and the negative side resistor including four resistors connected in series as an example. Specifically, the positive side resistor includes a first resistor R1, a second resistor R2 and a third resistor R3 connected in series, and the negative side resistor includes a fourth resistor R4, a fifth resistor R5, a sixth resistor R6 and a seventh resistor R7 connected in series. The other end of the first resistor R1 is connected to the positive electrode KM+ of the battery pack, and the other end of the seventh resistor R7 is connected to the negative electrode KM- of the battery pack.

[0060] The present invention does not specifically limit the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6 and the seventh resistor R7. It is only necessary to ensure that the sum of the resistances of the first resistor R1, the second resistor R2 and the third resistor R3 is equal to the sum of the resistances of the fourth resistor R4, the fifth resistor R5, the sixth resistor R6 and the seventh resistor R7.

[0061] When the positive side resistor includes a first resistor R1, a second resistor R2 and a third resistor R3 connected in series, and the negative side resistor includes a fourth resistor R4, a fifth resistor R5, a sixth resistor R6 and a seventh resistor R7 connected in series, one end of the positive side switching switch KMV+ is connected to the connection point of the second resistor R2 and the third resistor R3, and the other end is grounded GND; one end of the negative side switching switch KMV- is connected to the connection point of the fifth resistor R5 and the fourth resistor R4, and the other end is grounded GND.

[0062] When there is no grounding fault in the single cell in the battery pack, the positive side switch KMV+ and the negative side switch KMV- are both disconnected; when the insulation resistance of the battery pack is to be measured, or when a grounding fault occurs in the single cell in the battery pack, the positive side switch KMV+ is closed (equivalent to grounding), and the negative side switch KMV- remains disconnected, then the first resistor R1 and the second resistor R2 in the positive side resistor are disconnected, and the balanced bridge circuit is in a positive side unbalanced state; after a first preset time, the positive side switch KVM+ is disconnected, and the balanced bridge circuit is in a balanced state; after a second preset time, the negative side switch KVM- is controlled to be closed, and the positive side switch KVM+ remains disconnected, then the fifth resistor R5, the sixth resistor R6 and the seventh resistor R7 in the negative side resistor are disconnected; after a third preset time, the negative side switch KVM- is disconnected, and the balanced bridge circuit is in a balanced state.

[0063] The duration settings of the first preset time, the second preset time and the third preset time may be the same or different, and the present invention does not impose any special limitation on this, and it is only necessary to ensure that information can be stably collected.

[0064] After explaining the specific connection structure of the balanced bridge circuit, Figure 2 The R+ in the figure is equivalent to the sum of the resistances of the first resistor R1, the second resistor R2 and the third resistor R3, and the R- is equivalent to the sum of the resistances of the fourth resistor R4, the fifth resistor R5, the sixth resistor R6 and the seventh resistor R7.

[0065] As an optional implementation, a DC bus-to-ground current sampling circuit may be connected at the balance point AGND to sample the current at the balance point AGND, so as to calculate the insulation resistance between the bus and the ground.

[0066] When the battery pack is fault-free, the balance point (also called neutral point) AGND of the balance bridge circuit is connected to the ground and is at zero potential. When the DC bus itself does not have a ground fault but the battery pack has a ground fault, the balance point AGND of the balance bridge circuit will shift, and the potential of the balance point AGND is no longer zero potential. The bus-to-ground current will flow through the sampling resistor R8, causing a voltage difference on the sampling resistor R8. The DC bus-to-ground current sampling circuit can sample the current at the balance point AGND to calculate the insulation resistance between the bus and the ground.

[0067] Among them, the DC bus current sampling circuit can refer to Figure 5 , Figure 5 is a schematic diagram of a DC bus-to-ground current sampling circuit provided by an embodiment of the present invention. Figure 5 As shown, the DC bus-to-ground current sampling circuit includes: a differential circuit.

[0068] The differential circuit includes a third operational amplifier U3, a fifth input resistor R14, a sixth input resistor R15, an input voltage-dividing resistor R13 and a third feedback resistor R18. Specifically, one end of the fifth input resistor R14 is connected to the balance point AGND of the balanced bridge circuit, and the other end is connected to the inverting input end of the third operational amplifier U3 (i.e., pin 2 of the third operational amplifier U3); one end of the sixth input resistor R15 is connected to the reference signal output end of the processor, and the other end is connected to the inverting input end of the third operational amplifier U3 (i.e., pin 3 of the third operational amplifier U3); one end of the input voltage-dividing resistor R13 is connected to the non-inverting input end of the third operational amplifier U3, and the other end is grounded GND; one end of the third feedback resistor R18 is connected to the inverting input end of the third operational amplifier U3, and the other end is connected to the output end of the third operational amplifier U3 (i.e., pin 6 of the third operational amplifier U3); the output end of the third operational amplifier U3 is connected to the third sampling port AD3 of the processor.

[0069] Under the action of the reference signal REF, the third operational amplifier U3 can improve the accuracy of current sampling at the equilibrium point AGND and reduce the occurrence of missed sampling.

[0070] As another optional implementation, the signal receiving ends connected to the inverting input terminal and the non-inverting input terminal of the third operational amplifier U3 can be interchanged, that is, the inverting input terminal of the third operational amplifier U3 is changed from the balance point AGND of the balanced bridge circuit originally connected to the reference signal output terminal of the processor, and the non-inverting input terminal of the third operational amplifier U3 is changed from the reference signal terminal of the processor originally connected to the balance point AGND of the balanced bridge circuit. The present invention does not specifically limit this, and this embodiment is exemplified by taking the inverting input terminal of the third operational amplifier U3 connected to the balance point AGND of the balanced bridge circuit and the non-inverting input terminal of the third operational amplifier U3 connected to the reference signal output terminal of the processor as an example.

[0071] In order to obtain a high-quality current signal of the balance point AGND, as an optional implementation, the DC bus-to-ground current sampling circuit further includes: a third input filter capacitor C3 and a third RC filter. The third RC filter includes a third output resistor R21 and a third output filter capacitor C6, and one end of the third output resistor R21 is grounded to GND through the third output filter capacitor C6.

[0072] Specifically, one end of the third input filter capacitor C3 is connected to the non-inverting input terminal of the third operational amplifier U3, and the other end is grounded GND; the other end of the third output resistor R21 is connected to the output terminal of the third operational amplifier U3, and the connection point between the third output resistor R21 and the third output filter capacitor C6 is connected to the third sampling port AD3 of the processor.

[0073] In order to prevent the current signal of the sampled balance point AGND from being too large and causing damage to the third operational amplifier U3, as another optional implementation, the DC bus-to-ground current sampling circuit also includes: a third input bidirectional clamping diode. The third input bidirectional clamping diode includes a third diode D3 and an eleventh diode D11, the anode of the third diode D3 is respectively connected to the inverting input terminal of the third operational amplifier U3 and the cathode of the eleventh diode D11, the cathode of the third diode D3 is connected to the negative power supply voltage terminal VEE of the third operational amplifier U3, and the anode of the eleventh diode D11 is connected to the positive power supply voltage terminal VSS of the third operational amplifier U3.

[0074] In order to prevent the current signal of the processed balance point AGND from being too large and causing damage to the processor, as another optional implementation, the DC bus-to-ground current sampling circuit also includes: a third output bidirectional clamping diode. The third output bidirectional clamping diode includes a fourth diode D4 and a twelfth diode D12, the anode of the fourth diode D4 is respectively connected to the output end of the third operational amplifier U3 and the cathode of the twelfth diode D12, the cathode of the fourth diode D4 is connected to the power supply voltage end VDD of the processor, and the anode of the twelfth diode D12 is grounded GND.

[0075] The third operational amplifier U3 can be a chip with a chip model of 0P-07 or a chip with a model of 0P-07, and the present invention does not specifically limit this. The resistance values ​​of the fifth input resistor R14, the sixth input resistor R15, the input voltage divider resistor R13, the third feedback resistor R18 and the third output resistor R21 can be set according to actual conditions, and the present invention does not specifically limit this.

[0076] The magnitude of the current at the balance point AGND can be used to determine whether a ground fault occurs. Specifically, when no ground fault occurs, the current at the balance point AGND can be considered to be 0 amperes within the allowable error range. When a ground fault occurs, the current at the balance point AGND is no longer 0 amperes.

[0077] S102: When the positive side resistor is cut out, determine the first voltage difference V between the positive bus and the negative bus diff0 ; Sample the positive bus current I CT+ .

[0078] Among them, for the first voltage difference V between the positive bus and the negative bus diff0 According to the first voltage V KM0+ and the first voltage V of the negative bus to ground KM0- It can also be determined by other methods, which are not particularly limited in the present invention. KM0+ and the first voltage V of the negative bus to groundKM0- Take determination as an example for illustrative explanation.

[0079] The first voltage V of the positive bus to the ground can be collected by a voltage sensor. KM0+ and the first voltage V of the negative bus to ground KM0- , the first voltage V between the positive bus and the ground can also be measured by the voltage sampling circuit KM0+ and the first voltage V of the negative bus to ground KM0- Sampling is performed, and the present invention does not make any special limitation to this.

[0080] In order to obtain a smoother voltage signal and reduce the problem of inaccurate calculation of the insulation resistance of the battery due to the influence of noise, the first voltage V KM0+ and the first voltage V of the negative bus to ground KM0- Taking sampling as an example, an exemplary description is given.

[0081] Among them, the current I of the positive bus can be measured by the current transformer CT CT+ Take samples.

[0082] Combine the following Figure 6 and Figure 7 Explanation: For the first voltage V of the positive bus to ground KM0+ The sampling circuit used for sampling, and the first voltage V KM0- The sampling circuit used for sampling.

[0083] Specifically, for the first voltage V of the positive bus to ground KM0+ The sampling can be performed using the positive bus-to-ground voltage sampling circuit, and the first voltage V KM0- For sampling, the negative bus-to-ground voltage sampling circuit can be used for sampling.

[0084] Figure 6 is a schematic diagram of a positive bus-to-ground voltage sampling circuit provided by an embodiment of the present invention. Figure 6 As shown, the positive bus-to-ground voltage sampling circuit includes a first integration circuit, wherein the first integration circuit includes a first operational amplifier U1, a first input resistor R9, a second input resistor R10, a first compensation capacitor C4, and a first feedback resistor R16.

[0085] Specifically, one end of the first input resistor R9 is connected to the positive electrode KM+ of the battery pack, and the other end is connected to the inverting input end (i.e., the "-" end, i.e., the No. 2 pin of the first operational amplifier U1) of the first input resistor R9, which is used to positively connect the first voltage V KM0+Sampling is performed; one end of the second input resistor R10 is connected to the reference signal output end of the processor, and the other end is connected to the in-phase input end of the first operational amplifier U1 (i.e., the "+" end, i.e., pin 3 of the first operational amplifier U1), for receiving the reference signal REF outputted from the reference signal output end of the processor; after the first compensation capacitor C4 and the first feedback resistor R16 are connected in parallel, one end is connected to the inverting input end of the first operational amplifier U1, and the other end is connected to the output end of the first operational amplifier U1; the output end of the first operational amplifier U1 (i.e., pin 6 of the first operational amplifier U1) is connected to the first sampling port AD1 of the processor.

[0086] The first operational amplifier U1 can increase the first voltage V between the positive bus and the ground under the action of the reference signal REF. KM0+ Improve the accuracy of sampling and reduce the occurrence of missed sampling.

[0087] As another optional implementation, the signal receiving ends connected to the inverting input terminal and the non-inverting input terminal of the first operational amplifier U1 can be interchanged, that is, the inverting input terminal of the first operational amplifier U1 is changed from the positive electrode KM+ of the battery pack originally connected to the reference signal output terminal of the processor, and the non-inverting input terminal of the first operational amplifier U1 is changed from the reference signal terminal of the processor originally connected to the positive electrode KM+ of the battery pack. The present invention does not specifically limit this, and this embodiment is exemplified by taking the example that the inverting input terminal of the first operational amplifier U1 is connected to the positive electrode KM+ of the battery pack, and the non-inverting input terminal of the first operational amplifier U1 is connected to the reference signal output terminal of the processor.

[0088] In order to obtain a high-quality first voltage V KM0+ , to improve the accuracy of subsequent calculations, as an optional implementation, the positive bus voltage to ground sampling circuit also includes: a first input filter capacitor C1 and a first RC filter. The first RC filter includes a first output resistor R19 and a first output filter capacitor C7, and one end of the first output resistor R19 is grounded to GND through the first output filter capacitor C7.

[0089] Specifically, one end of the first input filter capacitor C1 is connected to the non-inverting input terminal of the first operational amplifier U1, and the other end is grounded GND; the other end of the first output resistor R19 is connected to the output terminal of the first operational amplifier U1, and the connection point between the first output resistor R19 and the first output filter capacitor C7 is connected to the first sampling port AD1 of the processor.

[0090] In order to prevent the first voltage V KM0+The voltage of the signal is too large and causes damage to the first operational amplifier U1. As another optional implementation, the positive bus-to-ground voltage sampling circuit also includes: a first input bidirectional clamping diode. The first input bidirectional clamping diode includes a first diode D1 and a seventh diode D7, the anode of the first diode D1 is respectively connected to the inverting input terminal of the first operational amplifier U1 and the cathode of the seventh diode D7, the cathode of the first diode D1 is connected to the negative power supply voltage terminal VEE of the first operational amplifier U1, and the anode of the seventh diode D7 is connected to the positive power supply voltage terminal VSS of the first operational amplifier U1.

[0091] In order to prevent the first voltage V KM0+ The voltage of the signal is too large and causes damage to the processor. As another optional implementation, the positive bus-to-ground voltage sampling circuit also includes: a first output bidirectional clamping diode. The first output bidirectional clamping diode includes a fifth diode D5 and an eighth diode D8, wherein the anode of the fifth diode D5 is respectively connected to the output end of the first operational amplifier U1 and the cathode of the eighth diode D8, the cathode of the fifth diode D5 is connected to the power supply voltage end VDD of the processor, and the anode of the eighth diode D8 is grounded GND.

[0092] The resistance values ​​of the first input resistor R9 , the second input resistor R10 , the first feedback resistor R16 and the first output resistor R19 can be set according to actual conditions, and the present invention does not specifically limit this.

[0093] Figure 7 is a schematic diagram of a negative bus-to-ground voltage sampling circuit provided by an embodiment of the present invention. Figure 7 As shown, the negative bus-to-ground voltage sampling circuit includes a second integration circuit, wherein the second integration circuit includes a second operational amplifier U2, a third input resistor R11, a fourth input resistor R12, a second compensation capacitor C5, and a second feedback resistor R17.

[0094] Specifically, one end of the third input resistor R11 is connected to the negative electrode KM- of the battery pack, and the other end is connected to the inverting input end of the second operational amplifier U2 (i.e., the "-" end, i.e., pin 2 of the second operational amplifier U2), for the first voltage V KM0-Sampling is performed; one end of the fourth input resistor R12 is connected to the reference signal output end of the processor, and the other end is connected to the in-phase input end of the second operational amplifier U2 (i.e., the "+" end, i.e., pin 3 of the second operational amplifier U2), for receiving the reference signal REF outputted from the reference signal output end of the processor; after the second compensation capacitor C5 and the second feedback resistor R17 are connected in parallel, one end is connected to the inverting input end of the second operational amplifier U2, and the other end is connected to the output end of the second operational amplifier U2; the output end of the second operational amplifier U2 (i.e., pin 6 of the second operational amplifier U2) is connected to the second sampling port AD2 of the processor.

[0095] As another optional implementation, the signal receiving ends connected to the inverting input terminal and the non-inverting input terminal of the second operational amplifier U2 can be interchanged, that is, the inverting input terminal of the second operational amplifier U2 is changed from the negative electrode KM- of the battery pack originally connected to the reference signal output terminal of the processor, and the non-inverting input terminal of the second operational amplifier U2 is changed from the reference signal terminal of the processor originally connected to the negative electrode KM- of the battery pack. The present invention does not specifically limit this, and this embodiment is exemplified by taking the example that the inverting input terminal of the second operational amplifier U2 is connected to the negative electrode KM- of the battery pack, and the non-inverting input terminal of the second operational amplifier U2 is connected to the reference signal output terminal of the processor.

[0096] The second operational amplifier U2 can increase the first voltage V between the negative bus and the ground under the action of the reference signal REF. KM0- Improve the accuracy of sampling and reduce the occurrence of missed sampling.

[0097] In order to obtain a high-quality first voltage V KM0- , to improve the accuracy of subsequent calculations, as an optional implementation, the negative bus voltage to ground sampling circuit also includes: a second input filter capacitor C2 and a second RC filter. The second RC filter includes a second output resistor R20 and a second output filter capacitor C8, and one end of the second output resistor R20 is grounded to GND through the second output filter capacitor C8.

[0098] Specifically, one end of the second input filter capacitor C2 is connected to the non-inverting input terminal of the second operational amplifier U2, and the other end is grounded GND; the other end of the second output resistor R20 is connected to the output terminal of the second operational amplifier U2, and the connection point between the second output resistor R20 and the second output filter capacitor C8 is connected to the second sampling port AD2 of the processor.

[0099] In order to prevent the first voltage V KM0-The voltage of the signal is too large and causes damage to the second operational amplifier U2. As another optional implementation, the negative bus-to-ground voltage sampling circuit also includes: a second input bidirectional clamping diode. The second input bidirectional clamping diode includes a second diode D2 and a ninth diode D9, the anode of the second diode D2 is respectively connected to the inverting input terminal of the second operational amplifier U2 and the cathode of the ninth diode D9, the cathode of the second diode D2 is connected to the negative power supply voltage terminal VEE of the second operational amplifier U2, and the anode of the ninth diode D9 is connected to the positive power supply voltage terminal VSS of the second operational amplifier U2.

[0100] In order to prevent the first voltage V KM0- The voltage of the signal is too large and causes damage to the processor. As another optional implementation, the negative bus-to-ground voltage sampling circuit also includes: a second output bidirectional clamping diode. The second output bidirectional clamping diode includes a sixth diode D6 and a tenth diode D10, the anode of the sixth diode D6 is respectively connected to the output end of the second operational amplifier U2 and the cathode of the tenth diode D10, the cathode of the sixth diode D6 is connected to the power supply voltage end VDD of the processor, and the anode of the tenth diode D10 is grounded GND.

[0101] It can be understood that, since the negative bus-to-ground voltage sampling circuit samples the voltage of the negative bus-to-ground, and the positive bus-to-ground sampling circuit samples the voltage of the positive bus-to-ground, the first voltage V KM0- and the first voltage V of the positive bus to ground KM0+ The voltage reference direction is opposite.

[0102] The resistance values ​​of the third input resistor R11, the fourth input resistor R12, the second feedback resistor R17 and the second output resistor R20 can be set according to actual conditions, and the present invention does not specifically limit this.

[0103] After collecting the first voltage V KM0+ and the first voltage V of the negative bus to ground KM0- After that, the processor calculates the voltage V of the positive bus to the ground according to the first voltage V KM0+ and the first voltage V of the negative bus to ground KM0- Determine the first voltage difference V between the positive bus and the negative bus diff0 .

[0104] Specifically, V can be determined according to the following formula (1): diff0 .

[0105] V diff0 =V KM0+ +V KM0- (1)

[0106] S103, when performing negative side resistor cutting, determine the second voltage difference V between the positive bus and the negative bus diff1 ; Sample the current I of the negative bus CT- .

[0107] Among them, for the second voltage difference V between the positive bus and the negative bus diff1 According to the second voltage V KM1+ and the second voltage V KM1- It can also be determined by other methods, which are not particularly limited in the present invention. KM1+ and the second voltage V KM1- Take determination as an example for illustrative explanation.

[0108] The second voltage V between the positive bus and the ground can be collected by a voltage sensor. KM1+ and the second voltage V KM1- , and the second voltage V between the positive bus and the ground can also be respectively sensed by the positive bus-to-ground sampling circuit KM1+ Sampling is performed by sampling the second voltage V between the negative bus and the ground through the negative bus voltage sampling circuit. KM1- In order to obtain a smoother voltage signal and reduce the problem of inaccurate calculation of the insulation resistance of the battery due to noise, this embodiment uses a positive bus-to-ground sampling circuit to sample the second voltage V KM1+ Sampling is performed by sampling the second voltage V between the negative bus and the ground through the negative bus voltage sampling circuit. KM1- Taking sampling as an example, an exemplary description is given.

[0109] Among them, the current I of the positive bus can be measured by the current transformer CT CT+ Take samples.

[0110] It can be understood that, since the negative bus-to-ground voltage sampling circuit samples the voltage of the negative bus-to-ground, and the positive bus-to-ground sampling circuit samples the voltage of the positive bus-to-ground, the second voltage V KM1- and the second voltage V KM1+ The voltage reference direction is opposite.

[0111] After collecting the second voltage V KM1+ and the second voltage V KM1- After that, the processor can calculate the voltage V KM1+ and the second voltage V KM1- Determine the second voltage difference V between the positive bus and the negative bus diff1 .

[0112] Specifically, V can be determined according to the following formula (2): diff1 .

[0113] V diff1 =V KM1+ +V KM1- (2)

[0114] S104, according to the first voltage difference V diff0 , the second voltage difference V diff1 , positive bus current I CT+ and the negative bus current I CT- Calculate the insulation resistance R of the battery pack X Resistance value.

[0115] Specifically, the insulation resistance R of the battery pack can be calculated according to the following formula (3): X resistance value.

[0116]

[0117] The following is to calculate the insulation resistance R of the battery pack X Formula (3) is used for verification.

[0118] When a single cell in a battery pack has a ground fault, the total number of cells from the positive starting point of the battery pack (i.e., the single cell connected to the positive bus) to the fault position a is N1 (N1 is unknown), and the total number of cells from the fault position a to the end of the battery pack (i.e., the single cell connected to the negative bus) is N2 (N2 is unknown). The voltage of each single cell is V bat (V bat Known), then the first voltage V KM0+ It can be expressed by the following formula (4): KM0- It can be expressed by the following formula (5): KM1+ It can be expressed by the following formula (6): KM1- It can be expressed by the following formula (7).

[0119] V KM0+ =N1*V bat +R X *I CT+ (4)

[0120] V KM0- =N2*V bat +R X *I CT+ (5)

[0121] VKM1+ =N1*V bat +R X *I CT- (6)

[0122] V KM1- =N2*V bat +R X *I CT- (7)

[0123] Substituting formula (4) and formula (5) into formula (1), we can see that the first voltage difference V diff0 It can be expressed by the following formula (8).

[0124] V diff0 =N1*V bat +R X *I CT+ +N2*V bat +R X *I CT+ =(N1+N2)*V bat +2*R X *I CT+ (8)

[0125] Substituting formula (6) and formula (7) into formula (2), we can see that the second voltage difference V diff1 It can be expressed by the following formula (9).

[0126] V diff1 =N1*V bat +R X *I CT- +N2*V bat +R X *I CT- =(N1+N2)*V bat +2*R X *I CT- (9)

[0127] Combining formula (8) and formula (9) yields the following formula (10).

[0128] V diff1 -V diff0 =2*R X *(I CT- -I CT+ ) (10)

[0129] According to Ohm's law, formula (10) can be transformed into formula (3).

[0130] Through the verification process of formula (4), formula (5), formula (6), formula (7), formula (8), formula (9) and formula (10), it is explained that according to the first voltage difference V diff0 , the second voltage difference V diff1 , positive bus current I CT+ and the negative bus current I CT- Calculate the insulation resistance R of the battery pack X The feasibility and accuracy of resistance value.

[0131] In order to facilitate maintenance personnel to timely understand the resistance of the insulation resistor, as an optional implementation, step S105 may be performed.

[0132] S105, insulation resistance R X When the resistance value is less than the preset resistance value, the system issues the first alarm message; when the insulation resistance R X When the resistance value is greater than or equal to the preset resistance value, the system issues a second alarm message.

[0133] The preset resistance value is designed according to the actual situation, and the present invention does not make any special limitation on this. The first alarm information includes the insulation resistance R X The second alarm information includes the insulation resistance R X resistance value and the second alarm signal; the first alarm signal and the second alarm signal can both be sound signals, light signals, or a combination of sound and light signals, and the present invention does not make any special limitation on this.

[0134] The first alarm signal and the second alarm signal may be the same or different, and the present invention does not specifically limit this. In order to make it easier for operation and maintenance personnel to determine the severity of the grounding fault, this embodiment takes the first alarm signal and the second alarm signal as an example for illustrative description. X When the resistance value is less than the preset resistance value, the alarm signal in the first alarm information is red. X When the resistance value is greater than or equal to the preset resistance value, the alarm signal in the second alarm information is green.

[0135] When a single cell in a battery pack has a ground fault, in order to quickly find the fault location, facilitate maintenance personnel to perform maintenance, and improve maintenance efficiency, as another optional implementation, after executing steps S101 to S105, steps S106 to S109 may also be executed.

[0136] S106, according to the first voltage V of the positive bus to the ground KM0+ and the first voltage V of the negative bus to ground KM0- Determine the first bus voltage V when the positive resistor is cut outMVol0 ; According to the second voltage V of the positive bus to ground KM1+ and the second voltage V KM1- Determine the second bus voltage V when the negative side resistor is cut out Mvol1 .

[0137] Specifically, the first bus voltage V can be determined according to the following formula (11): MVol0 , determine the second bus voltage V according to the following formula (12): Mvol1 .

[0138] V MVol0 =V KM0+ -V KM0- (11)

[0139] V Mvol1 =V KM1+ -V KM1- (12)

[0140] S107, according to the first voltage V of the positive bus to the ground KM0+ , Insulation resistance R X and the positive bus current I CT+ Determine the forward fault voltage V when the positive side resistor is cut out BAT0 ; According to the second voltage V of the positive bus to ground KM1+ , Insulation resistance R X and the negative bus current I CT- Determine the forward fault voltage V when the negative side resistor is cut out BAT1 .

[0141] Specifically, the forward fault voltage V when the positive side resistor is cut out can be determined according to the following formula (13): BAT0 , determine the forward fault voltage V when the negative side resistor is cut out according to the following formula (14): BAT1 .

[0142] V BAT0 =V KM0+ -R X *I CT+ (13)

[0143] V BAT1 =V KM1+ -R X *I CT+ (14)

[0144] Among them, whether the positive fault voltage V BAT0 , or the positive fault voltage V when the negative side resistor is cut out BAT1 , both refer to the voltage from the positive electrode of the single cell connected to the positive bus in the battery pack to the fault point a.

[0145] S108, according to the first bus voltage V MVol0 , forward fault voltage V when the positive side resistor is cut out BAT0 The number of the first positive fault battery N is determined by the total number of battery cells N of the battery pack BLocal0 ; According to the second bus voltage V Mvol1 , positive fault voltage V when the negative side resistor is switched BAT1 The number of the second positive fault battery N is determined by the total number of battery cells N of the battery group Blocal1 . Among them, the total number of battery cells N in the battery pack is known.

[0146] Specifically, the number N of the first positive fault battery can be determined according to the following formula (15): BLocal0 According to the following formula (16), the number of cells N of the second positive fault battery is determined Blocal1 .

[0147]

[0148]

[0149] Among them, the number of cells of the first positive fault battery is N BLocal0 is the total number of cells from the cells connected to the positive bus in the battery pack to the fault point a when the positive side resistor is cut out; the number of cells of the second positive fault battery N Blocal1 It is the total number of cells from the cells connected to the positive bus in the battery pack to the fault point a when the negative side resistance is cut out.

[0150] Among them, the forward fault voltage V when the positive side resistor is cut out BAT0 Divide by the first bus voltage V MVol0 The obtained quotient is the first positive proportional coefficient K of the positive fault voltage to the total bus voltage when the positive side resistor is cut out. BLocal0 ;Forward fault voltage V when using negative side resistor to cut out BAT1 Divide by the second bus voltage V Mvol1 The obtained quotient is the second positive proportional coefficient K of the positive fault voltage to the total bus voltage when the negative side resistor is cut out. Blocal1 .

[0151] If a single cell in the battery pack itself has a ground fault, the number of cells N of the first positive fault cell calculated by formula (15) is: BLocal0 The value of will be the same as the number of the second positive fault battery N calculated using formula (16) Blocal1The value of is equal and is a positive integer; if the connection line between the single cells in the battery pack has a ground fault, the number of the first positive fault battery N calculated by formula (15) is BLocal0 The value of will be the same as the number of the second positive fault battery N calculated using formula (16) Blocal1 The values ​​are not equal.

[0152] S109: according to the number N of the first positive fault battery BLocal0 and the number of the second positive fault battery N Blocal1 Determine the ground fault location L.

[0153] Specifically, the ground fault location L can be determined by the following formula (17).

[0154]

[0155] If L is an integer, the ground fault is located on a single cell in the battery pack, and the value of L is the number of the single cell where the ground fault occurs. For example, the number of cells N of the first positive fault cell is BLocal0 The value is 25, the number of cells of the second positive fault battery is N Blocal1 The value of is also 25, then the value of L is also 25, indicating that the 25th battery in the battery pack has a ground fault; if L is a decimal, the ground fault location is located on the connecting line between the two single cells numbered by the two integers adjacent to the value, for example, the number of cells N of the first positive fault battery BLocal0 The value is 25, the number of cells of the second positive fault battery is N Blocal1 The value of is also 26, and the value of L is 25.5, indicating that a ground fault has occurred in the connecting line between the 25th and 26th batteries in the battery pack.

[0156] The single cell numbers Na are numbered starting from the positive starting point of the battery pack (ie, the single cell connected to the positive busbar).

[0157] The error of the faulty single cell number Na calculated through steps S106 to S109 can be controlled within ±1 cell, which is a relatively small error.

[0158] Those skilled in the art will appreciate that the above embodiments are exemplary and are not intended to limit the present application. Where possible, the execution order of one or more of the above steps may be adjusted, or may be selectively combined to obtain one or more other embodiments. Those skilled in the art may select and combine any of the above steps as needed, and all those that do not depart from the essence of the present application fall within the scope of protection of the present application.

[0159] The embodiment of the present invention provides a method for calculating the insulation resistance of a battery pack. The method uses a balancing bridge circuit connected to the positive and negative ends of the battery pack to first cut out the positive resistance of the balancing bridge and then cut out the negative resistance of the balancing bridge. When the positive resistance is cut out, the first voltage difference between the positive bus and the negative bus is determined. The current of the positive bus is sampled. When the negative resistance is cut out, the second voltage difference between the positive bus and the negative bus is determined. The current of the negative bus is sampled. The insulation resistance of the battery pack is calculated based on the first voltage difference, the second voltage difference, the current of the positive bus and the current of the negative bus. By calculating the insulation resistance of the battery pack using the current difference and voltage difference before and after the switching when the system switches the positive resistance and the negative resistance, not only can the problem of inaccurate insulation resistance calculation of the battery pack due to the zero drift of the mutual inductor be reduced, the accuracy of the insulation resistance calculation is improved, and the complexity of calculating the insulation resistance can be reduced due to the simple process.

[0160] An embodiment of a system for calculating the insulation resistance value of a battery pack:

[0161] An embodiment of the present invention provides a system for calculating the insulation resistance value of a battery pack, including a processor, wherein the processor executes a computer program to implement the steps of the aforementioned method for calculating the insulation resistance value of a battery pack.

[0162] A system for calculating the insulation resistance value of a battery pack provided by an embodiment of the present invention can achieve the same beneficial effects as the aforementioned "a method for calculating the insulation resistance value of a battery pack", which will not be repeated here.

Claims

1. A method for calculating the insulation resistance of a battery pack, characterized in that: The steps include: Using a balancing bridge circuit connected to the positive and negative terminals of the battery pack, firstly cut out the positive side resistance of the balancing bridge, and then cut out the negative side resistance of the balancing bridge; When the positive side resistor is cut out, determining a first voltage difference between the positive bus and the negative bus; sampling the current of the positive bus; When the negative side resistor is cut out, determining a second voltage difference between the positive bus and the negative bus; sampling the current of the negative bus; The insulation resistance of the battery pack is calculated according to the first voltage difference, the second voltage difference, the current of the positive bus and the current of the negative bus.

2. The method for calculating the insulation resistance of a battery pack according to claim 1, characterized in that: When the positive side resistor is cut out, the first voltage difference is determined according to the first voltage of the positive busbar to ground and the first voltage of the negative busbar to ground; When the negative side resistor is cut out, the second voltage difference is determined according to the second voltage of the positive bus bar to the ground and the second voltage of the negative bus bar to the ground.

3. The method for calculating the insulation resistance of a battery pack according to claim 1, characterized in that: The insulation resistance of the battery pack=(the second voltage difference-the first voltage difference)÷[2*(the current of the negative bus-the current of the positive bus)].

4. The method for calculating the insulation resistance of a battery pack according to any one of claims 1 to 3, characterized in that: Also includes: When the insulation resistance value is less than the preset resistance value, the system issues a first alarm message; when the insulation resistance value is greater than the preset resistance value, the system issues a second alarm message; The first alarm information includes the insulation resistance value and a first alarm signal; the second alarm information includes the insulation resistance value and a second alarm signal.

5. The method for calculating the insulation resistance of a battery pack according to claim 2, characterized in that: When a ground fault occurs in a single cell in the battery pack, the method further includes: determining a first bus voltage according to a first voltage of the positive bus to ground and a first voltage of the negative bus to ground; Determine the forward fault voltage when the positive side resistor is cut out according to the first voltage of the positive busbar to ground, the insulation resistance value and the current of the positive busbar; Determine the number of first forward fault batteries according to the first bus voltage, the forward fault voltage when the positive resistor is cut out, and the total number of batteries in the battery pack; Determine a second bus voltage according to a second voltage of the positive bus to ground and a second voltage of the negative bus to ground; Determine the forward fault voltage when the negative side resistor is cut out according to the second voltage of the positive bus to ground, the insulation resistance value and the current of the negative bus; Determine the number of the second positive fault battery according to the second bus voltage, the positive fault voltage when the negative side resistor is switched, and the total number of battery cells of the battery pack; Determining a ground fault location according to the number of the first forward faulty batteries and the number of the second forward faulty batteries; Among them, the forward fault voltage is the voltage from the positive electrode of the single cell connected to the positive bus in the battery pack to the position where the ground fault occurs; the number of the first forward fault battery is the total number of single cells from the single cell connected to the positive bus in the battery pack to the ground fault position when the positive side resistor is cut out; the number of the second forward fault battery is the total number of single cells from the single cell connected to the positive bus in the battery pack to the ground fault position when the negative side resistor is cut out.

6. The method for calculating the insulation resistance of a battery pack according to claim 5, characterized in that: The first bus voltage=the first voltage of the positive bus to the ground-the first voltage of the negative bus to the ground; The second bus voltage=the second voltage of the positive bus to the ground-the second voltage of the negative bus to the ground; Among them, the voltage reference direction of the first voltage of the negative bus to the ground is opposite to the voltage reference direction of the first voltage of the positive bus to the ground; the voltage reference direction of the second voltage of the negative bus to the ground is opposite to the voltage reference direction of the first voltage of the positive bus to the ground.

7. The method for calculating the insulation resistance of a battery pack according to claim 5, characterized in that: The forward fault voltage when the positive side resistor is cut out = the first voltage of the positive bus to the ground - the insulation resistance value * the current of the positive bus; The forward fault voltage when the negative side resistor is cut out=the second voltage of the positive bus to the ground-the insulation resistance value*the current of the negative bus.

8. The method for calculating the insulation resistance of a battery pack according to claim 5, characterized in that: The number of the first forward faulty battery cells = the forward fault voltage when the positive side resistor is cut out / the first bus voltage * the total number of battery cells in the battery pack; The number of the second forward faulty batteries = the forward fault voltage when the negative side resistor is switched on / the second bus voltage*the total number of batteries in the battery pack.

9. The method for calculating the insulation resistance of a battery pack according to any one of claims 5 to 8, characterized in that: When the sum of the number of the first forward faulty battery and the number of the second forward faulty battery divided by 2 is an integer, the ground fault position is located on a single battery in the battery pack, and the value is the number of the single battery where the ground fault occurs; When the value obtained by dividing the sum of the number of the first forward faulty battery and the number of the second forward faulty battery by 2 is a decimal, the ground fault position is located on the connecting line between two single battery cells numbered by two integers adjacent to the value.

10. A system for calculating the insulation resistance of a battery pack, comprising a processor, characterized in that: The processor executes the computer program to implement the steps of the method for calculating the insulation resistance value of a battery pack as described in any one of claims 1 to 9.

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