Testbench simulation verification platform and system

Abstract

The invention discloses a testbench simulation verification platform and system, and the platform comprises an excitation database which collects and stores simulation source data; when a parameter configuration instruction of a to-be-tested module is received, excitation content corresponding to configuration parameters is determined, and the excitation content is output through a parameter interface; the excitation content is used for a simulation test of a to-be-tested module; and the data conversion module is used for acquiring an output signal of the to-be-tested module and converting the output signal into response content in a preset format according to a conversion rule. According to the method, the simulation process is simplified, manual intervention is reduced, the automation degree and accuracy of simulation testing are improved, and the testing efficiency and reusability are effectively improved.

Description

Technical Field

[0001] The present invention relates to the field of FPGA technology, and in particular to a testbench simulation verification platform and system. Background Art

[0002] With the rapid development of FPGA (Field Programmable Gate Array) technology, FPGA is increasingly used in communication technology, digital signal processing, embedded systems and other fields. In order to ensure the correctness and stability of FPGA design functions, simulation testing has become an indispensable part of the design process. Testbench is an important tool to verify whether the FPGA design function meets expectations. It usually consists of three parts: stimulus signal input, top-level interface signal instantiation and output result inspection. Whether the design of testbench is reasonable directly affects the efficiency and accuracy of simulation testing.

[0003] However, in actual applications, FPGA developers often face the following problems when using testbench:

[0004] 1. Repeated testbench writing: Every time a new simulation task is performed, developers usually need to rewrite the testbench module according to the specific test objectives. This practice leads to a lot of duplication of work, increasing development costs and time.

[0005] 2. Lack of versatility: Existing testbench modules are usually customized for specific tasks and modules, lacking compatibility with different test scenarios and configurations. Whenever simulation requirements change, testbench modules often need to be rewritten or adjusted, reducing their versatility and reusability. Summary of the invention

[0006] According to one aspect of the present invention, a testbench simulation verification platform is provided, which is compatible with a variety of modules to be tested and improves the simulation efficiency of FPGA projects.

[0007] In order to solve the above technical problems, the first aspect of the present invention discloses a testbench simulation verification platform, comprising:

[0008] The stimulus database collects and stores simulation source data; upon receiving the parameter configuration instruction of the module to be tested, determines the stimulus content corresponding to the configuration parameter, and outputs the stimulus content through the parameter interface; the stimulus content is used for simulation testing of the module to be tested;

[0009] The data conversion module obtains the output signal of the module to be tested and converts the output signal into response content in a preset format according to a conversion rule.

[0010] In some embodiments, the incentive database includes a data splitting unit, a data configuration unit and a data generation unit. The data splitting unit is used to split the parameter configuration instructions of the module to be tested, and the data configuration unit is used to determine the configuration parameters of each module to be tested according to the parameter configuration instructions; the data generation unit is used to automatically generate incentive content that meets the requirements of the module to be tested according to the user's configuration parameters.

[0011] In some implementations, the excitation content includes data types and data parameters, the data types include single tone, wide spectrum, and constant, and the data parameters include bandwidth, sampling rate, number of antennas, and timing data.

[0012] In some implementations, the data generation unit determines the incentive content by one or more of the following methods:

[0013] Define different configuration parameters as macros or parameters through System Verilog or Verilog, and generate corresponding stimulus data according to the configuration.

[0014] In some implementations, the module to be tested defines required configuration parameters through the parameter interface, and each of the stimulus contents sets a corresponding parameter interface.

[0015] In some embodiments, the data conversion module includes a data format conversion unit and a file import and export unit. The data format conversion unit is used to convert the data format of the output signal into a response content in a preset data format; the file import and export unit is used to convert the output signal into a response content in a preset file format.

[0016] In some implementations, the response content includes a data format and a file format, the data format includes a data base, and the file format includes txt and xlsx formats.

[0017] In some implementations, the stimulus database and response content are written in Verilog language or SystemVerilog language.

[0018] In a second aspect, a testbench simulation verification system is disclosed, the system comprising:

[0019] A testbench simulation verification platform as described above;

[0020] The module to be tested performs simulation test according to the stimulus content to generate an output signal.

[0021] Compared with the prior art, the present invention has the following beneficial effects:

[0022] The present invention provides a testbench simulation verification platform and system, wherein the stimulus database can automatically determine and output corresponding stimulus content according to the parameter configuration instructions of the module to be tested, thereby ensuring that each simulation task can accurately generate stimulus data that meets the requirements, and avoiding the tedious work of repeatedly writing stimulus signals. At the same time, the data conversion module converts the output signal of the module to be tested into a response content in a standard format according to the conversion rules, so that the test results are more standardized, easy to store and analyze. The present invention simplifies the simulation process, reduces manual intervention, improves the automation and accuracy of the simulation test, and effectively improves the test efficiency and reusability. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A schematic diagram of an existing testbench simulation verification platform provided by the present invention;

[0024] Figure 2 A schematic diagram of another existing testbench simulation verification platform provided by the present invention;

[0025] Figure 3 The figure is a schematic diagram of a testbench simulation verification platform provided by the present invention. DETAILED DESCRIPTION

[0026] For better understanding and implementation, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0027] The terms "including" and "having" and any variations thereof in the embodiments of the present invention are intended to cover non-exclusive inclusions. For example, a process, method, system, product or apparatus comprising a series of steps or modules is not necessarily limited to those steps or modules explicitly listed, but may include other steps or modules not explicitly listed or inherent to these processes, methods, products or apparatus.

[0028] like Figure 1 As shown in the figure, it is a traditional testbench platform. Each module to be tested corresponds to a set of stimulus content and response content. That is to say, during use, when a new module to be tested is added, a new testbench code needs to be written for it, and independent stimulus and response data files need to be configured for it. This repetitive writing method not only increases development costs, but also reduces code reusability and maintainability.

[0029] In order to further improve work efficiency, there is Figure 2 The testbench platform is a structure in which multiple modules under test correspond to multiple independent testbench modules. It works well in a single task, but it is difficult to manage and modify efficiently when facing a complex system. For example, when multiple modules under test in the system require the same configuration, developers must manually reconfigure multiple testbench modules, resulting in low efficiency.

[0030] However, the configuration process of the above two platforms is complicated, especially in a multi-module, multi-task simulation environment. Developers need to manually configure the stimulus source, response file, and interface parameters for each module to be tested, which is prone to configuration errors or omissions. The configuration process is cumbersome, and there are no automated tools to reduce the risk of human error. The simulation environment construction cycle is long, and it is easy to cause deviations in test results due to improper manual configuration.

[0031] In view of the above, an embodiment of the present invention discloses a testbench simulation verification platform, which is compatible with a variety of modules to be tested and does not require repeated writing of the testbench during the simulation test process, thereby improving the simulation efficiency of FPGA projects.

[0032] like Figure 1 As shown, the platform includes an excitation database and a data conversion module. The excitation database collects and stores simulation source data; upon receiving the parameter configuration instruction of the module to be tested, the excitation content corresponding to the configuration parameter is determined, and the excitation content is output through the parameter interface; the excitation content is used for the simulation test of the module to be tested; the data conversion module obtains the output signal of the module to be tested, and converts the output signal into a response content in a preset format according to the conversion rule.

[0033] The stimulus database is used to store and manage various simulation source data and centrally manage all simulation source data. Generate corresponding stimulus content according to the test requirements of the module under test and store it in the stimulus database. In each simulation test, the testbench does not need to write new stimulus signals for each simulation task, but can reuse existing stimulus content. The stimulus content simulates the interaction between the module under test and the outside world, provides different input signals, and verifies the performance of the module under test to ensure that the function and performance of the module under test meet expectations.

[0034] In the present application, the stimulus database includes a data splitting unit, a data configuration unit and a data generation unit, wherein the data splitting unit is used to split the parameter configuration instructions of the module to be tested. The parameter configuration instructions of the module to be tested usually include a plurality of specified parameters, such as clock signal, data bit width, sampling rate, etc. The data splitting unit determines the configuration parameters of each module to be tested according to the parameter configuration instructions, and decomposes the input signal of the module to be tested into independent and easy-to-manage small units. The split contents can be processed separately to ensure that the configuration and adjustment of each input signal are more flexible and accurate.

[0035] The data configuration unit configures each split configuration parameter independently, configures different parameters for different simulation tasks, and sets the required working conditions for each module under test. For example, the working clock frequency, link data bit width, data sampling rate and other parameters can be configured separately to ensure that the stimulus signal adapts to the needs of the module under test. The configuration process is flexibly adjusted according to the user's set requirements and simulation environment to ensure that the module under test can work normally under different configurations and provide accurate parameters for stimulus generation.

[0036] After receiving the configuration parameters from the data configuration unit, the data generation unit automatically generates stimulus content that meets the requirements of the module under test based on these configurations and constructs corresponding stimulus signals. These stimulus signals will be used as input signals of the module under test and provided to the module under test through the testbench. The stimulus generation process is automated, avoiding the tediousness of manual settings, improving efficiency, and ensuring the consistency and accuracy of the test.

[0037] The stimulus database outputs the stimulus content through the parameter interface, and the module to be tested defines the required configuration parameters through the parameter interface, and each stimulus content sets the corresponding parameter interface, and different stimulus contents correspond to different parameter interfaces. Generally, the definition of the parameter interface is written in Verilog or System Verilog language, which allows users to flexibly set different simulation parameters and automatically generate stimulus signals that meet these configuration requirements. Each parameter has a clear definition and type in the corresponding parameter interface. All these parameters are defined through the parameter interface before simulation to ensure that the simulation tool can recognize and use these parameters to generate appropriate stimulus content. Users can set the corresponding parameter interface according to different simulation task requirements to quickly and accurately generate stimulus content.

[0038] During the simulation process, you can fill in the parameter interface to specify the specific requirements of the simulation task and quickly configure different simulation environments without having to manually write complex stimulus signal codes. After filling in the parameter interface, the platform will generate the corresponding stimulus content and stimulus signal based on the configuration parameters. For example, based on the set bandwidth and sampling rate, the platform will automatically calculate the required signal timing, data format, etc., to generate stimulus content that matches the module to be tested. By automatically generating stimulus signals to reduce human intervention, errors and inefficiencies caused by manual code writing are avoided.

[0039] The configured parameter interface will provide the required data source for the stimulus database, ensuring that the module under test can receive the correct input signal under different simulation tasks. This flexible configuration and automatic generation mechanism improves simulation efficiency and reduces the workload of each simulation task configuration. The stimulus database can provide highly customized and compliant stimulus signals for each simulation task.

[0040] The module under test is responsible for executing specific functions or tasks, while the data conversion module converts the format of the output of the module under test to ensure the standardization of the test results and the compatibility of subsequent processing. The working process of the two is closely coordinated, and through precise input and output management, the verification of the module under test and the effective use of the results are completed.

[0041] The module under test is usually written by developers using hardware description languages ​​such as Verilog or System Verilog, and is responsible for implementing specific functions or logic, such as signal processing, data calculation or control tasks. In simulation testing, the module under test receives stimulus signals generated by the stimulus database of this platform, and performs corresponding tasks according to the changes of these stimulus signals, and finally generates output signals.

[0042] The data conversion module processes the output signal and converts it into a response content in a preset format according to the conversion rules, ensuring that the simulation results can be stored and processed in a consistent and standard manner. This data conversion module receives the original output signal generated by the module under test and converts it into the required file format according to the simulation requirements.

[0043] The data conversion module includes a data format conversion unit and a file import and export unit. The data format conversion unit is used to convert the data format of the output signal into a response content in a preset format; the file import and export unit is used to convert the output signal into a response content in a preset file format. It usually includes converting complex binary or digital signals into a format that is easy to read or subsequently process, such as a text file, a CSV file, or a binary file. The converted response content can be conveniently used for result analysis, report generation, or further processing compatible with other systems. The data conversion module ensures the availability and cross-platform compatibility of the test results, avoiding problems caused by inconsistent data formats.

[0044] Furthermore, multiple modules to be tested can be set up and multiple simulation tests can be performed simultaneously. During the simulation process, the stimulus database generates independent stimulus signals for each module to be tested and passes them to the corresponding modules through the parameter interface. Each module to be tested performs simulation tasks based on its own input signals and generates output signals. This platform can flexibly configure different simulation parameters for multiple modules to be tested, ensuring that each module can run in an independent and precise test environment without interfering with each other.

[0045] Based on the same inventive idea, such as Figure 3 As shown, the present application provides a testbench simulation verification system, the system comprising:

[0046] A testbench simulation verification platform as described above;

[0047] The module to be tested performs simulation test according to the stimulus content to generate an output signal.

[0048] The present invention significantly improves the efficiency and flexibility of simulation testing through the collaborative work of the stimulus database and the data conversion module. The stimulus database can automatically determine and output the corresponding stimulus content according to the parameter configuration instructions of the module to be tested, ensuring that each simulation task can accurately generate stimulus data that meets the requirements, avoiding the tedious work of repeatedly writing stimulus signals. At the same time, the data conversion module converts the output signal of the module to be tested into a response content in a standard format according to the conversion rules, making the test results more standardized, easy to store and analyze. The present invention simplifies the simulation process, reduces manual intervention, improves the automation and accuracy of the simulation test, and effectively improves the test efficiency and reusability.

[0049] The processing method of the system can refer to the description of the above method and will not be repeated here.

[0050] The present invention also provides a device, which may include: a memory storing executable program code;

[0051] a processor coupled to the memory;

[0052] A transceiver used to communicate with other devices or communication networks and to receive or send network messages;

[0053] A bus used to connect memory, processors, and transceivers for internal communication.

[0054] The transceiver receives messages transmitted over the network and passes them to the processor via the bus. The processor calls the executable program code stored in the memory through the bus for processing, and passes the processing results to the transceiver via the bus for sending, thereby realizing the method provided in the embodiment of the present application.

[0055] An embodiment of the present application also provides a non-transitory machine-readable storage medium, on which an executable program is stored. When the executable program is executed by a processor, the processor executes the processing method provided in the above embodiment.

[0056] An embodiment of the present invention discloses a computer-readable storage medium storing a computer program for electronic data exchange, wherein the computer program enables a computer to execute the described method.

[0057] An embodiment of the present invention discloses a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to enable a computer to execute the described method.

[0058] The embodiments described above are only illustrative, wherein the modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules, i.e., they may be located in one place, or they may be distributed on multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Those of ordinary skill in the art may understand and implement it without paying creative labor.

[0059] Through the specific description of the above embodiments, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on such an understanding, the above technical solution can be essentially or partly contributed to the prior art in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, and the storage medium includes a read-only memory (ROM), a random access memory (RAM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), a one-time programmable read-only memory (OTPROM), an electronically erasable rewritable read-only memory (EEPROM), a compact disc (CD-ROM) or other optical disc storage, magnetic disk storage, magnetic tape storage, or any other computer-readable medium that can be used to carry or store data.

[0060] Finally, it should be noted that the embodiments disclosed in the present invention are only preferred embodiments of the present invention, which are only used to illustrate the technical solutions of the present invention rather than to limit them. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A testbench simulation verification platform, characterized in that: include: Stimulus database, which collects and stores simulation source data; When receiving the parameter configuration instruction of the module to be tested, determining the stimulus content corresponding to the configuration parameter, and outputting the stimulus content through the parameter interface; The stimulus content is used for simulation testing of the module to be tested; The data conversion module obtains the output signal of the module to be tested and converts the output signal into response content in a preset format according to a conversion rule.

2. A testbench simulation verification platform according to claim 1, characterized in that: The incentive database includes a data splitting unit, a data configuration unit and a data generation unit. The data splitting unit is used to split the parameter configuration instructions of the module to be tested, and the data configuration unit is used to determine the configuration parameters of each module to be tested according to the parameter configuration instructions; the data generation unit is used to automatically generate incentive content that meets the requirements of the module to be tested according to the user's configuration parameters.

3. A testbench simulation verification platform according to claim 2, characterized in that: The excitation content includes data types and data parameters. The data types include single tone, wide spectrum, and constant. The data parameters include bandwidth, sampling rate, number of antennas, and timing data.

4. A testbench simulation verification platform according to claim 2, characterized in that: The data generation unit determines the incentive content by one or more of the following methods: Define different configuration parameters as macros or parameters through System Verilog or Verilog, and generate corresponding stimulus data according to the configuration.

5. A testbench simulation verification platform according to claim 4, characterized in that: The module to be tested defines the required configuration parameters through the parameter interface, and each of the stimulus contents sets a corresponding parameter interface.

6. A testbench simulation verification platform according to claim 5, characterized in that: The data conversion module includes a data format conversion unit and a file import and export unit, and the data format conversion unit is used to convert the data format of the output signal into a response content in a preset data format; The file import and export unit is used to convert the output signal into response content in a preset file format.

7. A testbench simulation verification platform according to claim 6, characterized in that: The response content includes data format and file format, the data format includes data base, and the file format includes txt and xlsx formats.

8. A testbench simulation verification platform according to claim 4, characterized in that: The stimulus database and response content are written in Verilog language or System Verilog language.

9. A testbench simulation verification system, characterized in that: The system comprises: A testbench simulation verification platform as described in any one of claims 1 to 8; The module to be tested performs simulation test according to the stimulus content to generate an output signal.

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