Display device and display terminal

Abstract

The embodiment of the invention provides a display device and a display terminal. The display device comprises a circuit board and a display driving chip, at least one target wire is embedded in the circuit board, a target test point located on the surface of the circuit board is arranged between the two ends of the target wire on the target wire, the target test point is covered with an insulating layer, and each target wire is connected with at least one output end of the display driving chip; and after the insulating layer covering the target test point of any target wire is scraped and any target wire is disconnected from the target test point, the output end, connected with any target wire, in the display driving chip works abnormally. Therefore, reverse analysis protection of the display device is realized, and the difficulty of reverse analysis of the display device is improved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of display technology, and in particular, to a display device and a display terminal. Background Art

[0002] Display devices are widely used in various smart devices such as mobile phones, televisions, laptops, desktop computers, wearable devices, etc. With the rapid iteration of display technology used in display devices, the protection of display technology is becoming more and more important.

[0003] However, the protection of display technology used in display devices needs to be improved. Summary of the invention

[0004] In view of this, embodiments of the present application provide a display device and a display terminal to at least partially solve the above problems.

[0005] According to a first aspect of an embodiment of the present application, a display device is provided, comprising: a circuit board and a display driver chip; at least one target wire is embedded in the circuit board, a target test point located on the surface of the circuit board is arranged between the two ends of the target wire, the target test point is covered with an insulating layer, and each of the target wires is respectively connected to at least one output terminal of the display driver chip; after the insulating layer covering the target test point of any target wire is scraped off and the any target wire is disconnected from the location where the target test point is arranged, the output terminal of the display driver chip connected to the any target wire operates abnormally.

[0006] According to a second aspect of an embodiment of the present application, a display terminal is provided, comprising a terminal device body, and a display apparatus as described in the first aspect above and arranged on the terminal device body.

[0007] According to the display device provided by the embodiment of the present application, by setting the target wire and the target test point, when the display device is reversely analyzed and the insulating layer of any target test point is scraped off, since the target test point is small and the target test point is set between the two ends on the corresponding target wire and the target test point, the target wire is basically disconnected from the position where the target test point is set, so that the output end of the display driver chip connected to the target wire works abnormally, thereby realizing reverse analysis protection for the display device and improving the difficulty of reverse analysis of the display device. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of the present application. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.

[0009] Figure 1 is a schematic structural diagram of a display device according to an embodiment of the present application;

[0010] Figure 2 is a schematic structural diagram of a display device according to another embodiment of the present application;

[0011] Figure 3 is a partial circuit diagram of a display device according to an embodiment of the present application;

[0012] Figure 4 is a partial circuit diagram of a display device according to another embodiment of the present application;

[0013] Figure 5 is a partial circuit diagram of a display device according to another embodiment of the present application;

[0014] Figure 6 It is a schematic diagram of the structure of a display terminal according to an embodiment of the present application.

[0015] Description of reference numerals:

[0016] 1. Circuit board; 2. Display driver chip; 3. Screen body; 31. First sub-screen; 32. Second sub-screen. DETAILED DESCRIPTION

[0017] In order to enable those skilled in the art to better understand the technical solutions in the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments in the embodiments of the present application should fall within the scope of protection of the embodiments of the present application.

[0018] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms of "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used in the embodiments of the present application refers to and includes any or all possible combinations of one or more associated listed items.

[0019] It should be understood that in the description of the embodiments of the present application, the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the schemes of the embodiments of the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the embodiments of the present application.

[0020] In addition, when an element or layer is referred to as being “on,” “connected to,” or “coupled to” another element or layer, the element or layer may be directly on, directly connected to, or directly coupled to the other element or layer, or intervening elements or layers may be present. However, when an element or layer is referred to as being “directly on,” “directly connected to,” or “directly coupled to” another element or layer, there are no intervening elements or layers present.

[0021] The terms first, second, etc. are used to describe various elements, components, regions, layers and / or parts, but these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, region, layer and / or part from another element, component, region, layer and / or part.

[0022] Unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0023] The specific implementation of the embodiment of the present application is further explained below in conjunction with the accompanying drawings of the embodiment of the present application.

[0024] Figure 1 Schematic diagram of the structure of a display device according to an embodiment of the present application. Figure 1As shown, the display device includes: a circuit board 1 (for example, a flexible circuit board 1, etc.) and a display driver chip 2 (Display Driver Integrated Circuit, DDIC); at least one target wire is buried in the circuit board 1, and a target test point located on the surface of the circuit board 1 is set between the two ends of the target wire on the target wire, and the target test point is covered with an insulating layer, and each target wire is respectively connected to at least one output end of the display driver chip 2; after the insulating layer covering the target test point of any target wire is scraped off and any target wire is disconnected from the setting target test point, the output end of the display driver chip 2 connected to any target wire works abnormally.

[0025] Among them, the display driver chip 2 is connected to the circuit board 1, and the display driver chip 2 is used to control the screen 3 of the display device to work through the signal (such as a timing signal or a voltage signal, etc.) output from the output end of the display driver chip 2. The circuit board 1 is used to provide a peripheral circuit for the display driver chip 2 to perform voltage stabilization or filtering on at least part of the output signal of the display driver chip 2, or to detect the working status of at least part of the ports of the display driver chip 2, etc. The embodiment of the present application does not limit the specific functions of the display driver chip 2 and the circuit board 1; the target wire is a metal path on the circuit board 1 for transmitting electrical signals; the target test point and the non-target test point mentioned below are all test points set on the circuit board 1. The test points set on the circuit board 1 can generally be pads or terminals, etc., and the present application does not limit this.

[0026] It should be noted that when the display device is reverse analyzed to obtain the working principle of the display device, the insulating layer of each test point on the circuit board 1 is generally scraped off. However, when the insulating layer of any target test point is scraped off, since the test points on the circuit board 1 (including the target test points) are generally small and the target test points are set between the two ends of the corresponding target wire, the target wire will basically be disconnected from the position where the target test point is set.

[0027] In the embodiment of the present application, by setting the target wire and the target test point, when the display device is reversely analyzed and the insulating layer of any target test point is scraped off, since the target test point is small and the target test point is set between the two ends on the corresponding target wire and the target test point, the target wire is basically disconnected from the position where the target test point is set, so that the output end of the display driver chip 2 connected to the target wire works abnormally, thereby realizing reverse analysis protection for the display device and increasing the difficulty of reverse analysis of the display device.

[0028] Alternatively, if Figure 1As shown, the display device further includes a screen body 3 , the circuit board 1 is connected to the screen body 3 , and the display driving chip 2 is arranged on the screen body 3 .

[0029] For example, Figure 1 and Figure 2 As shown, the display device includes a screen body 3 which may include a first sub-screen 31 and a second sub-screen 32. The first sub-screen 31 is used for display, and one end of the second sub-screen 32 away from the first sub-screen 31 is connected to the circuit board 1, and the circuit board 1 is connected to the second sub-screen 32. The screen body 3 is usually manufactured by integral molding. After obtaining the integrally molded screen body 3, the second sub-screen 32 can be bent relative to the first sub-screen 31 to the back of the first sub-screen 31 to obtain a bent screen body 3. The screen body 3 before bending can be as shown in FIG. Figure 2 As shown in the screen body 3 in FIG. 1 , the bent screen body 3 can be Figure 1 As shown in the screen 3 in FIG.

[0030] Based on this, the at least one target wire may include a first target wire and / or a second target wire, that is, the display device may have at least the following two possible implementations:

[0031] In one possible implementation, Figure 1 and Figure 3 As shown, the at least one target wire includes a first target wire (such as Figure 3 The display driver chip 2 includes a first output port (such as a timing signal for outputting a timing signal (such as a gate driver integration (GOA, Gate Driver on Array) timing signal) for driving the screen 3 to display. Figure 3 The first output port is specifically used to output a timing signal for driving the first sub-screen 31 to display, and a non-target test point corresponding to the first output port is provided on the circuit board 1 (such as Figure 3 m), a first switch circuit is connected between the first output port and the non-target test point, and the first target wire is connected to the first switch circuit; the first switch circuit is used to set the target test point (such as Figure 3 When the M1 in the figure is disconnected, it is conducted between the first output port and the non-target test point, and is used to shut down between the first output port and the non-target test point after the first target wire is disconnected from the set target test point.

[0032] Among them, the display driver chip 2 may include one or more first output ports, each first output port may have a corresponding non-target test point, the above-mentioned at least one target wire may include one or more first target wires, and one or more target test points may generally be set on a single first target wire. The embodiment of the present application does not limit the number of first output ports, the number of first target wires and the number of target test points on a single first target wire. For example, only one first target wire may be set, only one target test point is set on the first target wire, and multiple first output ports are set. The first switch circuit between each first output port and its corresponding non-target test point can be connected to the first target wire; the non-target test point is generally used to test, measure or debug the display device during the development or reverse analysis of the display device, and the non-target test point is also covered with an insulating layer.

[0033] In the embodiment of the present application, by setting the first switch circuit, when the first target wire is not disconnected from the set target test point, the first switch circuit is turned on between the first output port and the non-target test point, so that there is a path between the first output port and the non-target test point, and then the first output port can normally transmit signals to the non-target test point, that is, the first output port works normally, at this time, the signal output by the first output port can be detected through the non-target test point, and then the display device can be tested, measured or debugged through the non-target test point; after the first target wire is disconnected from the set target test point, the first switch circuit is turned off between the first output port and the non-target test point, so that there is no path (that is, open circuit) between the first output port and the non-target test point, and then the first output port cannot normally transmit signals to the non-target test point, that is, the first output port works abnormally, at this time, the signal output by the first output port cannot be detected through the non-target test point, and then the display device cannot be tested, measured or debugged through the non-target test point, which also increases the difficulty of reverse analysis of the display device.

[0034] Alternatively, if Figure 1 and Figure 3 As shown, the first end of the first target wire (such as Figure 3 a1) is connected to a first resistor (such as Figure 3 The first end of the first resistor is connected to a power source and the second end of the first target wire (such as Figure 3 a2) is grounded, or the first end of the first resistor is grounded and the second end of the first target wire is connected to a power supply; the second end of the first resistor is an end of the first resistor connected to the first end of the first target wire; the first switch circuit includes a first transistor (such as Figure 3T1 in the test point); the source of the first transistor is connected to the first output port and the drain of the first transistor is connected to the non-target test point, or the source of the first transistor is connected to the non-target test point and the drain of the first transistor is connected to the first output port; the gate of the first transistor is connected to the first end of the first target wire, or the gate of the first transistor is connected to any node between the first end of the first target wire and the target test point of the first target wire.

[0035] For example, Figure 3 As shown, the first end of the first resistor is connected to a power supply and the second end of the first target wire is grounded, and the first transistor is a PMOS (P-type metal oxide semiconductor). Based on this, when the first target wire is not disconnected from the set target test point, under the action of the second end of the first target wire being grounded, the gate of the first transistor receives a low-level signal, and the source and drain of the first transistor are in an on state, so that the first transistor is turned on between the first output port and the non-target test point; after the first target wire is disconnected from the set target test point, under the action of the power supply connected to the first resistor, the gate of the first transistor receives a high-level signal, and the source and drain of the first transistor are in an off state, so that the first transistor is turned off between the first output port and the non-target test point.

[0036] Therefore, through the transistor, it can be achieved that when the first target wire is not disconnected from the set target test point, the first switch circuit is turned on between the first output port and the non-target test point. It can also be achieved that after the first target wire is disconnected from the set target test point, the first switch circuit is turned off between the first output port and the non-target test point. The structure is simple and cost-saving.

[0037] Optionally, the first transistor is arranged in the display driving chip 2 or the screen body 3 .

[0038] Compared with the circuit board 1 , the display driver chip 2 and the screen body 3 originally have some other transistors. It is relatively easy to add the first transistor to the display driver chip 2 and the screen body 3 , thereby improving the production efficiency of the display device.

[0039] Alternatively, if Figure 1 As shown, a test point area (such as Figure 1 TA in the figure), the target test point and the non-target test point are both set in the test point area.

[0040] Therefore, by setting both the target test points and the non-target test points in the test point area on the circuit board 1, it can make it difficult for personnel who perform reverse analysis on the display device to distinguish between the non-target test points and the target test points, thereby improving the concealment of the target test points and further increasing the difficulty of reverse analysis on the display device.

[0041] Optionally, the target test point and the non-target test point have the same structure and size, so that the appearance of the target test point and the non-target test point is almost the same, making it difficult for personnel who perform reverse analysis on the display device to distinguish between the non-target test point and the target test point, thereby improving the concealment of the target test point and further increasing the difficulty of reverse analysis on the display device.

[0042] In another possible implementation, Figure 1 and Figure 4 As shown, the at least one target wire includes a second target wire (such as Figure 4 and Figure 5 The display driver chip 2 includes a second output port (such as a wire B in the display driver chip 2) for outputting a voltage signal for driving the screen body 3 to display. Figure 4 Port p and Figure 5 The second output port is specifically used to output a voltage signal to drive the first sub-screen 31 to display, and the second output port is connected to the second target wire, and the second target wire is connected to a power supply; the second target wire is used to set a target test point (such as Figure 4 and Figure 5 When the M2 in the test point is disconnected, the voltage output by the power supply is blocked from interfering with the voltage signal output by the second output port, and is used to stop blocking the voltage output by the power supply from interfering with the voltage signal output by the second output port when the second target wire is disconnected from the set target test point.

[0043] Among them, the display driver chip 2 may include one or more second output ports, the above-mentioned at least one target wire may include one or more second target wires, and one or more target test points can generally be set on a single second target wire. The embodiment of the present application does not limit the number of second output ports, the number of second target wires, and the number of target test points on a single second target wire. For example, only one second target wire can be set, only one target test point is set on the second target wire, and multiple second output ports are set, and each second output port can be connected to the second target wire. The embodiment of the present application does not limit this.

[0044] In an embodiment of the present application, when the second target wire is not disconnected from the set target test point, the voltage output by the power supply can be blocked from interfering with the voltage signal output by the second output port, so that the second output port works normally; after the second target wire is disconnected from the set target test point, the voltage output by the power supply is stopped from interfering with the voltage signal output by the second output port, so that the second output port works abnormally, increasing the difficulty of reverse analysis of the display device.

[0045] In a specific embodiment, Figure 4 As shown, the first end of the second target wire (such as Figure 4b1) is connected to a second resistor (such as Figure 4 R2 in the figure), a first end of the second resistor is connected to the power supply, a second end of the second resistor is an end of the second resistor connected to the second end of the second target wire, and a second end of the second target wire (such as Figure 4 b2) is grounded, a second switch circuit is connected between the second output port and the power supply, and the second target wire is connected to the second switch circuit; the second switch circuit is used to shut down between the second output port and the power supply when the second target wire is not disconnected from the set target test point, and is used to conduct between the second output port and the power supply after the second target wire is disconnected from the set target test point.

[0046] In the embodiment of the present application, by setting a second switch circuit connected to the second target wire, when the first target wire is not disconnected from the set target test point, the second switch circuit is turned off between the first output port and the non-target test point, so that there is no path (i.e., open circuit) between the second output port and the power supply, and then the voltage output by the power supply will not interfere with the voltage signal output by the second output port, that is, the second output port works normally; after the first target wire is disconnected from the set target test point, the second switch circuit is turned on between the second output port and the power supply, so that there is a path between the second output port and the power supply, and then the voltage output by the power supply will interfere with the voltage signal output by the second output port. Thus, the second target wire can be blocked and stopped from blocking the interference of the voltage output by the power supply on the voltage signal output by the second output port through the second switch circuit, without relying on other specific components connected to the second switch circuit, which is more universal.

[0047] Alternatively, if Figure 4 As shown, the second switch circuit includes a second transistor (such as Figure 4 T2 in the figure); the source of the second transistor is connected to the second output port and the drain of the second transistor is connected to the power supply, or the source of the second transistor is connected to the power supply and the drain of the second transistor is connected to the second output port; the gate of the second transistor is connected to the first end of the second target wire.

[0048] For example, Figure 4 As shown, the second transistor is an NMOS (N-type metal oxide semiconductor). Based on this, when the second target wire is not disconnected from the set target test point, under the action of the second end of the second target wire being grounded, the gate of the second transistor receives a low-level signal, and the source and drain of the second transistor are in an off state, so that the second transistor is turned off between the second output port and the power supply; after the second target wire is disconnected from the set target test point, under the action of the power supply connected to the second resistor, the gate of the second transistor receives a high-level signal, and the source and drain of the second transistor are in an on state, so that the second transistor is turned on between the second output port and the power supply.

[0049] Therefore, through the transistor, it is possible to achieve that when the second target wire is not disconnected from the set target test point, the second switch circuit is turned off between the second output port and the power supply. It is also possible to achieve that after the second target wire is disconnected from the set target test point, the second switch circuit is turned on between the second output port and the power supply. The structure is simple and cost-saving.

[0050] Optionally, the second transistor is arranged in the display driving chip 2 or the screen body 3 .

[0051] Compared with the circuit board 1 , the display driver chip 2 and the screen body 3 originally have some other transistors. It is relatively easy to add a second transistor to the display driver chip 2 and the screen body 3 , thereby improving the production efficiency of the display device.

[0052] In another specific embodiment, Figure 5 As shown, the first end of the second target wire (such as Figure 5 b1) is connected to a third resistor (such as Figure 5 R3 in the figure), a first end of the third resistor is connected to the power supply, a second end of the third resistor is an end of the third resistor connected to the second end of the second target wire, and a second end of the second target wire (such as Figure 5 b2) grounding; a target device for filtering or stabilizing the signal output by the second output port is provided on the circuit board 1, a first end of the target device is connected to the second output port, a second end of the target device is connected to the first end of the second target wire, the target device is used to work normally when the second end of the target device is grounded, and work abnormally when the second end of the target device is not grounded.

[0053] The target device is a filter capacitor or a voltage stabilizing capacitor (such as Figure 5 C2) etc., the embodiment of the present application is not limited to this, and the target device can generally be set in the device area DA on the circuit board 1.

[0054] In the embodiment of the present application, when the second target wire is not disconnected from the target test point, the second end of the target device is grounded through the second target wire, so that the second target wire blocks the interference of the voltage output by the power supply on the voltage signal output by the second output port. At this time, the target device works normally, so that the signal output by the second output port is normal, that is, the second output port works normally; after the second target wire is disconnected from the target test point, the second end of the target device is not grounded under the action of the power supply, so that the second target wire stops blocking the interference of the voltage output by the power supply on the voltage signal output by the second output port. At this time, the target device works abnormally, so that the signal output by the second output port is abnormal, that is, the second output port works abnormally. Therefore, the second target wire can be directly made to block and stop blocking the interference of the voltage output by the power supply on the voltage signal output by the second output port without setting a switch circuit, and the structure is simple and the cost is low.

[0055] It should be noted that in the above specific implementation, that is, the specific implementation in which the first end of the second target wire is connected to the second resistor, the second output port can also be connected to the target device (such as Figure 4 The target device has been specifically introduced above, and the embodiments of the present application will not be repeated here. Based on this, the first end of the target device is connected to the second output port, and the second end of the target device is grounded, and the embodiments of the present application are not limited to this.

[0056] An embodiment of the present application further provides a display terminal, which includes a terminal device body and a display device arranged on the terminal device body, and the display device may be the display device as described above.

[0057] An exemplary display terminal is as follows Figure 6 As shown, it includes a terminal device body 601 and a display device 602. The display device 602 is arranged on the terminal device body 601 and is electrically connected to the terminal device body 601. The display device 602 is the display device described in the above embodiment, which is used to display static pictures or dynamic pictures.

[0058] Exemplarily, the above-mentioned display terminal can be implemented in the form of various electronic devices such as mobile phones, tablet computers, handheld computers, PADs, etc.

[0059] The above implementation methods are only used to illustrate the embodiments of the present application, and are not limitations on the embodiments of the present application. Ordinary technicians in the relevant technical field can make various changes and modifications without departing from the spirit and scope of the embodiments of the present application. Therefore, all equivalent technical solutions also belong to the scope of the embodiments of the present application. The scope of patent protection of the embodiments of the present application should be limited by the claims.

Claims

1. A display device, characterized in that: include: Circuit board and display driver chip; At least one target wire is embedded in the circuit board, and a target test point located on the surface of the circuit board is arranged between two ends of the target wire, and the target test point is covered with an insulating layer, and each of the target wires is respectively connected to at least one output end of the display driver chip; After the insulating layer covering the target test point of any target wire is scraped off and the target wire is disconnected from the location where the target test point is set, the output terminal of the display driver chip connected to the target wire works abnormally.

2. The device according to claim 1, characterized in that The display device further includes a screen, the circuit board is connected to the screen, the display driver chip is arranged on the screen, the at least one target wire includes a first target wire, the display driver chip includes a first output port for outputting a timing signal for driving the screen to display, a non-target test point corresponding to the first output port is arranged on the circuit board, a first switch circuit is connected between the first output port and the non-target test point, and the first target wire is connected to the first switch circuit; The first switch circuit is used to conduct between the first output port and the non-target test point when the first target wire is not disconnected from the target test point, and is used to shut down between the first output port and the non-target test point after the first target wire is disconnected from the target test point.

3. The device according to claim 2, characterized in that The first end of the first target wire is connected to a first resistor; the first end of the first resistor is connected to a power source and the second end of the first target wire is grounded, or the first end of the first resistor is grounded and the second end of the first target wire is connected to a power source; the second end of the first resistor is an end of the first resistor connected to the first end of the first target wire; The first switching circuit includes a first transistor; the source of the first transistor is connected to the first output port and the drain of the first transistor is connected to the non-target test point, or the source of the first transistor is connected to the non-target test point and the drain of the first transistor is connected to the first output port; the gate of the first transistor is connected to the first end of the first target wire, or the gate of the first transistor is connected to any node between the first end of the first target wire and the target test point of the first target wire.

4. The device according to claim 3, characterized in that The first transistor is arranged in a display driving chip or a screen body.

5. The device according to any one of claims 2-3, characterized in that: A test point area is provided on the circuit board, and the target test point and the non-target test point are both provided in the test point area; Preferably, the target test point and the non-target test point have the same structure and size.

6. The device according to claim 1, characterized in that The display device further includes a screen body, the circuit board is connected to the screen body, the display driver chip is arranged on the screen body, the at least one target wire includes a second target wire, the display driver chip includes a second output port for outputting a voltage signal for driving the screen body to display, the second output port is connected to the second target wire, and the second target wire is connected to a power supply; The second target wire is used to block the voltage output by the power supply from interfering with the voltage signal output by the second output port when the second target wire is not disconnected from the target test point, and is used to stop blocking the voltage output by the power supply from interfering with the voltage signal output by the second output port when the second target wire is disconnected from the target test point.

7. The device according to claim 6, characterized in that A second resistor is connected to a first end of the second target wire, a first end of the second resistor is connected to the power supply, a second end of the second resistor is an end of the second resistor connected to a second end of the second target wire, a second end of the second target wire is grounded, a second switch circuit is connected between the second output port and the power supply, and the second target wire is connected to the second switch circuit; The second switching circuit is used to shut down between the second output port and the power supply when the second target wire is not disconnected from the target test point, and to conduct between the second output port and the power supply after the second target wire is disconnected from the target test point.

8. The device according to claim 7, characterized in that The second switch circuit includes a second transistor; The source of the second transistor is connected to the second output port and the drain of the second transistor is connected to the power supply, or the source of the second transistor is connected to the power supply and the drain of the second transistor is connected to the second output port; the gate of the second transistor is connected to the first end of the second target wire; Preferably, the second transistor is arranged in a display driver chip or a screen body.

9. The device according to claim 6, characterized in that A third resistor is connected to a first end of the second target wire, the first end of the third resistor is connected to the power supply, the second end of the third resistor is an end of the third resistor connected to the second end of the second target wire, and the second end of the second target wire is grounded; The circuit board is provided with a target device for filtering or stabilizing the signal output by the second output port, the first end of the target device is connected to the second output port, the second end of the target device is connected to the first end of the second target wire, the target device is configured to operate normally when the second end of the target device is grounded, and operate abnormally when the second end of the target device is not grounded.

10. A display terminal, characterized in that: The display terminal comprises a terminal device body, and a display apparatus as claimed in any one of claims 1 to 9 arranged on the terminal device body.

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