Embedded chip cavity filling process
By scraping and applying filler and baking and curing methods, the problems of uneven filling and low efficiency of the embedded chip cavity are solved, and uniform filling and efficient production of large-size high-deep cavity are achieved.
Patent Information
- Application Number
- CN202411834923.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-13
- Publication Date
- 2025-04-11
AI Technical Summary
In the prior art, the inbuilt chip cavity is unevenly filled and the filling efficiency is low, which leads to the impact of system performance and reliability.
The filling glue is filled into the cavity under a certain pressure by scraping the coating method, and the glue thickness is ensured through the baking and curing process. The filling process is repeated until the cavity is completely filled.
It realizes hole-free filling of large-size high-deep cavity, uniform filling thickness, simple process and fast speed, and is suitable for substrates of various shapes and sizes.
Smart Images

Figure CN119812002A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of electronic packaging, and in particular relates to a process for filling a cavity of an embedded chip. Background Art
[0002] Due to the stringent requirements of current electronic equipment in terms of volume, performance and reliability, the high-density integration of functional chips in the system is an important foundation and key guarantee for achieving small size and high integration of the whole equipment. The traditional chip carrier method is to directly install the chip on a planar packaging substrate. Although this planar carrier method has shown good performance to a certain extent, it has deficiencies in terms of thermal and electrical process complexity and integration density, resulting in large module volume and low reliability, which cannot meet the needs of high-density integration. The embedded carrier technology can make full use of the Z-direction space by embedding the chip in the prefabricated cavity of the substrate and leading out the electrical signal through vertical interconnection, thereby reducing the distance between the interconnection lines between the chip and the components, thereby reducing the parasitic packaging effect and improving the high-precision impedance control of the RF. At the same time, the embedded carrier technology also increases the contact area between the chip and the substrate, improves the heat dissipation capacity of the system, and ensures the performance of the chip and the system. In addition, the cavity structure can also provide a high-strength and high-isolation environment for the chip, which is conducive to the protection of the chip. At present, benzocyclobutene (BCB) with low water absorption and loss tangent is generally used for filling. However, since the depth of the cavity that needs to be filled with BCB is on the order of hundreds of microns, and BCB has high viscosity and poor fluidity, defects such as bubbles and voids are very likely to occur during the cavity filling process, affecting the performance indicators and long-term reliability of the system. Therefore, choosing a suitable filling method to achieve efficient and void-free filling is the key.
[0003] The traditional cavity filling method is spin coating, that is, the filling glue is applied by a glue spreader with the help of centrifugal force. However, due to the existence of the deep cavity, the filling glue adhesion in different areas, such as the bottom and edge of the cavity, is different, resulting in differences in glue thickness. Patent CN202111257206.9 discloses a filling method, which relies on a pressed sheet structure and subsequent laser tearing to obtain void-free filling. This method is relatively complex, involving steps such as pressing and laser irradiation, and has low efficiency. Summary of the invention
[0004] The technical problem to be solved by the present invention is to overcome the defects of the prior art and provide a process for filling a cavity of an embedded chip to solve the problems of uneven filling of the cavity of an embedded chip and low filling efficiency.
[0005] In order to solve the above technical problems, the technical solution adopted by the present invention is:
[0006] A process for filling an embedded chip cavity comprises the following steps:
[0007] Step 1, making a cavity on a substrate;
[0008] Step 2, making a screen according to the cavity size and position;
[0009] Step 3, the chip is mounted into the cavity by conductive adhesive bonding or gold-tin solder eutectic bonding, and a ball is planted at the pad position;
[0010] Step 4, fix the screen on the printing machine, place the substrate horizontally on the printing machine platform, then identify and align it, and set the printing parameters;
[0011] Step 5, take the filling glue and place it on the screen, and then use the moving scraper to print the cavity filling;
[0012] Step 6, remove the substrate and bake and cure the filling glue;
[0013] Step 7: Repeat steps 4-6 according to the cavity depth and the thickness of the cured glue to complete the cavity filling.
[0014] Furthermore, in step 6, baking and curing are divided into two steps, first pre-baking on a hot plate, the drying process is: 30°C for 1min to 30min, 100°C for 1min to 30min, 150°C for 1min to 30min, then transferred to a nitrogen or vacuum oven, the curing temperature is 220°C to 250°C, and lasts for 60 to 120min.
[0015] Furthermore, in step 2, the screen type is a stainless steel screen with a thickness of 30 to 50 μm, and an opening size that is 30 to 50 μm smaller than the cavity size.
[0016] Furthermore, in step 1, the substrate material is silicon or ceramic, and the cavity preparation method is wet etching, dry etching or laser etching; the cavity structure is determined according to the chip size, the cavity size is 50μm to 300μm larger than the chip size, and the cavity depth is 50μm to 100μm larger than the chip thickness.
[0017] Furthermore, in step 5, 3-10 wt % of a high thermal conductivity powder additive is added to the filling glue.
[0018] The beneficial effects of the present invention are:
[0019] (1) It can achieve filling of large-sized and high-depth non-porous cavities with uniform filling thickness;
[0020] (2) The filling process is simple, the filling speed is fast, and batch filling can be achieved;
[0021] (3) Wide range of applications, compatible with substrates and cavities of various shapes, materials, and sizes. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] Figure 1 Cross-sectional view after making the cavity for the substrate.
[0023] Figure 2 This is a cross-sectional view of the chip mounted in the cavity.
[0024] Figure 3 This is a cross-sectional view after ball implantation is completed.
[0025] Figure 4 This is a cross-sectional view after partial cavity filling is completed.
[0026] Figure 5 This is a cross-sectional view after cavity filling is completed. DETAILED DESCRIPTION
[0027] Below, the present invention is further described in conjunction with the accompanying drawings.
[0028] A process for filling an embedded chip cavity. The method first mounts the chip in the cavity, plants a ball on the chip pad using a ball planting machine, and then fills the cavity with filling glue under a certain pressure using a scraping method, thereby achieving rapid cavity filling.
[0029] Specifically, refer to Figure 1-5 , including the following steps:
[0030] Step 1, such as Figure 1 As shown, for the LTCC substrate, a cavity structure 1 is firstly manufactured by laser etching;
[0031] The cavity structure is determined by the chip size. The cavity size is 50um to 300um larger than the chip size, and the cavity depth is 50um to 100um larger than the chip thickness.
[0032] Step 2, making a screen 5 according to the size and position of the cavity;
[0033] The screen type is stainless steel mesh with a thickness of 30-50um. The screen opening size is 30-50um smaller than the cavity size.
[0034] Step 3, such as Figure 2 , 3 As shown, the chip 3 is mounted into the cavity by conductive adhesive bonding or gold-tin solder eutectic 2, and a ball 4 is planted at the pad position 301;
[0035] Step 4, fix the screen on the printing machine, place the substrate horizontally on the printing machine platform, then identify and align it, and set the printing parameters;
[0036] Step 5, such as Figure 4 As shown, take a proper amount of filling glue 6 and place it on the screen 5, and then move the scraper 7 to perform cavity filling printing;
[0037] 3-10wt% of high thermal conductivity powder additive can be added into the filling glue.
[0038] Step 6, remove the substrate and bake and cure the filling glue;
[0039] Baking and curing are divided into two steps: first, pre-bake on a hot plate, and the drying conditions are: 30℃ for 1min~30min, 100℃ for 1min~30min, and 150℃ for 1min~30min; then, transfer to a nitrogen or vacuum oven, and the curing temperature is 220℃~250℃ for 60~120min.
[0040] Step 7: Repeat steps 4-6 according to the cavity depth and the thickness of the cured glue to complete the cavity filling. The final effect is as follows: Figure 5 shown.
[0041] In summary, the present invention achieves embedded chip cavity filling by scraping, which can realize large-size and high-depth cavity filling. The filling process is simple, the filling speed is fast, and it is compatible with substrates of various shapes and sizes. The filling thickness is adjustable, which can provide a good electrical and thermal environment for the embedded chip and meet the requirements of high-density integration.
[0042] The coefficients and parameters given in the above embodiments are provided to those skilled in the art to implement or use the invention, and the invention is not limited to the above disclosed values. Without departing from the idea of the invention, those skilled in the art can make various modifications or adjustments to the above embodiments. Therefore, the protection scope of the invention is not limited by the above embodiments, but should be the maximum scope of the innovative features mentioned in the claims.
Claims
1. A process for filling a cavity of an embedded chip, characterized in that: The steps include: Step 1, making a cavity on a substrate; Step 2, making a screen according to the cavity size and position; Step 3, the chip is mounted into the cavity by conductive adhesive bonding or gold-tin solder eutectic bonding, and a ball is planted at the pad position; Step 4, fix the screen on the printing machine, place the substrate horizontally on the printing machine platform, then identify and align it, and set the printing parameters; Step 5, take the filling glue and place it on the screen, and then use the moving scraper to perform cavity filling printing; Step 6, remove the substrate and bake and cure the filling glue; Step 7: Repeat steps 4-6 according to the cavity depth and the thickness of the cured glue to complete the cavity filling.
2. The embedded chip cavity filling process according to claim 1, characterized in that: In step 6, baking and curing are divided into two steps. First, pre-baking is carried out on a hot plate. The drying process is: 1min to 30min at 30℃, 1min to 30min at 100℃, and 1min to 30min at 150℃. Then transfer to a nitrogen or vacuum oven, and the curing temperature is 220℃ to 250℃ for 60 to 120min.
3. The embedded chip cavity filling process according to claim 1, characterized in that: In step 2, the screen type is a stainless steel screen with a thickness of 30 to 50 μm, and an opening size that is 30 to 50 μm smaller than the cavity size.
4. The embedded chip cavity filling process according to claim 1, characterized in that: In step 1, the substrate material is silicon or ceramic, and the cavity preparation method is wet etching, dry etching or laser etching; The cavity structure is determined by the chip size. The cavity size is 50 μm to 300 μm larger than the chip size, and the cavity depth is 50 μm to 100 μm larger than the chip thickness.
5. The embedded chip cavity filling process according to claim 1, characterized in that: In step 5, 3-10 wt % of a high thermal conductivity powder additive is added to the filling glue.
Citation Information
Patent Citations
Wafer embedded chip void-free filling process
CN113990764A