Input remote resonance suppression control circuit

Abstract

An input remote resonance suppression control circuit disclosed by the present invention comprises an input voltage AC component sampling circuit and a DSP control loop, the DSP control loop comprises a digital signal processor, a driving IC and a power circuit, the input end of the input voltage AC component sampling circuit and the input end of the power circuit are both connected with an input voltage, and the input end of the input voltage AC component sampling circuit is connected with the driving IC. The digital signal processor is respectively connected with the output end of the input voltage AC component sampling circuit, the input end of the driving IC, and the voltage acquisition end and the current sampling end of the power circuit, the output end of the driving IC is connected with the control end of the power circuit, and the output end of the power circuit is connected with output voltage. According to the invention, the variable quantity of the input voltage is collected and processed by the digital signal processor, so that the input remote resonance can be effectively inhibited.

Description

Technical Field

[0001] The invention relates to the technical field of switching power supplies, and in particular to an input pull-off resonance suppression control circuit. Background Art

[0002] In actual power application scenarios, when the power system is deployed in scenarios where long-distance power transmission is required, a common problem is the parasitic inductance effect caused by the long input line. This parasitic inductance inevitably exists between the power supply and the power input source due to the physical length and material characteristics of the input cable. Ideally, the input line should be regarded as a pure conductive channel, but in reality, its inductance characteristics will generate an electromotive force when the current changes, thereby affecting the stability of the entire power system. This parasitic inductance will resonate with the input capacitance of the power supply, resulting in unstable input voltage and input voltage and input current oscillations.

[0003] One of the traditional solutions is to add extra capacitors to the power input to absorb or neutralize the voltage fluctuations caused by parasitic inductance. This method is effective to a certain extent because it can increase the damping of the system and reduce the amplitude and frequency of resonance. However, with the increasing requirements for miniaturization and lightweight of modern electronic devices, the size and weight of the power supply have become important design considerations. Adding a large amount of capacitance will not only affect the overall heat dissipation performance of the power supply, but also go against the original intention of miniaturization. In addition, some power supplies are limited by size and cannot be solved by adding extra capacitors, which has great limitations. Summary of the invention

[0004] In order to overcome the problems of increasing the volume of power supply and limitations in the input remote resonance suppression method in the prior art, the present invention provides an input remote resonance suppression control circuit.

[0005] The technical solution of the present invention is as follows:

[0006] An input pull-off resonance suppression control circuit comprises an input voltage AC component sampling circuit and a DSP control loop, wherein the DSP control loop comprises a digital signal processor, a driver IC and a power circuit, wherein the input end of the input voltage AC component sampling circuit and the input end of the power circuit are both connected to the input voltage, the digital signal processor is respectively connected to the output end of the input voltage AC component sampling circuit, the input end of the driver IC, the voltage collection end and the current sampling end of the power circuit, the output end of the driver IC is connected to the control end of the power circuit, and the output end of the power circuit is connected to the output voltage;

[0007] The input voltage AC component sampling circuit is used to collect the input voltage AC component sampling value and transmit it to the digital signal processor;

[0008] The digital signal processor is used to obtain the oscillation status of the input voltage at this time according to the sampling value of the AC component of the input voltage, and control the magnitude of the output voltage accordingly, thereby suppressing the change of the input voltage.

[0009] As a preferred solution of the present invention, when the digital signal processor knows, based on the sampling value of the input voltage AC component, that the input voltage is increasing, the output voltage is controlled to increase so as to suppress the increasing trend of the input voltage at this time;

[0010] When the digital signal processor learns that the input voltage is decreasing at this time based on the sampling value of the input voltage AC component, it controls the output voltage to decrease so as to suppress the decreasing trend of the input voltage at this time.

[0011] As a preferred solution of the present invention, the input voltage AC component sampling circuit includes a diode group D1 and a bandpass filter composed of a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C1 and a capacitor C2, one end of the resistor R1 is connected to the input voltage after passing through the capacitor C1, the other end of the resistor R1 is respectively connected to one end of the resistor R2 and one end of the resistor R3, the other end of the resistor R2 is connected to a bias voltage, the other end of the resistor R3 is respectively connected to one end of the capacitor C2, the third pin of the diode group D1 and one end of the resistor R4, the second pin of the diode group D1 is connected to the auxiliary power supply voltage, the first pin of the diode group D1 and the other end of the capacitor C2 are both grounded, and the other end of the resistor R4 is connected to the digital signal processor.

[0012] As a preferred solution of the present invention, the power circuit includes an LC network and a BOOST converter, the input end of the LC network is connected to the input voltage, the output end of the LC network is connected to the input end of the BOOST converter, the voltage sampling end and the current sampling end of the BOOST converter are both connected to the digital signal processor, the control end of the BOOST converter is connected to the output end of the driver IC, and the output end of the BOOST converter is connected to the output voltage.

[0013] As a preferred embodiment of the present invention, the digital signal processor includes a voltage outer loop, a current inner loop, a summing unit and a processing unit, the input end of the voltage outer loop is connected to the voltage collection end of the power circuit, the output end of the voltage outer loop is connected to the first input end of the current inner loop, the second input end of the current inner loop is connected to the current sampling end of the power circuit, the output end of the current inner loop is connected to the first input end of the summing unit, the second input end of the summing unit is connected to the output end of the input voltage AC component sampling circuit, the output end of the summing unit is connected to the input end of the processing unit, and the output end of the processing unit is connected to the input end of the driver IC.

[0014] As a preferred solution of the present invention, the voltage outer loop is used to collect the input voltage and the output voltage from the voltage collection end of the power circuit, and obtain a current reference to be transmitted to the current inner loop;

[0015] The current inner loop is used to obtain an output value according to the current reference and the inductor current collected from the current sampling terminal of the power circuit and transmit the output value to the summing unit;

[0016] The summing unit is used to superimpose the output value with the input voltage AC component sampling value collected from the output end of the input voltage AC component sampling circuit to obtain a superimposed value and transmit it to the processing unit;

[0017] The processing unit is used to recalculate the duty cycle according to the superposition value and generate a corresponding PWM waveform. The PWM waveform is given to the control end of the power circuit after passing through the driver IC to complete the control.

[0018] As a preferred solution of the present invention, when the input voltage decreases, the sampling value of the input voltage AC component decreases, the superposition value decreases, the duty cycle decreases, and the output voltage decreases, thereby suppressing the decreasing trend of the input voltage at this time, suppressing the decrease in the input equivalent impedance of the BOOST converter, thereby suppressing the oscillation of the BOOST converter and stabilizing the input;

[0019] When the input voltage increases, the sampling value of the input voltage AC component increases, the superposition value increases, the duty cycle increases, and the output voltage increases, thereby suppressing the increasing trend of the input voltage and reducing the input equivalent impedance of the BOOST converter, thereby suppressing the oscillation of the BOOST converter and stabilizing the input.

[0020] As a preferred solution of the present invention, the digital signal processor further includes a first proportional unit and a second proportional unit, the second input end of the current inner loop is connected to the current sampling end of the power circuit through the first proportional unit, and the second input end of the summing unit is connected to the output end of the input voltage AC component sampling circuit through the second proportional unit;

[0021] The inductor current collected from the current sampling terminal of the power circuit is processed by the first proportional unit and then transmitted to the current inner loop;

[0022] The input voltage AC component sampling value is collected from the output end of the input voltage AC component sampling circuit, processed by the second proportional unit, and then transmitted to the summing unit.

[0023] As a preferred solution of the present invention, the LC network includes an input parasitic inductor L1, an inductor internal resistance RL1, and an input electrolytic capacitor CEI. One end of the input parasitic inductor L1 is connected to the input voltage, and the other end of the input parasitic inductor L1 is respectively connected to the positive electrode of the input electrolytic capacitor CEI and the input end of the BOOST converter after passing through the inductor internal resistance RL1. The negative electrode of the input electrolytic capacitor CEI is grounded.

[0024] As a preferred solution of the present invention, the BOOST converter includes an input capacitor CIN, a main power inductor L2, a sampling resistor RSENSE, a MOS tube Q1, a diode D2, an output capacitor COUT, an output electrolytic capacitor CEO, and a load resistor RLOAD. One end of the input capacitor CIN and one end of the main power inductor L2 are both connected to the output end of the LC network, the other end of the input capacitor CIN and one end of the sampling resistor RSENSE are both grounded, the other end of the main power inductor L2 is respectively connected to the first end of the MOS tube Q1 and the positive electrode of the diode D2, the negative electrode of the diode D2 is respectively connected to one end of the output capacitor COUT, the positive electrode of the output electrolytic capacitor CEO, one end of the load resistor RLOAD, the output voltage and the digital signal processor, the other end of the sampling resistor RSENSE is respectively connected to the second end of the MOS tube Q1, the other end of the output capacitor COUT, the negative electrode of the output electrolytic capacitor CEO, the other end of the load resistor RLOAD, the digital signal processor and the analog ground, and the third end of the MOS tube Q1 is connected to the output end of the driver IC.

[0025] Compared with the prior art, the present invention has the following beneficial effects:

[0026] 1. The present invention collects the change of input voltage through the input voltage AC component sampling circuit and sends it to the digital signal processor of the DSP control loop for processing. When the input voltage changes, the loop control output voltage also changes accordingly, which can suppress the change of input voltage, adjust the input impedance of the power circuit, and make the input tend to be stable, thereby effectively suppressing the input pull-out resonance;

[0027] 2. The present invention uses a digital method to achieve real-time monitoring and dynamic adjustment of input voltage changes to suppress input pull-off resonance without adding additional capacitors, thereby overcoming the limitations of the prior art in terms of volume and weight and having high versatility. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0029] Figure 1 It is a structural schematic diagram of an input distance resonance suppression control circuit in one embodiment of the present invention;

[0030] Figure 2 1 is a circuit diagram of an input voltage AC component sampling circuit according to an embodiment of the present invention;

[0031] Figure 3 A schematic diagram of the structure of a digital signal processor according to an embodiment of the present invention;

[0032] Figure 4 FIG. 4 is a circuit diagram of a power circuit in one embodiment of the present invention. DETAILED DESCRIPTION

[0033] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings. It is also stated that the embodiments described below are only used to explain the present invention and are not used to limit the present invention.

[0034] It should be noted that the term "connection" and other terms should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. The terms "first" and "second" are only used for the purpose of convenience of description and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features.

[0035] See also Figure 1 The present embodiment provides an input pull-off resonance suppression control circuit, comprising an input voltage AC component sampling circuit 1 and a DSP control loop 2, wherein the DSP control loop 2 comprises a digital signal processor 21, a driver IC 22 and a power circuit 23, wherein the input end of the input voltage AC component sampling circuit 1 and the input end of the power circuit 23 are both connected to the input voltage, the digital signal processor 21 is respectively connected to the output end of the input voltage AC component sampling circuit 1, the input end of the driver IC 22, the voltage collection end and the current sampling end of the power circuit 23, the output end of the driver IC 22 is connected to the control end of the power circuit 23, and the output end of the power circuit 23 is connected to the output voltage. The input voltage AC component sampling circuit 1 is used to collect the input voltage AC component sampling value CB and transmit it to the digital signal processor 21. The digital signal processor 21 is used to obtain the oscillation of the input voltage at this time according to the input voltage AC component sampling value CB, and thereby control the magnitude of the output voltage, thereby suppressing the change of the input voltage.

[0036] When the digital signal processor 21 knows that the input voltage is increasing based on the input voltage AC component sampling value CB, it controls the output voltage to increase so as to suppress the increasing trend of the input voltage and make the input tend to be stable; when the digital signal processor 21 knows that the input voltage is decreasing based on the input voltage AC component sampling value CB, it controls the output voltage to decrease so as to suppress the decreasing trend of the input voltage and make the input tend to be stable.

[0037] The input pull-out resonance suppression control circuit of the present invention consists of two parts, namely, an input voltage AC component sampling circuit 1 and a DSP control loop 2. The input voltage change is collected by the input voltage AC component sampling circuit 1 and is processed by the digital signal processor 21 of the DSP control loop 2. When the input voltage changes, the loop controls the output voltage to change accordingly, which can suppress the change of the input voltage and adjust the input impedance of the power circuit 23 to make the input tend to be stable, thereby effectively suppressing the input pull-out resonance. In addition, the present invention uses a digital method to realize real-time monitoring and dynamic adjustment of input voltage changes to suppress input pull-out resonance without adding additional capacitors, thereby overcoming the limitations of the prior art in terms of volume and weight, and has high versatility.

[0038] See also Figure 2 In one embodiment, the input voltage AC component sampling circuit 1 includes a diode group D1 and a bandpass filter composed of a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C1 and a capacitor C2, one end of the resistor R1 is connected to the input voltage after passing through the capacitor C1, the other end of the resistor R1 is respectively connected to one end of the resistor R2 and one end of the resistor R3, the other end of the resistor R2 is connected to the bias voltage, the other end of the resistor R3 is respectively connected to one end of the capacitor C2, the third pin of the diode group D1 and one end of the resistor R4, the second pin of the diode group D1 is connected to the auxiliary power supply voltage, the first pin of the diode group D1 and the other end of the capacitor C2 are both grounded, and the other end of the resistor R4 is connected to the digital signal processor 21. In the input voltage AC component sampling circuit 1, a bandpass filter composed of resistors R1, R2, R3, R4, capacitors C1 and C2 accurately samples and filters the AC component of the input voltage to ensure that only the AC component within a specific frequency range is effectively transmitted to the subsequent digital signal processor 21, thereby improving the system's anti-interference ability and sampling accuracy; the diode group D1 is composed of two diodes in parallel, which is responsible for voltage clamping. When the input voltage AC component is too large, the diode group D1 can limit the amplitude of the output voltage AC component sampling value CB to prevent it from exceeding the safe input range of the digital signal processor 21; the bias voltage is +1.24V, and the auxiliary power supply voltage is 3.3V; when the input is stable, the collected input voltage AC component sampling value CB is a stable 1.24V. When the input oscillates, the oscillating AC component is filtered by two stages of the bandpass filter and then passed to the digital signal processor 21. The sampled value CB of the input voltage AC component fluctuates around 1.24V. The diode group D1 makes the output sampled value CB of the input voltage AC component be between 0-3.3V to avoid damaging the digital signal processor 21.

[0039] See also Figure 3 , Figure 4In one embodiment, the power circuit 23 includes an LC network 231 and a BOOST converter 232, the input end of the LC network 231 is connected to the input voltage, the output end of the LC network 231 is connected to the input end of the BOOST converter 232, the voltage sampling end and the current sampling end of the BOOST converter 232 are both connected to the digital signal processor 21, the control end of the BOOST converter 232 is connected to the output end of the driver IC 22, and the output end of the BOOST converter 232 is connected to the output voltage. The digital signal processor 21 includes a voltage outer loop 211, a current inner loop 212, a summing unit 213 and a processing unit 214. The input end of the voltage outer loop 211 is connected to the voltage acquisition end of the power circuit 23, the output end of the voltage outer loop 211 is connected to the first input end of the current inner loop 212, the second input end of the current inner loop 212 is connected to the current sampling end of the power circuit 23, the output end of the current inner loop 212 is connected to the first input end of the summing unit 213, the second input end of the summing unit 213 is connected to the output end of the input voltage AC component sampling circuit 1, the output end of the summing unit 213 is connected to the input end of the processing unit 214, and the output end of the processing unit 214 is connected to the input end of the driver IC 22. The power supply topology of the present invention adopts a BOOST structure, and the loop control is controlled by a digital signal processor 21 using a voltage outer loop 211 and a current inner loop 212; through a dual-loop control strategy, the system can monitor and respond to changes in input voltage and output voltage in real time, thereby quickly adjusting the control signal to maintain the stability of the system; the fast response characteristics of the current inner loop 212 help to reduce current fluctuations and improve the dynamic performance of the system; the precise adjustment capability of the voltage outer loop 211 ensures the stability and accuracy of the output voltage.

[0040] Among them, the voltage outer loop 211 is used to collect input voltage and output voltage from the voltage collection end of the power circuit 23, and obtain a current reference to be transmitted to the current inner loop 212. The current inner loop 212 is used to obtain an output value according to the current reference output by the voltage outer loop 211 and the inductor current collected from the current sampling end of the power circuit 23 and transmit it to the summing unit 213. The summing unit 213 is used to superimpose the output value of the current inner loop 212 with the input voltage AC component sampling value CB collected from the output end of the input voltage AC component sampling circuit 1, obtain a superimposed value and transmit it to the processing unit 214. The processing unit 214 is used to recalculate the duty cycle according to the superimposed value and generate a corresponding PWM waveform. The PWM waveform is given to the control end of the power circuit 23 after passing through the driver IC22 to complete the control.

[0041] Specifically, when the input voltage decreases, the input voltage AC component sampling value CB will decrease accordingly; this change is superimposed on the output value of the current inner loop 212 through the summing unit 213 to obtain a smaller superimposed value; the processing unit 214 reduces the duty cycle according to the superimposed value to reduce the output voltage; this adjustment can suppress the decreasing trend of the input voltage and the decreasing trend of the input equivalent impedance of the BOOST converter 232 at this time, thereby suppressing the oscillation of the BOOST converter 232 and making the input tend to be stable.

[0042] When the input voltage increases, the input voltage AC component sampling value CB will increase accordingly; similarly, this change is superimposed on the output value of the current inner loop 212 through the summing unit 213 to obtain a larger superimposed value; the processing unit 214 increases the duty cycle according to this superimposed value to increase the output voltage; this adjustment can suppress the increasing trend of the input voltage at this time, and reduce the input equivalent impedance of the BOOST converter 232; at the same time, since the output voltage increases, the energy required for the input also increases, which can consume the energy of the input LC oscillation faster, thereby suppressing the oscillation of the BOOST converter 232 and making the input tend to be stable.

[0043] See also Figure 3 In one embodiment, the digital signal processor 21 further includes a first proportional unit 215 and a second proportional unit 216. The second input end of the current inner loop 212 is connected to the current sampling end of the power circuit 23 through the first proportional unit 215, and the second input end of the summing unit 213 is connected to the output end of the input voltage AC component sampling circuit 1 through the second proportional unit 216. During operation, the inductor current collected from the current sampling end of the power circuit 23 is scaled by the first proportional unit 215 and then transmitted to the current inner loop 212. Through the scaling process of the first proportional unit 215, the current inner loop 212 can more accurately control the inductor current in the power circuit 23. The input voltage AC component sampling value CB is collected from the output end of the input voltage AC component sampling circuit 1 and then processed by the second proportional unit 216 and then transmitted to the summing unit 213. Through the scaling process of the second proportional unit 216, the summing unit 213 can more accurately reflect the impact of the change of the input voltage on the system, which helps to improve the stability and response speed of the system.

[0044] See also Figure 4In one embodiment, the LC network 231 includes an input parasitic inductor L1, an inductor internal resistance RL1, and an input electrolytic capacitor CEI. One end of the input parasitic inductor L1 is connected to the input voltage, and the other end of the input parasitic inductor L1 is connected to the positive electrode of the input electrolytic capacitor CEI and the input end of the BOOST converter 232 respectively after passing through the inductor internal resistance RL1. The negative electrode of the input electrolytic capacitor CEI is grounded. Among them, the input parasitic inductor L1 is the inductance equivalent to the power input cable, and the inductor internal resistance RL1 is the internal resistance of the power input cable itself. The input electrolytic capacitor CEI is used as a filter capacitor to eliminate the fluctuation of the input voltage and ensure that the BOOST converter 232 obtains a stable DC voltage.

[0045] See also Figure 4 In one embodiment, the BOOST converter 232 includes an input capacitor CIN, a main power inductor L2, a sampling resistor RSENSE, a MOS tube Q1, a diode D2, an output capacitor COUT, an output electrolytic capacitor CEO, and a load resistor RLOAD. One end of the input capacitor CIN and one end of the main power inductor L2 are connected to the output end of the LC network 231, and the other end of the input capacitor CIN and one end of the sampling resistor RSENSE are grounded. The other end of the main power inductor L2 is respectively connected to the first end of the MOS tube Q1 and the positive electrode of the diode D2, and the negative electrode of the diode D2 is respectively connected to one end of the output capacitor COUT, the positive electrode of the output electrolytic capacitor CEO, one end of the load resistor RLOAD, the output voltage and the digital signal processor 21. The other end of the sampling resistor RSENSE is respectively connected to the second end of the MOS tube Q1, the other end of the output capacitor COUT, the negative electrode of the output electrolytic capacitor CEO, the other end of the load resistor RLOAD, the digital signal processor 21 and the analog ground, and the third end of the MOS tube Q1 is connected to the output end of the driver IC 22. The sampling resistor RSENSE is used to measure the inductor current flowing through the MOS tube Q1 and provide feedback for current control. The MOS tube Q1 controls its switching state based on the driving signal of the driver IC22, and its switching state determines the energy storage and release process of the main power inductor L2.

[0046] It should be understood that those skilled in the art can make improvements or changes based on the above description, and all these improvements and changes should fall within the scope of protection of the appended claims of the present invention.

[0047] The above is an exemplary description of the present invention in conjunction with the accompanying drawings. It is obvious that the implementation of the present invention is not limited to the above-mentioned method. As long as various improvements are made by adopting the method concept and technical solution of the present invention, or the concept and technical solution of the present invention are directly applied to other occasions without improvement, they are all within the protection scope of the present invention.

Claims

1. An input pull-off resonance suppression control circuit, characterized in that: It includes an input voltage AC component sampling circuit and a DSP control loop, wherein the DSP control loop includes a digital signal processor, a driver IC and a power circuit, wherein the input end of the input voltage AC component sampling circuit and the input end of the power circuit are both connected to the input voltage, the digital signal processor is respectively connected to the output end of the input voltage AC component sampling circuit, the input end of the driver IC, the voltage collection end and the current sampling end of the power circuit, the output end of the driver IC is connected to the control end of the power circuit, and the output end of the power circuit is connected to the output voltage; The input voltage AC component sampling circuit is used to collect the input voltage AC component sampling value and transmit it to the digital signal processor; The digital signal processor is used to obtain the oscillation status of the input voltage at this time according to the sampling value of the AC component of the input voltage, and control the magnitude of the output voltage accordingly, thereby suppressing the change of the input voltage.

2. The input pull-off resonance suppression control circuit according to claim 1, characterized in that: When the digital signal processor learns, based on the sampling value of the input voltage AC component, that the input voltage is increasing, the digital signal processor controls the output voltage to increase so as to suppress the increasing trend of the input voltage at this time; When the digital signal processor learns that the input voltage is decreasing at this time based on the sampling value of the input voltage AC component, it controls the output voltage to decrease so as to suppress the decreasing trend of the input voltage at this time.

3. The input pull-off resonance suppression control circuit according to claim 1, characterized in that: The input voltage AC component sampling circuit includes a diode group D1 and a bandpass filter composed of a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C1 and a capacitor C2, one end of the resistor R1 is connected to the input voltage after passing through the capacitor C1, the other end of the resistor R1 is respectively connected to one end of the resistor R2 and one end of the resistor R3, the other end of the resistor R2 is connected to a bias voltage, the other end of the resistor R3 is respectively connected to one end of the capacitor C2, the third pin of the diode group D1 and one end of the resistor R4, the second pin of the diode group D1 is connected to an auxiliary power supply voltage, the first pin of the diode group D1 and the other end of the capacitor C2 are both grounded, and the other end of the resistor R4 is connected to the digital signal processor.

4. The input pull-off resonance suppression control circuit according to claim 1, characterized in that: The power circuit includes an LC network and a BOOST converter, wherein the input end of the LC network is connected to the input voltage, the output end of the LC network is connected to the input end of the BOOST converter, the voltage sampling end and the current sampling end of the BOOST converter are both connected to the digital signal processor, the control end of the BOOST converter is connected to the output end of the driver IC, and the output end of the BOOST converter is connected to the output voltage.

5. The input pull-off resonance suppression control circuit according to claim 4, characterized in that: The digital signal processor includes a voltage outer loop, a current inner loop, a summing unit and a processing unit, wherein the input end of the voltage outer loop is connected to the voltage collection end of the power circuit, the output end of the voltage outer loop is connected to the first input end of the current inner loop, the second input end of the current inner loop is connected to the current sampling end of the power circuit, the output end of the current inner loop is connected to the first input end of the summing unit, the second input end of the summing unit is connected to the output end of the input voltage AC component sampling circuit, the output end of the summing unit is connected to the input end of the processing unit, and the output end of the processing unit is connected to the input end of the driver IC.

6. The input pull-off resonance suppression control circuit according to claim 5, characterized in that: The voltage outer loop is used to collect the input voltage and the output voltage from the voltage collection end of the power circuit, and obtain a current reference to be transmitted to the current inner loop; The current inner loop is used to obtain an output value according to the current reference and the inductor current collected from the current sampling terminal of the power circuit and transmit the output value to the summing unit; The summing unit is used to superimpose the output value with the input voltage AC component sampling value collected from the output end of the input voltage AC component sampling circuit to obtain a superimposed value and transmit it to the processing unit; The processing unit is used to recalculate the duty cycle according to the superposition value and generate a corresponding PWM waveform. The PWM waveform is given to the control end of the power circuit after passing through the driver IC to complete the control.

7. The input pull-off resonance suppression control circuit according to claim 6, characterized in that: When the input voltage decreases, the sampling value of the input voltage AC component decreases, the superposition value decreases, the duty cycle decreases, and the output voltage decreases, thereby suppressing the decreasing trend of the input voltage at this time, suppressing the decrease in the input equivalent impedance of the BOOST converter, thereby suppressing the oscillation of the BOOST converter and stabilizing the input; When the input voltage increases, the sampling value of the input voltage AC component increases, the superposition value increases, the duty cycle increases, and the output voltage increases, thereby suppressing the increasing trend of the input voltage and reducing the input equivalent impedance of the BOOST converter, thereby suppressing the oscillation of the BOOST converter and stabilizing the input.

8. The input pull-off resonance suppression control circuit according to claim 6, characterized in that: The digital signal processor further includes a first proportional unit and a second proportional unit, the second input end of the current inner loop is connected to the current sampling end of the power circuit through the first proportional unit, and the second input end of the summing unit is connected to the output end of the input voltage AC component sampling circuit through the second proportional unit; The inductor current collected from the current sampling terminal of the power circuit is processed by the first proportional unit and then transmitted to the current inner loop; The input voltage AC component sampling value is collected from the output end of the input voltage AC component sampling circuit, processed by the second proportional unit, and then transmitted to the summing unit.

9. The input pull-off resonance suppression control circuit according to claim 4, characterized in that: The LC network includes an input parasitic inductor L1, an inductor internal resistance RL1, and an input electrolytic capacitor CEI. One end of the input parasitic inductor L1 is connected to the input voltage, and the other end of the input parasitic inductor L1 is respectively connected to the positive electrode of the input electrolytic capacitor CEI and the input end of the BOOST converter after passing through the inductor internal resistance RL1. The negative electrode of the input electrolytic capacitor CEI is grounded.

10. The input pull-off resonance suppression control circuit according to claim 4, characterized in that: The BOOST converter includes an input capacitor CIN, a main power inductor L2, a sampling resistor RSENSE, a MOS tube Q1, a diode D2, an output capacitor COUT, an output electrolytic capacitor CEO, and a load resistor RLOAD. One end of the input capacitor CIN and one end of the main power inductor L2 are both connected to the output end of the LC network, the other end of the input capacitor CIN and one end of the sampling resistor RSENSE are both grounded, the other end of the main power inductor L2 is respectively connected to the first end of the MOS tube Q1 and the positive electrode of the diode D2, the negative electrode of the diode D2 is respectively connected to one end of the output capacitor COUT, the positive electrode of the output electrolytic capacitor CEO, one end of the load resistor RLOAD, the output voltage and the digital signal processor, the other end of the sampling resistor RSENSE is respectively connected to the second end of the MOS tube Q1, the other end of the output capacitor COUT, the negative electrode of the output electrolytic capacitor CEO, the other end of the load resistor RLOAD, the digital signal processor and the analog ground, and the third end of the MOS tube Q1 is connected to the output end of the driver IC.

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