COT-based control circuit and control method

Abstract

The invention discloses a COT-based control circuit and control method, and the circuit comprises a ripple generation circuit which enables the partial voltage of the output voltage of a converter to be superposed with a compensation ripple generated by a voltage signal of an external inductance end of the sampling converter, generates a ramp signal, and enables the ramp signal to be generated when the voltage of the external inductance end rises to zero in an inductor energy release stage. Stopping superposition of compensation ripples generated by the voltage of the external inductance end of the sampling converter; the first voltage comparison circuit is used for comparing an output voltage signal of the error amplifier with a ramp signal and generating a first control signal; the second voltage comparison circuit is used for comparing the sampling voltage converted by the inductance peak current during the energy storage of the sampling inductor with the reference voltage converted by the energy storage time of the sampling inductor so as to generate a conduction trigger signal; the logic gate circuit is used for performing logic operation on the conduction trigger signal and the constant conduction time control signal to generate a second control signal; and the logic circuit performs logic operation on the first control signal and the second control signal to generate a power switch tube control signal.

Description

Technical Field

[0001] The present invention relates to the technical field, and in particular to a control circuit and a control method based on COT. Background Art

[0002] With the expansion and extension of Internet applications, along with the leap-forward improvement of new generation information technologies such as 5G, AI, and big data, the Internet of Things has also ushered in rapid development. With the development of Internet of Things technology, the use of battery-powered devices such as portable devices has increased significantly. Due to their long use time in standby mode, in order to improve standby time and battery life, it is extremely important to improve the efficiency of the converter under light load. Traditional pulse width modulation switching converter control technologies, such as voltage-type control and current-type control, cannot meet this requirement.

[0003] Constant On-Time (COT) control technology is a pulse frequency modulation (PFM) control technology. It turns on the power switch of the converter within a fixed time interval, and adjusts the duty cycle of the control signal by controlling the off time to maintain the stability of the output voltage. Compared with traditional pulse width modulation control technology, COT control based on output ripple has the advantages of high light load efficiency, fast transient response speed, and simple control loop.

[0004] Generally, the power loss of the converter under light load is mainly determined by the driving loss and the switching loss. In order to further improve the light load efficiency of the converter under constant on-time control, the converter can switch down to reduce the converter loss under light load, and at the same time, the switching frequency can be smoothly increased as the load gradually changes from light load to heavy load. Summary of the invention

[0005] In view of the shortcomings of the prior art, the present invention provides a control circuit and a control method based on COT, which aims to solve the problem of how to enable the converter to reduce the switching frequency when the load is light to reduce the converter loss, and at the same time realize the problem of smoothly increasing the switching frequency as the load gradually changes from light load to heavy load.

[0006] To achieve the above object, the present invention adopts the following technical solution:

[0007] In a first aspect, a control circuit based on COT includes:

[0008] A ripple generating circuit receives a voltage feedback signal and a voltage signal at an external inductor terminal of a converter, and superimposes the voltage feedback signal with a compensation ripple generated by sampling the voltage signal at the external inductor terminal of the converter to generate a ramp signal, wherein the voltage feedback signal is a divided voltage of the converter output voltage signal, and in the energy release stage of the external inductor of the converter, when the voltage signal at the external inductor terminal of the converter rises to zero, the voltage feedback signal stops superimposing the compensation ripple generated by sampling the voltage signal at the external inductor terminal of the converter;

[0009] A first voltage comparison circuit receives an output voltage signal of the error amplifier and a ramp signal, and compares the output voltage signal of the error amplifier with the ramp signal to generate a first control signal, wherein the first control signal is used to control the energy release time of the external inductor of the converter;

[0010] A second voltage comparison circuit receives a sampling voltage and a reference voltage, compares the sampling voltage with the reference voltage, and generates a conduction trigger signal, wherein the sampling voltage is an output voltage signal converted from the peak current of the inductor when the sampling converter is connected to an external inductor for energy storage, and the reference voltage is an output voltage signal converted from the energy storage time of the external inductor of the sampling converter;

[0011] A logic gate circuit receives a conduction trigger signal and a constant conduction time control signal of the converter, and performs a logic operation on the conduction trigger signal and the constant conduction time control signal to generate a second control signal;

[0012] The logic circuit receives the first control signal and the second control signal, performs logic operation on the first control signal and the second control signal, and generates a power switch tube control signal.

[0013] Furthermore, the ripple generating circuit includes: a first buffer amplifier, a resistor R0, a capacitor C0, a resistor R1, a switch tube SW0, and a third comparator;

[0014] The inverting terminal of the first buffer amplifier is connected to the output terminal of the first buffer amplifier, the non-inverting terminal of the first buffer amplifier is connected to the voltage feedback signal, the output terminal of the first buffer amplifier is connected to the capacitor C0 and the first terminal of the resistor R0, and the second terminal of the resistor R0 is used as the output terminal of the ramp signal;

[0015] The inverting terminal of the third comparator is grounded, the non-inverting terminal of the third comparator is connected to the voltage signal of the external inductor terminal of the converter, the output terminal of the third comparator outputs a conduction control signal for controlling the conduction / cutoff of the switch tube SW0, and the voltage signal of the external inductor terminal of the converter is connected to the second end of the resistor R0 through the resistor R1 and the switch tube SW0;

[0016] In the energy release stage of the converter's external inductor, when the voltage signal at the converter's external inductor terminal rises to zero, the conduction control signal flips and controls SW0 to be cut off, and the voltage feedback signal stops superimposing the compensation ripple generated by the voltage signal at the converter's external inductor terminal;

[0017] During the energy storage stage of the converter's external inductor, the output signal of the third comparator does not participate in controlling the switch tube SW0, the switch tube SW0 is always turned on, and the voltage feedback signal is superimposed on the compensation ripple generated by the voltage signal at the external inductor end of the sampling converter.

[0018] Furthermore, the first voltage comparison circuit sends the ramp signal and the output voltage signal of the error amplifier to the inverting terminal and the non-inverting terminal of the first comparator for comparison respectively. When the ramp signal is less than the output voltage signal of the error amplifier, the first control signal of the first comparator is flipped, the energy release phase of the external inductor of the converter ends, and the external inductor of the converter enters the next energy storage phase.

[0019] Furthermore, the reference voltage generating circuit for converting the energy storage time of the external inductor of the sampling converter into an output voltage signal comprises: a reference current source IREF1, a reference current source IREF2, a current mirror circuit, a transmission gate TG1, a transmission gate TG2, a transmission gate TG3, an NMOS tube N1, an NMOS tube N2, a second buffer amplifier, a capacitor C1, a capacitor C2, a capacitor C3, a resistor R2 and a resistor R3;

[0020] The reference current source IREF1 is connected to the in-phase end of the second buffer amplifier through the transmission gate TG1, the transmission gate TG2, the transmission gate TG3, the NMOS tube N1, and the NMOS tube N2. The inverting end of the second buffer amplifier is connected to the output end of the second buffer. The output end of the second buffer is connected to the first end of the resistor R2. The second end of the resistor R2 is grounded. The output end of the second buffer is connected to the input end of the first current mirror module of the current mirror circuit. The reference current source IREF2 is connected to the output end of the first current mirror module. The output end of the first current mirror module is connected to the input end of the second current mirror module of the current mirror circuit. The output end of the second current mirror module is connected to the first end of the resistor R3 and outputs a reference voltage. The second end of the resistor R3 is grounded.

[0021] In the converter external inductor energy storage stage, NMOS tube N1 and NMOS tube N2 are turned on within the set value time and quickly discharge capacitors C1 and C2 to zero respectively, transmission gates TG1 and TG2 are turned on, transmission gate TG3 is turned off, reference current source IREF1 charges capacitors C1 and C2 respectively, and capacitor C3 voltage is maintained;

[0022] When the energy storage stage of the external inductor of the converter ends, the external inductor of the converter enters the energy release stage, the NMOS tube N1 and the NMOS tube N2 are turned off, the transmission gates TG1 and TG2 are turned off, and the transmission gate TG3 is turned on, and the voltage of the capacitor C2 is sent to the capacitor C3. The voltage of the capacitor C1 is maintained, and the voltage of the capacitor C3 passes through the second buffer amplifier and is superimposed on the resistor R2 to generate a current. After passing through the first current mirror module, the current is subtracted from the reference current IREF2. After passing through the second current mirror module, the subtracted current is superimposed on the resistor R3 to generate a reference voltage, that is, Among them, V REF_Ton is the reference voltage, and Ton is the energy storage time of the external inductor of the sampling converter.

[0023] Furthermore, the peak current of the inductor in the next energy storage stage of the external inductor of the sampling converter is converted into a sampling voltage V ISENSE , the second voltage comparison circuit will V ISENSE and V REF_Ton The current is sent to the in-phase terminal and the inverting terminal of the second comparator for comparison to generate a conduction trigger signal T SENSE , when V ISENSE Greater than V REF_Ton When the trigger signal T SENSE flip, so when V REF_Ton The larger the T SENSE The longer it takes to flip.

[0024] Furthermore, the logic gate circuit sends the conduction trigger signal and the constant conduction time control signal of the converter to the input end of the NOR gate, and the NOR gate performs a logic operation on the conduction trigger signal and the constant conduction time control signal, and the output end of the NOR gate generates a second control signal. SENSE The time required for the flip is greater than the constant on-time control signal T COT When the constant on-time is set, the energy storage time of the external inductor of the converter increases and the switching frequency of the converter decreases.

[0025] Furthermore, the logic circuit sends the first control signal and the second control signal to the set terminal and the reset terminal of the RS trigger respectively, the RS trigger performs a logic operation on the first control signal and the second control signal, and the output terminal of the RS trigger outputs the power switch tube control signal.

[0026] In a second aspect, a control method of a control circuit based on COT includes:

[0027] The divided voltage of the output voltage signal of the converter and the voltage signal of the external inductor of the converter are sent to the ripple generating circuit, so that the divided voltage of the output voltage signal of the converter is superimposed on the compensation ripple generated by the voltage signal of the external inductor of the sampling converter to generate a ramp signal;

[0028] Sending the ramp signal and the output voltage signal of the error amplifier to a first comparator for comparison;

[0029] When the ramp signal is less than the output voltage signal of the error amplifier, a first control signal is generated, and the energy release phase of the external inductor of the converter ends, and the external inductor of the converter enters the next energy storage phase;

[0030] The first control signal is input into the set end of the RS trigger, and is used to control the off time of the power switch tube of the converter, and as the load increases, the off time of the power switch tube gradually decreases, and the switching frequency of the power switch tube gradually increases;

[0031] The reference voltage V converted from the converter's external inductor energy storage time Ton REF_Ton The sampling voltage V converted from the inductor peak current when the sampling converter is connected to an external inductor for energy storage ISENSE Send to the second comparator for comparison;

[0032] When the sampling voltage V ISENSE Exceeds the reference voltage V REF_Ton Then generate a conduction trigger signal;

[0033] The conduction trigger signal and the constant conduction time control signal of the converter are sent to the NOR gate to generate a second control signal, which is input into the reset terminal of the RS trigger to increase the energy storage time of the inductor in the next cycle to reduce the switching frequency of the power switch tube.

[0034] Furthermore, the specific steps of generating the ramp signal include:

[0035] The divided voltage of the output voltage signal of the converter is sent to the capacitor C0 through the first buffer amplifier;

[0036] The voltage signal at the external inductor of the converter is superimposed on the resistor R0 through the resistor R1 and the switch tube SW0 and connected to the capacitor C0;

[0037] The voltage signal of the external inductor of the converter is detected by the third comparator. In the energy release stage of the external inductor of the converter, when the voltage of the external inductor of the converter rises to zero, the conduction control signal output by the third comparator is reversed and the switch tube SW0 is turned off. The ramp signal V slope Stop superimposing the compensation ripple generated by the voltage signal at the external inductor terminal of the sampling converter.

[0038] The control circuit and control method based on COT described in the present invention have the following beneficial effects:

[0039] The ripple generating circuit generates a ramp signal by superimposing the voltage division of the converter output voltage signal with the compensation ripple generated by the voltage signal of the external inductor of the sampling converter to compensate for the small ESR ripple of the converter output voltage. The ramp signal and the output voltage signal of the error amplifier are sent to the first voltage comparison circuit for comparison. When the ramp signal is less than the output of the error amplifier, a first control signal is generated. The first control signal is input to the logic circuit to end the energy release of the external inductor of the converter. At the same time, in order to ensure that the switching frequency of the power switch tube of the converter increases smoothly when the load gradually changes from light load to heavy load, when the voltage signal of the external inductor of the detection converter rises to zero, the ramp signal stops superimposing the compensation ripple generated by the voltage signal of the external inductor of the sampling converter. At this time, the ramp signal is only controlled by the voltage division of the converter output voltage. Therefore, as the load increases, the off time of the power switch tube of the converter gradually decreases, and the switching frequency of the power switch tube increases smoothly. Sample the current converter external inductor energy storage time and convert it into voltage V REF_Ton , sample the peak current of the next energy storage cycle of the inductor and convert it into voltage V ISENSE , V ISENSE and V REF_Ton Sent to the second voltage comparison circuit for comparison, when V ISENSE Greater than V REF_Ton When the second voltage comparison circuit outputs a conduction trigger signal T SENSE Flipping, we can see that when V REF_Ton The larger the T SENSE The longer the flip time is, the more SENSE When the time required for the flip is greater than the constant on-time, the inductor energy storage time increases and the switching frequency of the power switch tube of the converter decreases. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 is a circuit structure diagram of a COT-based control circuit according to an embodiment of the present invention;

[0041] Figure 2 is a schematic diagram of the circuit structure of a ripple generating circuit according to an embodiment of the present invention;

[0042] Figure 3 is a schematic diagram of the circuit structure of a reference voltage generating circuit according to an embodiment of the present invention;

[0043] Figure 4 It is a flow chart of a control method based on COT according to an embodiment of the present invention. DETAILED DESCRIPTION

[0044] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0045] like Figure 1As shown, the present invention provides a control circuit based on COT, comprising:

[0046] A ripple generating circuit receives a voltage feedback signal and a voltage signal at an external inductor terminal of a converter, and superimposes the voltage feedback signal with a compensation ripple generated by sampling the voltage signal at the external inductor terminal of the converter to generate a ramp signal, wherein the voltage feedback signal is a divided voltage of the output voltage signal of the converter, and in the energy release stage of the external inductor of the converter, when the voltage signal at the external inductor terminal of the converter rises to zero, the voltage feedback signal stops superimposing the compensation ripple generated by sampling the voltage signal at the external inductor terminal of the converter;

[0047] A first voltage comparison circuit receives an output voltage signal of the error amplifier and a ramp signal, and compares the output voltage signal of the error amplifier with the ramp signal to generate a first control signal;

[0048] A second voltage comparison circuit receives a sampling voltage and a reference voltage, compares the sampling voltage with the reference voltage, and generates a conduction trigger signal, wherein the sampling voltage is an output voltage signal converted from the peak current of the inductor when the sampling converter is connected to an external inductor for energy storage, and the reference voltage is an output voltage signal converted from the energy storage time of the external inductor of the sampling converter;

[0049] A logic gate circuit receives a conduction trigger signal and a constant conduction time control signal of the converter, and performs a logic operation on the conduction trigger signal and the constant conduction time control signal to generate a second control signal;

[0050] The logic circuit receives the first control signal and the second control signal, performs logic operation on the first control signal and the second control signal, and generates a power switch tube control signal.

[0051] The ripple generating circuit generates a ramp signal by superimposing the voltage division of the converter output voltage signal with the compensation ripple generated by the voltage signal of the external inductor terminal of the sampling converter to compensate for the small ESR ripple of the converter output voltage. The ramp signal and the output voltage signal of the error amplifier are sent to the first voltage comparison circuit for comparison. When the ramp signal is less than the output of the error amplifier, a first control signal is generated. The first control signal is input to the logic circuit to end the energy release of the external inductor terminal of the converter. At the same time, in order to ensure that the switching frequency of the power switch tube of the converter increases smoothly when the load gradually changes from light load to heavy load, when the voltage signal of the external inductor terminal of the detection converter rises to zero, the ramp signal stops superimposing the compensation ripple generated by the voltage signal of the external inductor terminal of the sampling converter. At this time, the ramp signal is only controlled by the ripple of the converter output voltage. Therefore, as the load increases, the off time of the power switch tube of the converter gradually decreases, and the switching frequency of the power switch tube increases smoothly. Sample the current energy storage time of the external inductor terminal of the converter and convert it into voltage V REF_Ton, sample the peak current of the next energy storage cycle at the external inductor of the converter and convert it into voltage V ISENSE , V ISENSE and V REF_Ton Sent to the second voltage comparison circuit for comparison, when V ISENSE Greater than V REF_Ton When the second voltage comparison circuit outputs a conduction trigger signal T SENSE Flipping, we can see that when V REF_Ton The larger the T SENSE The longer the flip time is, the more SENSE When the time required for the flip is greater than the constant on-time, the inductor energy storage time increases and the switching frequency of the power switch tube of the converter decreases.

[0052] like Figure 2 As shown, in some embodiments, the ripple generating circuit includes: a first buffer amplifier, a resistor R0, a capacitor C0, a resistor R1, a switch tube SW0, and a third comparator;

[0053] The inverting terminal of the first buffer amplifier is connected to the output terminal of the first buffer amplifier, the non-inverting terminal of the first buffer amplifier is connected to the voltage feedback signal, the output terminal of the first buffer amplifier is connected to the capacitor C0 and the first terminal of the resistor R0, and the second terminal of the resistor R0 is used as the output terminal of the ramp signal;

[0054] The inverting terminal of the third comparator is grounded, the non-inverting terminal of the third comparator is connected to the voltage signal of the external inductor terminal of the converter, the output terminal of the third comparator outputs a conduction control signal for controlling the conduction / cutoff of the switch tube SW0, and the voltage signal of the external inductor terminal of the converter is connected to the second end of the resistor R0 through the resistor R1 and the switch tube SW0;

[0055] In the energy release stage of the converter's external inductor, when the voltage signal at the converter's external inductor terminal rises to zero, the conduction control signal flips and controls SW0 to be cut off, and the voltage feedback signal stops superimposing the compensation ripple generated by the voltage signal at the converter's external inductor terminal;

[0056] During the energy storage stage of the converter's external inductor, the output signal of the third comparator does not participate in controlling the switch tube SW0, the switch tube SW0 is always turned on, and the voltage feedback signal is superimposed on the compensation ripple generated by the voltage at the external inductor terminal of the sampling converter.

[0057] like Figure 1 As shown, in some embodiments, the first voltage comparison circuit sends the ramp signal and the output voltage signal of the error amplifier to the inverting terminal and the non-inverting terminal of the first comparator for comparison respectively. When the ramp signal is less than the output voltage signal of the error amplifier, the first control signal of the first comparator is flipped, the energy release stage of the external inductor of the converter ends, and the external inductor of the converter enters the next energy storage stage.

[0058] like Figure 3 As shown, in some embodiments, the reference voltage generating circuit for converting the energy storage time of the external inductor of the sampling converter into an output voltage signal includes: a reference current source IREF1, a reference current source IREF2, a current mirror circuit, a transmission gate TG1, a transmission gate TG2, a transmission gate TG3, an NMOS tube N1, an NMOS tube N2, a second buffer amplifier, a capacitor C1, a capacitor C2, a capacitor C3, a resistor R2 and a resistor R3;

[0059] The reference current source IREF1 is connected to the in-phase end of the second buffer amplifier through the transmission gate TG1, the transmission gate TG2, the transmission gate TG3, the NMOS tube N1, and the NMOS tube N2. The inverting end of the second buffer amplifier is connected to the output end of the second buffer. The output end of the second buffer is connected to the first end of the resistor R2. The second end of the resistor R2 is grounded. The output end of the second buffer is connected to the input end of the first current mirror module of the current mirror circuit. The reference current source IREF2 is connected to the output end of the first current mirror module. The output end of the first current mirror module is connected to the input end of the second current mirror module of the current mirror circuit. The output end of the second current mirror module is connected to the first end of the resistor R3 and outputs a reference voltage. The second end of the resistor R3 is grounded.

[0060] In the converter external inductor energy storage stage, NMOS tube N1 and NMOS tube N2 are turned on within the set value time and quickly discharge capacitors C1 and C2 to zero respectively, transmission gates TG1 and TG2 are turned on, transmission gate TG3 is turned off, reference current source IREF1 charges capacitors C1 and C2 respectively, and capacitor C3 voltage is maintained;

[0061] When the converter's external inductor energy storage phase ends, the inductor enters the energy release phase, the NMOS tube N1 and the NMOS tube N2 are turned off, the transmission gates TG1 and TG2 are turned off, and the transmission gate TG3 is turned on, sending the voltage of the capacitor C2 to the capacitor C3, the capacitor C1 voltage is maintained, the capacitor C3 voltage passes through the second buffer amplifier and is superimposed on the resistor R2 to generate a current, the current passes through the first current mirror module and is subtracted from the reference current IREF2, the subtracted current passes through the second current mirror module and is superimposed on the resistor R3 to generate a reference voltage, that is, Among them, V REF_Ton is the reference voltage, and Ton is the energy storage time of the sampling inductor.

[0062] like Figure 1 and Figure 3 As shown, in some embodiments, the peak current of the inductor of the next energy storage stage of the external inductor of the sampling converter is converted into a sampling voltage V ISENSE , the second voltage comparison circuit will V ISENSE and V REF_TonThe current is sent to the in-phase terminal and the inverting terminal of the second comparator for comparison to generate a conduction trigger signal T SENSE , when V ISENSE Greater than V REF_Ton When the trigger signal T SENSE flip, so when V REF_Ton The larger the T SENSE The longer it takes to flip.

[0063] like Figure 1 and Figure 3 As shown, in some embodiments, the logic gate circuit sends the conduction trigger signal and the constant conduction time control signal of the converter to the input end of the NOR gate, and the NOR gate performs a logic operation on the conduction trigger signal and the constant conduction time control signal, and the output end of the NOR gate generates a second control signal. SENSE The time required for the flip is greater than the constant on-time control signal T COT When the constant on-time is set, the inductor energy storage time increases and the switching frequency of the converter decreases.

[0064] like Figure 1 As shown, in some embodiments, the logic circuit sends the first control signal and the second control signal to the set terminal and the reset terminal of the RS trigger respectively, the RS trigger performs logic operations on the first control signal and the second control signal, and the output terminal of the RS trigger outputs the power switch tube control signal.

[0065] like Figure 4 As shown, the present invention provides a control method of a control circuit based on COT, comprising:

[0066] The divided voltage of the output voltage signal of the converter and the voltage signal of the external inductor of the converter are sent to the ripple generating circuit, so that the divided voltage of the output voltage signal of the converter is superimposed on the compensation ripple generated by the voltage signal of the external inductor of the sampling converter to generate a ramp signal;

[0067] Sending the ramp signal and the output voltage signal of the error amplifier to a first comparator for comparison;

[0068] When the ramp signal is less than the output voltage signal of the error amplifier, a first control signal is generated, and the energy release phase of the external inductor of the converter ends, and the external inductor of the converter enters the next energy storage phase;

[0069] The first control signal is input into the set end of the RS trigger, and is used to control the off time of the power switch tube of the converter, and as the load increases, the off time of the power switch tube gradually decreases, and the switching frequency of the power switch tube gradually increases;

[0070] The converter is connected to an external inductor for energy storage time T on Converted reference voltage V REF_TonThe sampling voltage V converted from the inductor peak current when the sampling converter is connected to an external inductor for energy storage ISENSE Send to the second comparator for comparison;

[0071] When the sampling voltage V ISENSE Exceeds the reference voltage V REF_Ton Then generate a conduction trigger signal;

[0072] The conduction trigger signal and the constant conduction time control signal of the converter are sent to the NOR gate to generate a second control signal, which is input into the reset terminal of the RS trigger to increase the energy storage time of the inductor in the next cycle to reduce the switching frequency of the power switch tube.

[0073] Furthermore, the specific steps of generating the ramp signal include:

[0074] The divided voltage of the output voltage signal of the converter is sent to the capacitor C0 through the first buffer amplifier;

[0075] The voltage signal at the external inductor of the converter is superimposed on the resistor R0 through the resistor R1 and the switch tube SW0 and connected to the capacitor C0;

[0076] The voltage signal at the external inductor terminal of the converter is detected by the third comparator. In the inductor energy release stage, when the voltage signal at the external inductor terminal of the converter rises to zero, the conduction control signal output by the third comparator is flipped and the switch tube SW0 is turned off, and the ramp signal stops superimposing the compensation ripple generated by the voltage signal at the external inductor terminal of the sampling converter.

[0077] The above description is only a preferred embodiment of the present invention and does not limit the technical scope of the present invention. Therefore, any slight modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention are still within the scope of the technical solution of the present invention.

Claims

1. A control circuit based on COT, characterized in that: include: A ripple generating circuit receives a voltage feedback signal and a voltage signal at an external inductor terminal of a converter, and superimposes the voltage feedback signal with a compensation ripple generated by sampling the voltage signal at the external inductor terminal of the converter to generate a ramp signal, wherein the voltage feedback signal is a divided voltage of the converter output voltage signal, and in the energy release stage of the external inductor of the converter, when the voltage signal at the external inductor terminal of the converter rises to zero, the voltage feedback signal stops superimposing the compensation ripple generated by sampling the voltage signal at the external inductor terminal of the converter; A first voltage comparison circuit receives an output voltage signal of the error amplifier and a ramp signal, and compares the output voltage signal of the error amplifier with the ramp signal to generate a first control signal, wherein the first control signal is used to control the energy release time of the external inductor of the converter; A second voltage comparison circuit receives a sampling voltage and a reference voltage, compares the sampling voltage with the reference voltage, and generates a conduction trigger signal, wherein the sampling voltage is an output voltage signal converted from the peak current of the inductor when the sampling converter is connected to an external inductor for energy storage, and the reference voltage is an output voltage signal converted from the energy storage time of the external inductor of the sampling converter; A logic gate circuit receives a conduction trigger signal and a constant conduction time control signal of the converter, and performs a logic operation on the conduction trigger signal and the constant conduction time control signal to generate a second control signal; The logic circuit receives the first control signal and the second control signal, performs logic operation on the first control signal and the second control signal, and generates a power switch tube control signal.

2. The COT-based control circuit according to claim 1, characterized in that: The ripple generating circuit includes: a first buffer amplifier, a resistor R0, a capacitor C0, a resistor R1, a switch tube SW0, and a third comparator; The inverting terminal of the first buffer amplifier is connected to the output terminal of the first buffer amplifier, the non-inverting terminal of the first buffer amplifier is connected to the voltage feedback signal, the output terminal of the first buffer amplifier is connected to the capacitor C0 and the first terminal of the resistor R0, and the second terminal of the resistor R0 is used as the output terminal of the ramp signal; The inverting terminal of the third comparator is grounded, the non-inverting terminal of the third comparator is connected to the voltage signal of the external inductor terminal of the converter, the output terminal of the third comparator outputs a conduction control signal for controlling the conduction / cutoff of the switch tube SW0, and the voltage signal of the external inductor terminal of the converter is connected to the second end of the resistor R0 through the resistor R1 and the switch tube SW0; In the energy release stage of the converter's external inductor, when the voltage signal at the converter's external inductor terminal rises to zero, the conduction control signal flips and controls SW0 to be cut off, and the voltage feedback signal stops superimposing the compensation ripple generated by the voltage signal at the converter's external inductor terminal; During the energy storage stage of the converter's external inductor, the output signal of the third comparator does not participate in controlling the switch tube SW0, the switch tube SW0 is always turned on, and the voltage feedback signal is superimposed on the compensation ripple generated by the voltage signal at the external inductor end of the sampling converter.

3. The COT-based control circuit according to claim 2, characterized in that: The first voltage comparison circuit sends the ramp signal and the output voltage signal of the error amplifier to the inverting terminal and the non-inverting terminal of the first comparator for comparison respectively. When the ramp signal is less than the output voltage signal of the error amplifier, the first control signal of the first comparator is flipped, the energy release stage of the external inductor of the converter ends, and the external inductor of the converter enters the next energy storage stage.

4. The COT-based control circuit according to claim 1, characterized in that: The reference voltage generating circuit for converting the energy storage time of the external inductor of the sampling converter into an output voltage signal comprises: a reference current source IREF1, a reference current source IREF2, a current mirror circuit, a transmission gate TG1, a transmission gate TG2, a transmission gate TG3, an NMOS tube N1, an NMOS tube N2, a second buffer amplifier, a capacitor C1, a capacitor C2, a capacitor C3, a resistor R2 and a resistor R3; The reference current source IREF1 is connected to the in-phase end of the second buffer amplifier through the transmission gate TG1, the transmission gate TG2, the transmission gate TG3, the NMOS tube N1, and the NMOS tube N2. The inverting end of the second buffer amplifier is connected to the output end of the second buffer. The output end of the second buffer is connected to the first end of the resistor R2. The second end of the resistor R2 is grounded. The output end of the second buffer is connected to the input end of the first current mirror module of the current mirror circuit. The reference current source IREF2 is connected to the output end of the first current mirror module. The output end of the first current mirror module is connected to the input end of the second current mirror module of the current mirror circuit. The output end of the second current mirror module is connected to the first end of the resistor R3 and outputs a reference voltage. The second end of the resistor R3 is grounded. In the converter external inductor energy storage stage, NMOS tube N1 and NMOS tube N2 are turned on within the set value time and quickly discharge capacitors C1 and C2 to zero respectively, transmission gates TG1 and TG2 are turned on, transmission gate TG3 is turned off, reference current source IREF1 charges capacitors C1 and C2 respectively, and capacitor C3 voltage is maintained; When the energy storage stage of the external inductor of the converter ends, the external inductor of the converter enters the energy release stage, the NMOS tube N1 and the NMOS tube N2 are turned off, the transmission gates TG1 and TG2 are turned off, and the transmission gate TG3 is turned on, and the voltage of the capacitor C2 is sent to the capacitor C3. The voltage of the capacitor C1 is maintained, and the voltage of the capacitor C3 passes through the second buffer amplifier and is superimposed on the resistor R2 to generate a current. After passing through the first current mirror module, the current is subtracted from the reference current IREF2. After passing through the second current mirror module, the subtracted current is superimposed on the resistor R3 to generate a reference voltage, that is, Among them, V REF_Ton is the reference voltage, and Ton is the energy storage time of the external inductor of the sampling converter.

5. The COT-based control circuit according to claim 4, characterized in that: The peak current of the inductor in the next energy storage stage of the sampling converter is converted into a sampling voltage V ISENSE , the second voltage comparison circuit will V ISENSE and V REF_Ton The current is sent to the in-phase terminal and the inverting terminal of the second comparator for comparison to generate a conduction trigger signal T SENSE , when V ISENSE Greater than V REF_Ton When the trigger signal T SENSE flip, so when V REF_Ton The larger the T SENSE The longer it takes to flip.

6. The COT-based control circuit according to claim 5, characterized in that: The logic gate circuit sends the conduction trigger signal and the constant conduction time control signal of the converter to the input end of the NOR gate. The NOR gate performs a logic operation on the conduction trigger signal and the constant conduction time control signal. The output end of the NOR gate generates a second control signal. When the conduction trigger signal T SENSE The time required for the flip is greater than the constant on-time control signal T COT When the constant on-time is set, the energy storage time of the external inductor of the converter increases and the switching frequency of the converter decreases.

7. The COT-based control circuit according to claim 6, characterized in that: The logic circuit sends the first control signal and the second control signal to the set terminal and the reset terminal of the RS trigger respectively. The RS trigger performs a logic operation on the first control signal and the second control signal, and the output terminal of the RS trigger outputs a power switch tube control signal.

8. A control method of a control circuit based on COT, characterized in that: include: The divided voltage of the output voltage signal of the converter and the voltage signal of the external inductor of the converter are sent to the ripple generating circuit, so that the divided voltage of the output voltage signal of the converter is superimposed on the compensation ripple generated by the voltage signal of the external inductor of the sampling converter to generate a ramp signal; Sending the ramp signal and the output voltage signal of the error amplifier to a first comparator for comparison; When the ramp signal is less than the output voltage signal of the error amplifier, a first control signal is generated, and the energy release phase of the external inductor of the converter ends, and the external inductor of the converter enters the next energy storage phase; The first control signal is input into the set end of the RS trigger, and is used to control the off time of the power switch tube of the converter, and as the load increases, the off time of the power switch tube gradually decreases, and the switching frequency of the power switch tube gradually increases; The reference voltage V converted from the converter's external inductor energy storage time Ton REF_Ton The sampling voltage V converted from the inductor peak current when the sampling converter is connected to an external inductor for energy storage ISENSE Send to the second comparator for comparison; When the sampling voltage V ISENSE Exceeds the reference voltage V REF_Ton Then generate a conduction trigger signal; The conduction trigger signal and the constant conduction time control signal of the converter are sent to the NOR gate to generate a second control signal, which is input into the reset terminal of the RS trigger to increase the energy storage time of the inductor in the next cycle to reduce the switching frequency of the power switch tube.

9. The control method of the control circuit based on COT according to claim 8, characterized in that: The specific steps of generating the ramp signal include: The divided voltage of the output voltage signal of the converter is sent to the capacitor C0 through the first buffer amplifier; The voltage signal at the external inductor of the converter is superimposed on the resistor R0 through the resistor R1 and the switch tube SW0 and connected to the capacitor C0; The voltage signal at the external inductor of the converter is detected by the third comparator. In the energy release stage of the external inductor of the converter, when the voltage signal at the external inductor of the converter rises to zero, the conduction control signal output by the third comparator is flipped and the switch tube SW0 is turned off. The ramp signal V slope Stop superimposing the compensation ripple generated by the voltage at the external inductor terminal of the sampling converter.

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