Two-stage charge pump bootstrap high-voltage integrated circuit

Abstract

The invention provides a two-stage charge pump bootstrap high-voltage integrated circuit. The two-stage charge pump bootstrap high-voltage integrated circuit comprises a bootstrap circuit, an input stage circuit, a pulse generator, a low-side delay matching circuit, a high-voltage level shift circuit and a driving output circuit, the input end of the bootstrap circuit is connected with a power supply, and the output end of the bootstrap circuit is sequentially connected with the high-voltage level shift circuit and the driving output circuit; the input end of the input stage circuit, the input end of the pulse generator and the input end of the low-side delay matching circuit are respectively connected to a power supply; the output end of the input stage circuit is sequentially connected with a pulse generator, a low-side delay matching circuit and a driving output circuit; the pulse generator is also connected to the high-voltage level shift circuit; the driving output circuit comprises a first capacitor, a first MOS tube and a second MOS tube. According to the two-stage charge pump bootstrap high-voltage integrated circuit, the applicability, the reliability and the market competitiveness of an intelligent power module can be improved.

Description

Technical Field

[0001] The invention relates to the technical field of high-voltage integrated circuits, and in particular to a two-stage charge pump bootstrap high-voltage integrated circuit. Background Art

[0002] High voltage integrated circuit, or HVIC, is an integrated circuit product that converts MCU signals into driving IGBT or MOS signals. HVIC integrates PMOS tubes, NMOS tubes, triodes, diodes, voltage regulator tubes, resistors, and capacitors to form Schmitt, low voltage level, high voltage level, pulse generation circuit, delay circuit, filter circuit, overcurrent protection circuit, overheat protection circuit, undervoltage protection circuit, bootstrap circuit and other circuits. The single pulse GEN circuit in the high-side drive circuit of the existing HVIC generates pulses at the rising and falling edges of the HIN signal to drive DMOS. The pulse width is generally several hundred nanoseconds, so that HIN corresponds to HO.

[0003] The high-voltage side power supply of existing HVIC is floating, and the voltage will increase with the increase of bus voltage (VBUS). The voltage drop between the high-voltage side floating power supply and the floating ground needs to remain constant, while the potential of the high-voltage side floating ground will vary between zero and VBUS. Therefore, the high-voltage side power supply of the chip needs to adopt an isolated power supply solution, and the high-voltage side power supply of the chip needs to have a certain ability to resist voltage transients. As we all know, batteries are the most commonly used isolated power supply, but the battery power is limited and cannot meet the long-term working requirements of the chip.

[0004] At present, the bootstrap power supply method is the most commonly used power supply method for the high voltage side of the HVIC driver chip. Figure 1 When the low-voltage side power tube Q2 is turned on, the potential of VS is pulled to zero potential. At this time, VCC is connected to the power supply through the bootstrap diode D boot To supply power to the bootstrap capacitor, when charging stops, C boot The voltage above is approximately equal to the voltage of VCC. When the low-voltage side power tube is turned off and the high-voltage side power tube is turned on, the potential of the Vs terminal will be quickly pulled to V due to the opening of Q1. BUS Since the voltage across the capacitor cannot change suddenly, the voltage of VCCA is approximately equal to (V BUS +VCC), the capacitor acts as the power supply for the high voltage circuit of the battery. In the next cycle, when the lower tube Q1 is turned on, C bootIt will be recharged to meet the power supply requirements when the high-voltage side power tube is turned on in the next cycle, and so on. Therefore, the bootstrap power supply method can meet the continuous power supply of the high-voltage side circuit. In some applications, the high-voltage area power device may be turned on for a long time, which will cause insufficient voltage on the high-voltage area power supply capacitor. In this case, there are two solutions. One is to increase the size of the bootstrap capacitor, but it will increase the startup time of the system and have poor reliability. Summary of the invention

[0005] The invention provides a two-stage charge pump self-bootstrapping high-voltage integrated circuit, aiming to solve the problem of poor reliability of the existing high-voltage integrated circuit.

[0006] The embodiment of the present invention provides a two-stage charge pump bootstrap high-voltage integrated circuit, comprising: a bootstrap circuit, an input stage circuit, a pulse generator, a low-side delay matching circuit, a high-voltage level shift circuit, and a drive output circuit;

[0007] The input end of the bootstrap circuit is connected to a power supply, and the output end of the bootstrap circuit is connected to the high-voltage level shift circuit and the drive output circuit in sequence;

[0008] The input end of the input stage circuit, the input end of the pulse generator and the input end of the low-side delay matching circuit are respectively connected to the power supply; the output end of the input stage circuit is connected to the pulse generator, the low-side delay matching circuit and the drive output circuit in sequence; the pulse generator is also connected to the high-voltage level shift circuit;

[0009] The driving output circuit comprises: a first capacitor, a first MOS transistor and a second MOS transistor;

[0010] The first end of the first capacitor is connected to the power supply, and the second end of the first capacitor is respectively connected to the source of the first MOS tube and the drain of the second MOS tube; the gate of the first MOS tube is connected to the high-voltage level shifting circuit, and the drain of the first MOS tube is connected to the bus voltage; the gate of the second MOS tube is connected to the output end of the low-side delay matching circuit, and the source of the second MOS tube is grounded.

[0011] Preferably, the bootstrap circuit comprises: a first diode, a second diode, a third diode, a second capacitor, a third capacitor, a first resistor, a third MOS transistor and a fourth MOS transistor;

[0012] The anode of the first diode is connected to the power supply, and the cathode of the first diode is respectively connected to the first end of the second capacitor, the first end of the first resistor, and the anode of the second diode; the second end of the second capacitor is respectively connected to the anode of the third diode and the source of the fourth MOS tube, and the cathode of the third diode is respectively connected to the drain of the third MOS tube, the second end of the first resistor, and the gate of the fourth MOS tube, the source of the third MOS tube is grounded, and the gate of the third MOS tube is used to connect to the VPULSE port;

[0013] The drain of the fourth MOS tube is respectively connected to the first end of the third capacitor and the input end of the drive output circuit; the second end of the third capacitor is connected to the cathode of the second diode and the high-voltage level shift circuit.

[0014] Preferably, when in charging mode, the third MOS tube is turned on, the power supply charges the second capacitor through the first diode and the third diode, the gate and source of the fourth MOS tube are clamped to complex values ​​by the third diode, and the fourth MOS tube is in a cut-off state.

[0015] Preferably, when in boost mode, the third MOS tube is turned off, the charging loop of the second capacitor is disconnected, and the second capacitor starts to charge the gate of the fourth MOS tube through the first resistor. As the voltage of the gate and source of the fourth MOS tube rises, the fourth MOS tube is turned on, and the second capacitor is floatingly connected to the high-voltage side to control the turn-on delay time of the fourth MOS tube by controlling the size of the first resistor.

[0016] Preferably, when in pump mode, the fourth MOS tube is turned on, the charge of the second capacitor is transferred to the third capacitor, and the third capacitor is used as a high-voltage side power supply for the driver chip.

[0017] Compared with the prior art, the beneficial effect of the present invention is that, by connecting the input end of the bootstrap circuit to the power supply, the output end of the bootstrap circuit is sequentially connected to the high-voltage level shift circuit and the drive output circuit; the input end of the input stage circuit, the input end of the pulse generator and the input end of the low-side delay matching circuit are respectively connected to the power supply; the output end of the input stage circuit is sequentially connected to the pulse generator, the low-side delay matching circuit and the drive output circuit; the pulse generator is also connected to the high-voltage level shift circuit; the first end of the first capacitor of the drive output circuit is connected to the power supply, and the second end of the first capacitor is respectively connected to the source of the first MOS tube and the drain of the second MOS tube; the gate of the first MOS tube is connected to the high-voltage level shift circuit, and the drain of the first MOS tube is connected to the bus voltage; the gate of the second MOS tube is connected to the output end of the low-side delay matching circuit, and the source of the second MOS tube is grounded; by replenishing the bootstrap capacitor when the high-voltage side circuit continues to work. So as to achieve the purpose of long-term operation of the high-voltage side; at the same time, the applicability, reliability and market competitiveness of the HVIC chip can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings:

[0019] Figure 1 This is the circuit diagram of the traditional bootstrap power supply method;

[0020] Figure 2 It is a circuit diagram of a two-stage charge pump bootstrap high-voltage integrated circuit provided by an embodiment of the present invention;

[0021] Figure 3a is a schematic diagram of a charging mode of a two-stage charge pump bootstrap circuit provided by an embodiment of the present invention;

[0022] Figure 3b is a schematic diagram of a boost mode of a two-stage charge pump bootstrap circuit provided by an embodiment of the present invention;

[0023] Figure 3c It is a schematic diagram of a pumping mode of a two-stage charge pump bootstrap circuit provided in an embodiment of the present invention.

[0024] In the figure, 1. bootstrap circuit, 2. input stage circuit, 3. pulse generator, 4. low-side extension matching circuit, 5. high-voltage level shift circuit, 6. drive output circuit. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0026] Combined with Figure 2 As shown, an embodiment of the present invention provides a two-stage charge pump bootstrap high-voltage integrated circuit, comprising: a bootstrap circuit 1, an input stage circuit 2, a pulse generator 3, a low-side delay matching circuit 4, a high-voltage level shift circuit 5 and a drive output circuit 6;

[0027] The input end of the bootstrap circuit 1 is connected to the power supply VCC, and the output end of the bootstrap circuit 1 is connected to the high-voltage level shift circuit 5 and the drive output circuit 6 in sequence;

[0028] The input end of the input stage circuit 2, the input end of the pulse generator 3 and the input end of the low-side delay matching circuit 4 are respectively connected to the power supply VCC; the output end of the input stage circuit 2 is connected to the pulse generator 3, the low-side delay matching circuit 4 and the drive output circuit 6 in sequence; the pulse generator 3 is also connected to the high-voltage level shift circuit 5;

[0029] The drive output circuit 6 includes: a first capacitor C1, a first MOS tube GaN FET1 and a second MOS tube GaN FET2; the first end of the first capacitor C1 is connected to the power supply VCC, and the second end of the first capacitor C1 is respectively connected to the source of the first MOS tube GaN FET1 and the drain of the second MOS tube GaN FET2; the gate of the first MOS tube GaN FET1 is connected to the high-voltage level shift circuit 5, and the drain of the first MOS tube GaN FET1 is connected to the bus voltage; the gate of the second MOS tube GaN FET2 is connected to the output end of the low-side delay matching circuit 4, and the source of the second MOS tube GaN FET2 is grounded.

[0030] In this embodiment, the bootstrap circuit 1 includes: a first diode D1, a second diode D2, a third diode D3, a second capacitor C2, a third capacitor C3, a first resistor R1, a third MOS transistor S1 and a fourth MOS transistor S2; the anode of the first diode D1 is connected to the power supply VCC, the cathode of the first diode D1 is respectively connected to the first end of the second capacitor C2, the first end of the first resistor R1 and the anode of the second diode D2; the second end of the second capacitor C2 is respectively connected to the anode of the third diode D3 and the source of the fourth MOS transistor S2, the cathode of the third diode D3 is respectively connected to the drain of the third MOS transistor S1, the second end of the first resistor R1 and the gate of the fourth MOS transistor S2, the source of the third MOS transistor S1 is grounded, and the gate of the third MOS transistor S1 is used to connect to the VPULSE port; the drain of the fourth MOS transistor S2 is respectively connected to the first end of the third capacitor C3 and the input end of the drive output circuit 6; the second end of the third capacitor C3 is connected to the cathode of the second diode D2 and the high-voltage level shift circuit 5.

[0031] In the specific implementation, the two-stage charge pump bootstrap circuit 1 replenishes the bootstrap capacitor when the high-voltage side circuit continues to work. Thereby achieving the purpose of long-term operation of the high-voltage side. Its basic principle consists of two stages. In the first stage, the charge pump circuit charges the capacitor therein and stores energy on the capacitor; the second stage is to connect the capacitor to the part that needs power supply. Since its basic principle is to use the capacitor to act as a battery, it can also be floating to meet the power supply requirements of the high-voltage side of the driver chip.

[0032] The power supply VCC of HVIC is connected to the anode of the first diode D1, the cathode of the first diode D1, one end of the second capacitor C2, one end of the first resistor R1 and the anode of the second diode D2 are connected, and the cathode of the second diode D2 is connected to one end of the third capacitor C3, which is recorded as VCCA.

[0033] The other end of the second capacitor C2, the anode of the third diode D3 and the S pole of the fourth MOS tube S2 are connected together, and the D pole of the fourth MOS tube is connected to the other end of the third capacitor C3 and connected to VS.

[0034] The cathode of the third diode D3, the other end of the first resistor R1, the B pole of the fourth MOS tube S2 and the D pole of the third MOS tube S1 are connected.

[0035] The S pole of the third MOS tube S1 is connected to GND, and the B pole of the third MOS tube S1 is led out as VPULSE.

[0036] The two-stage charge pump bootstrap circuit 6 is mainly composed of a high-voltage third MOS tube S1, a fourth MOS tube S2, a second capacitor C2, a third capacitor C3, a first resistor R1, a high-voltage first diode D1, a second diode D2 and a common third diode D3; its working process can be divided into the following three modes: charging, boosting and pumping mode, Figure 3a-3c A simplified model showing the charge, boost and pump modes and how each stage works:

[0037] In this embodiment, Figure 3a As shown, when in charging mode, the third MOS transistor S1 is turned on, the power supply charges the second capacitor C2 through the first diode D1 and the third diode D3, the gate and source of the fourth MOS transistor S2 are clamped to a complex value by the third diode D3, and the fourth MOS transistor S2 is in a cut-off state. The third diode D3 can use a Schottky diode to minimize its voltage drop and conduction loss.

[0038] In this embodiment, Figure 3b As shown, when in boost mode, the third MOS tube S1 is turned off, the charging loop of the second capacitor C2 is disconnected, and the second capacitor C2 starts to charge the gate of the fourth MOS tube S2 through the first resistor. As the voltage of the gate and source of the fourth MOS tube S2 rises, the fourth MOS tube S2 is turned on, and the second capacitor C2 is connected to the high-voltage side in a floating manner, so as to control the turn-on delay time of the fourth MOS tube S2 by controlling the size of the first resistor. And when the gate capacitor of the fourth MOS tube S2 is charged, there will be no more current flowing through the first resistor R1, so the loss on the first resistor R1 is extremely small.

[0039] In this embodiment, Figure 3c As shown, when in pumping mode, the fourth MOS tube S2 is turned on, and the charge of the second capacitor C2 is transferred to the third capacitor C3, and the third capacitor C3 is used as the high-voltage side power supply of the driver chip. When the external signal controls the third MOS tube S1 to be turned on, due to the clamping effect of the third diode D3, the gate-source voltage of the fourth MOS tube S2 becomes negative, and the fourth MOS tube S2 is turned off, and then it returns to the charging mode.

[0040] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, article or device. In the absence of more restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, article or device including the element.

[0041] The embodiments of the present invention are described above in conjunction with the accompanying drawings. What is disclosed is only the preferred embodiment of the present invention. However, the present invention is not limited to the above-mentioned specific implementation manner. The above-mentioned specific implementation manner is only illustrative rather than restrictive. Under the enlightenment of the present invention, ordinary technicians in this field can also make many forms and equivalent changes without departing from the scope of protection of the purpose of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A two-stage charge pump bootstrap high voltage integrated circuit, characterized in that: include: A bootstrap circuit, an input stage circuit, a pulse generator, a low-side delay matching circuit, a high-voltage level shift circuit, and a driver output circuit; The input end of the bootstrap circuit is connected to the power supply, and the output end of the bootstrap circuit is connected to the high-voltage level shift circuit and the drive output circuit in sequence; The input end of the input stage circuit, the input end of the pulse generator and the input end of the low-side delay matching circuit are respectively connected to the power supply; the output end of the input stage circuit is connected to the pulse generator, the low-side delay matching circuit and the drive output circuit in sequence; The pulse generator is also connected to the high voltage level shift circuit; The driving output circuit comprises: a first capacitor, a first MOS transistor and a second MOS transistor; The first end of the first capacitor is connected to the power supply, and the second end of the first capacitor is respectively connected to the source of the first MOS tube and the drain of the second MOS tube; the gate of the first MOS tube is connected to the high-voltage level shifting circuit, and the drain of the first MOS tube is connected to the bus voltage; the gate of the second MOS tube is connected to the output end of the low-side delay matching circuit, and the source of the second MOS tube is grounded.

2. The two-stage charge pump bootstrap high voltage integrated circuit as claimed in claim 1, characterized in that: The bootstrap circuit comprises: a first diode, a second diode, a third diode, a second capacitor, a third capacitor, a first resistor, a third MOS transistor and a fourth MOS transistor; The anode of the first diode is connected to the power supply, and the cathode of the first diode is respectively connected to the first end of the second capacitor, the first end of the first resistor, and the anode of the second diode; the second end of the second capacitor is respectively connected to the anode of the third diode and the source of the fourth MOS tube, and the cathode of the third diode is respectively connected to the drain of the third MOS tube, the second end of the first resistor, and the gate of the fourth MOS tube, the source of the third MOS tube is grounded, and the gate of the third MOS tube is used to connect to the VPULSE port; The drain of the fourth MOS tube is respectively connected to the first end of the third capacitor and the input end of the drive output circuit; the second end of the third capacitor is connected to the cathode of the second diode and the high-voltage level shift circuit.

3. The two-stage charge pump bootstrap high voltage integrated circuit as claimed in claim 2, characterized in that: When in charging mode, the third MOS tube is turned on, the power supply charges the second capacitor through the first diode and the third diode, the gate and source of the fourth MOS tube are clamped to a complex value by the third diode, and the fourth MOS tube is in a cut-off state.

4. The two-stage charge pump bootstrap high voltage integrated circuit as claimed in claim 2, characterized in that: When in boost mode, the third MOS tube is turned off, the charging loop of the second capacitor is disconnected, and the second capacitor starts to charge the gate of the fourth MOS tube through the first resistor. As the voltage of the gate and the source of the fourth MOS tube rises, the fourth MOS tube is turned on, and the second capacitor is floatingly connected to the high-voltage side, so as to control the turn-on delay time of the fourth MOS tube by controlling the size of the first resistor.

5. The two-stage charge pump bootstrap high voltage integrated circuit as claimed in claim 2, characterized in that: When in the pumping mode, the fourth MOS tube is turned on, and the charge of the second capacitor is transferred to the third capacitor, and the third capacitor is used as the high-voltage side power supply of the driver chip.

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