Filter chip and preparation method thereof

Abstract

The invention relates to the technical field of semiconductors, in particular to a filter chip and a preparation method thereof.The filter chip comprises a chip body and a glass substrate, the chip body is provided with an electrode, the glass substrate is provided with a groove, and the chip body is attached to the glass substrate so that the electrode can be contained in the groove. According to the filter chip, effective sealing can be ensured, the problem that the electrodes are prone to being polluted is solved, and then stable transmission of signals is ensured.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a filter chip and a preparation method thereof. Background Art

[0002] Surface acoustic wave (SAW) filter is a common electronic component that plays an important role in wireless communication, radio frequency identification, sensing, etc. The packaging of SAW filter will directly affect the performance and reliability of the filter.

[0003] The SAW chip packaging method provided by the related technology includes multi-layer packaging. This packaging method has a poor sealing effect, which easily causes the chip electrodes to be contaminated and is not conducive to stable signal transmission. Summary of the invention

[0004] The purpose of the present invention includes providing a filter chip and a preparation method thereof, wherein the filter chip can ensure effective sealing, improve the problem that electrodes are easily contaminated, and thus ensure stable signal transmission.

[0005] The embodiments of the present invention can be implemented as follows:

[0006] In a first aspect, the present invention provides a filter chip, comprising:

[0007] A chip body, wherein the chip body has electrodes;

[0008] The glass substrate has a groove, and the chip body is attached to the glass substrate so that the electrode is accommodated in the groove.

[0009] In an optional embodiment, a buffer layer is disposed between the chip body and the glass substrate, and the buffer layer is located on both sides of the groove.

[0010] In an optional embodiment, the chip body has a step, and the buffer layer is disposed between the step and the glass substrate.

[0011] In an optional embodiment, the chip body includes a substrate, a dielectric layer formed on the substrate, and a piezoelectric layer formed on the dielectric layer, the electrode is formed on the piezoelectric layer, and a step is provided on the piezoelectric layer so that the dielectric layer is exposed from the step.

[0012] In an optional embodiment, the dielectric layer is a SiO2 layer.

[0013] In an optional embodiment, the glass substrate has a through hole, a metal conductive part is disposed in the through hole, one end of the metal conductive part is electrically connected to the chip body, and the other end is exposed from the through hole.

[0014] In an optional embodiment, the other end of the metal conductive part is connected to a second metal trace, and the second metal trace is welded with a solder ball; the chip body also includes a first metal trace electrically connected to the electrode; the first metal trace is electrically connected to the solder ball through the metal conductive part and the second metal trace.

[0015] In an alternative embodiment, the through hole is located outside the groove.

[0016] In a second aspect, the present invention provides a method for preparing a filter chip, comprising:

[0017] The chip body with electrodes is flipped onto a glass substrate with grooves so that the electrodes are encapsulated in the grooves.

[0018] In an optional embodiment, glue is filled between the chip body and the glass substrate to form a buffer layer on both sides of the groove; or,

[0019] Steps are arranged on the chip body so that the steps are located on both sides of the groove, and glue is filled in the steps to form a buffer layer between the glass substrate and the steps.

[0020] The beneficial effects of the filter chip of the embodiment of the present invention include: the chip body of the filter chip provided by the embodiment of the present invention is flipped on the glass substrate, wherein the electrode is encapsulated in the groove of the glass substrate, which can effectively seal the electrode, improve the problem of easy contamination of the electrode, and thus ensure stable transmission of the signal.

[0021] The beneficial effects of the method for preparing the filter chip of the embodiment of the present invention include: the method can effectively seal the electrode, improve the problem that the electrode is easily contaminated, and thus ensure the stable transmission of the signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0023] Figure 1 A schematic diagram of the structure of a filter chip in an embodiment of the present invention;

[0024] Figure 2 This is a flow chart of flip-mounting a filter chip on a metallized glass substrate in an embodiment of the present invention;

[0025] Figure 3 It is a schematic diagram of the structure of a glass substrate in other embodiments of the present invention;

[0026] Figure 4 is a flow chart of preparing a filter chip in an embodiment of the present invention;

[0027] Figure 5 FIG. 4 is a flow chart of preparing a metallized glass substrate in an embodiment of the present invention.

[0028] Icon: 010-filter chip; 100-chip body; 110-substrate; 120-dielectric layer; 130-piezoelectric layer; 131-electrode; 132-first metal routing; 133-step; 200-metallized glass substrate; 210-glass substrate; 211-groove; 212-through hole; 220-metal conductive part; 221-seed layer; 222-metal filling part; 230-second metal routing; 240-solder ball; 300-buffer layer. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0030] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0031] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0032] In the description of the present invention, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. appear, the orientation or position relationship indicated is based on the orientation or position relationship shown in the drawings, or is the orientation or position relationship in which the product of the invention is usually placed when used. It is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0033] In addition, the terms “first”, “second”, etc., if used, are merely used to distinguish between the descriptions and should not be understood as indicating or implying relative importance.

[0034] It should be noted that, in the absence of conflict, the features in the embodiments of the present invention may be combined with each other.

[0035] The SAW chip packaging method provided by the related technology includes multi-layer packaging. This packaging method has poor bonding strength and is prone to peeling and failure between packaging layers. Moreover, the multi-layer packaging method of the related technology is easily affected by external pressure and temperature, causing deformation between the chip and the packaging substrate, and is also prone to peeling and falling off between film layers, reducing the reliability of the product.

[0036] Please refer to Figure 1 This embodiment provides a filter chip 010 and a preparation method thereof, which can improve the firmness of the package bonding, so as to effectively improve the problem of peeling and failure caused by insufficient bonding between the packaging layers; moreover, when the external pressure and temperature change, the influence of stress on the filter chip 010 can be reduced, that is, the deformation of the filter chip 010 can be reduced, the generation of cracks can be reduced, and the problem of peeling and separation between the film layers can be reduced, thereby improving the reliability of the product. The filter chip 010 and the preparation method thereof will be described in detail below in conjunction with the accompanying drawings.

[0037] Please refer to Figure 1 and Figure 2 This embodiment provides a filter chip 010, which includes a chip body 100 and a glass substrate 210. The chip body 100 has an electrode 131, and the glass substrate 210 is provided with a groove 211. The chip body 100 is flipped on the glass substrate 210 so that the electrode 131 is encapsulated in the groove 211, that is, the chip body 100 and the glass substrate 210 are attached to each other so that the electrode 131 is accommodated in the groove 211. In this way, the electrode 131 can be effectively sealed, and the problem that the electrode 131 is easily contaminated can be improved, thereby ensuring stable transmission of signals.

[0038] Furthermore, a buffer layer 300 is provided between the chip body 100 and the glass substrate 210, and the buffer layer 300 is located on both sides of the groove 211. The provision of the buffer layer 300 can improve the sealing effect between the chip body 100 and the glass substrate 210 on the one hand, and can improve the problem of peeling and failure caused by insufficient bonding force between the chip body 100 and the glass substrate 210 on the other hand, and realize the airtightness of MLS (moisture sensitivity), and can also buffer the influence of external pressure and temperature changes on the filter chip 010, so as to reduce the deformation and cracks generated by the filter chip 010, thereby reducing the problem of peeling and separation between film layers, and improving the reliability of the product.

[0039] Optionally, the chip body 100 has a step 133, and the buffer layer 300 is disposed between the step 133 and the glass substrate 210. It should be understood that in other embodiments, the chip body 100 may not have a step 133, and the buffer layer 300 may be directly disposed between the glass substrate 210 and the chip body 100.

[0040] Exemplarily, the glass substrate 210 of the present embodiment is provided with a metal conductive part 220, that is, the substrate of the filter chip 010 of the present embodiment is a metallized glass substrate 200, and the chip body 100 is flipped on the metallized glass substrate 200; wherein the chip body 100 includes a substrate 110, a dielectric layer 120 formed on the substrate 110, and a piezoelectric layer 130 formed on the dielectric layer 120, and an electrode 131 is formed on the piezoelectric layer 130; the piezoelectric layer 130 is provided with a step 133, and the dielectric layer 120 is exposed from the step 133; the step 133 is filled with glue to form a buffer layer 300 between the glass substrate 210 and the dielectric layer 120. Of course, the chip body 100 may also include other structures in the related art, which will not be repeated here.

[0041] The electrode 131 is encapsulated in the groove 211 of the glass substrate 210, which can protect the circuit structure of the chip body 100 to facilitate stable signal transmission; glue is filled in the step 133 to form a buffer layer 300 between the glass substrate 210 and the dielectric layer 120 of the chip body 100. On the one hand, the filled glue can be used to reliably and stably combine the dielectric layer 120, the piezoelectric layer 130 and the glass substrate 210, thereby effectively improving the problem of peeling and failure caused by insufficient bonding force between the packaging layers, and achieving MLS (moisture sensitivity) airtightness; on the other hand, the glue filled in the step 133 forms a buffer layer 300, which can buffer the impact of external pressure and temperature changes on the filter chip 010, so as to reduce the deformation and cracks of the filter chip 010, thereby reducing the problem of peeling and detachment between the film layers, and improving the reliability of the product.

[0042] Furthermore, the depth of the step 133 is equal to the thickness of the piezoelectric layer 130 , so that the dielectric layer 120 can be exposed without damaging the dielectric layer 120 .

[0043] In order to further reduce the impact of external pressure changes and temperature changes (thermal expansion and contraction) on the filter chip 010, that is, to further reduce the impact of stress on the filter chip 010, the dielectric layer 120 can use raw materials with an expansion coefficient close to that of the glass substrate 210, for example: the dielectric layer 120 can be a glass-like layer.

[0044] Optionally, the dielectric layer 120 is a SiO2 layer. In an implementation of using a SiO2 layer having an expansion coefficient close to that of the glass substrate 210 as the dielectric layer 120, the stress integrity on both sides of the buffer layer 300 can also be ensured, thereby effectively reducing the stress effects of external pressure and temperature changes on the filter chip 010, that is, the deformation and cracks of the filter chip 010 caused by stress can be reduced, thereby reducing the problem of peeling and detachment between film layers, thereby improving the reliability of the product.

[0045] The metallized glass substrate 200 of this embodiment includes a glass substrate 210, a through hole 212 formed in the glass substrate 210, a metal conductive part 220 filled in the through hole 212, and a second metal trace 230 electrically connected to the metal conductive part 220, the second metal trace 230 is welded with a solder ball 240, a groove 211 is provided in the glass substrate 210, and the through hole 212 is located outside the groove 211, that is, the through hole 212 is formed in a portion of the glass substrate 210 where the groove 211 is not provided. The metallized glass substrate 200 can be prepared by TGV technology (Through Glass Via Technology) to ensure the integrity of the glass substrate 210 packaging, and is conducive to saving costs and improving production efficiency.

[0046] Furthermore, the chip body 100 also includes a first metal trace 132 electrically connected to the electrode 131, and the first metal trace 132 is electrically connected to the solder ball 240 through the metal conductive part 220 and the second metal trace 230; wherein, the first metal trace 132 and the second metal trace 230 are respectively located at two ends of the axial direction of the through hole 212, so that the solder ball 240 and the chip body 100 are distributed on both sides of the glass substrate 210.

[0047] Of course, in other embodiments, the substrate of the filter chip 010 may be a non-metallized glass substrate, which is not provided with the through hole 212 and the corresponding metal conductive part 220 , and the solder ball 240 may be electrically connected to the first metal trace 132 through a conductive wire.

[0048] Optionally, the metal conductive part 220 includes a seed layer 221 formed on the hole wall of the through hole 212, and a metal filling part 222 filled inside the seed layer 221, that is, after the seed layer 221 is formed on the hole wall of the through hole 212, the side of the seed layer 221 away from the hole wall forms a new hole, and the hole is filled with the metal filling part 222. Forming the seed layer 221 on the hole wall of the through hole 212 first is conducive to the subsequent stable and reliable formation of the metal filling part 222, reducing the defects and unevenness of the electroplated or deposited metal filling part 222, thereby ensuring that the filter chip 010 can be produced smoothly, efficiently and stably.

[0049] Further, the seed layer 221 includes a Ti layer and a Cu layer formed in sequence, the thickness of the Ti layer is 90 to 110 nm (for example: 90 nm, 95 nm, 100 nm, 105 nm, 110 nm, etc., not specifically limited here), and the thickness of the Cu layer is 1 to 1.7 μm (for example: 1 μm, 1.2 μm, 1.5 μm, 1,6 μm, etc., not specifically limited here); the metal filled in the metal filling part 222 is Cu. The Ti layer can improve the adhesion of the subsequent deposited Cu layer and can prevent copper atoms from diffusing into the substrate material to improve the problem of deterioration of the conductive effect caused by the diffusion of copper atoms. The setting of the Cu layer can provide a good conductive foundation for the subsequent electroplating or deposition of the metal filling part 222.

[0050] Optionally, the aperture of the through hole 212 gradually decreases along its axial direction and then gradually increases, that is, the through hole 212 forms a shape with large apertures at both ends and small apertures in the middle along its axial direction. In this way, when the through hole 212 is formed on the glass substrate 210, the speed of forming the through hole 212 can be increased. For example, etching can be used to etch from both sides of the glass substrate 210 at the same time. It is sufficient to etch through to form the through hole 212 without ensuring that the aperture etched in the middle of the glass substrate 210 is the same as the aperture etched on the surface of the glass substrate 210. In this way, the formation efficiency of the through hole 212 can be improved.

[0051] Of course, please refer to Figure 3 In other embodiments, the diameter of the through hole 212 may also be of equal diameter along its axial direction.

[0052] Optionally, the thickness of the glass substrate 210 is 200-300 μm, for example, 200 μm, 220 μm, 250 μm, 270 μm, or 300 μm, which is not specifically limited herein.

[0053] Optionally, the depth of the groove 211 is 40-60 μm, for example, 40 μm, 45 μm, 50 μm, 55 μm, 60 μm, etc., which is not specifically limited here.

[0054] Optionally, the area of ​​the groove 211 is (750-850)×(550-650) μm 2 , for example: 800×600μm 2 , 750×650μm 2 、850×550μm 2 Etc., no specific limitation is given here.

[0055] Optionally, the thickness of the dielectric layer 120 is 0.4-0.6 μm, for example, 0.4 μm, 0.5 μm, or 0.6 μm, which is not specifically limited herein.

[0056] Optionally, the thickness of the piezoelectric layer 130 is 0.5-0.7 μm, for example, 0.5 μm, 0.6 μm, or 0.7 μm, which is not specifically limited herein.

[0057] Optionally, the piezoelectric layer 130 may be made of at least one of a LNOI (lithium niobate) film layer and a LTOI (lithium tantalate) film layer having excellent photoelectric properties.

[0058] Optionally, the substrate 110 may be a silicon substrate, and the thickness of the substrate 110 is 240-350 μm, for example, 240 μm, 250 μm, 270 μm, 300 μm, 350 μm, etc., which is not specifically limited here.

[0059] Please refer to Figure 2 This embodiment also provides a method for preparing a filter chip 010, including: flipping a chip body 100 having an electrode onto a glass substrate having a groove 211, so that the electrode 131 is encapsulated in the groove 211. The preparation method can effectively seal the electrode 131, improve the problem that the electrode 131 is easily contaminated, and thus ensure stable signal transmission.

[0060] Furthermore, glue is filled between the chip body 100 and the glass substrate 210 to form a buffer layer 300 on both sides of the groove 211; or, a step 133 is provided on the chip body 100 so that the step 133 is located on both sides of the groove 211, and glue is filled in the step 133 to form a buffer layer 300 between the glass substrate 210 and the step 133. The provision of the buffer layer 300 can improve the sealing effect between the chip body 100 and the glass substrate 210 on the one hand, and can improve the problem of peeling and failure caused by insufficient bonding between the chip body 100 and the glass substrate 210 on the other hand, and achieve MLS (moisture sensitivity) airtightness, and can also buffer the impact of external pressure and temperature changes on the filter chip 010, so as to reduce the deformation and cracks of the filter chip 010, thereby reducing the problem of peeling and separation between film layers, and improving the reliability of the product.

[0061] Exemplarily, the method for preparing the filter chip 010 of this embodiment includes:

[0062] The chip body 100 having the step 133 is flipped onto the metallized glass substrate 200 having the groove 211, so that the electrode 131 of the chip body 100 is encapsulated in the groove 211; wherein the dielectric layer 120 of the chip body 100 is exposed from the step 133;

[0063] Glue is filled in the step 133 to form a buffer layer 300 between the metallized glass substrate 200 and the dielectric layer 120 .

[0064] The preparation method can prepare a filter chip 010 in which the electrode 131 is packaged in the groove 211, and can use the cavity structure between the groove 211 and the piezoelectric layer 130 to protect the circuit structure of the chip body 100, ensuring that the electrode 131 is not contaminated, so as to facilitate stable transmission of signals; glue is filled in the step 133 to form a buffer layer 300 between the metallized glass substrate 200 and the dielectric layer 120 of the chip body 100. On the one hand, the filled glue can be used to reliably and stably combine the dielectric layer 120, the piezoelectric layer 130 and the metallized glass substrate 200, thereby effectively improving the problem of peeling and failure caused by insufficient bonding force between the packaging layers, and improving the airtightness of the filter chip 010; on the other hand, the glue filled in the step 133 forms the buffer layer 300, which can buffer the influence of external pressure and temperature changes on the filter chip 010, so as to reduce the deformation and cracks generated in the filter chip 010, thereby reducing the problem of peeling and separation between the film layers, and improving the reliability of the product.

[0065] The preparation method of this embodiment will be described in detail below.

[0066] Please refer to Figure 4 The preparation method of the chip body 100 of this embodiment includes: forming a dielectric layer 120 and a piezoelectric layer 130 in sequence on a substrate 110, and forming an electrode 131 and a first metal trace 132 electrically connected to the electrode 131 on the piezoelectric layer 130; and grooves are formed on the piezoelectric layer 130 to form a step 133, and the dielectric layer 120 is exposed.

[0067] Among them, the method of forming the dielectric layer 120, the piezoelectric layer 130, the electrode 131 and the first metal wiring 132 is similar to the related art, for example: the method of forming the dielectric layer 120 on the substrate 110, and the method of forming the piezoelectric layer 130 on the dielectric layer 120 both include but are not limited to electroplating and deposition; the electrode 131 for energy transmission and conversion is formed on the piezoelectric layer 130 by means of glue coating, exposure, development, and etching, and the metal wiring RDL (that is, the first metal wiring 132, that is, the wire used to connect the electronic components in the chip) is formed on the surface of the piezoelectric layer 130 by means of metal layer deposition, glue coating, exposure, and development, and the first metal wiring 132 is distributed on both sides of the electrode 131.

[0068] The step 133 is formed on the side of the first metal trace 132 on the piezoelectric layer 130 away from the electrode 131 , and the method of forming a groove on the piezoelectric layer 130 includes but is not limited to dry etching and wet etching. The specific process and related technologies are similar and will not be described in detail here.

[0069] Please refer to Figure 5The preparation method of the metallized glass substrate 200 of the present embodiment includes: trenching a groove 211 on a glass substrate 210; etching a through hole 212 on the glass substrate 210 having the groove 211, specifically, the through hole 212 is formed at a position on the glass substrate 210 where the groove is not trenched; depositing a seed layer 221 on the inner wall of the through hole 212, and electroplating a metal filling portion 222 on the inner side of the seed layer 221.

[0070] The through hole 212 may be formed by using TGV technology, that is, forming the through hole 212 on the glass substrate 210 by using laser induction and wet etching methods; the specific process of the TGV technology is similar to related technologies and will not be described in detail here.

[0071] The method for forming the seed layer 221 includes first forming a Ti layer and a Cu layer on the hole wall of the through hole 212 by sputtering, and then filling the through hole 212 with metal Cu by electroplating to obtain a metallization structure.

[0072] Furthermore, after obtaining the metallization structure, a metal trace RDL (i.e., a second metal trace 230, i.e., a wire used to connect electronic components in the chip) can be formed on the surface of the glass substrate 210 by metal layer deposition, gluing, exposure, and development, and a gold ball or a solder ball can be welded to the surface of the second metal trace 230 by welding.

[0073] Please refer to Figure 2 , the chip body 100 is flipped onto the metallized glass substrate 200, and the electrode 131 is embedded in the groove 211, so that the circuit structure of the chip body 100 can be encapsulated in the space between the piezoelectric layer 130 and the glass substrate 210 to protect the circuit structure and ensure stable signal transmission; the first metal trace 132 is connected to the metal in the through hole 212 of the glass substrate 210, so that the first metal trace 132 can be connected to the solder ball 240; the step 133 is filled with glue to form a buffer layer 300 bonded to the glass substrate 210, the dielectric layer 120 and the piezoelectric layer 130.

[0074] Among them, the first metal trace 132 is directly connected to the metal in the through hole 212 of the glass substrate 210, which improves the sealing of the package and is beneficial to ensuring the integrity of the glass package. The glass package is relatively low in price and can also be insulated. Its low dielectric loss property does not require the additional setting of other dielectric transitions, which is beneficial to improving production efficiency and reducing costs.

[0075] In summary, the preparation method of the present invention digs a groove in the piezoelectric layer 130 to form a step 133 to expose the dielectric layer 120, and flips the chip body 100 on the metallized glass substrate 200, and then fills the step 133 with glue to form a buffer layer 300 bonded to the glass substrate 210, the dielectric layer 120 and the piezoelectric layer 130, so that the chip body 100 and the metallized glass substrate 200 can be packaged together, achieving the airtightness of MLS (moisture sensitivity), and at the same time improving the firmness of the seal, so as to improve the problem of peeling and failure caused by insufficient bonding between the packaging layers; moreover, the buffer layer 300 can buffer the external pressure , the impact of temperature changes on the filter chip 010, so as to reduce the deformation and cracks of the filter chip 010, thereby reducing the problem of peeling and detaching between the film layers, and improving the reliability of the product; in particular, when using a SiO2 layer with an expansion coefficient close to that of the glass substrate 210 as the dielectric layer 120, the stress integrity on both sides of the buffer layer 300 can be guaranteed, and the stress influence of the external pressure and temperature changes (thermal expansion and contraction) on the filter chip 010 is effectively reduced, that is, the deformation and cracks of the filter chip 010 caused by stress can be reduced, thereby reducing the problem of peeling and detaching between the film layers, and improving the reliability of the product.

[0076] The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by any technician familiar with the technical field within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention.

Claims

1. A filter chip, characterized in that: include: A chip body (100), wherein the chip body (100) has an electrode (131); A glass substrate (210) having a groove (211); the chip body (100) is bonded to the glass substrate (210) so that the electrode (131) is accommodated in the groove (211).

2. The filter chip according to claim 1, characterized in that: A buffer layer (300) is provided between the chip body (100) and the glass substrate (210), and the buffer layer (300) is located on both sides of the groove (211).

3. The filter chip according to claim 2, characterized in that: The chip body (100) has a step (133), and the buffer layer (300) is arranged between the step (133) and the glass substrate (210).

4. The filter chip according to claim 3, characterized in that: The chip body (100) includes a substrate (110), a dielectric layer (120) formed on the substrate (110), and a piezoelectric layer (130) formed on the dielectric layer (120); the electrode (131) is formed on the piezoelectric layer (130), and the step (133) is arranged on the piezoelectric layer (130) so that the dielectric layer (120) is exposed from the step (133).

5. The filter chip according to claim 4, characterized in that: The dielectric layer (120) is a SiO2 layer.

6. The filter chip according to claim 1, characterized in that: The glass substrate (210) has a through hole (212), a metal conductive part (220) is arranged in the through hole (212), one end of the metal conductive part (220) is electrically connected to the chip body (100), and the other end is exposed in the through hole (212).

7. The filter chip according to claim 6, characterized in that: The other end of the metal conductive part (220) is connected to a second metal trace (230), and the second metal trace (230) is welded with a solder ball (240); the chip body (100) further comprises a first metal trace (132) electrically connected to the electrode (131); the first metal trace (132) is electrically connected to the solder ball (240) via the metal conductive part (220) and the second metal trace (230).

8. The filter chip according to claim 6, characterized in that: The through hole (212) is located outside the groove (211).

9. A method for preparing a filter chip, characterized in that: include: A chip body (100) having an electrode (131) is flipped onto a glass substrate (210) having a groove (211), so that the electrode (131) is encapsulated in the groove (211).

10. The method for preparing the filter chip according to claim 9, characterized in that: Filling glue between the chip body (100) and the glass substrate (210) to form a buffer layer (300) on both sides of the groove (211); or, A step (133) is provided on the chip body (100) so that the step (133) is located on both sides of the groove (211), and glue is filled in the step (133) to form a buffer layer (300) between the glass substrate (210) and the step (133).

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