Low-power-consumption standby control system based on logic device

Abstract

The invention discloses a low-power-consumption standby control system based on a logic device. The low-power-consumption standby control system comprises a data receiving and transmitting driving unit, a logic control unit, a triggering unit and a self-holding control unit. The logic control unit adopts a NOT gate and OR gate combination to perform accurate logic processing on the output level of the data transceiving driving unit to form a control level; and the trigger unit latches a control level by using a D trigger, so that quick response can be ensured when an effective wake-up signal is received. A digital isolator is arranged between the data transceiving driving unit and the logic control unit, so that electrical interference is effectively prevented; meanwhile, a stable filtering assembly in the self-holding control unit carries out isolation amplification and noise reduction processing on the trigger signal, and the stability of the system is further improved. Intelligent power management is realized, and when the system does not need to work, power supply is cut off, so that the power consumption of the system is further reduced, and the service life of equipment is prolonged.

Description

Technical Field

[0001] The present invention relates to the technical field of system standby control, and in particular to a low-power standby control system based on logic devices. Background Art

[0002] In order to improve the energy efficiency of devices and extend their service life, low-power standby technology has become increasingly important. In standby mode, the device should consume as little power as possible while maintaining the ability to wake up quickly so that the user can use it at any time. Existing research focuses on developing new power management technologies to reduce standby power consumption. On the other hand, research is dedicated to improving the wake-up speed of the system by optimizing hardware and software design. Some research also focuses on improving the stability and reliability of the system by using higher quality components and more advanced circuit design.

[0003] Although there have been some progress, there are still challenges in existing technologies. For example, some low-power designs sacrifice wake-up speed, while some fast wake-up designs cannot achieve true low power consumption. In addition, many systems do not fully consider anti-interference capabilities when designing. In a complex electromagnetic environment, the system is susceptible to external interference, resulting in unstable standby state, and even false wake-up or failure to wake up, which not only affects the normal use of the device, but may also cause damage to the device.

[0004] In view of the above situation, the present invention aims to provide a new solution to solve this problem. Summary of the invention

[0005] In view of the above situation, in order to overcome the defects of the prior art, the purpose of the present invention is to provide a low-power standby control system based on logic devices.

[0006] The technical solution is: a low-power standby control system based on logic devices, including:

[0007] A data transceiver driving unit, used to receive a wake-up signal from an external device, which outputs a low level in the wake-up state and a high level in the idle state;

[0008] A logic control unit, used for inverting the output level of the data transmission driving unit through a NOT gate, and then performing logic processing on the output of the NOT gate through an OR gate to form a control level;

[0009] A trigger unit, used for latching the control level output by the logic control unit;

[0010] The self-holding control unit is used to form self-holding when the control level output by the trigger unit is a high level, and drive the system to be continuously powered on.

[0011] Preferably, the self-holding control unit comprises:

[0012] A stable filter component, used for isolating, amplifying and noise reducing the level signal output by the trigger unit in sequence;

[0013] The drive component is used to control the on / off state of the main power supply circuit of the system.

[0014] Preferably, the stabilizing filter component includes a first diode, a second diode, a voltage follower and an LC filter, the anode of the first diode is connected to the level signal output terminal of the trigger unit, the cathode of the first diode is connected to the in-phase input terminal of the voltage follower, the output terminal of the voltage follower is connected to the cathode of the second diode and the input terminal of the LC filter, the anode of the second diode is grounded, and the output terminal of the LC filter is connected to the driving component.

[0015] Preferably, the driving component includes a first transistor, a second transistor and a first relay, the base of the first transistor is connected to the output end of the LC filter, and is connected to the first normally open contact of the first relay through a first resistor, and the first common contact of the first relay is connected to a +3.3V power supply; the second normally open contact and the second common contact of the first relay are arranged in the main power supply circuit of the system; the collector of the first transistor is connected to the +3.3V power supply, the emitter of the first transistor is connected to the base of the second transistor through a second resistor, the emitter of the second transistor is grounded through a third resistor, the collector of the second transistor is connected to one end of the first relay coil through a fourth resistor, and the other end of the first relay coil is connected to a +28V power supply through a fifth resistor.

[0016] Preferably, a second relay is further provided between the first relay and the +28V power supply, the first common contact of the second relay is connected to the other end of the first relay coil, and the first normally closed contact of the second relay is connected to the +28V power supply.

[0017] Preferably, the data transceiver driving unit uses two AiP74LVC16T245TA.TB conversion transceivers both produced by China Micro Aixin.

[0018] Preferably, a digital isolator is further provided between the data transceiver driving unit and the logic control unit.

[0019] Preferably, the digital isolator is a NSI8140N0 four-channel digital isolator produced by Nanochip Microelectronics, and each conversion transceiver is equipped with two digital isolators.

[0020] Preferably, the NOT gate uses two 74AHC14XS14G / TR type hexa-inverters both produced by Shengbang Micro.

[0021] Preferably, the trigger unit is a 74LVC74 type D flip-flop.

[0022] Through the above technical scheme, the beneficial effects of the present invention are as follows: the low-power standby control system based on logic devices proposed in this application realizes the perfect combination of low-power standby and fast wake-up by designing a logic control unit and a trigger unit. The logic control unit uses a combination of a NOT gate and an OR gate to perform precise logic processing on the output level of the data transceiver drive unit to form a control level; the trigger unit uses a D flip-flop to latch the control level to ensure that it can respond quickly when receiving a valid wake-up signal. A digital isolator is set between the data transceiver drive unit and the logic control unit to effectively prevent electrical interference; at the same time, the stable filter component in the self-holding control unit isolates, amplifies and reduces noise for the trigger signal, further improving the stability of the system. A power management strategy including relays KA1 and KA2 is designed in the self-holding control unit. KA1 is used for system wake-up and power-on, while KA2 is used for system power-off and sleep, realizing the intelligentization of power management. When the system does not need to work, the power supply is cut off, further reducing the system power consumption and extending the service life of the equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 The structure diagram of the low power consumption standby control system based on logic devices of the present invention is shown in FIG.

[0024] Figure 2 FIG. 4 is a wiring diagram of the peripheral circuit of the conversion transceiver U1 in the present invention.

[0025] Figure 3 FIG. 4 is a wiring diagram of the peripheral circuit of the conversion transceiver U2 in the present invention.

[0026] Figure 4 FIG. 4 is a peripheral circuit wiring diagram of the digital isolators U3 and U4 in the present invention.

[0027] Figure 5 This is a peripheral circuit wiring diagram of the digital isolators U5 and U6 in the present invention.

[0028] Figure 6 FIG. 4 is a peripheral circuit wiring diagram of the six inverters U7 and U8 in the present invention.

[0029] Figure 7 This is a peripheral circuit wiring diagram of the OR gate logic devices U9 and U10 in the present invention.

[0030] Figure 8 FIG. 4 is a peripheral circuit wiring diagram of the D flip-flop U11 in the present invention.

[0031] Fig. 9 It is a circuit schematic diagram of the stable filtering component in the present invention.

[0032] Fig.10 FIG. 4 is a circuit diagram of a driving component in one embodiment of the present invention.

[0033] Fig.11 FIG. 4 is a circuit diagram of a driving component in another embodiment of the present invention. DETAILED DESCRIPTION

[0034] The above and other technical contents, features and effects of the present invention are described in detail below with reference to the attached Figure 1 To Attachment Fig.11 The detailed description of the embodiments will clearly show that the structural contents mentioned in the following embodiments are all based on the drawings in the specification.

[0035] Exemplary embodiments of the present invention will be described below with reference to the accompanying drawings.

[0036] like Figure 1 As shown, a low power standby control system based on a logic device includes:

[0037] A data transceiver driving unit, used to receive a wake-up signal from an external device, which outputs a low level in the wake-up state and a high level in the idle state;

[0038] A logic control unit, used for inverting the output level of the data transmission driving unit through a NOT gate, and then performing logic processing on the output of the NOT gate through an OR gate to form a control level;

[0039] A trigger unit, used for latching the control level output by the logic control unit;

[0040] The self-holding control unit is used to form self-holding when the control level output by the trigger unit is a high level, and drive the system to continuously power on.

[0041] In a specific embodiment, in order to improve the reliability of system control, the data transceiver driving unit uses two AiP74LVC16T245TA.TB conversion transceivers produced by China Microelectronics. The conversion transceiver is manufactured using advanced CMOS technology, has low static current and high noise suppression capabilities, can effectively reduce system power consumption and improve data transmission reliability. In addition, it also supports direction control function, and can select the data transmission direction as needed, thereby improving the flexibility and adaptability of the system. Figure 2 and 3As shown, the conversion transceiver U1 is configured to receive a wake-up signal from an external device, that is, to wake up through its external multi-channel serial port TX signal, including JC1_TX, JC2_TX, YC1_TX1, YC1_TX2, YC2_TX1, YC2_TX2, and DM1_TX1. The conversion transceiver U2 is configured to send system operation data to an external device. In this embodiment, U2 is also responsible for converting the standby signal inside the system into a format recognizable by the external device, ensuring that when the system enters a low-power mode, the external device can accurately receive the indication of the standby state. At the same time, when sending system operation data, U2 also has a data caching function, which allows the system to continue to store data when encountering a short interruption during data transmission, avoiding data loss and ensuring the continuity and integrity of data transmission. In addition, both conversion transceivers support hot-swap function, and external devices can be connected or disconnected without turning off the power during system operation, which greatly facilitates system maintenance and upgrades.

[0042] In the above specific implementation process, a digital isolator is also provided between the data transceiver drive unit and the logic control unit. The main function of the digital isolator is to provide electrical isolation, ensure the safe and reliable signal transmission between the data transceiver drive unit and the logic control unit, and prevent electrical interference. Specifically, Figure 4 and 5 As shown in the figure, the digital isolator uses the NSI8140N0 four-channel digital isolator produced by Nanochip Microelectronics, and each conversion transceiver is equipped with two digital isolators. The NSI8140N0 digital isolator has high-speed data transmission capability, supports a transmission rate of up to 150Mbps, and has low power consumption characteristics, ensuring that the system can maintain efficient and stable working conditions in various complex environments.

[0043] During the system wake-up process, since the wake-up signal is at a high level when idle, a logic control unit is required to invert the output level of the conversion transceiver U1. Figure 6 and 7 As shown, the NOT gate uses two 74AHC14XS14G / TR six-inverter U7 and U8, both produced by Shengbang Micro, to flip the output level of the conversion transceiver U1 to ensure that wake-up is not triggered in the idle state. The OR gate is composed of two 74HC series AiP74HC32SA.TR logic devices U9 and U10 produced by Sinomicro, which are connected in series to perform a logical "OR" operation on the output signals of U7 and U8 to achieve the correct generation of the control level.

[0044] The trigger unit is composed of an AiP74LVC74 type D flip-flop U11, such as Figure 8As shown, it can accurately latch the control level to ensure the stability and reliability of the system. After receiving the control level, the D flip-flop will decide whether to change its output based on its current state and the input control level. If the control level meets the triggering condition of the D flip-flop, that is, the input CP terminal changes from a low level to a high level, the Q terminal of the D flip-flop latches a high level.

[0045] In a specific embodiment, the self-holding control unit includes:

[0046] Stable filter components are used to isolate, amplify and reduce noise of the level signal output by the trigger unit in turn to ensure the stability and reliability of the trigger signal;

[0047] Drive component, used to control the on / off status of the system's main power supply circuit.

[0048] like Fig. 9 As shown, the stabilizing filter component includes a first diode D2, a second diode D3, a voltage follower AR1 and an LC filter, the anode of the first diode D2 is connected to the level signal output end of the trigger unit, the cathode of the first diode D2 is connected to the in-phase input end of the voltage follower AR1, the output end of the voltage follower AR1 is connected to the cathode of the second diode D3 and the input end of the LC filter, the anode of the second diode D3 is grounded, and the output end of the LC filter is connected to the driving component.

[0049] like Fig.10 As shown, the driving component includes a first transistor Q1, a second transistor Q2 and a first relay KA1, the base of the first transistor Q1 is connected to the output end of the LC filter, and is connected to the first normally open contact of the first relay KA1 through a first resistor R50, and the first common contact of the first relay KA1 is connected to a +3.3V power supply; the second normally open contact and the second common contact of the first relay KA1 are arranged in a main power supply circuit of the system; the collector of the first transistor Q1 is connected to the +3.3V power supply, the emitter of the first transistor Q1 is connected to the base of the second transistor Q2 through a second resistor R53, the emitter of the second transistor Q2 is grounded through a third resistor R55, the collector of the second transistor Q2 is connected to one end of the coil of the first relay KA1 through a fourth resistor R51, and the other end of the coil of the first relay KA1 is connected to a +28V power supply through a fifth resistor R49.

[0050] In the specific working process of the self-holding control unit, the voltage follower AR1 used in the stable filter component has the characteristics of high input impedance and low output impedance, which can realize the isolation and amplification of the level signal output by the trigger unit and reduce the loss of the signal during transmission. The LC filter is composed of inductor L1 and capacitor C59, which can filter out high-frequency noise and interference signals, ensuring that the trigger signal is not interfered by the outside world during transmission, thereby accurately controlling the operation of the drive component.

[0051] In the wake-up state, the high-level signal output by the trigger unit reaches the drive component after being processed by the stable filter component. At this time, the bases of the transistors Q1 and Q2 in the drive component are energized and turned on, the coil of the first relay KA1 is energized and connected, the first normally open contact of KA1 is closed, and the base of the transistor Q1 is connected to the +3.3V power supply to form a self-holding state, ensuring that KA1 is always working. The second normally open contact of KA1 is closed, connecting the +28V power supply, and the system is powered on to enter the working mode.

[0052] It should be noted that a second relay KA2 is also provided between the first relay KA1 and the +28V power supply. Fig.11 As shown, the first common contact of the second relay KA2 is connected to the other end of the coil of the first relay KA1, and the first normally closed contact of the second relay KA2 is connected to the +28V power supply. The second relay KA2 is used to power off the system. When the KA2 coil is powered on, its first normally closed contact is disconnected, cutting off the +28V power supply and putting the system into sleep mode.

[0053] In summary, this application achieves a perfect combination of low-power standby and fast wake-up by designing a logic control unit and a trigger unit. The logic control unit uses a combination of a NOT gate and an OR gate to perform precise logic processing on the output level of the data transceiver drive unit to form a control level; the trigger unit uses a D flip-flop to latch the control level to ensure that it can respond quickly when a valid wake-up signal is received. A digital isolator is set between the data transceiver drive unit and the logic control unit to effectively prevent electrical interference; at the same time, the stable filter component in the self-holding control unit isolates, amplifies and reduces noise for the trigger signal, further improving the stability of the system. A power management strategy including relays KA1 and KA2 is designed in the self-holding control unit. KA1 is used for system wake-up and power-on, while KA2 is used for system power-off and sleep, realizing intelligent power management. When the system does not need to work, the power supply is cut off, further reducing the system power consumption and extending the service life of the equipment.

[0054] The above is a further detailed description of the present invention in combination with a specific implementation method, and it cannot be determined that the specific implementation of the present invention is limited to this; for technical personnel in the technical field to which the present invention belongs and related technical fields, based on the technical solution of the present invention, the expansion and replacement of operating methods and data should all fall within the protection scope of the present invention.

Claims

1. A low-power standby control system based on logic devices, characterized in that: include: A data transceiver driving unit, used to receive a wake-up signal from an external device, which outputs a low level in the wake-up state and a high level in the idle state; A logic control unit, used for inverting the output level of the data transmission driving unit through a NOT gate, and then performing logic processing on the output of the NOT gate through an OR gate to form a control level; A trigger unit, used for latching the control level output by the logic control unit; The self-holding control unit is used to form self-holding when the control level output by the trigger unit is a high level, and drive the system to be continuously powered on.

2. A low power consumption standby control system based on logic devices according to claim 1, characterized in that: The self-holding control unit comprises: A stable filtering component, used for isolating, amplifying and noise reducing the level signal output by the trigger unit in sequence; The drive component is used to control the on / off state of the main power supply circuit of the system.

3. A low power consumption standby control system based on logic devices according to claim 2, characterized in that: The stabilizing filter component includes a first diode, a second diode, a voltage follower and an LC filter, the anode of the first diode is connected to the level signal output end of the trigger unit, the cathode of the first diode is connected to the in-phase input end of the voltage follower, the output end of the voltage follower is connected to the cathode of the second diode and the input end of the LC filter, the anode of the second diode is grounded, and the output end of the LC filter is connected to the driving component.

4. A low power consumption standby control system based on logic devices according to claim 3, characterized in that: The driving component includes a first transistor, a second transistor and a first relay, the base of the first transistor is connected to the output end of the LC filter, and is connected to the first normally open contact of the first relay through a first resistor, and the first common contact of the first relay is connected to a +3.3V power supply; the second normally open contact and the second common contact of the first relay are arranged in the main power supply circuit of the system; the collector of the first transistor is connected to the +3.3V power supply, the emitter of the first transistor is connected to the base of the second transistor through a second resistor, the emitter of the second transistor is grounded through a third resistor, the collector of the second transistor is connected to one end of the first relay coil through a fourth resistor, and the other end of the first relay coil is connected to a +28V power supply through a fifth resistor.

5. A low power consumption standby control system based on logic devices according to claim 4, characterized in that: A second relay is further provided between the first relay and the +28V power supply, wherein a first common contact of the second relay is connected to the other end of the first relay coil, and a first normally closed contact of the second relay is connected to the +28V power supply.

6. A low power consumption standby control system based on logic devices according to claim 1, characterized in that: The data transceiver driving unit uses two AiP74LVC16T245TA.TB conversion transceivers, both produced by China Micro Aixin.

7. A low power consumption standby control system based on logic devices according to claim 6, characterized in that: A digital isolator is also provided between the data transceiver driving unit and the logic control unit.

8. A low power consumption standby control system based on logic devices according to claim 7, characterized in that: The digital isolator is a four-channel digital isolator of the NSI8140N0 type produced by Nanochip Microelectronics, and each conversion transceiver is equipped with two digital isolators.

9. A low power consumption standby control system based on logic devices according to claim 8, characterized in that: The NOT gate uses two 74AHC14XS14G / TR type six-phase inverters both produced by Shengbang Micro.

10. A low power consumption standby control system based on logic devices according to claim 9, characterized in that: The trigger unit is a 74LVC74 type D flip-flop.

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