Middle and far infrared single photon avalanche photodiode structure and preparation method thereof

Abstract

The invention discloses a middle and far infrared single photon avalanche photodiode structure and a preparation method thereof. The middle and far infrared single photon avalanche photodiode structure comprises a Si substrate; the Ge buffer layer, the GaAs buffer layer and the InP buffer layer are sequentially arranged on the Si substrate; the n + InP contact layer is arranged on the buffer layer; the i-InP avalanche layer is arranged on the n + InP contact layer; the p-InP charge layer is arranged on the avalanche layer; the i-high Sn content GeSn absorption layer is arranged on the charge layer; and the p + GeSn contact layer is arranged on the absorption layer. According to the GeSn SPAD device, the InP material matched with the crystal lattice of the GeSn absorption region with the high Sn content is adopted as the avalanche region, the crystal lattice mismatch between the avalanche region and the absorption region in the GeSn SPAD device is reduced, and the cut-off wavelength of the GeSn SPAD device can be expanded to the middle and far infrared band.

Description

Technical Field

[0001] The present application relates to the field of semiconductor device technology, and in particular to a mid- and far-infrared single-photon avalanche photodiode structure and a preparation method thereof. Background Art

[0002] As a high-performance photodetector device, mid- and far-infrared single-photon avalanche photodiodes (SPADs) have shown extensive application potential in the fields of laser radar, quantum communication, environmental monitoring, biomedical imaging, and astronomical observation. Its working principle is based on the avalanche multiplication effect, which can detect with high sensitivity at the single-photon level. However, the absorption layer materials of traditional commercial mid- and far-infrared SPADs, such as mercury cadmium telluride (HgCdTe), indium arsenic antimony (InAsSb), and antimonide-based type II superlattice materials, have a series of outstanding problems that limit their wide application. HgCdTe materials are prone to through-type defects during liquid phase epitaxy. These defects not only affect the preparation of subsequent passivation layers, but may also lead to the generation of multiple blind pixels, thereby affecting the overall performance of the device. In addition, HgCdTe materials have poor chemical stability and are easily damaged by reagents in subsequent processes. Antimonide-based type II superlattice materials face the problems of complex growth conditions, difficult to ensure repeatability and stability. In addition, the preparation of antimonide-based type II superlattice materials requires high-precision molecular beam epitaxy equipment and complex process control methods, which makes its production cost high and difficult to achieve large-scale industrial production. In recent years, the mid- and far-infrared indium arsenic (InAs) SPAD, which has been a hot topic of research, has also faced challenges. In order to achieve high-performance detection, a thicker InAs layer with a lower carrier concentration is usually required, which places extremely high demands on the epitaxial process. In contrast, germanium tin (GeSn) material, as a new type of Group IV material, has shown unique advantages in the mid- and far-infrared bands. The band gap of GeSn material can be flexibly adjusted, and it has a higher absorption coefficient in a specific band (up to 5μm). In addition, GeSn material has low epitaxy cost, high epitaxial crystal quality, good surface uniformity, and is compatible with standard Si CMOS processes, making it easy to achieve large-scale industrial production.

[0003] However, in the common GeSn SPAD device structure design, Si material is usually selected to construct the avalanche region. Due to the large lattice mismatch between Si material and high Sn content GeSn material, the wavelength response range of the device is limited, usually only covering 1.6-2μm. The above problems need to be solved. Summary of the invention

[0004] The main purpose of this application is to overcome the shortcomings and deficiencies of the prior art, and to provide a mid- and far-infrared single-photon avalanche photodiode structure and a preparation method, which uses InP material that is lattice-matched to the high Sn content GeSn absorption region as the avalanche region, reduces the lattice mismatch between the avalanche region and the absorption region in the GeSn SPAD device, and can extend the cutoff wavelength of the GeSn SPAD to the mid- and far-infrared bands.

[0005] In order to achieve the above objectives, this application adopts the following technical solutions:

[0006] In a first aspect, the present application provides a mid-to-far infrared single-photon avalanche photodiode structure, comprising:

[0007] Si substrate;

[0008] A Ge buffer layer, a GaAs buffer layer and an InP buffer layer are sequentially arranged on the Si substrate;

[0009] An n+InP contact layer is disposed on the buffer layer;

[0010] An i-InP avalanche layer is disposed on the n+InP contact layer;

[0011] A p-InP charge layer, disposed on the avalanche layer;

[0012] An i-GeSn absorption layer is disposed on the charge layer;

[0013] The p+GeSn contact layer is disposed on the absorption layer.

[0014] As a preferred technical solution, the Si substrate includes an SOI substrate, an FDSOI substrate or an SOS substrate.

[0015] As a preferred technical solution, the material of the avalanche layer further includes InAlAs or a mixture of InP and InAlAs.

[0016] As a preferred technical solution, the thickness of the avalanche layer is 0.1-2 μm.

[0017] As a preferred technical solution, the material of the charge layer also includes p-GeSn.

[0018] As a preferred technical solution, the thickness of the charge layer is 100 nm.

[0019] As a preferred technical solution, the Sn content of GeSn in the i-GeSn absorption layer and the p+GeSn contact layer is in the range of 20-40%.

[0020] As a preferred technical solution, the thickness of the absorption layer is 0.5-3 μm.

[0021] As a preferred technical solution, the thickness of the p+GeSn contact layer is 100 nm.

[0022] In a second aspect, the present application provides a method for preparing a mid- and far-infrared single-photon avalanche photodiode structure, comprising the following steps:

[0023] Preparing a Si substrate;

[0024] Sequentially forming a Ge buffer layer, a GaAs buffer layer, an InP buffer layer, an n+InP contact layer, an i-InP avalanche layer, a p-InP charge layer, an i-GeSn absorption layer, and a p+GeSn contact layer on the Si substrate;

[0025] The multi-layer structure is formed into a mesa structure through an etching process;

[0026] Depositing a passivation layer on the surface of the mesa structure to form a surface passivation layer;

[0027] An n-type electrode and a p-type electrode are deposited on the n+InP contact layer and the p+GeSn contact layer respectively, and finally a mid-to-far infrared single-photon avalanche photodiode is obtained.

[0028] In summary, compared with the prior art, the effective effects brought about by the technical solution provided by this application include at least:

[0029] The present application proposes a mid-to-far infrared single-photon avalanche photodiode structure, including a Si substrate; a Ge buffer layer, a GaA buffer layer and an InP buffer layer, which are sequentially arranged on the Si substrate; an n+InP contact layer, which is arranged on the buffer layer; an i-InP avalanche layer, which is arranged on the n+InP contact layer; a p-InP charge layer, which is arranged on the avalanche layer; an i-high Sn content GeSn absorption layer, which is arranged on the charge layer; and a p+ high Sn content GeSn contact layer, which is arranged on the absorption layer. The single-photon avalanche photodiode device of the present application can effectively expand the wavelength response range of the GeSn SPAD (single-photon avalanche photodiode) device to the mid-to-far infrared band by virtue of the good lattice matching characteristics of high Sn content GeSn and InP. This technical solution can not only solve the lattice mismatch problem between the high Sn content GeSn material and the InP avalanche zone, but also significantly expand the wavelength response range of the GeSn device, so that it can cover a wider range of mid-to-far infrared bands. In addition, InP has a high avalanche multiplication factor (i.e., ionization coefficient), which can significantly improve the performance of GeSn / InP devices. Compared with the traditional GeSn / Si device structure, GeSn / InP devices have been significantly improved in various performance indicators. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0031] Figure 1 A schematic diagram of the structure of a mid-to-far infrared single-photon avalanche photodiode provided in one embodiment of the present application;

[0032] Figure 2 A schematic flow chart of a method for preparing a mid- and far-infrared single-photon avalanche photodiode structure provided for one embodiment of the present application. DETAILED DESCRIPTION

[0033] In order to enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application.

[0034] Reference to "embodiments" in this application means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described in this application may be combined with other embodiments.

[0035] Mid- and far-infrared single-photon avalanche photodiodes (SPADs) have shown extremely broad application potential in many fields such as laser radar, quantum communication, environmental monitoring, biomedical imaging, and astronomical observation due to their unique properties. Commercial mid- and far-infrared absorption layers mainly use mercury cadmium telluride (HgCdTe), indium arsenic antimony (InAsSb), and antimonide-based type II superlattice materials. However, these materials have a series of outstanding problems. First, HgCdTe has a high defect rate in the material growth process. For example, through-type defects are prone to occur during the liquid phase epitaxy process, and their depth may exceed 10μm, or even extend to the HgCdTe substrate interface. This makes the subsequent preparation of a qualified passivation layer quite challenging. In the subsequent process, reagents can easily enter these defects and damage the HgCdTe material, thereby generating multiple blind elements and affecting the overall performance of the device. At the same time, the growth conditions of antimonide-based type II superlattice materials are extremely complex, and the optimal growth conditions for different compounds vary greatly. Even on the same molecular beam epitaxy equipment, the optimal growth conditions may shift when the same compound is grown at different times. This makes it difficult to ensure the repeatability and stability of material growth. In addition, during the growth process, atomic mixing is likely to occur at the interface between different materials, which can have an adverse effect on the crystal quality and electrical properties of the material. Secondly, from the perspective of process and cost, the epitaxial process of InAsSb is very demanding, requiring precise control of epitaxial growth parameters such as growth temperature and beam ratio. Any slight deviation may affect the material performance, thereby increasing costs. The preparation of antimonide-based type II superlattice materials requires high-precision molecular beam epitaxy equipment and complex process control methods, which makes its production cost high and difficult to achieve large-scale industrial production. In summary, the various problems existing in these materials have greatly limited their widespread application in the commercial market. At present, the mid- and far-infrared indium arsenide (InAs) SPAD, which is a popular research topic, often requires a thicker InAs layer with a lower carrier concentration. However, this requirement poses an extremely stringent challenge to the epitaxial process, making it difficult to achieve. In comparison, as a Group IV material, Germanium Tin (GeSn) has a series of significant advantages, such as flexible band gap adjustment, high absorption coefficient in a specific band (up to 5μm), low material epitaxy cost, high epitaxial crystal quality, good surface uniformity, low production cost, compatibility with standard Si CMOS process, and easy mass production, which has attracted widespread attention from domestic and foreign researchers. In the common GeSn SPAD device structure design, Si material is usually selected to construct the avalanche region, and its thickness is generally between 0.5-2μm. Accordingly, the wavelength response range of the device can only cover 1.6-2μm.If the wavelength response range of GeSn SPAD is to be further broadened, a semiconductor material with a higher lattice match with the high Sn content GeSn material must be used as the avalanche region. It can be seen that reducing the lattice mismatch between the avalanche region and the GeSn (germanium tin) absorption layer is one of the key research points of high-performance mid- and far-infrared GeSn SPAD. Studies have shown that a GeSn layer with a high Sn content can be directly formed on an InP substrate through an epitaxial process. Moreover, the optical absorption spectrum of the formed GeSn layer is within the mid- and far-infrared band.

[0036] However, in the common GeSn SPAD device structure design, Si material is usually selected to construct the avalanche region. Due to the large lattice mismatch between Si material and high Sn content GeSn material, the wavelength response range of the device is limited, usually only covering 1.6-2μm.

[0037] In order to solve the above problems, the present application provides a mid-to-far infrared single-photon avalanche photodiode structure. Introducing an InP avalanche region into the GeSn SPAD device structure is a highly promising design idea, which can not only solve the lattice mismatch problem between the high Sn content GeSn material and the InP avalanche region, but also significantly expand the wavelength response range of the GeSn device, so that it can cover a wider mid-to-far infrared band, thereby enabling GeSn SPAD to play a more important role in fields where there is a demand for mid-to-far infrared band detection, and effectively promote the further development and application expansion of related technical fields.

[0038] The technical solutions provided by the embodiments of this specification are described in detail below in conjunction with the accompanying drawings.

[0039] See also Figure 1 In one embodiment of the present application, a mid-to-far infrared single-photon avalanche photodiode structure is provided, the structure of which includes:

[0040] Si substrate;

[0041] A Ge (germanium) buffer layer, a GaAs (gallium arsenide) buffer layer and an InP (indium phosphide) buffer layer are sequentially arranged on the Si substrate;

[0042] An n+InP contact layer is disposed on the buffer layer;

[0043] An i-InP avalanche layer is disposed on the n+InP contact layer;

[0044] A p-InP charge layer, disposed on the avalanche layer;

[0045] i-a high Sn content GeSn absorption layer, disposed on the charge layer;

[0046] The p+ high Sn content GeSn contact layer is disposed on the absorption layer.

[0047] Furthermore, the n+InP contact layer refers to a contact layer composed of n-type doped InP (indium phosphide) semiconductor material, and the doping concentration of the contact layer is relatively high; "n+" indicates a high concentration of electron carriers (i.e., a highly doped n-type semiconductor), which helps to improve the conductivity, making this layer a good electronic contact layer in the device.

[0048] The i-InP avalanche layer refers to a layer composed of intrinsic (i) InP (indium phosphide) semiconductor material. The avalanche layer is designed to produce an avalanche multiplication effect. The "i" here stands for intrinsic, meaning that the carrier concentration in the layer is mainly generated by thermal excitation of the material itself rather than introduced by external doping.

[0049] Furthermore, InP has a high electron mobility, and electrons can move quickly under the action of an electric field. In SPAD devices, high electron mobility is conducive to the rapid occurrence of the avalanche multiplication process. When the electron-hole pairs generated by photons in the absorption layer enter the avalanche region, InP with high electron mobility can enable electrons to quickly obtain sufficient energy and generate more electron-hole pairs through collision ionization, thereby achieving high avalanche gain. At the same time, the band gap of the InP material itself is moderate, which helps to control the avalanche breakdown voltage, allowing the device to operate under a suitable bias voltage, ensuring the stability and reliability of the device.

[0050] The p-InP charge layer refers to a charge layer composed of p-type doped InP (indium phosphide) semiconductor material.

[0051] The i-high Sn content GeSn absorption layer refers to an absorption layer composed of an intrinsic (i) germanium-tin (GeSn) alloy containing a high concentration of tin (Sn).

[0052] Furthermore, GeSn materials with high Sn content have excellent light absorption characteristics in the mid- and far-infrared bands. They have high absorption coefficients and can effectively absorb mid- and far-infrared photons, which is very important for avalanche photodiodes that detect light in the mid- and far-infrared bands. Moreover, the band gap of GeSn materials can be adjusted by adjusting the Sn content, which can flexibly change its response wavelength range and broaden the application field of the device.

[0053] The p+ high Sn content GeSn contact layer refers to a contact layer composed of a p-type highly doped germanium-tin (GeSn) alloy containing a high concentration of tin (Sn).

[0054] As one implementation manner, the Si substrate includes an SOI substrate, an FDSOI substrate or an SOS substrate.

[0055] Among them, SOI (Silicon-On-Insulator) is silicon on insulator. In this structure, there is an ultra-thin insulating layer (such as SiO2) on the silicon wafer, and there is another thin silicon layer on the insulating layer. FDSOI (Fully Depleted Silicon-on-Insulator) is fully depleted silicon on insulator, which uses a thinner silicon film so that the carriers in the silicon film can be completely depleted when the device is working. SOS (Silicon-on-Sapphire or Spinel) is silicon on sapphire or spinel.

[0056] Si substrates have many advantages, such as low cost, good mechanical properties, and strong compatibility with existing Si CMOS processes. This allows these advantages of Si substrates to be fully utilized to reduce production costs and facilitate device integration when making SPAD (photon avalanche photodiode) devices. At the same time, the InP layer on the substrate can provide a good growth foundation for the avalanche zone and the absorption layer, ensuring the stability of the device structure and the high-quality growth of the material. This substrate structure is conducive to the integration of avalanche photodiodes with other Si CMOS devices. For example, in a chip-level integrated system, the signal processing circuit can be integrated with the avalanche photodiode on the same chip, reducing the size of the system, improving the performance and reliability of the system, and providing a good foundation for future optoelectronic integrated systems.

[0057] As one implementation manner, the material of the avalanche layer may also be InAlAs (indium aluminum arsenic), or an avalanche layer composed of a mixed material of InP (indium phosphorus) and InAlAs (indium aluminum arsenic).

[0058] As one implementation manner, the thickness of the avalanche layer is 0.1-2 μm.

[0059] As one implementation manner, the material of the charge layer in the embodiment of the present application may be a charge layer composed of p-high Sn content GeSn in addition to p-InP.

[0060] As one embodiment, the thickness of the charge layer is 100 nm.

[0061] In the embodiments of the present application, the i-GeSn absorption layer, the GeSn in the p+GeSn contact layer, and the p-GeSn charge layer are all GeSn with a high Sn content, wherein the Sn content ranges from 20-40%.

[0062] As one embodiment, the thickness of the absorption layer is 0.5-3 μm.

[0063] As one implementation method, the material of the absorption layer may also be replaced by GePb (germanium lead).

[0064] As one implementation manner, the thickness of the p+GeSn contact layer is 100 nm.

[0065] See also Figure 2 In another embodiment of the present application, a method for preparing a mid-to-far infrared single-photon avalanche photodiode structure is provided, comprising the following steps:

[0066] Preparing a Si substrate;

[0067] Forming a Ge buffer layer, a GaAs buffer layer, an InP buffer layer, an n+InP contact layer, an i-InP avalanche region, a p-InP charge layer, an i-high Sn content GeSn absorption layer, and a p+ high Sn content GeSn contact layer on the Si substrate in sequence;

[0068] The multi-layer structure is formed into a mesa structure through an etching process;

[0069] Depositing a passivation layer on the surface of the mesa structure to form a surface passivation layer;

[0070] An n-type electrode and a p-type electrode are deposited on the n+InP contact layer and the p+ high Sn content GeSn contact layer respectively, and finally a mid-to-far infrared single-photon avalanche photodiode can be obtained.

[0071] Furthermore, the material of the avalanche layer also includes InAlAs or a mixture of InP and InAlAs.

[0072] The material of the charge layer further includes p-GeSn.

[0073] In summary, the single-photon avalanche photodiode device of the present application can effectively expand the wavelength response range of the GeSn SPAD device to the mid-to-far infrared band by virtue of the good lattice matching characteristics of high Sn content GeSn and InP. This technical solution can not only solve the lattice mismatch problem between the high Sn content GeSn material and the InP avalanche zone, but also significantly expand the wavelength response range of the GeSn device, so that it can cover a wider range of mid-to-far infrared bands. In addition, InP has a higher avalanche multiplication factor (i.e., ionization coefficient), and this characteristic can significantly improve the performance of GeSn / InP devices. Compared with the traditional GeSn / Si device structure, the GeSn / InP device has been significantly improved in various performance indicators. In addition, the lattice mismatch between InP (indium phosphorus) and the high Sn content GeSn material is extremely low, which reduces the defects caused by the lattice mismatch. Specifically, in SPAD (single photon avalanche photodiode) devices, the number of defects at the interface can be effectively reduced. As the number of recombination centers decreases, the recombination probability of carriers decreases, which is beneficial to reducing the dark current and dark count rate of the device. When InP is used as the avalanche region, the electrical and optical performance of the device can be effectively improved, the transmission efficiency of carriers between the absorption layer and the avalanche region is significantly improved, the response speed of the device is accelerated, and the quantum efficiency of the SPAD device is significantly improved.

[0074] It should be noted that, for the sake of convenience of description, the aforementioned method embodiments are all expressed as a series of action combinations, but those skilled in the art should know that the present application is not limited to the described order of actions, because according to the present application, certain steps can be performed in other orders or simultaneously.

[0075] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0076] The above embodiments are preferred implementation modes of the present application, but the implementation modes of the present application are not limited to the above embodiments. Any other changes, modifications, substitutions, combinations, and simplifications that do not deviate from the spirit and principles of the present application should be equivalent replacement methods and are included in the protection scope of the present application.

Claims

1. A mid-to-far infrared single-photon avalanche photodiode structure, characterized in that: include: Si substrate; A Ge buffer layer, a GaAs buffer layer and an InP buffer layer are sequentially arranged on the Si substrate; An n+InP contact layer is disposed on the buffer layer; An i-InP avalanche layer is disposed on the n+InP contact layer; A p-InP charge layer, disposed on the avalanche layer; An i-GeSn absorption layer is disposed on the charge layer; The p+GeSn contact layer is disposed on the absorption layer.

2. A mid-to-far infrared single-photon avalanche photodiode structure according to claim 1, characterized in that: The Si substrate includes an SOI substrate, an FDSOI substrate or an SOS substrate.

3. A mid-to-far infrared single photon avalanche photodiode structure according to claim 1, characterized in that: The material of the avalanche layer further includes InAlAs or a mixture of InP and InAlAs.

4. A mid-to-far infrared single-photon avalanche photodiode structure according to claim 3, characterized in that: The thickness of the avalanche layer is 0.1-2 μm.

5. The mid-to-far infrared single-photon avalanche photodiode structure according to claim 1, characterized in that: The material of the charge layer further includes p-GeSn.

6. A mid-to-far infrared single-photon avalanche photodiode structure according to claim 5, characterized in that: The thickness of the charge layer is 100 nm.

7. A mid-to-far infrared single-photon avalanche photodiode structure according to claim 1, characterized in that: The Sn content of GeSn in the i-GeSn absorption layer and the p+GeSn contact layer is in the range of 20-40%.

8. The mid-to-far infrared single-photon avalanche photodiode structure according to claim 1, characterized in that: The thickness of the absorption layer is 0.5-3 μm.

9. A mid-to-far infrared single-photon avalanche photodiode structure according to claim 1, characterized in that: The thickness of the p+GeSn contact layer is 100 nm.

10. A method for preparing a mid- and far-infrared single-photon avalanche photodiode structure, characterized in that: The steps include: Preparing a Si substrate; Sequentially forming a Ge buffer layer, a GaAs buffer layer, an InP buffer layer, an n+InP contact layer, an i-InP avalanche layer, a p-InP charge layer, an i-GeSn absorption layer, and a p+GeSn contact layer on the Si substrate; The multi-layer structure is formed into a mesa structure through an etching process; Depositing a passivation layer on the surface of the mesa structure to form a surface passivation layer; An n-type electrode and a p-type electrode are deposited on the n+InP contact layer and the p+GeSn contact layer respectively.

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