Electronic device and control method of electronic device

Abstract

An electronic device and a control method of the electronic device are provided. The electronic equipment comprises a communicator. At least one memory configured to store data for a neural network model; at least one first processor configured to execute a training process of the neural network model; and at least one second processor configured to execute a plurality of pre-processing processes for a training process, calculate a first operation speed of at least one of the plurality of pre-processing processes executed by the at least one second processor and a second operation speed of the training process executed by the at least one first processor, and controlling the communicator to transmit at least one input value for the at least one preprocessing process to an external device connected to the electronic device based on the first computing speed slower than the second computing speed, and receiving a processing result of the at least one input value by the external device from the external device through the communicator to obtain an output value corresponding to the at least one input value.

Description

Technical Field

[0001] The present disclosure relates to an electronic device and a method for controlling the electronic device, and more particularly, to an electronic device capable of effectively performing an operation process for training a neural network model and a method for controlling the electronic device. Background Art

[0002] In recent years, the development of artificial intelligence (AI) technology has accelerated, and in particular, research on technology for improving computational efficiency required in the training process of a neural network model has received attention.

[0003] Specifically, although the technology of hardware for training neural network models has been developed, there may be a situation where operation inefficiency occurs in at least a part of the process of processing a large amount of data for training the neural network model. In particular, when operation delay or pause occurs during the data preprocessing process performed by the central processing unit (CPU), even the training process performed by the graphics processing unit (GPU) may be delayed to significantly reduce the efficiency of the entire operation.

[0004] As an example of a related technology for preventing such inefficiency in the operation process, there is a technology that performs a prefetch process for preparing next input data while the GPU performs a training process for the input data, but even if this technology is used, operation delays may occur and this technology cannot be a basic solution to the operation delays.

[0005] There is also a related technology that improves operation efficiency by sending part of the data to an external device, but there is a limitation in that the problem of operation delay cannot be effectively solved by clearly identifying the process that causes the operation delay. In addition, it is also pointed out that the limitation of operation delay cannot be effectively solved by only sending an appropriate amount of data to an external device. Summary of the invention

[0006] Technical Solution

[0007] An electronic device and a control method of the electronic device are provided, which can clearly identify a part causing operation delay during a preprocessing process performed before a training process of a neural network model and effectively solve a bottleneck phenomenon caused by the preprocessing.

[0008] According to one aspect of the present disclosure, an electronic device includes: a communicator; at least one memory configured to store data for a neural network model; at least one first processor configured to execute a training process of the neural network model; and at least one second processor configured to: execute multiple preprocessing processes for the training process, determine a first operating speed of at least one preprocessing process among the multiple preprocessing processes executed by the at least one second processor and a second operating speed of the training process executed by the at least one first processor, and based on the first operating speed being slower than the second operating speed, control the communicator to send at least one input value for at least one preprocessing process to an external device connected to the electronic device, and receive a processing result of the external device on the at least one input value from the external device through the communicator to obtain an output value corresponding to the at least one input value.

[0009] The at least one second processor may also be configured to store a test value of the at least one preprocessing process in the at least one memory, and determine the first operation speed by repeatedly executing the at least one preprocessing process based on the stored test value.

[0010] The at least one second processor may also be configured to obtain an output value corresponding to the at least one input value by performing the at least one preprocessing process on the at least one input value based on the first operating speed being faster than the second operating speed.

[0011] At least one second processor may also be configured to: based on at least one preprocessing process for the test value performed by the external device, control the communicator to send the test value to the external device, receive information indicating a third operating speed from the external device through the communicator, and determine the number of at least one input value for at least one preprocessing process to be sent to the external device based on the difference between the first operating speed and the second operating speed, the third operating speed, and at least one of the transmission amount of data transmittable through the bandwidth of the network connecting the electronic device and the external device.

[0012] The at least one second processor may also be configured to determine, as the number of the at least one input value to be sent to the external device, a minimum number of input values ​​that can be processed at a computing speed equal to the difference between the first computing speed and the second computing speed within a predetermined time period, a number of input values ​​that can be processed at the third computing speed during the predetermined time period, and a number of input values ​​that can be transmitted through the bandwidth of the network during the predetermined time period.

[0013] The at least one second processor may also be configured to determine the third operating speed based on a processing result of the test value by the external device received from the external device through the communicator, and based on a time point when the test value is sent to the external device and a time point when the processing result is received from the external device.

[0014] The at least one second processor can also be configured to determine the first operating speed based on information about the operating speed of a processing process having the same operating structure as the at least one preprocessing process stored in the at least one memory, and based on information about the operating speed stored in the at least one memory.

[0015] The at least one first processor may include a graphics processing unit (GPU) or a neural processing unit (NPU), and the at least one second processor may include a central processing unit (CPU) or a microprocessor unit (MPU).

[0016] According to one aspect of the present disclosure, a method for controlling an electronic device includes: determining a first operating speed of at least one preprocessing process among a plurality of preprocessing processes executed by at least one second processor of the electronic device and a second operating speed of a training process of a neural network model executed by at least one first processor of the electronic device; based on the first operating speed being slower than the second operating speed, sending at least one input value for the at least one preprocessing process to an external device connected to the electronic device, and obtaining an output value corresponding to the at least one input value by receiving a processing result of the external device on the at least one input value from the external device.

[0017] The determining may include: storing a test value of at least one preprocessing process in at least one memory of the electronic device; and determining the first operation speed by repeatedly performing the at least one preprocessing process based on the stored test value.

[0018] The method may further include obtaining an output value corresponding to the at least one input value by performing the at least one preprocessing process on the at least one input value based on the first operation speed being faster than the second operation speed.

[0019] The method may also include: sending a test value to an external device; receiving information indicating a third operating speed from the external device based on the at least one preprocessing process performed by the external device for the test value; and determining the number of the at least one input value for the at least one preprocessing process to be transmitted to the external device based on at least one of the difference between the first operating speed and the second operating speed, the third operating speed, and the transmission amount of data transmittable through the bandwidth of the network connecting the electronic device and the external device.

[0020] Determining the number of at least one input value may include determining a minimum number of input values ​​that can be processed at a computing speed equal to a difference between a first computing speed and a second computing speed within a predetermined time period, a number of input values ​​that can be processed at a third computing speed during the predetermined time period, and a number of input values ​​that can be transmitted through a bandwidth of a network during the predetermined time period, as the number of at least one input value to be transmitted to the external device.

[0021] The method may further include determining a third operation speed based on receiving a processing result of the test value from the external device, based on a time point when the test value is sent to the external device and a time point when the processing result is received from the external device.

[0022] The method may further include determining a first operating speed based on information about the operating speed stored in at least one memory, based on information about the operating speed of a processing process having the same operating structure as the operating structure of at least one preprocessing process stored in at least one memory.

[0023] The at least one first processor may include a graphics processing unit (GPU) or a neural processing unit (NPU), and the at least one second processor may include a central processing unit (CPU) or a microprocessor unit (MPU).

[0024] According to one aspect of the present disclosure, a non-transitory computer-readable recording medium storing instructions, wherein the instructions are executed by at least one processor to control a method of controlling an electronic device, the method comprising: determining a first operating speed of at least one preprocessing process among a plurality of preprocessing processes executed by at least one second processor of the electronic device and a second operating speed of a training process of a neural network model executed by at least one first processor of the electronic device; transmitting at least one input value for the at least one preprocessing process to an external device connected to the electronic device based on the first operating speed being slower than the second operating speed; and obtaining an output value corresponding to the at least one input value by receiving a processing result of the external device on the at least one input value from the external device. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 is a block diagram schematically showing a configuration of an electronic device according to an embodiment of the present disclosure;

[0026] Figure 2 is a diagram showing a plurality of preprocessing processes and a training process performed sequentially according to an embodiment of the present disclosure;

[0027] Figure 3 is a diagram illustrating a method of determining whether a third pre-processing process and a fourth pre-processing process among a plurality of pre-processing processes have an operation delay according to an embodiment of the present disclosure;

[0028] Figure 4 is a diagram illustrating a method of performing at least a portion of a third pre-processing process and a fourth pre-processing process through an external device according to an embodiment of the present disclosure;

[0029] Figure 5 is a block diagram showing a configuration of an external device and a configuration of an electronic device for performing at least a part of a pre-processing process according to the present disclosure;

[0030] Figure 6 is a block diagram illustrating in detail the configuration of an electronic device according to an embodiment of the present disclosure; and

[0031] Figure 7 is a flowchart illustrating a method of controlling an electronic device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0032] In the following, various embodiments of the present disclosure are described with reference to the accompanying drawings. However, it should be understood that the present disclosure is not limited to specific embodiments, and all modifications, equivalents and / or alternatives thereof also belong to the scope of the present disclosure. The same reference numerals are used throughout the drawings to refer to the same or similar parts.

[0033] In describing the present disclosure, if a detailed description of a related known function or configuration is considered to unnecessarily divert the gist of the present disclosure, such explanation has been omitted but will be understood by those skilled in the art.

[0034] The present disclosure may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concepts of the present disclosure to those skilled in the art.

[0035] The terms used in this specification are only used to describe specific embodiments rather than to limit the present disclosure. Unless the context clearly indicates otherwise, the singular form is intended to include the plural form.

[0036] In the disclosure disclosed herein, the expressions “having”, “may have”, “including” and “comprising” or “may include” and “may include” used herein indicate the presence of corresponding features (e.g., elements such as values, functions, operations or components), but do not exclude the presence of additional features.

[0037] In the disclosure disclosed herein, the expressions "A or B", "at least one of A or / and B", or "one or more of A or / and B", etc. used herein may include any and all combinations of one or more of the relevant listed items. For example, the terms "A or B", "at least one of A and B", or "at least one of A or B" should be understood to include (1) only A, (2) only B, or (3) both A and B.

[0038] Terms such as “first”, “second”, etc. used herein may refer to various elements of various embodiments of the present disclosure, but do not limit the elements.

[0039] It should be understood that when an element (e.g., a first element) is referred to as being “(operably or communicatively) coupled to / coupled to another element (e.g., a second element)” or “connected to another element (e.g., a second element)”, it may be directly coupled to / coupled to / connected to another element, or an intervening element (e.g., a third element) may be present. Conversely, when an element (e.g., a first element) is referred to as being “directly coupled to / directly coupled to another element (e.g., a second element)” or “directly connected to another element (e.g., a second element)”, it should be understood that there are no intervening elements (e.g., a third element).

[0040] However, when it is described that an element (for example, a first element) is “directly coupled” to another element (for example, a second element), an element (for example, a third element) may not exist between the element and the other element.

[0041] As used herein, the expression "configured to" may be used as, for example, an expression "suitable for", "capable of", "designed to", "suitable for", "manufactured to", or "capable of", depending on the circumstances. The term "configured to" does not necessarily mean only "specially designed to" in hardware.

[0042] In contrast, the expression “a device configured to” may mean that the device is “capable” of operating with another device or other components. For example, “a processor configured to perform A, B, and C” may represent a dedicated processor (e.g., an embedded processor) for performing the corresponding operations or a general-purpose processor (e.g., a central processing unit (CPU) or an application processor) that can perform the corresponding operations by executing one or more software programs stored in a memory device.

[0043] In the description, the word "module" or "unit" refers to a software component, a hardware component, or a combination thereof that can perform at least one function or operation. In addition to those modules or units that need to be implemented in specific hardware, multiple modules or units can be integrated into at least one module and implemented using at least one processor.

[0044] Various elements and regions in the drawings are schematically drawn. Therefore, the technical concept of the present disclosure is not limited by the relative sizes or intervals drawn in the drawings.

[0045] Hereinafter, the present disclosure will be described in more detail with reference to the accompanying drawings so that those skilled in the art to which the present disclosure pertains can easily implement the embodiments.

[0046] Figure 1 is a block diagram schematically showing a configuration of an electronic device according to an embodiment of the present disclosure, and Figure 2 is a diagram illustrating a plurality of preprocessing processes and a training process that are sequentially performed according to an embodiment of the present disclosure.

[0047] like Figure 1 As shown, the electronic device 100 according to an embodiment of the present disclosure may include a communicator (or a communication interface) 110 , a memory 120 , a first processor 130 , and a second processor 140 .

[0048] First, the electronic device 100 according to the present disclosure refers to a device capable of performing a training process of a neural network model. For example, the electronic device 100 may be implemented as a server for training a neural network model, or may be implemented as a device such as a user's PC or smartphone. However, the type of the electronic device 100 according to the present disclosure is not particularly limited.

[0049] The neural network model according to the present disclosure refers to an artificial intelligence (AI) model including a plurality of neural network layers, and the term "neural network model" can be used interchangeably with the term artificial intelligence (AI) model in the present disclosure. The neural network model according to the present disclosure can be executed sequentially. Figure 2 Specifically, the neural network model can perform a training process based on a data set (ie, training data). In addition, the neural network model can perform multiple pre-processing processes before performing the training process.

[0050] As used herein, the term "training process" is used as a term for referring to the entire training process including the feedforward process and the backpropagation process of the neural network model, and there is no particular limitation on the training method.

[0051] The term "preprocessing processes" is used as a general term for various processes that can be performed before the training process of a neural network model. Figure 2, the plurality of preprocessing processes may include sequential preprocessing processes, such as a first preprocessing process that reads input data from a data set, a second preprocessing process that embeds the input data as an input value (e.g., a vector or a tensor), a third preprocessing process that collects / processes input values ​​for parallel operations of a neural network model, and a fourth preprocessing process that prepares the next input data while executing a training process for the input data (e.g., a prefetching process that overlaps the operation processes of the CPU and the GPU). The preprocessing process according to the present disclosure may be implemented in various ways other than the above examples.

[0052] The communicator 110 may include a circuit and may perform communication with the external device 200. Specifically, the processor may receive various data or information from the external device 200 connected through the communicator 110, and may transmit various data or information to the external device 200.

[0053] The communicator 110 may include at least one of a Wi-Fi module, a Bluetooth module, a wireless communication module, a near field communication (NFC) module, and an ultra-wideband (UWB) module. Specifically, the Wi-Fi module and the Bluetooth module may perform communication using a Wi-Fi method or a Bluetooth method, respectively. In the case of using a Wi-Fi module or a Bluetooth module, various connection information such as an SSID may be first sent and received to connect using the SSID for communication, and then various information may be sent and received.

[0054] In addition, the wireless communication module can perform communication according to various communication standards, such as IEEE, Zigbee, third generation (3G), third generation partnership project (3GPP), long term evolution (LTE), and fifth generation (5G). In addition, the NFC module can perform communication using an NFC method that uses a 13.56 MHz band among various RF-ID frequency bands, such as 135kHz, 13.56MHz, 433MHz, 860 to 960MHz, and 2.45GHz. In addition, the UWB module can accurately calculate the time of arrival (ToA) and angle of arrival (AoA) through communication between UWB antennas. ToA is the time when a pulse arrives at a target, and AoA is the angle of arrival of a pulse in a transmitting device. Therefore, the precise distance and position within an error range of tens of centimeters in an indoor area can be identified.

[0055] Specifically, in various embodiments according to the present disclosure, the communicator 110 may transmit input values ​​used in a plurality of preprocessing processes or training processes according to the present disclosure to the external device 200 connected to the electronic device 100. In addition, the communicator 110 may obtain an output value corresponding to the input value transmitted from the external device 200, and may receive information about the operation speed of the external device 200.

[0056] At least one instruction related to the electronic device 100 may be stored in the memory 120. In addition, an operating system (O / S) for driving the electronic device 100 may be stored in the memory 120. In addition, according to various embodiments of the present disclosure, various software programs or applications for operating the electronic device 100 may be stored in the memory 120. In addition, the memory 120 may include a semiconductor memory (such as a flash memory) or a magnetic storage medium (such as a hard disk).

[0057] Specifically, according to various embodiments of the present disclosure, various software modules for operating the electronic device 100 may be stored in the memory 120, and the processor may control the operation of the electronic device 100 by executing the various software modules stored in the memory 120. That is, the memory 120 may be accessed by the processor, and data may be read / written / corrected / deleted / updated by the processor.

[0058] Here, the term “memory” (eg, memory 120 ) may include a ROM, a RAM, or a memory card (eg, a micro SD card, a memory stick) installed in a processor in the electronic device 100 .

[0059] Specifically, in various embodiments according to the present disclosure, data for a neural network model may be stored in the memory 120. Here, the data for a neural network model may include a training data set for training the neural network model, and data for layers, parameters, weights, etc. constituting the neural network model. In addition, the memory 120 may store input values ​​for a plurality of preprocessing processes and training processes according to the present disclosure, and output values ​​corresponding to the input values. In addition, information about a first operating speed, a second operating speed, and a third operating speed may be stored in the memory 120. In addition, various information required within the scope of achieving the purpose of the present disclosure may be stored in the memory 120, and the information stored in the memory 120 may be updated to be received from the external device 200 or input by a user.

[0060] like Figure 1 As shown, the processor according to the present disclosure may include a first processor 130 and a second processor 140. Hereinafter, it is assumed that the first processor 130 and the second processor 140 according to the present disclosure are implemented as separate components, but the first processor 130 and the second processor 140 may also be implemented as a single hardware component.

[0061] The first processor 130 may perform a training process of a neural network model. In addition, the first processor 130 may perform an inference process of the neural network model using the trained neural network model. Specifically, since the operation speed when the first processor 130 performs the training process of the neural network model is important in the present disclosure, the following description will focus on the training process of the neural network model performed by the first processor 130. For example, the first processor 130 may be a graphics processing unit (GPU) or a neural processing unit (NPU), but is not limited thereto.

[0062] The second processor 140 may control the overall operation of the electronic device 100. That is, the second processor 140 may be connected to the configuration of the electronic device 100 including the communicator 110, the memory 120, and the first processor 130, and control the operation for implementing various embodiments according to the present disclosure by executing at least one instruction stored in the memory 120. For example, the second processor 140 may be a central processing unit (CPU) or a microprocessor unit (MPU), but is not limited thereto.

[0063] Specifically, the second processor 140 may perform a plurality of preprocessing processes for training a neural network model. In addition, according to various embodiments of the present disclosure, the second processor 140 may perform a process of determining whether an operation is delayed and a process of processing an operation delay.

[0064] In the above, it is assumed that the training process of the neural network model is performed by the first processor 130, and multiple preprocessing processes for the training process of the neural network model are performed by the second processor 140, but the electronic device 100 may need to identify whether each of the multiple preprocessing processes and the training process is performed by the first processor 130 or the second processor 140 based on the operating structure for the multiple preprocessing processes and the training process.

[0065] Specifically, the second processor 140 may identify whether each of the plurality of pre-processing processes and the training process is performed by the first processor 130 or the second processor 140 based on each operation structure (e.g., directed acyclic graph (DAG)) of the plurality of pre-processing processes and the training process. In addition, the determination of whether each of the plurality of pre-processing processes and the training process is performed by the first processor 130 or the second processor 140 may be set by a developer or a user.

[0066] Specifically, in various embodiments according to the present disclosure, for the electronic device 100, the second processor 140 can calculate a first operating speed of at least one preprocessing process among multiple preprocessing processes performed by the second processor 140 and a second operating speed of a training process performed by the first processor 130.

[0067] The second processor 140 can determine at least one process as a calculation target of the operation speed among multiple preprocessing processes and training processes, determine an input value of the determined at least one process as a test value, and calculate the operation speed by executing at least one process as the calculation target of the operation speed based on the determined test value.

[0068] In particular, the process of determining at least one of the plurality of preprocessing processes as the calculation target of the operation speed may be performed by selecting one of the plurality of preprocessing processes or by selecting one of a combination of two or more preprocessing processes that are sequentially executed. Here, one preprocessing process or one combination may be arbitrarily selected by the second processor 140, or may be selected by a user or a developer.

[0069] After calculating the operation speed by selecting a preprocessing process or selecting a combination, the second processor 140 can select another preprocessing process or another combination different from the previously selected preprocessing process or one combination, and then calculate the operation speed again, thereby identifying the part that causes the delay or stagnation of the operation in the plurality of preprocessing processes. That is, the second processor 140 can identify the part that causes the operation delay in the entire plurality of preprocessing processes by calculating the operation speed of all combinations included in the plurality of preprocessing processes.

[0070] When at least one of the plurality of preprocessing processes is determined as a calculation target of the operation speed, the second processor 140 may store a test value of the at least one preprocessing process in the memory 120, and repeatedly execute the at least one preprocessing process based on the stored test value to calculate the first operation speed. In describing the present disclosure, the term "first operation speed" is used as a term indicating the operation speed of at least one preprocessing process as a calculation target of the operation speed among the plurality of preprocessing processes executed by the second processor 140.

[0071] The second processor 140 can calculate the second operation speed by storing one test value for the training process in the memory 120 and repeatedly performing the training process based on the stored test value. In describing the present disclosure, the term "second operation speed" is used as a term indicating the operation speed of the training process performed by the first processor 130.

[0072] Will refer to Figure 3 The process of calculating the operation speed according to the present disclosure is described in more detail.

[0073] As a result of calculating the first operation speed and the second operation speed, if the first operation speed is slower than the second operation speed, the second processor 140 may control the communicator 110 to transmit at least one of the input values ​​for at least one pre-processing process to the external device 200 connected to the electronic device 100. In addition, the second processor 140 may receive a processing result of the external device 200 on at least one input value from the external device 200 through the communicator 110 to obtain an output value corresponding to the at least one input value.

[0074] Specifically, the first operation speed being slower than the second operation speed means that at least one preprocessing process performed by the second processor 140 is delayed before the training process performed by the first processor 130. That is, the first operation speed being slower than the second operation speed means that an operation bottleneck is generated in at least one preprocessing process as a calculation object of the operation speed.

[0075] Therefore, the second processor 140 may control the communicator 110 to send at least one of the input values ​​for at least one preprocessing process to the external device 200. This may be referred to as a data unloading operation. At this time, the external device 200 that has received at least one input value may use the external processor included in the external device 200 to perform at least one preprocessing process instead of the electronic device 100, and thus obtain a processing result for at least one input value. Thereafter, the second processor 140 may receive the processing result of the external device 200 on at least one input value from the external device 200 through the communicator 110, and obtain an output value corresponding to the at least one input value. Since the external device 200 according to the present disclosure is a device for alternatively executing at least one of the multiple preprocessing processes to be performed by the second processor (e.g., CPU) of the electronic device 100, the external device 200 may only include hardware corresponding to the second processor (e.g., CPU) of the electronic device 100, and may not need to include hardware corresponding to the first processor (e.g., GPU) of the electronic device 100.

[0076] If the first operation speed is faster than the second operation speed, it may be the case that at least one preprocessing process has no delay, so the second processor 140 may perform at least one preprocessing process on at least one input value to obtain an output value corresponding to the at least one input value. In this case, the processor may calculate the first operation speed of one or more other preprocessing processes different from at least one preprocessing process as the calculation target of the operation speed, and compare the first operation speed with the second operation speed to identify whether a delay occurs in one or more preprocessing processes.

[0077] When the first operation speed is faster than the second operation speed, it may be a case where there is no delay for at least one preprocessing process or it may be a case where there is a delay in the training process of the neural network model by the first processor 130. Therefore, the second processor 140 may divide the neural network model or data processed by the first processor 130 into smaller units, and control the neural network model so that the first processor 130 can process fewer operations. In other words, when an operation delay occurs in at least one preprocessing process of the second processor 140, the second processor 140 may resolve the delay by performing the data unloading operation as described above, and when an operation delay occurs in the training process of the first processor 130, the second processor 140 may resolve the delay by dividing and processing the operation process of the first processor 130 in parallel. According to an embodiment, data unloading for the second processor 140 and division of the operation process for the second processor 140 may be performed together.

[0078] In the above-mentioned embodiment, an embodiment of transmitting at least one of the input values ​​of at least one preprocessing process to the external device 200 connected to the electronic device 100 when a delay occurs in at least one preprocessing process is described, but specifically, whether to transmit a certain amount of input values ​​to the external device 200 may be determined differently according to the embodiment. Figure 4 An embodiment of determining an amount of input values ​​to be transmitted to the external device 200 among input values ​​for at least one pre-processing process is described in detail.

[0079] Although the calculation process of the first operation speed has been described above, if the first operation speed has been calculated for at least a part of the preprocessing process or the training process, such as the first preprocessing process, and the information about the first operation speed has been stored in the memory 120, it is not necessary to calculate the first operation speed again for the first preprocessing process. Therefore, when the information about the operation speed of the processing process having the same operation structure as the first preprocessing process is stored in the memory 120, the second processor 140 can determine the first operation speed based on the information about the operation speed stored in the memory 120.

[0080] Here, the fact that the operation structures are the same may mean, for example, that the DAG representing the operation structure of the first preprocessing process is the same as the DAG representing the operation structure of the previously performed processing process and the DAG of the resources of the electronic device 100 used to perform the operation processes (i.e., the components used in the corresponding operation processes in the memory 120, the first processor 130 and the second processor 140).

[0081] An embodiment has been described in which at least some of the input values ​​used in the preprocessing process of the neural network model are sent to the external device 200, but if a third processor capable of performing functions similar to those of the second processor 140 is present in the electronic device 100, the third processor can process at least some of the input values.

[0082] According to the above reference Figure 1 and Figure 2 In the described embodiment, the electronic device 100 can identify a portion causing operation delay in a preprocessing process performed before a training process of a neural network model, and send the input value of the portion to the external device 200, thereby solving the bottleneck phenomenon caused by the preprocessing.

[0083] For example, when the electronic device 100 is implemented as a cloud server for providing resources for training a neural network model, a limited amount of resources may be allocated to the user to train the neural network model. In this case, when an operation delay occurs during preprocessing of the neural network model that the user wants to train, the operation delay may be minimized by offloading data to a device other than the cloud server (e.g., another server or the user's PC).

[0084] Figure 3 is a diagram illustrating a method of determining whether a third pre-processing process and a fourth pre-processing process among a plurality of pre-processing processes are delayed in operation according to an embodiment of the present disclosure.

[0085] about Figure 3 In the description, it is assumed that the plurality of preprocessing processes according to the present disclosure include a first preprocessing process, a second preprocessing process, a third preprocessing process, and a fourth preprocessing process, and the training process of the neural network model is performed after the fourth preprocessing process. Figure 3 In the description, a process of determining whether an operation is delayed according to the third preprocessing process and the fourth preprocessing process is described based on the assumption that a third preprocessing process among multiple preprocessing processes and a fourth preprocessing process after the third preprocessing process are determined as the calculation target 30 of the operation speed.

[0086] like Figure 3 As shown, the second processor 140 can perform a first preprocessing process and a second preprocessing process on an input value in a data set for training a neural network model. In addition, when performing the first preprocessing process and the second preprocessing process, the second processor 140 can determine an output value as a test value based on the results of performing the first preprocessing process and the second preprocessing process. In other words, the second processor 140 can extract an input value from the data set and perform preprocessing processes up to the third preprocessing process on the extracted input value, thereby obtaining a test value, and the third preprocessing process is the first process of calculating the target 30 of the operation speed.

[0087] The second processor 140 may store one test value in the memory 120. Specifically, the second processor 140 may cache the test value in an area of ​​the memory 120 so that the test value may be kept in the memory 120 while calculating at least the first operation speed. Thereafter, the second processor 140 may perform the third preprocessing process and the fourth preprocessing process based on the test value stored in the memory 120. When the third preprocessing process and the fourth preprocessing process are performed on the test value, the second processor 140 may store the final result value according to the result of performing the third preprocessing process and the fourth preprocessing process in the memory 120, and may repeatedly perform the third preprocessing process and the fourth preprocessing process on one test value instead of performing the training process on the result value. That is, when obtaining one test value, the second processor 140 may repeatedly perform the third preprocessing process and the fourth preprocessing process after obtaining one test value in the memory 120, so as to prevent the test value from being affected in preprocessing processes other than the third preprocessing process and the fourth preprocessing process.

[0088] When the third preprocessing process and the fourth preprocessing process for one test value are repeatedly executed, the second processor 140 can calculate the first operation speed according to the execution of the third preprocessing process and the fourth preprocessing process. For example, if the third preprocessing process and the fourth preprocessing process for one test value can be completed by repeating 50 times within 1 second, the second processor 140 can recognize that the third preprocessing process and the fourth preprocessing process for 50 input values ​​can be executed by the second processor 140 for 1 second. Of course, the unit and operation method of the operation speed are not limited to the above examples.

[0089] The above-mentioned method of determining whether the operation is delayed can be implemented by inserting a predetermined source code between source codes for implementing at least one preprocessing process. For example, when the target 30 of the calculation of the operation speed is the third preprocessing process and the fourth preprocessing process, the second processor 140 can insert a source code for determining an output value as a test value (e.g., take (1)), a source code for caching the test value in an area of ​​the memory 120 so that the test value can be kept in the memory 120 (e.g., cache ()), and a source code for repeatedly executing the third preprocessing process and the fourth preprocessing process for a test value before the source code for implementing the third preprocessing process (e.g., repeat ()). In addition, the second processor 140 can insert a source code to be stored in the memory 120 (e.g., GetNext ()) after the source code for implementing the fourth preprocessing process without using the final result value according to the result of executing the third preprocessing process and the fourth preprocessing process as the input value of the training process of the neural network model.

[0090] In order to enable the second processor 140 to automatically insert the source code as described above, instead of manually analyzing the source code by the user, it is necessary to classify the multiple pre-processing processes and identify whether each of the multiple pre-processing processes and the training process is first executed by the first processor 130 or the second processor 140. Therefore, the second processor 140 can classify the multiple pre-processing processes based on each operation structure (e.g., DAG structure) of the multiple pre-processing processes and the training process, and identify whether the multiple pre-processing processes and the training process are executed by the first processor 130 or the second processor 140.

[0091] Figure 4 is a diagram illustrating a method of performing at least a portion of a third pre-processing process and a fourth pre-processing process by an external device 200 according to an embodiment of the present disclosure, and Figure 5 is a block diagram illustrating a configuration of an external device 200 for performing at least a part of a pre-processing procedure according to the present disclosure, and a configuration of the electronic device 100 .

[0092] exist Figure 4 In the description of Figure 3 Similarly, it is assumed that a plurality of preprocessing processes and training processes are sequentially performed, and among the plurality of preprocessing processes, the third preprocessing process and the fourth preprocessing process are determined as the objects of calculation of the operation speed 30. In addition, in Figure 4 In the description, an implementation method of offloading at least a portion of the input values ​​of the 3rd preprocessing process and the 4th preprocessing process to the external device 200 is described in detail based on the assumption that a delay occurs in the operation in the 3rd preprocessing process and the 4th preprocessing process when calculating the first operation speed of the 3rd preprocessing process and the 4th preprocessing process among multiple preprocessing processes.

[0093] If the first operation speed is slower than the second operation speed, the second processor 140 may control the communicator 110 to transmit at least one of the input values ​​for the third preprocessing process and the fourth preprocessing process to the external device 200 connected to the electronic device 100. In addition, the second processor 140 may receive a processing result of the external device 200 on at least one input value from the external device 200 through the communicator 110, thereby obtaining an output value corresponding to the at least one input value.

[0094] Specifically, the external device 200 according to the present disclosure may include: Figure 5The external communicator 210 and the external processor 220 are shown. Like the communicator 110 of the electronic device 100, the external communicator 210 refers to a component capable of performing communication with the electronic device 100. In addition, similar to the second processor of the electronic device 100, the external processor 220 refers to a component capable of performing a plurality of pre-processing processes for the training process of the neural network model and capable of performing the process of determining whether the operation is delayed according to various embodiments of the present disclosure. At the same time, the external device 200 may not include a separate processor for the training process of the neural network model, such as the first processor 130 of the electronic device 100.

[0095] The second processor 140 may control the communicator 110 to send a test value for at least one pre-processing process to the external device 200. At this time, the external processor 220 of the external device 200 may receive the test value from the electronic device 100 through the external communicator 210. In addition, the external processor 220 of the external device 200 may calculate the third operation speed of the case where at least one pre-processing process is performed on the test value by the external processor 220 using the same method as the calculation method of the first operation speed described above. Thereafter, the external processor 220 of the external device 200 may control the external communicator 210 to send information indicating the third operation speed to the electronic device 100, and thus, the second processor 140 may receive the information indicating the third operation speed from the external device 200 through the communicator 110.

[0096] The second processor 140 may determine the number of at least one input value to be transmitted to the external device 200 among the input values ​​for at least one pre-processing process based on at least one of the difference between the first operation speed and the second operation speed, the third operation speed, and the transmission amount of data that can be transmitted through the bandwidth of the network connecting the electronic device 100 and the external device 200. In addition, various other factors may be used to determine the number of input values ​​for offloading.

[0097] In an embodiment, the second processor 140 may calculate the number of input values ​​that can be processed at an operation speed equal to the difference between the first operation speed and the second operation speed within a predetermined time period. For example, if the first operation speed indicates that 100 input values ​​can be calculated per second and the second operation speed indicates that 150 input values ​​can be calculated per second, this may be a case where the operation is delayed as much as the second processor 140 operates 50 input values ​​per second. Therefore, in this case, the second processor 140 may control the communicator 110 to send 50 input values ​​per second to the external device 200. That is, this embodiment may be referred to as an embodiment in which the second processor 140 unloads the input values ​​corresponding to the delay in the operation.

[0098] In an embodiment, the second processor 140 can calculate the number of input values ​​that can be processed at the third operation speed within a predetermined time period. For example, if the third operation speed indicates that 30 input values ​​can be operated per second, this means that even if the external device 200 receives more than 30 input values ​​per second, for input values ​​greater than 30 input values ​​per second, delays may also occur in the operation. Therefore, in this case, the second processor 140 can control the communicator 110 to send 30 input values ​​to the external device 200 per second. That is, this embodiment can be referred to as an embodiment of unloading sufficient input values ​​to solve the delay of the operation of the external processor 220 of the external device 200.

[0099] In an embodiment, the second processor 140 may calculate the number of input values ​​that can be transmitted through the bandwidth of the network during a predetermined time. Specifically, when sending input values ​​through the network, the second processor 140 may divide the bandwidth of the network by the data size to calculate the number of input values ​​that can be transmitted through the bandwidth of the network during a predetermined time. For example, if the number of input values ​​that can be transmitted for one second through the bandwidth of the network is 20, this means that even if the second processor 140 transmits more than 20 input values ​​to the external device 200 per second, the external device 200 may receive only 20 input values ​​per second through the external communicator 210. Therefore, in this case, the second processor 140 may control the communicator 110 to send 20 input values ​​to the external device 200 per second. That is, this embodiment may be an embodiment of unloading as many input values ​​as possible that are compatible with the bandwidth of the network.

[0100] In an embodiment, the second processor 140 may determine the minimum number of the number of input values ​​that can be processed at an operation speed equal to the difference between the first operation speed and the second operation speed for a predetermined period of time, the number of input values ​​that can be processed at a third operation speed for a predetermined period of time, and the number of input values ​​that can be transmitted through the bandwidth of the network during the predetermined period of time as the number of at least one input value that can be sent to the external device 200. In the above example, the second processor 140 may determine the minimum number 20 among 50, 30, and 20 as the number of at least one input value to be sent to the external device 200 per second, where 50 is the number of input values ​​that can be processed at an operation speed corresponding to the difference between the first operation speed and the second operation speed per second, 30 is the number of input values ​​that can be processed at the third operation speed per second, and 20 is the number of input values ​​that can be transmitted through the bandwidth of the network during the predetermined period of time.

[0101] In other words, the number of at least one input value to be transmitted to the external device 200 may be calculated using the formula RCthp=min(NB / d_size1, Gthp1-Cthp1, Cthp2). Here, RCthp refers to the number of at least one input value to be transmitted to the external device 200, that is, the maximum throughput of data that can be offloaded to the external processor 220 of the external device 200 for processing. In addition, Cthp1 refers to the number of input values ​​of the first processor 130 according to the first operating speed, Gthp1 refers to the number of input values ​​of the second processor 140 according to the second operating speed, Cthp2 refers to the number of input values ​​of the external processor 220 according to the third operating speed, and NB / d_size refers to the number of input values ​​that can be transmitted through the bandwidth of the network.

[0102] Specifically, the second processor 140 may calculate at least one of NB / d_size1, Gthp1-Cthp1, and Cthp2, and calculate the minimum value RCthp among the calculated values. In addition, the second processor 140 sends the input value equal to RCthp to the external processor 220 to perform preprocessing, and the second processor 140 itself may perform preprocessing on the remaining input values. Although the throughput of the first processor 130 before performing the offloading according to the present disclosure is min(Ghp1, Cthp1), the throughput of the first processor 130 after performing the offloading is min(Ghp1, Cthp1+RCthp). Therefore, since min(Ghp1, Cthp1+RCthp) is always greater than or equal to min(Ghp1, Cthp1), the efficiency of the first processor 130 may be improved.

[0103] In the above, an embodiment in which the external device 200 performs the calculation process of the third operation speed and the electronic device 100 receives the information of the third operation speed is described, but the electronic device 100 may also perform the process of calculating the third operation speed. Specifically, the second processor 140 may control the communicator 110 to send a test value used for at least one preprocessing process to the external device 200, and when the second processor 140 receives the processing result of the test value by the external device 200 from the external device 200 through the communicator 110, the second processor 140 may calculate the third operation speed based on the time point when the test value is sent to the external device 200 and the time point when the processing result is received from the external device 200.

[0104] exist Figures 3 to 5In the embodiment, based on the assumption that an operation delay occurs in a process including the third preprocessing process and the fourth preprocessing process, at least a portion of the third preprocessing process and the fourth preprocessing process are performed by the external device 200, but the above embodiment can also be applied to each of the third preprocessing process and the fourth preprocessing process so that the second processor 140 clearly identifies the process that causes the operation delay in the third preprocessing process and the fourth preprocessing process.

[0105] According to the above reference Figures 3 to 5 According to the described embodiment, when there is a portion causing operation delay during the preprocessing process, the electronic device 100 can send an input value sufficient to resolve the operation delay to the external device 200, thereby effectively resolving the bottleneck phenomenon caused by the preprocessing.

[0106] Figure 6 is a block diagram illustrating in detail the configuration of the electronic device 100 according to an embodiment of the present disclosure.

[0107] like Figure 6 As shown, in addition to the communicator 110, the memory 120, the first processor 130 and the second processor 140, the electronic device 100 according to an embodiment of the present disclosure may further include an input unit 150 and an output unit 160. However, Figure 1 and Figure 6 The components shown in the figure are examples only, and in practicing the present disclosure, except Figure 1 and Figure 6 In addition to the components shown in FIG. 1 , new components may be added or some components may be omitted.

[0108] The input unit 150 may include a circuit, and the processor may receive a user command for controlling the operation of the electronic device 100 through the input unit 150. Specifically, the input unit 150 may include components such as a microphone, a camera, and a remote control signal receiving unit. In addition, the input unit 150 may be implemented as a touch screen included in a display. In particular, the microphone may receive an audio signal and convert the received audio signal into an electrical signal.

[0109] Specifically, in various embodiments according to the present disclosure, the second processor 140 may receive user input for training a neural network model through the input unit 150, calculate an operation speed according to the present disclosure, and receive user input for executing the transmission of an input value. In addition, the second processor 140 may receive user input through the input unit 150 to receive information on the calculation results of the operation speed and the bottleneck relief rate according to the transmission of the input value.

[0110] The output unit 160 may include a circuit, and a processor may output various functions that the electronic device 100 may perform through the output unit 160. In addition, the output unit 160 may include at least one of a display, a speaker, and an indicator.

[0111] The display may output image data under the control of the processor. Specifically, the display may output an image pre-stored in the memory 120 under the control of the processor.

[0112] Specifically, the display according to an embodiment of the present disclosure may display a user interface stored in the memory 120. Depending on circumstances, the display may be implemented as a liquid crystal display panel (LCD), an organic light emitting diode (OLED), etc., and the display may also be implemented as a flexible display, a transparent display, etc. However, the display according to the present disclosure is not limited to a specific type.

[0113] The speaker may output audio data under the control of the processor, and the indicator may turn on under the control of the processor.

[0114] Specifically, in various embodiments according to the present disclosure, the second processor 140 may output information about the calculation results of the operation speed and the bottleneck relief rate according to the transmission of the input value through the output unit 160. For example, the second processor 140 may control the display to display information about the operation speed of the training process performed by the first processor 130, information about the operation speed of each preprocessing process performed by the first processor 130, and information about the operation speed of at least one preprocessing process performed by the external device 200. In addition, the second processor 140 may control the display to display information about the degree of relief of the operation delay by sending information about the degree to which the operation is delayed during each preprocessing process performed by the first processor 130 and at least one input value to the external device 200.

[0115] Figure 7 is a flowchart illustrating a method of controlling the electronic device 100 according to an embodiment of the present disclosure.

[0116] exist Figure 7 In the description, the electronic device 100 may include a first processor and a second processor, assuming that the training process of the neural network model can be performed by the first processor, and multiple preprocessing processes for the training process are performed by the second processor.

[0117] refer to Figure 7, the electronic device 100 may calculate a first operation speed of at least one preprocessing process among a plurality of preprocessing processes for a training process of a neural network model (S710). Specifically, when at least one preprocessing process among a plurality of preprocessing processes is determined as a calculation target of an operation speed, the electronic device 100 may store a test value for at least one preprocessing process in a memory, and calculate the first operation speed by repeatedly executing at least one preprocessing process based on the stored test value.

[0118] The electronic device 100 may calculate a second operation speed of the training process of the neural network model (S720). Specifically, the electronic device 100 may calculate the second operation speed by storing a test value for the training process in a memory and repeatedly performing the training process based on the stored test value. Figure 7 For convenience, the operation for calculating the first operation speed and the operation for calculating the second operation speed are separately specified, but there is no order restriction between the operation for calculating the first operation speed and the operation for calculating the second operation speed, and at least part of the operation for calculating the first operation speed and the operation for calculating the second operation speed can be performed simultaneously.

[0119] The electronic device 100 may identify whether the first operation speed is slower than the second operation speed (S730). Specifically, if the first operation speed is identified as slower than the second operation speed as a result of comparing the first operation speed with the second operation speed (S730-Y), the electronic device 100 may send at least one of the input values ​​for at least one pre-processing process to the external device 200 connected to the electronic device 100 (S740). In addition, the electronic device 100 may receive the processing result of the external device 200 on at least one input value from the external device 200 to obtain an output value corresponding to the at least one input value (S750).

[0120] Specifically, the first operation speed being slower than the second operation speed means that at least one preprocessing process performed by the second processor 140 is delayed before the training process performed by the first processor. Therefore, the second processor can offload at least one of the input values ​​for at least one preprocessing process to the external device 200, thereby minimizing the delay in the operation speed.

[0121] Specifically, the electronic device 100 can determine the number of at least one input value to be transmitted to the external device 200 among the input values ​​of at least one preprocessing process based on the difference between the first operating speed and the second operating speed, the third operating speed of at least one preprocessing process of the external device 200, and at least one of the transmission amount of data that can be transmitted through the bandwidth of the network connecting the electronic device 100 and the external device 200.

[0122] If the first operation speed is faster than the second operation speed (S730-N), the electronic device 100 may perform at least one pre-processing process on the at least one input value to obtain an output value corresponding to the at least one input value (S760).

[0123] Specifically, if the first operation speed is identified as being faster than the second operation speed (S730-N), it may be a case where at least one preprocessing process has no delay, so the second processor can obtain an output value corresponding to at least one input value by performing at least one preprocessing process on at least one input value by itself. In this case, the processor may calculate the first operation speed of one or more other preprocessing processes different from at least one preprocessing process as the calculation target of the operation speed, and compare the first operation speed with the second operation speed to identify whether a delay occurs in one or more preprocessing processes.

[0124] Meanwhile, the method of controlling the electronic device 100 according to the above-described embodiment may be implemented as a program and provided to the electronic device 100. Specifically, the program including the method of controlling the electronic device 100 may be stored and provided in a non-transitory computer-readable medium.

[0125] Specifically, in a non-transitory computer-readable recording medium including a program for executing a method for controlling the electronic device 100, the method for controlling the electronic device 100 may include: calculating a first operating speed of at least one preprocessing process among a plurality of preprocessing processes performed by a second processor and a second operating speed of a training process performed by the first processor, and when the first operating speed is slower than the second operating speed, sending at least one input value among the input values ​​for at least one preprocessing process to an external device 200 connected to the electronic device 100, and obtaining an output value corresponding to the at least one input value by receiving a processing result of the external device 200 on the at least one input value from the external device 200.

[0126] In the above, the method of controlling the electronic device 100 and the computer-readable recording medium including a program for executing the method of controlling the electronic device 100 have been briefly described, but this is only to omit redundant description, and various embodiments of the electronic device 100 may also be applied to the method of controlling the electronic device 100 and the computer-readable recording medium including a program for executing the method of controlling the electronic device 100.

[0127] According to various embodiments of the present disclosure as described above, the electronic device 100 identifies a portion causing operation delay during a preprocessing process performed before a training process of a neural network model, and transmits the input value of the portion to the external device 200, thereby resolving the bottleneck phenomenon caused by the preprocessing. In addition, when there is a portion causing operation delay during the preprocessing process, the electronic device 100 transmits as many input values ​​as possible that resolve the operation delay to the external device 200, thereby reducing the bottleneck phenomenon caused by the preprocessing.

[0128] Meanwhile, the functions related to the above can be executed by the memory and the processor.

[0129] The processor can be configured as one or more processors. In this case, the one or more processors can be general-purpose processors (such as CPUs and APs), graphics-only processors (such as GPUs and VPUs), or AI-only processors (such as NPUs).

[0130] The one or more processors are controlled to process input data according to predefined operation rules or AI models stored in non-volatile memory or volatile memory. The predefined operation rules or AI models are made by training

[0131] Here, training may refer to, for example, a predefined operating rule or AI model with desired characteristics by applying a training algorithm to a plurality of training data. Such training may be performed in the device itself in which the AI ​​according to the present disclosure is executed, or may be performed by a separate server / system.

[0132] The AI ​​model can be configured with multiple neural network layers. Each layer has multiple weight values, and the layer operation is performed by the operation of the previous layer and the operation between multiple weights. Examples of neural networks include convolutional neural networks (CNNs), deep neural networks (DNNs), recurrent neural networks (RNNs), restricted Boltzmann machines (RBMs), deep belief networks (DBNs), bidirectional recurrent deep neural networks (BRDNNs), and GANs (Generative Adversarial Networks) and deep Q networks, which are not limited to the above examples.

[0133] The training algorithm may refer to a method of, for example, using a plurality of training data to train a predetermined target device (e.g., a robot) so that the predetermined target device can make decisions or predictions by itself. Examples of the training algorithm include supervised training, unsupervised training, semi-supervised training, or reinforcement training, and the training algorithm in the present disclosure is not limited to the above examples except for specified cases.

[0134] The device-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-transitory storage medium' simply means that it is a tangible device and does not contain signals (e.g., electromagnetic waves). The term does not distinguish between a case where data is semi-permanently stored in a storage medium and a case where data is temporarily stored. For example, a "non-transitory storage medium" may include a buffer that temporarily stores data.

[0135] According to an embodiment, the method according to various embodiments of the present disclosure may be included and provided in a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., a compact disc read-only memory (CD-ROM)), or distributed online (e.g., downloaded or uploaded) via an application store (e.g., PlayStore™), or distributed directly between two user devices (e.g., smart phones). If distributed online, at least a portion of the computer program product (e.g., a downloadable app) may be temporarily generated or at least temporarily stored in a machine-readable storage medium, such as a memory of a manufacturer's server, an application store's server, or a relay server.

[0136] According to various embodiments, each of the above-mentioned components (e.g., a module or a program) may include a single entity or multiple entities. According to various embodiments, one or more of the above-mentioned components may be omitted, or one or more other components may be added. Alternatively or additionally, multiple components (e.g., modules or programs) may be integrated into a single component. In this case, according to various embodiments, the integrated component may still perform one or more functions of each of the multiple components in the same or similar manner as performed by a corresponding one of the multiple components before integration.

[0137] According to various embodiments, operations performed by a module, a program, or another component may be performed sequentially, in parallel, repeatedly, or heuristically, or one or more of the operations may be performed in a different order or omitted, or one or more other operations may be added.

[0138] Meanwhile, the term "module" used herein may refer to a unit including, for example, one or more combinations of hardware, software, and firmware, and may be used interchangeably with the terms "logic", "logic block", "component", and "circuit". A "module" may be the smallest unit of an integrated part or may be a part thereof. A "module" may be the smallest unit for performing one or more functions or a part thereof. For example, a "module" may include an application specific integrated circuit (ASIC).

[0139] Various embodiments of the present disclosure may be implemented by software including instructions stored in a machine-readable storage medium readable by a machine (e.g., a computer). The machine may be a device that calls instructions from the machine-readable storage medium and operates according to the called instructions, and may include an electronic device (e.g., electronic device 100) according to an embodiment of the present disclosure.

[0140] When the instruction is executed by the processor, the processor may directly or use other components under the control of the processor to perform the function corresponding to the instruction. The instruction may include a code generated or executed by a compiler or interpreter.

[0141] In the above, specific embodiments have been illustrated and described, but the present disclosure is not limited to the above specific embodiments, and ordinary technicians in the field are related to the present disclosure without departing from the subject matter of the claims. Of course, various modifications can be made through the present disclosure, and these modifications should not be understood separately from the technical spirit or perspective of the present disclosure.

Claims

1. An electronic device, comprising: communicator; at least one memory configured to store data for the neural network model; At least one first processor configured to execute a training process of the neural network model; and at least one second processor configured to: Performing a plurality of preprocessing processes for the training process, determining a first operating speed of at least one preprocessing process among the plurality of preprocessing processes executed by the at least one second processor and a second operating speed of the training process executed by the at least one first processor, controlling the communicator to transmit at least one input value for the at least one pre-processing process to an external device connected to the electronic device based on the first operating speed being slower than the second operating speed, and The communicator receives from the external device a result of processing the at least one input value by the external device to obtain an output value corresponding to the at least one input value.

2. The electronic device according to claim 1, wherein: The at least one second processor is further configured to: storing test values ​​of the at least one pre-processing process in the at least one memory, and The first operation speed is determined by repeatedly performing the at least one pre-processing process based on the stored test values.

3. The electronic device according to claim 2, wherein: The at least one second processor is further configured to obtain an output value corresponding to the at least one input value by performing the at least one preprocessing process on the at least one input value based on the first operating speed being faster than the second operating speed.

4. The electronic device according to claim 2, wherein: The at least one second processor is further configured to: controlling the communicator to send the test value to the external device, receiving information indicating a third operation speed from the external device through the communicator based on the at least one pre-processing process performed by the external device for the test value, and The number of the at least one input value for the at least one preprocessing process to be transmitted to the external device is determined based on at least one of the difference between the first operating speed and the second operating speed, the third operating speed, and the transmission amount of data transmittable through the bandwidth of the network connecting the electronic device and the external device.

5. The electronic device according to claim 4, wherein: The at least one second processor is further configured to determine, as the number of the at least one input value to be sent to the external device, a minimum number of input values ​​that can be processed at a computing speed equal to a difference between the first computing speed and the second computing speed within a predetermined time period, a number of input values ​​that can be processed at the third computing speed during the predetermined time period, and a number of input values ​​that can be transmitted through the bandwidth of the network during the predetermined time period.

6. The electronic device according to claim 2, wherein: The at least one second processor is further configured to determine the third operating speed based on a processing result of the test value by the external device received from the external device through the communicator, and based on a time point when the test value is sent to the external device and a time point when the processing result is received from the external device.

7. The electronic device according to claim 1, wherein: The at least one second processor is also configured to determine the first operating speed based on information about the operating speed of a processing process having the same operating structure as the operating structure of the at least one preprocessing process stored in the at least one memory, and based on information about the operating speed stored in the at least one memory.

8. The electronic device according to claim 1, wherein: The at least one first processor includes a graphics processing unit (GPU) or a neural processing unit (NPU), and the at least one second processor includes a central processing unit (CPU) or a microprocessor unit (MPU).

9. A method for controlling an electronic device, the method comprising: Calculating a first operation speed of at least one preprocessing process among a plurality of preprocessing processes executed by at least one second processor of the electronic device and a second operation speed of a training process of a neural network model executed by at least one first processor of the electronic device; transmitting at least one input value for the at least one pre-processing process to an external device connected to the electronic device based on the first operating speed being slower than the second operating speed, and An output value corresponding to the at least one input value is obtained by receiving a processing result of the at least one input value by the external device from the external device.

10. The method according to claim 9, wherein: The calculations include: storing test values ​​of the at least one pre-processing process in at least one memory of the electronic device; and The first operation speed is determined by repeatedly performing the at least one pre-processing process based on the stored test values.

11. The method according to claim 10, further comprising: Based on the fact that the first operation speed is faster than the second operation speed, an output value corresponding to the at least one input value is obtained by performing the at least one preprocessing process on the at least one input value.

12. The method according to claim 10, further comprising: sending the test value to the external device; receiving information indicating a third operation speed from the external device based on the at least one pre-processing process performed by the external device on the test value; and The number of the at least one input value for the at least one preprocessing process to be transmitted to the external device is determined based on at least one of the difference between the first operating speed and the second operating speed, the third operating speed, and the transmission amount of data transmittable through the bandwidth of the network connecting the electronic device and the external device.

13. The method according to claim 12, wherein: Determining the number of the at least one input value includes: determining the minimum number of the number of input values ​​that can be processed at a computing speed equal to the difference between the first computing speed and the second computing speed within a predetermined time period, the number of input values ​​that can be processed at the third computing speed during the predetermined time period, and the number of input values ​​that can be transmitted through the bandwidth of the network during the predetermined time period as the number of the at least one input value to be transmitted to the external device.

14. The method according to claim 10, further comprising: The third operation speed is determined based on receiving a processing result of the test value by the external device from the external device, based on a time point when the test value is sent to the external device and a time point when the processing result is received from the external device.

15. The method according to claim 9, wherein the calculating comprises: Based on information stored in the at least one memory about an operation speed of a processing process having the same operation structure as that of the at least one preprocessing process, the first operation speed is determined based on information about the operation speed stored in the at least one memory.

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