Scanning impedance measurement in radio frequency plasma processing chamber
By using an RF matcher to measure and adjust impedance parameters in the plasma processing system, the problem of reducing RF power transmission efficiency caused by rapid changes in plasma load impedance is solved, and a more efficient and consistent plasma processing effect is achieved.
Patent Information
- Application Number
- CN202280099796.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-09-07
- Filing Date
- 2022-12-06
- Publication Date
- 2025-04-11
AI Technical Summary
When existing plasma processing systems provide RF waveforms and DC pulse voltage waveforms, they cannot effectively adjust the RF matching points to adapt to the rapid changes in plasma load impedance, resulting in reduced RF power transmission efficiency and inconsistent processing results.
By using an RF matcher in a plasma processing system, the impedance-related data of the plasma processing system is measured, and the combined impedance parameters are calculated based on these data, and the matching parameters of the RF matcher are adjusted to achieve a more suitable matching point.
The transmission efficiency of RF power is improved, the reflected power is reduced, and the consistency and quality of plasma processing results are improved.
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Figure CN119816914A_ABST
Abstract
Description
background field
[0001] Embodiments of the present invention generally relate to systems and methods used in semiconductor device fabrication. More specifically, embodiments provided herein generally include systems and methods for processing substrates in a plasma processing system. Background Art
[0002] Reliably forming high aspect ratio features is one of the key technical challenges for next generation semiconductor devices. One method of forming high aspect ratio features uses a plasma assisted etching process, such as a reactive ion etching (RIE) plasma process, to form high aspect ratio openings in a material layer (such as a dielectric layer) of a substrate. In a typical RIE plasma process, a plasma is formed in a processing chamber and ions from the plasma are accelerated toward a surface of a substrate to form an opening in a material layer disposed below a mask layer formed on the surface of the substrate.
[0003] A typical reactive ion etch (RIE) plasma processing chamber includes a radio frequency (RF) bias generator that provides an RF voltage to a power electrode. In a capacitively coupled gas discharge, the plasma is generated using a radio frequency (RF) generator that is coupled to a power electrode disposed within an electrostatic chuck (ESC) assembly or within another portion of the processing chamber. Typically, an RF matching network ("RF matcher") tunes the RF waveform provided from the RF generator to transfer the RF power to a 50Ω apparent load to minimize reflected power and maximize power transfer efficiency. If the impedance of the load is not properly matched to the impedance of the source (e.g., an RF generator), a portion of the forward transmitted RF waveform may be reflected back in the opposite direction along the same transmission line.
[0004] Many plasma processes also utilize a DC voltage pulse scheme to control a plasma sheath disposed on a substrate being processed. During operation, the DC voltage pulse switches the generated plasma sheath between a state including a thick plasma sheath and a state in which the plasma sheath is absent. Typically, the DC pulse technique is configured to transmit voltage pulses at a frequency greater than 100 kHz, such as greater than 400 kHz. The switching of the plasma sheath caused by the transmission of the DC pulse voltage waveform results in a plasma load having an impedance value that varies over time. It has been found that different plasma processing results may result from the interaction between the RF waveform and the DC pulse voltage waveform provided simultaneously during plasma processing, largely due to the inability of the RF matcher portion of the RF power transmission system to adjust the RF matching point to account for the rapidly changing plasma load impedance value over time. Conventional impedance matching components and matching processes are unable to keep up with the rapid changes in the plasma load impedance amplitude, resulting in the matcher finding an undesirable matching point, which typically results in a varying amount of RF power actually transmitted to the plasma load due to: (1) intermodulation distortion (IMD) of the RF signal; and (2) undesirable high reflected RF power found at harmonics of the driving RF frequency. Intermodulation distortion generated by the interaction between the RF and DC pulsed voltage waveforms results in at least the amplitude of the RF signal varying over time. The interaction or intermodulation between the RF and DC pulsed voltage waveforms results in additional undesirable waveform components being formed at frequencies that are not just harmonic frequencies (i.e., integer multiples) of the interacting signal (such as either the RF or DC pulsed waveforms). The generation of IMD components in the power delivery system will reduce the actual forward RF power delivered to the plasma load. Due to at least the inevitable differences in the processing chamber power delivery configuration and the differences in the power delivery components, the rapidly changing plasma load impedance values result in undesirable differences in the plasma processing results seen in a single plasma processing chamber, which can be seen in similarly configured processing chambers on a single processing system, and can also be seen in similarly configured plasma processing chambers in different plasma processing systems within a semiconductor manufacturing site. In addition, due to the wide range of frequencies that may be generated during plasma processing in the same or different processing chambers, the generated IMD components are also not easily accounted for in most power delivery systems, and thus may result in unexpected variations in the power actually delivered to the plasma load during plasma processing.
[0005] Therefore, there is a need in the art for a plasma processing apparatus and a bias method that can at least solve the above problems. Summary of the invention
[0006] The embodiment of the present disclosure includes a method for processing a substrate in a plasma processing system, the method including the following steps: transmitting an RF signal from an RF generator to an electrode assembly disposed in the plasma processing system through an RF matcher, wherein the RF matcher is set to a first matching point while transmitting the RF signal; and transmitting a voltage waveform to the electrode assembly disposed in the plasma processing system by a waveform generator, while transmitting the RF signal to the electrode assembly. The method further includes the following steps: receiving a synchronization signal from an RF generator or a waveform generator by the RF matcher; measuring a first set of impedance-related data of the plasma processing system by an output sensor of the RF matcher in a first time period, the first time period starting after a first delay, the first delay being triggered by a first portion of a first waveform pulse of the synchronization signal; measuring a second set of impedance-related data of the plasma processing system by the output sensor of the RF matcher in a second time period, the second time period starting after a second delay, the second delay being triggered by a first portion of a first waveform pulse of the synchronization signal; calculating a combined impedance parameter by the RF matcher based on the measured first set of impedance-related data and the measured second set of impedance-related data; and adjusting the matching parameters in the RF matcher based on the calculated combined impedance parameter to achieve a second matching point.
[0007] Embodiments of the present application may further provide a method for processing a substrate in a plasma processing system, the method comprising the following steps: generating plasma in a processing space of the plasma processing system, wherein the plasma is generated by transmitting an RF waveform, the transmitting RF waveform comprising sequentially transmitting a first RF pulse and a second RF pulse; the first RF pulse comprises a first RF power level, and the second RF pulse comprises a second RF power level; and the sequentially transmitted first RF pulse and second RF pulse are formed by transmitting an RF signal through an RF matcher and to an electrode assembly of the plasma processing system. The method further comprises the following steps: detecting a transition region between the first RF pulse and the second RF pulse; determining a scan impedance of the plasma processing system during the transition region between the first RF pulse and the second RF pulse; determining a baseline impedance of the plasma processing system during the first RF pulse or the second RF pulse; and calculating a combined impedance parameter based on the scan impedance and the baseline impedance.
[0008] Embodiments of the present application may further provide a plasma processing system, comprising: an RF generator, wherein the RF generator is configured to transmit an RF signal to an electrode assembly disposed in the plasma processing system through an RF matcher, wherein the RF matcher is set to a first matching point while transmitting the RF signal; and a voltage waveform generator, wherein the voltage waveform generator is configured to transmit a voltage waveform to the electrode assembly disposed in the plasma processing system while the RF signal is transmitted to the electrode assembly. The RF matcher includes: an input sensor; an output sensor; an RF matcher controller; and a memory, wherein the memory is used to store a program to be executed in the RF matcher controller, the program including instructions, which when executed cause the RF matcher controller to: receive a synchronization signal from an RF generator or a waveform generator by the RF matcher; use the output sensor to measure a first set of impedance-related data of the plasma processing system within a first time period, the first time period starts after a first delay, and the first delay is triggered by a first part of a first waveform pulse of the synchronization signal; use the output sensor of the RF matcher to measure a second set of impedance-related data of the plasma processing system within a second time period, the second time period starts after a second delay, and the second delay is triggered by a first part of the first waveform pulse of the synchronization signal; calculate a combined impedance parameter by the RF matcher controller based on the measured first set of impedance-related data and the measured second set of impedance-related data; and adjust the matching parameters in the RF matcher based on the calculated combined impedance parameters to achieve a second matching point. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] In order to understand the manner of the above-mentioned features of the present disclosure in more detail, a more detailed description of the present disclosure briefly summarized above can be obtained by reference to the embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings illustrate only exemplary embodiments and therefore should not be considered to limit the scope of the embodiments, and other equally effective embodiments may be allowed.
[0010] Figure 1 is a simplified schematic diagram of a plasma processing system according to one or more embodiments.
[0011] Figure 2 is a schematic cross-sectional view of a plasma processing system according to one or more embodiments, which may be configured to perform one or more of the plasma processing methods described herein.
[0012] Figure 3A is a schematic diagram of a radio frequency (RF) power delivery system according to one or more embodiments.
[0013] Figure 3B and Figure 3CAn example of a tuning circuit that may be used within a radio frequency (RF) power delivery system in accordance with one or more embodiments is illustrated.
[0014] Figure 4 A voltage pulse is illustrated provided within a voltage waveform established at a substrate as a result of transmitting a voltage pulse to a bias electrode during plasma processing in accordance with one or more embodiments.
[0015] FIG. 5A to FIG. 5D Each illustrates a voltage pulse provided within a voltage waveform transmitted to a bias electrode and a synchronization signal transmitted to an RF matcher during plasma processing according to one or more embodiments.
[0016] Figure 6 Illustrated are multiple synchronization signals provided during plasma processing according to one or more embodiments.
[0017] Fig. 7A Multiple RF pulses provided to an electrode during plasma processing are illustrated according to one or more embodiments.
[0018] Figure 7B Illustrated are examples of measured values of resistance (R) and reactance (X) generated by delivering RF pulses to a complex load as a function of time during plasma processing in accordance with one or more embodiments.
[0019] FIG. 8A to FIG. 8C Methods of using an RF plasma processing system according to certain embodiments are illustrated.
[0020] Fig. 9 Illustrated is a method of using an RF plasma processing system when multiple RF pulses are provided to electrodes of the plasma processing system in accordance with certain embodiments.
[0021] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation. DETAILED DESCRIPTION
[0022] Embodiments of the present disclosure generally relate to a system used in a semiconductor device manufacturing process. More specifically, embodiments provided herein generally include an apparatus and method for synchronizing and controlling the transmission of an RF bias signal to one or more electrodes disposed within a plasma processing chamber to better control the efficient transmission of RF power to a plasma formed in a processing region of the plasma processing chamber.
[0023] Figure 11 is a schematic diagram of a processing system according to one or more embodiments, the processing system being configured to implement one or more of the methods described herein. In some embodiments, the plasma processing system 10 is configured for a plasma-assisted etching process, such as a reactive ion etching (RIE) plasma process. The plasma processing system 10 may also be used in other plasma-assisted processes, such as a plasma-enhanced deposition process, such as a plasma-enhanced chemical vapor deposition (PECVD) process, a plasma-enhanced physical vapor deposition (PEPVD) process, a plasma-enhanced atomic layer deposition (PEALD) process, a plasma treatment process, a plasma-based ion implantation process, or a plasma doping (PLAD) process. In one configuration, as Figure 1 As shown, the plasma processing system 10 is configured to form a capacitively coupled plasma (CCP). However, in some embodiments, the plasma may alternatively be generated by an inductively coupled source disposed above a processing region of the plasma processing system 10.
[0024] The plasma processing system 10 includes a processing chamber 100, a chamber lid 123, a system controller 126, a substrate support assembly 136, a gas delivery system 182, a high voltage power supply 173, a pulse voltage (PV) waveform generator 175, a radio frequency (RF) generator 171, and an RF match 172. In some embodiments, the RF generator 171 and the PV waveform generator 175 are both coupled to the substrate support assembly 136. The RF generator 171 is configured to transmit an RF signal to ignite and maintain the plasma 101 in the processing space 129 of the processing chamber 100. The PV waveform generator 175 is configured to transmit a pulse voltage (PV) waveform to bias the substrate support assembly 136.
[0025] The system controller 126 is communicatively coupled to both the RF generator 171 and the PV waveform generator 175. The system controller 126 is used to control a process sequence for processing a substrate. The system controller 126 is coupled to the RF generator 171 using a first communication line 181 and to the PV waveform generator 175 using a second communication line 187. The system controller 126 is configured to send command signals to the RF generator 171 and the PV waveform generator 175 via their respective communication lines 181, 187. The communication lines 181, 187 are also used to transfer data and synchronize the transmission of RF signals and PV waveform signals, respectively, from the RF generator 171 and the PV waveform generator 175 to desired electrodes within the processing chamber.
[0026] The RF generator 171 is coupled to the electrodes in the substrate support assembly 136 via the RF matcher 172 disposed between the RF matcher 172 and the substrate support assembly 136. The RF matcher 172 includes an input sensor 116 and an output sensor 117. The input sensor is configured to measure impedance-related parameters and other characteristics of the RF generator 171 (i.e., source), such as voltage, current, harmonics, phase, power, and combinations of the above items. The output sensor 117 is configured to measure impedance-related data of the plasma processing system 10, such as voltage, current, harmonics, phase, power, impedance, and combinations of the above items (e.g., the plasma 101 generated in the processing space 129, referred to as the load). If the load impedance and the source impedance do not match, a portion of the RF waveform may be reflected back in the opposite direction. Therefore, the RF matcher 172 is configured to adjust one or more electrical components of the electrical components of the RF matcher 172 in the RF matcher 172 based on the impedance measured by the input sensor 116 and the output sensor 117 during processing. This will be described in more detail below.
[0027] However, as further described below, in a plasma processing configuration in which a PV waveform is provided simultaneously with an RF signal to one or more electrodes disposed within the processing region 129 to form the plasma 101 in the processing region 129, the impedance of the complex load generated by the plasma 101 will fluctuate due, at least in part, to the varying RF power level and / or varying voltage applied in each of the voltage pulses provided in the PV waveform provided by the PV waveform generator 175. In some other plasma processing configurations in which a pulsed RF signal is provided to the processing region 129 of the plasma processing chamber 100 to form the plasma 101 in the processing region 129, the impedance of the complex load generated by the plasma 101 will fluctuate due, at least in part, to the varying RF power level. The varying impedance of the complex load requires an RF matching element to perform impedance tuning adjustments in response to the varying impedance to ensure that the maximum forward RF power is provided to the complex load while minimizing the amount of reflected power at all times, and the RF matching element is used to ensure efficient transmission of the RF power to the complex load. However, most RF conventional RF matches include mechanical tuning elements that cannot keep up with the rate at which complex load impedance changes, which can result in large fluctuations in the matching point, the amount of reflected RF power and inefficiencies, and / or damage to the power delivery system.
[0028] In some embodiments, the PV waveform generator 175 is coupled to electrodes disposed in the substrate support assembly 136 via a filter 109 disposed between the PV waveform generator 175 and the substrate support assembly 136. The filter 109 is configured to isolate the PV waveform generator 175 from RF signals and other signals generated within the processing chamber 100 during plasma processing.
[0029] In order to control and synchronize the transmission of RF signals from the RF generator 171 to the electrodes within the processing chamber 100 through the RF matcher 172, the RF generator 171 is also separately coupled to the RF matcher 172 using a third communication line 188. The third communication line 188 is configured to enable bidirectional communication between the RF matcher 172 and the RF generator 171 to control the RF signal and efficiently transmit the RF signal to the complex load. In order to control and synchronize the transmission of the PV waveform from the PV waveform generator 175 to the electrodes within the processing chamber 100, the PV waveform generator 175 is also coupled to the RF matcher 172 using a fourth communication line 190. The fourth communication line 190 is also configured to enable bidirectional communication between the RF matcher 172 and the PV waveform generator 175 to help control and synchronize the transmission of the PV waveform and RF signal to the complex load. In some embodiments, the RF generator 171 is configured to transmit a synchronization signal to the RF matcher 172 via the third communication line 188. In some embodiments, the PV waveform generator 175 is configured to transmit a synchronization signal to the RF matcher 172 via the fourth communication line 190. In some embodiments, the synchronization signal transmitted from the RF generator 171 or the synchronization signal transmitted from the PV waveform generator 175 is used to trigger the output sensor 117 to obtain impedance-related data of the plasma processing system 10. This will be described in more detail below. In some embodiments, the synchronization signals transmitted from the RF generator 171 and the PV waveform generator 175 are also received by the RF matcher 172 and transmitted from the RF matcher 172 to the PV waveform generator 175 and the RF generator 171, respectively, to allow synchronization of the RF matcher 172, the PV waveform generator 175, and the RF generator 171.
[0030] In some embodiments, a high voltage power supply 173 is also coupled to an electrode disposed within the substrate support assembly 136. The high voltage power supply 173 is configured to provide a clamping voltage to the substrate support assembly 136. The high voltage power supply 173 is coupled to the substrate support assembly 136 via a filter 109. The filter is disposed between the high voltage power supply 173 and the substrate support assembly 136.
[0031] The gas delivery system 182 is coupled to the processing volume 129 of the processing chamber 100. The gas delivery system 182 is configured to deliver at least one processing gas from at least one gas processing source 119 to the processing volume 129 via one or more gas inlets 128 positioned through the chamber lid 123.
[0032] Figure 2 yes Figure 1, the plasma processing system 10 is configured to perform one or more of the plasma processing methods described herein. In one configuration, as Figure 2 As shown, the plasma processing system 10 is configured to form a capacitively coupled plasma (CPP). However, in some embodiments, the plasma 101 may alternatively be generated by using an inductively coupled source disposed above the processing region 129 of the plasma processing system 10. In this configuration, the coil may be placed on top of the ceramic lid (vacuum boundary) of the processing chamber 100.
[0033] The plasma processing system 10 includes a processing chamber 100, a substrate support assembly 136, a gas delivery system 182, a power system 183, an RF power system 189, and a system controller 126. Figure 2 As shown, the processing chamber 100 includes a chamber body 113, which includes a chamber lid 123, one or more sidewalls 122, and a chamber base 124. The chamber lid 123, one or more sidewalls 122, and the chamber base 124 collectively define a processing space 129. The one or more sidewalls 122 and the chamber base 124 generally include a material (such as aluminum, an aluminum alloy, or a stainless steel alloy) that is sized and shaped to form a structural support for the elements of the processing chamber 100 and is configured to withstand pressure and increased energy applied to the material while generating the plasma 101 within a vacuum environment maintained in the processing space 129 of the processing chamber 100 during processing. The substrate 103 is loaded into and removed from the processing space 129 through an opening (not shown) in one of the sidewalls 122. During plasma processing of the substrate 103, the opening is sealed with a slit valve (not shown). A gas delivery system 182 coupled to a process volume 129 of the process chamber 100 includes a process gas source 119 and a gas inlet 128 disposed through a chamber lid 123. The gas inlet 128 is configured to deliver one or more process gases from the plurality of process gas sources 119 to the process volume 129.
[0034] As explained above, the processing chamber 100 further includes an upper electrode (eg, chamber lid 123) and a substrate support assembly 136 disposed in the processing space 129. Figure 2 As shown, in one embodiment, a radio frequency (RF) source is electrically coupled to a lower electrode (e.g., substrate support pedestal 107) disposed within substrate support assembly 136. RF generator 171 is configured to transmit RF signals to ignite and maintain plasma 101 between the upper electrode and the lower electrode. In some alternative configurations, RF generator 171 may also be electrically coupled to an upper electrode, such as chamber lid 123.
[0035] like Figure 2 As shown, the substrate support assembly 136 includes a substrate support 105, a substrate support base 107, an insulating plate 111, a ground plate 112, a plurality of lift pins 186, one or more substrate potential sensing assemblies 184, and a bias electrode 104. Each of the lift pins 186 is disposed through a through hole formed in the substrate support assembly 136 and is used to facilitate the transfer of the substrate 103 to and from the substrate receiving surface 105A of the substrate support 105. The substrate support 105 may include an electrostatic chuck, and the substrate support 105 is formed of a dielectric material. The dielectric material may include a bulk sintered ceramic material, a corrosion-resistant metal oxide (e.g., aluminum oxide (Al2O3), titanium oxide (TiO), yttrium oxide (Y2O3), a metal nitride material (e.g., aluminum nitride (AlN), titanium nitride (TiN)), a mixture thereof, or a combination thereof.
[0036] The substrate support base 107 is formed of a conductive material, such as aluminum, an aluminum alloy, or a stainless steel alloy. The substrate support base 107 is electrically insulated from the chamber base 124 by an insulating plate 111, and a ground plate 112 is interposed between the insulating plate 111 and the chamber base 124. In some embodiments, the substrate support base 107 is configured to adjust the temperature of the substrate support 105 and the substrate 103 disposed on the substrate support 105 during substrate processing. In some embodiments, the substrate support base 107 includes one or more cooling channels (not shown) disposed in the substrate support base 107, the one or more cooling channels being fluidly coupled to and in fluid communication with a cooling source (not shown), such as a coolant source or a substrate source having a relatively high electrical resistance. In other embodiments, the substrate support 105 includes a heater (not shown) to heat the substrate support 105 and the substrate 103 disposed on the substrate support 105.
[0037] The bias electrode 104 is embedded in the dielectric material of the substrate support 105. Typically, the bias electrode 104 is formed by one or more conductive parts. The conductive part typically includes a mesh, a foil, a plate, or a combination of the above. In some embodiments, the bias electrode 104 can be used as an adsorption rod (i.e., an electrostatic adsorption electrode) that is used to fix (e.g., electrostatically adsorb) the substrate 103 to the substrate receiving surface 105A of the substrate support 105. In general, a parallel plate structure is formed by the bias electrode 104 and a dielectric material layer disposed between the bias electrode 104 and the substrate receiving surface 105A. The dielectric material can typically have an equivalent capacitance C between about 5nF and about 50nF. ETypically, the thickness of the dielectric material (e.g., aluminum nitride (AlN), aluminum oxide (Al2O3), etc.) layer is between about 0.03 mm and about 5 mm, such as between about 0.1 mm and about 3 mm, such as between about 0.1 mm and about 1 mm, or even between about 0.1 mm and 0.5 mm. The bias electrode 104 is electrically coupled to a clamping network that provides a clamping voltage to the bias electrode 104. The clamping network includes a high voltage DC voltage source 173 coupled to a filter 178A of a filter assembly 178, the filter 178A being disposed between the high voltage power source 173 and the bias electrode 104. In one example, the filter 178A is a low pass filter that is configured to block RF frequencies and pulsed voltage (PV) waveform signals provided by other bias components within the processing chamber 100 from reaching the high voltage power source 173 during plasma processing. In one configuration, the static DC voltage is between about -5000 V and about 5000 V and is transmitted using an electrical conductor, such as a coaxial power transmission line 106. In some embodiments, the bias electrode 104 can also bias the substrate 103 relative to the plasma 101 using one or more of the pulsed voltage biasing schemes described in further detail below using a PV waveform generator 175.
[0038] In some configurations, the substrate support assembly 136 further includes an edge control electrode 115. The edge control electrode 115 is formed of one or more conductive portions. The conductive portions typically include a mesh, a foil, a plate, or a combination thereof. The edge control electrode 115 is positioned below the edge ring 114 and surrounds the bias electrode 104 and / or is disposed at a distance from the center of the bias electrode 104. Generally speaking, for a processing chamber 100 configured to process a circular substrate, the edge control electrode 115 is annular in shape, made of a conductive material, and configured to surround at least a portion of the bias electrode 104. Figure 2 As shown, the edge control electrode 115 is positioned within the region of the substrate support 105 and is biased using an output provided from a pulsed voltage (PV) waveform generator 175. In one configuration, the edge control electrode 115 is biased using a different PV waveform generator than the PV waveform generator 175 used to bias the electrode 104. In another configuration, the edge control electrode 115 is biased by splitting a portion of the signal provided from the PV waveform generator 175 to the bias electrode 104.
[0039] like Figure 2 As shown, the power system 183 includes a high voltage power supply 173, a PV waveform generator 175, and a current source 177. The RF power system 189 includes a radio frequency (RF) generator 171, an RF matcher 172, and an RF filter 174. In one example, as Figure 2As shown, the power transmission line 163 electrically connects the output of the RF generator 171 to the RF match 172, the RF filter 174, and the substrate support pedestal 107. As previously described, during plasma processing, the high voltage power supply 173 provides a constant clamping voltage while the RF generator 171 transmits an RF signal to the processing region and the PV waveform generator 175 establishes a PV waveform at the bias electrode 104. Sufficient RF power is applied to the RF bias voltage signal, also referred to herein as an RF waveform, which is provided to the electrode (e.g., the substrate support pedestal 107) to form the plasma 101 in the processing volume 129 of the processing chamber 100. In one configuration, the RF waveform has a frequency range between about 1 MHz and about 200 MHz, such as between 2 MHz and 40 MHz.
[0040] In some embodiments, the power system 183 further includes a filter assembly 178 to electrically isolate one or more of the components contained within the power system 183. Power transmission line 160 electrically connects the output of the high voltage DC power source 173 to the filter assembly 178. Power transmission line 161 electrically connects the output of the PV waveform generator 175 to the filter assembly 178. Power transmission line 162 connects the output of the current source 177 to the filter assembly 178. In some embodiments, the current source 177 is selectively coupled to the bias electrode 104 by using a switch (not shown) disposed in the power transmission line 162 so as to allow the current source 177 to transmit a desired current to the bias electrode 104 during one or more phases (e.g., ion current phases) of the voltage waveform generated by the PV waveform generator 175. As shown in FIG. Figure 2 As shown, the filter assembly 178 includes a plurality of individual filter components (i.e., discrete filters 178A-178C) that are each electrically coupled to an output node via a power transmission line 164. In an alternative configuration, the filter assembly 178 includes a common filter that is electrically coupled to the output node via the power transmission line 164. The power transmission lines 160-164 include electrical conductors that include a combination of coaxial cables, such as a flexible coaxial cable connected in series with a rigid coaxial cable, an insulated high voltage corona-resistant connecting wire, a bare wire, a metal rod, an electrical connector, or any combination of the above.
[0041] The system controller 126 is also referred to herein as a processing chamber controller, and includes a central processing unit (CPU) 133, a memory 134, and a support circuit 135. The system controller 126 is used to control a process sequence for processing the substrate 103. The CPU is a general-purpose computer processor configured for use in an industrial environment to control a processing chamber and a subprocessor associated with the general-purpose computer processor. The memory 134 (usually a non-volatile memory) described herein may include a random access memory, a read-only memory, a hard drive, or other suitable forms of local or remote digital storage. The support circuit 135 is coupled to the CPU 133 in a conventional manner and includes a cache, a clock circuit, an input / output subsystem, a power source, etc., and a combination of the above items. Software instructions (programs) and data can be encoded and stored in the memory 134 for providing instructions to the processor in the CPU. The software program (or computer instructions) that can be read by the CPU 133 in the system controller 126 determines which tasks can be performed by the components in the plasma processing system 10.
[0042] Generally, the program readable by the CPU 133 in the controller 126 includes code that, when executed by the CPU 133, performs tasks associated with the plasma processing schemes described herein. The program may include instructions for controlling various hardware and electronic components within the plasma processing system 10 to perform various processing tasks and various process sequences for implementing the methods described herein. In one embodiment, the program includes instructions for performing the following instructions with respect to FIGS. 5 to 6. Fig. 9 Instructions for one or more operations in the described operations.
[0043] Figure 3A is a schematic diagram of an RF power delivery system according to one or more embodiments. Figure 3A A schematic diagram of an RF matcher 172 and an RF generator 171 is included, and the RF matcher 172 and the RF generator 171 are configured to implement the method described herein. The RF matcher 172 includes an RF matcher controller 302, an input sensor 116, an output sensor 117, a first RF filter 308, a second RF filter 310, a tuning circuit 312, an interlock 314, and a memory 316. The first RF filter 308 and the second RF filter 310 can be configured to block frequencies from other signals from being transmitted to the processing chamber 100 to avoid interference. For example, the first RF filter 308 and the second RF filter can be low-pass, high-pass, or band-pass filters.
[0044] The RF matcher 172 is configured to receive an RF waveform from the RF generator 171, tune the RF waveform to minimize reflected power and maximize power transfer efficiency, and transmit the tuned RF waveform to the processing chamber 100. In some embodiments, at the same time, as described above, the PV waveform generator 175 is configured to provide a PV waveform to the processing chamber 100. Both the RF generator 171 and the PV waveform generator 175 are coupled to the system controller 126 and synchronized by the system controller 126. The RF matcher controller 302 can be communicatively coupled to the interlock 314, the memory 316, the tuning circuit 312, the input sensor 116, and the output sensor 117. In some embodiments, the RF matcher controller 302 also communicates with an electronic device including a display and a user interface, such as a conventional computer (e.g., a user PC), which in some cases can form a part of the system controller 126. The RF matcher controller 302 includes a central processing unit (CPU). The RF matcher controller 302 is configured to control the tuning circuit 312 to change the impedance parameters of the RF matcher 172. The tuning circuit 312 described herein may be a T-network tuning circuit, a pi-network tuning circuit, an L-network circuit, etc. The tuning circuit 312 may include at least one electrical element, such as a variable capacitor and / or a variable inductor, which may be adjusted by the RF matcher controller 302 to change the impedance of the RF waveform transmitted to the processing chamber 100. Figure 3B and Figure 3C Examples of an L network tuning circuit and a pi network tuning circuit including variable capacitors C1 and C2 and C1, C2 and C3, respectively, are shown, which can be used to adjust the impedance of the tuning circuit 312 relative to the complex load and thus adjust the matching point of the RF matcher 172. The tuning circuit 312 has an input 312A directly or indirectly coupled to the input sensor 116 and an output 312B directly or indirectly coupled to the output sensor 117.
[0045] The memory 316 can be programmed for long-term or short-term memory storage. The memory 316 described herein is typically non-volatile memory and may include random access memory, read-only memory, a hard disk drive, or other suitable forms of local or remote digital storage. Software instructions (programs) and data may be encoded and stored in the memory 316 to provide instructions to the processor within the RF matcher controller 302. The software program (or computer instructions) readable by the RF matcher controller 302 determines which tasks may be performed by components in the plasma processing system 10. Typically, the program readable by the RF matcher controller 302 includes code that, when executed, performs tasks associated with the plasma processing scheme described herein. The program may include instructions for controlling the RF matcher 172 using the methods described herein. In one embodiment, the program includes instructions for executing the following description of FIG. 5A to FIG. 9 Instructions for one or more operations in the described operations.
[0046] The output sensor 117 may include a voltage sensor and / or a current sensor configured to measure the impedance or characteristics of a complex load formed within the plasma processing system 10 during processing, as explained above. In other words, the output sensor 117 is configured to measure impedance-related data of the complex load, such as current, voltage, phase, harmonics, power, and combinations thereof, and report the impedance-related data to the RF match controller 302. The RF match controller 302 may then determine the impedance based on the impedance-related data collected by the output sensor 117. The output sensor 117 may be disposed inside or outside the housing of the RF match 172, and in some embodiments, may be disposed at other locations in the processing chamber 100.
[0047] The input sensor 116 may include a voltage sensor and / or a current sensor configured to measure impedance-related data of a complex load, such as current, voltage, phase, harmonics, power, and a combination thereof, based on the RF waveform provided by the RF generator 171, and report the impedance-related data to the RF matcher controller 302. The RF matcher controller 302 may then determine the impedance based on the impedance-related data collected by the input sensor 116.
[0048] In an embodiment, the input sensor 116 and the output sensor 117 are each configured to measure impedance-related data based on (multiple) synchronization signals received from the RF generator 171 and / or the PV waveform generator 175. The synchronization signal can reach the sensor through multiple paths. For example, the RF synchronization signal can be transmitted from the RF generator 171 to the input sensor 116, the output sensor 117, and the PV waveform generator 175. The RF generator 171 can send the synchronization signal to the PV waveform generator 175, and the PV waveform generator 175 can forward the synchronization signal to the input sensor 116 and the output sensor 117.
[0049] During the processing of the sample, a first set of impedance related data during the data interval (discussed further below) may be triggered by a PVT sync signal, RF sync, an external sync signal from a signal generator, or internally by a detected pulse edge. In one example, the PV sync signal may be transmitted from the PV waveform generator 175 to the input sensor 116, the output sensor 117, and the RF generator 171. In another example, the PV waveform generator 175 may send a sync signal to the RF generator 171, and the RF waveform generator 171 may forward the sync signal to the input sensor 116 and the output sensor 117.
[0050] Figure 4 An example of a voltage pulse provided within a voltage waveform established at a substrate as a result of transmitting a voltage pulse to a bias electrode using a PV waveform generator 175 during plasma processing is shown in accordance with one or more embodiments. It has been discovered that establishing a PV waveform to a substrate during plasma processing can be advantageously used to control aspects of a plasma sheath formed over a substrate surface during plasma processing. Control of the magnitude and shape of the plasma sheath formed over a substrate surface allows for control of the interaction of ions with the substrate surface during processing, such as allowing for control of the ion energy distribution function (IEDF), ion directionality, and other plasma related characteristics. Figure 4An example of two separate voltage waveforms are illustrated that are established at a substrate 103 disposed on a substrate receiving surface 105A of a substrate support assembly 136 of a processing chamber as a result of transmitting a pulsed voltage waveform to a bias electrode 104 of the processing chamber. Waveform 225 is an example of a non-compensated pulsed voltage (PV) waveform established at a substrate 103 during plasma processing as a result of providing transmission of a PV waveform to the bias electrode 104. Waveform 230 is an example of a compensated pulsed voltage (PV) waveform established at a substrate 103 by applying a negative slope waveform to the bias electrode 104 of the processing chamber during the "ion current phase" portion of the PV waveform cycle using a current source 177. The compensated pulsed voltage (PV) waveform may alternatively be established by applying a negative voltage ramp during the ion current phase of the pulsed voltage waveform generated by the PV waveform generator 175.
[0051] exist Figure 4 2, waveforms 225 and 230 include two main phases: an ion current phase and a shell collapse phase. The two portions of waveforms 225 and 230 (the ion current phase and the shell collapse phase) can be established alternately and / or separately at the substrate 103 during plasma processing. At the beginning of the ion current phase, a voltage drop is generated at the substrate 103 due to the transmission of the negative portion of the PV waveform (e.g., the ion current portion) provided by the PV waveform generator 175 to the bias electrode 104, which creates a high pressure shell above the substrate 103. The high pressure shell allows the positive ions generated by the plasma to be accelerated toward the bias substrate during the ion current phase, thereby controlling the amount and characteristics of the etching process that occurs on the substrate surface during plasma processing for the RIE process. In some embodiments, it is desirable that the ion current phase generally includes a region of the pulsed voltage waveform that achieves a stable or minimally varying voltage at the substrate throughout the phase. It will be noted that significant changes in the voltage established at the substrate during the ion current phase (such as shown by the positive slope in waveform 225) will undesirably cause changes in the ion energy distribution function (IEDF) and therefore result in undesirable characteristics of etched features formed in the substrate during the RIE process.
[0052] The plasma sheath impedance varies with the PV waveform voltage applied in the PV waveform pulses provided from the PV waveform generator 175. When the PV waveform and the RF signal are simultaneously provided to the electrodes to form the plasma 101, because each voltage pulse of the PV waveform interacts with the RF signal provided by the RF generator 171, the load impedance generated by the plasma 101 will fluctuate based on the varying voltage applied in each voltage pulse of the PV waveform. Similarly, the load impedance generated by the plasma 101 may also fluctuate as the power level of the RF signal changes or a pulsed RF signal is used to form the plasma 101. Conventionally, the RF matcher is unable to determine these impedance changes and adjust the matching point in real time.
[0053] FIG. 5A to FIG. 5D and FIG. 8A to FIG. 8C A method of sampling impedance changes of a complex load generated by plasma 101 using RF matcher 172 and updating a matching point based on a predetermined point within a changing voltage applied in each of voltage pulses provided in a PV waveform is shown. FIG. 5A to FIG. 5D Each shows a voltage pulse and a synchronization signal ( Figure 5B ), the voltage pulse and synchronization signal are FIG. 8A to FIG. 8C The methods described in are used in combination to improve the control of RF power delivered during plasma processing. FIG. 5A to FIG. 5D A process is illustrated in which the RF matcher 172 collects information useful for updating the match point during a portion of one or more pulses within the PV waveform. The match point may be updated based on a sampled impedance measured at a point within the plasma processing system 10 during a portion of one or more pulses within the PV waveform. Figure 6 Multiple synchronization signals provided to sensors of an RF matcher during plasma processing are illustrated in accordance with one or more embodiments.
[0054] Fig. 8A The invention illustrates the use of an RF plasma processing system (e.g., Figure 1 and Figure 2 The method 800 is performed by processing logic that includes hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, processing devices, etc.), software (such as instructions running on a processing device, a general purpose computer system, or a dedicated machine), firmware, microcode, or a combination of the above. In some embodiments, the method 800 is performed in part by a controller device (e.g., Figure 1 and Figure 2 The system controller 126 and / or Figure 3AIn some embodiments, the non-transitory storage medium stores instructions (ie, algorithms) that, when executed by the controller device, cause the controller device to perform the method 800.
[0055] For simplicity of description, method 800 is depicted and described as a series of operations. However, operations according to the present disclosure may occur in various orders and / or simultaneously and with other operations not presented and described herein. In addition, in some embodiments, not all illustrated operations are performed to implement method 800 according to the disclosed subject matter. In addition, those skilled in the art will understand and appreciate that method 800 may alternatively be represented as a series of interrelated states via a state diagram or events.
[0056] At box 802 of method 800, the RF generator 171 transmits an RF signal to an electrode assembly disposed within the plasma processing system 10 through the RF matcher 172 to form a plasma 101 in the processing space 129. The RF signal is transmitted to the electrode assembly at a first matching point set by the RF matcher 172. As described above, the first matching point is used by the RF matcher to change the impedance of the RF matcher so that the impedance between the source (e.g., RF signal) and the impedance of the plasma processing system 10 (e.g., the load impedance generated by the plasma 101) is substantially equal, but may not be close enough to the desired matching point due to the initially varying load impedance value. In some embodiments, the settings of various components within the RF matcher 172 (such as a variable capacitor in the tuning circuit 312) used to achieve the first matching point are based on knowledge of a previous calibration process or similar system, and are preset and stored in a memory to be used as a starting point for the controller 302 within the RF matcher 172.
[0057] At block 804 of method 800, the PV waveform generator 175 transmits a voltage waveform 501 including a plurality of pulses 501A to an electrode disposed within the plasma processing system 10, each pulse 501A having a pulse period T p ,like Figure 1 to Figure 2 , FIG. 5A to FIG. 5B and Figure 5D As shown. Multiple pulses 501A are simultaneously provided with RF waveform 521 ( Figure 5B and Figure 5D ), the RF waveform 521 is transmitted to electrodes within the processing system 10 to form the plasma 101 during block 802. In one processing example, the frequency of the pulses provided within the voltage waveform at block 804 is between 50 kHz and 500 kHz, and the ion current phase of each pulse (e.g., the low level portion of the pulse) may have a duration between 5% and 95% of the pulse period, such as between 50% and 95% of the pulse period.
[0058] At block 806 of method 800, the RF matcher 172 receives the PV waveform generator 175 ( Figure 5B ) receives synchronization signal 541 and / or from RF generator 171 ( Figure 5D ) receives the synchronization signal 543. In one embodiment, during block 806, the RF generator 171 and the PV waveform generator 175 transmit a synchronization signal, such as a TTL signal, to the RF match 172. The synchronization signal can be used to synchronize the measurement of one or more electrical parameters by the input sensor 116 and the output sensor 117, and can be used as a trigger for the RF match 172 to determine the impedance of the plasma processing system 10.
[0059] At block 808 of method 800, as FIG. 5A to FIG. 5B As shown, the output sensor 117 samples a first set of impedance-related data in a first time period during a data interval 1A of the plasma processing system 10, as shown in FIG. Figure 5A . The first set of impedance-related data may be a set of one or more impedance-related data parameters for determining impedance. As described above and generally used herein and below, a set of impedance-related data (such as a first set of impedance-related data) may include data related to at least one of voltage, current, phase, power, and a combination of the above. Since the application of the voltage waveform provided during frame 804 results in impedance instability of complex loads, it is desirable to collect the first impedance measurement and all subsequent measurements at a desired time within a portion of the repetitive cycle of the pulse 501A provided in the voltage waveform 501 (multiple). In some embodiments, the first time period begins after a first delay time T1 triggered by a synchronization signal provided during frame 806.
[0060] like Figure 5B As shown, the PV waveform generator 175 synchronization signal 541 is synchronized with the voltage waveform 501. The PV waveform generator 175 synchronization signal 541 synchronizes the input sensor 116 and the output sensor 117. In addition, the first portion of the PV waveform generator 175 synchronization signal 541 can be used to trigger the first delay T1. In one example, Figure 5B As shown, the first portion of the PV waveform generator 175 synchronization signal 541 transmitted during block 806 may be created due to the detection of a rising edge of the PV waveform generator 175 synchronization signal 541. In other examples, the first portion of the synchronization signal transmitted during block 806 may be created due to the detection of a falling edge of the PV waveform generator 175 synchronization signal 541. Alternatively, the first delay T1 may be a voltage waveform 501 or an RF waveform 521 ( Figure 5B and Figure 5D). After the first delay time T1, the output sensor 117 samples a first set of impedance-related data during a data interval 1A of the plasma processing system 10 within the first time period and reports the first set of impedance-related data to the RF matcher controller 302. In some cases, the first set of impedance-related data collected by the output sensor 117 can be processed internally to form an average value of one or more electrical parameters among the electrical parameters detected by the output sensor 117 within the first time period, and the formed average value is sent to the matcher controller 302 for use in block 809.
[0061] like Figure 5D As shown, the RF generator 171 may transmit a synchronization signal 543 that is synchronized with the voltage waveform 501 and the RF waveform 521. The RF generator 171 synchronization signal 543 synchronizes the input sensor 116 and the output sensor 117. In an embodiment, the pulse length of the RF generator 171 synchronization signal 543 is longer than the PV waveform generator 175 synchronization signal 541 ( Figure 5B ) is longer. In some embodiments, the synchronization signal from the RF generator 541 is a macro pulse with a period of 100 μs to 1 second, and the PV waveform generator synchronization pulse cycle is 0.1 μs to 100 μs. In addition, the first portion of the RF generator 171 synchronization signal 543 can be used to trigger the first delay T1. In one example, as Figure 5D As shown, the first portion of the RF generator 171 synchronization signal 543 transmitted during block 806 may be created due to the detection of a rising edge of the RF generator 171 synchronization signal 543. In other examples, the first portion of the synchronization signal transmitted during block 806 may be created due to the detection of a falling edge of the RF generator 171 synchronization signal 543. Alternatively, the first delay T1 may be determined by the voltage waveform 501 or the RF waveform 521 ( Figure 5B and Figure 5D ). After the first delay time T1, the output sensor 117 samples a first set of impedance-related data during a data interval 1A of the plasma processing system 10 within the first time period and reports the first set of impedance-related data to the RF matcher controller 302. In some cases, the first set of impedance-related data collected by the output sensor 117 can be processed internally to form an average value of one or more electrical parameters among the electrical parameters detected by the output sensor 117 within the first time period, and the formed average value is sent to the matcher controller 302 for use in block 809.
[0062] Although in each pulse period T pTwo data intervals are shown in FIG. 1 to determine the combined impedance parameter, but the number of data intervals in each pulse period is not limited.
[0063] At block 809 of method 800, RF match controller 302 determines a first impedance of plasma processing system 10 based on the impedance-related data collected during data interval 1A. In some embodiments of block 809, the first impedance is determined by averaging the sampled impedance of the load in processing space 129 (i.e., the impedance of plasma processing system 10) measured by output sensor 117 during a first time period, which is shown as Figure 5A and Figure 5C In one example, Figure 5A As shown, the first time period occurs during the shell collapse phase. In some embodiments, the first impedance is determined by using the data (e.g., voltage, current, and / or phase) collected by the output sensor 117 during block 808 and a lookup table or empirically determined equation stored in the memory of the RF matcher controller 302, the lookup table or equation equating the impedance-related data to a known or empirically determined impedance.
[0064] At block 810 of method 800, as FIG. 5A to FIG. 5B As shown, by sampling data in a second time period after the second delay time T2 has passed, a second set of impedance-related data is collected during the data interval 2A. The second set of impedance-related data may be a set of one or more impedance-related data parameters for determining impedance. The second set of impedance-related data may include at least one impedance-related parameter among the impedance-related parameters found in the first set of impedance-related data. As explained above, in some embodiments, the second delay time T2 is triggered simultaneously with the first delay time T1 (i.e., triggered simultaneously), and the delay time used to collect impedance-related data during the data interval 2A is longer than the first delay time T1. In one example, as Figure 5A and Figure 5B As shown, the second set of impedance-related data collected during data interval 2A can be determined during a second time period occurring during the ion current phase of the pulse provided in the voltage waveform. The second time period for data collection, or data interval 2A, can have the same or different duration as the first time period for data collection data interval 1A. In one example, the duration of the first time period and the second time period for collecting data interval 1A and data interval 2A is between 0.1 seconds and 1 second. The first delay T1 and the second delay T2 can have a duration between 0.005 μs and 10 μs.
[0065] At box 811 of method 800, the RF matcher controller 302 determines the second impedance of the plasma processing system 10 based on the impedance-related data collected during the data interval 2A. The second impedance is determined in the same manner as the first impedance using the output sensor 117. In some cases, the second impedance is determined by using the data (e.g., voltage, current, and / or phase) collected by the output sensor 117 and a lookup table stored in the memory of the RF matcher controller 302 or an empirically determined equation. In some embodiments, the first delay time T1 and the second delay time T2 are configured so that the first delay time T1 and the second delay time T2 both fall into one or more portions of the same pulse 501A. However, the first delay time T1 and the second delay time T2 can be alternately configured so that the collection of impedance-related data during the data interval 1A and the data interval 2A falls within the same portion of two separate pulses 501A. In one example, the first delay time T1 and the second delay time T2 are set so that the first delay time T1 and the second delay time T2 result in data samples being acquired during a point in the ion current phase of the subsequent pulse 501A, or even during the same point in two or more pulses in a series of pulses 501A, the data samples being acquired by averaging the ion current phase of the subsequent pulse 501A at an integer number of pulse periods T. p ( Figure 5A ) offset interval to collect data to obtain, where the integer can be 1 or greater.
[0066] At block 812 of method 800, as FIG. 5A to FIG. 5B As shown, the combined impedance parameter is determined based on the determined first impedance and second impedance determined during blocks 808-811. For example, the combined impedance parameter may be determined by taking a weighted average between the first impedance and the second impedance determined in blocks 809 and 811. Based on the combined impedance parameter, the matching point of the RF matcher 172 is updated based on the combined impedance, and is therefore related to and set based on the measured impedance of the complex load. In other words, by adjusting one or more components in the RF matcher 172 (such as one or more variable capacitors in the variable capacitors in the tuning circuit 312 (e.g., Figure 3B The capacitors C1 and / or C2 in the RF matching device 172 are tuned and adjusted, and the first matching point of the RF matching device 172 is updated to the second matching point based on the combined impedance. PThe number of data intervals in is not limited. For example, impedance-related data can be collected in the same pulse period as data interval 1A and data interval 2A, and can be used to determine the first combined impedance parameter. In some embodiments, the user can define how many data intervals are used to average the collected data, for example, 50 data intervals or 100 data intervals. In one example, the third data interval 3A after the third delay T3 can be located at each pulse period T P In another example, in a three-level pulse case (not shown), impedance related data may be collected in a third data interval 3A after a third delay T3 that may be located in a third power level within the pulse. In one example, the data collected during data intervals 1A, 2A, and 3A may be averaged and used to tune the matching point in a subsequent step.
[0067] At block 814 of method 800, the matching point is adjusted by the RF match 172 to achieve a second matching point related to the impedance of the complex load determined by the output sensor 117. For example, the RF match controller 302 may adjust the tuning circuit 312 to achieve the second matching point. This allows the RF match 172 to adjust the matching point of the RF match 172 as the load impedance fluctuates during plasma processing.
[0068] During box 816, optionally, after determining the combined impedance during box 812 and adjusting the matcher to the second matching point, the RF matcher controller 302 further fine tunes the impedance of the RF matcher 172 to improve the impedance matching of the RF waveform. During optional box 816, the input sensor 116 samples the impedance-related data of the RF waveform and reports the impedance-related data to the controller 302. Then, the RF matcher controller 302 further updates the second matching point to a third matching point, and further adjusts the tuning circuit 312 based on the impedance of the RF waveform measured by the input sensor 116. In one example, the third matching point is used to adjust the matcher so that the RF generator 171 sees a 50 ohm load. In other embodiments, the third matching point can be used to determine a new weighted impedance based on the impedance-related data sampling during data 1A and 2A.
[0069] In some embodiments, the RF matcher 172 may maintain the second match point for a predetermined period of time. For example, the PV waveform on time is typically much shorter than the motor response time to adjust the impedance of the capacitive element within the RF matcher 172, and therefore, the second match point may remain unchanged during one or more PV waveform bursts. This process may be repeated for each burst on time of the PV waveform. In some embodiments, the third match point is adjusted more slowly than the second match point to avoid fluctuations in the match point. In some configurations, the third match point is selected based on a rolling average of measurements made by the input sensor 116 during block 816.
[0070] In some embodiments, when one or more plasma processing variables are adjusted during a plasma process performed in a plasma processing chamber, it may be desirable to re-perform the activities seen in one or more of blocks 802-814, such as performing blocks 806-814 at least once more, before re-performing the activities in block 816. Typical plasma processing variables may include RF signal power level, chamber pressure, process gas composition, process gas flow rate, and voltage waveform characteristics (e.g., frequency, pulse on time / duty cycle, voltage, etc.).
[0071] In some embodiments of the present invention, the system controller 126 and the RF matcher controller 302 are configured to collect impedance-related data and / or calculated impedance data collected during one or more of the various data intervals, store the impedance-related data and / or calculated impedance data in a memory, and generate a report or file and / or display it on a user PC ( Figure 3A ) on a graphical user interface (GUI) so that a user can review and judge the status of the plasma processing system. In one example, the sensors 116, 117 and the RF matcher controller 302 are used to provide information to the system controller 126 so that the algorithm running on the system controller 126 can then be used to generate real-time graphs of one or more of the impedance-related data and / or the calculated impedance data so that the user can use the generated information for optimization and diagnostic purposes. These graphs can include time domain graphs of impedance, voltage, current, phase or other useful measurements (e.g., matcher temperature, chamber pressure, gas flow rate, frequency), which are provided to the user via a display, stored in an electronic file and / or printed. Additional Processing Examples
[0072] FIG. 8B to FIG. 8C The invention illustrates the use of an RF plasma processing system (e.g., Figure 1 and Figure 2Method 817 of the plasma processing system 10 of the present invention. Method 817 may be performed by processing logic including hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, processing device, etc.), software (such as instructions running on a processing device, a general purpose computer system, or a dedicated machine), firmware, microcode, or a combination of the above. In some embodiments, method 817 is performed in part by a controller device (e.g., Figure 1 and Figure 2 The system controller 126 and / or Figure 3A RF matcher controller 302) is executed. In some embodiments, a non-transitory storage medium stores instructions that, when executed by a controller device, cause the controller device to perform method 817. To simplify the description, method 817 is depicted and described as a series of operations. However, operations according to the present disclosure may occur in various orders and / or simultaneously and with other operations not presented and described herein. In addition, in some embodiments, not all illustrated operations are performed to implement method 817 according to the disclosed subject matter. In addition, those skilled in the art will understand and recognize that method 817 may alternatively be represented as a series of interrelated states via a state diagram or events.
[0073] At block 818 of method 817, the RF generator 171 transmits an RF signal to an electrode assembly disposed within the plasma processing system 10 through the RF matcher 172 to form the plasma 101. In the same manner as described above in block 802 of method 800, the RF signal is transmitted to the electrode assembly at a first matching point set by the RF matcher 172.
[0074] At block 820 of method 817, the PV waveform generator 175 transmits a voltage waveform 501 comprising a plurality of pulses to an electrode disposed within the plasma processing system 10, each pulse having a pulse period T p ,like Figure 1 to Figure 2 and FIG. 5A to FIG. 5C The plurality of pulses are simultaneously provided with an RF waveform that is transmitted to electrodes within the processing system 10 to form the plasma 101 during block 818 , as similarly described above in block 804 .
[0075] At block 822 of method 817, the RF matcher 172 receives synchronization signal(s) from the RF generator 171 and / or the PV waveform generator 175. The synchronization may be transmitted and used in the same manner as described above in block 806 of method 800.
[0076] At block 824 of method 817, as FIG. 5A to FIG. 5CAs shown, the output sensor 117 samples a first set of impedance-related data during a data interval 1A of the plasma processing system 10 within a first time period and reports the first set of impedance-related data to the RF matcher controller 302. The first set of impedance-related data collected during the data interval 1A is sampled and / or processed in the same manner as described above in block 808 of method 800.
[0077] At block 826 of method 817, as FIG. 5A to FIG. 5C As shown, the RF match controller 302 determines the first impedance of the plasma processing system 10 based on the impedance-related data collected during the data interval 1A, as discussed above in block 809 of the method 800. For example, the RF match controller 302 may determine the first impedance by averaging the sampled impedance-related data collected during the data interval 1A.
[0078] At block 828 of method 817, as FIG. 5A to FIG. 5C As shown, the output sensor 117 samples a second set of impedance-related data during the data interval 2A within the second time period and reports the second set of impedance-related data to the RF matcher controller 302. The second set of impedance-related data collected during the data interval 2A is sampled in the same manner as described above in block 810 of method 800.
[0079] At block 830 of method 817, as FIG. 5A to FIG. 5C As shown, the RF matcher controller 302 determines the second impedance of the plasma processing system 10 based on the impedance-related data collected during the data interval 2A, as discussed above in block 811 of the method 800. For example, the RF matcher controller 302 may determine the second impedance by averaging the sampled impedance-related data collected during the data interval 2A.
[0080] At block 832 of method 817, as Figure 5C As shown, after collecting impedance-related data during data interval 1A and data interval 2A, the RF matcher controller 302 may sample a third set of impedance-related data during data interval 1B of the plasma system 10 sampled in a third time period after a third delay T3. The third delay T3 may be triggered in the same manner as the first delay T1 and the second delay T2. In one example, the third delay T3 is equal to the first delay plus the pulse T p The third set of impedance-related data may be a set of one or more impedance-related data parameters for determining impedance. The third set of impedance-related data may include at least one impedance-related parameter found in the first set of impedance-related data and the second set of impedance-related data.
[0081] At block 834 of method 817, as FIG. 5A to FIG. 5C As shown, the RF matcher controller 302 determines the third impedance of the plasma processing system 10 based on the data collected during the data interval 1B. For example, the RF matcher controller 302 may determine the third impedance by averaging the sampled impedance-related data collected during the data interval 1B.
[0082] At block 836 of method 817, as Figure 5C As shown, by sampling in a fourth time period after the fourth delay T4, a fourth group of impedance-related data is collected during data interval 2B. The fourth delay T4 can be triggered in the same manner as the first delay T1, the second delay T2, and the third delay T3. The fourth delay T4 is equal to the second delay T2 plus the period of the pulse. In some embodiments, based on the characteristics measured by the output sensor 117, an error correction time can be added to the third delay and the fourth delay T4. The fourth group of impedance-related data can be a group of one or more impedance-related data parameters for determining impedance. The fourth group of impedance-related data may include at least one impedance-related parameter found in the first group, the second group, and the third group of impedance-related data.
[0083] At block 838 of method 817, as FIG. 5A to FIG. 5C As shown, the RF matcher controller 302 determines the fourth impedance of the plasma processing system 10 based on the impedance-related data collected during the data interval 2B. For example, the RF matcher controller 302 may determine the fourth impedance by averaging the sampled impedance-related data collected during the data interval 2B.
[0084] At block 840 of method 817, as Figure 5C As shown, a fifth set of impedance-related data is collected during data interval 1C of the plasma processing system 10 by sampling in a fifth time period after the fifth delay T5. The fifth delay T5 can be triggered in the same manner as the first to fourth delays T1-T4. The fifth delay T5 is equal to the first delay T1 plus twice the pulse period. As described above, an optional error factor can be added to the fifth delay T5. The fifth set of impedance-related data can be a set of one or more impedance-related data parameters for determining impedance. The fifth set of impedance-related data can include at least one impedance-related parameter found in the first, second, third, and fourth sets of impedance-related data.
[0085] At block 842 of method 817, as FIG. 5A to FIG. 5C As shown, the RF matcher controller 302 determines the fifth impedance of the plasma processing system 10 based on the impedance-related data collected during the data interval 1C. For example, the RF matcher controller 302 may determine the fifth impedance by averaging the sampled impedance-related data collected during the data interval 1C.
[0086] At block 844 of method 817, as Figure 5C As shown, the sixth set of impedance-related data collected during the data interval 2C of the plasma processing system 10 is sampled in the sixth time period after the sixth delay T6. The sixth delay T6 can be triggered in the same manner as the first delay to the fifth delay T1-T5. The sixth delay T6 is equal to the second delay T2 plus twice the pulse period. As explained above, an optional error factor can be added to the sixth delay T6. The sixth set of impedance-related data can be a set of one or more impedance-related data parameters for determining impedance. The sixth set of impedance-related data can include at least one impedance-related parameter found in the first, second, third, fourth, and fifth sets of impedance-related data.
[0087] At block 846 of method 817, as Figure 5C As shown, the RF matcher controller 302 determines the sixth impedance of the plasma processing system 10 based on the impedance-related data collected during the data interval 2C. For example, the RF matcher controller 302 may determine the sixth impedance by averaging the sampled impedance-related data collected during the data interval 2C.
[0088] In some embodiments, based on the characteristics measured by the output sensor 117, the RF match controller 302 can add an error correction time to the time delay to ensure that the time delay and subsequent measurements are made within the desired portion of each subsequent voltage pulse. In some embodiments, the correction time (which can be the pulse period T p A small fraction (e.g., <10%) of the measured data (e.g., <10%) can be adjusted by an optimization process that is performed to minimize the variation of the data used to determine the load impedance based on a set of similar measurements performed within the same portion of multiple pulses. In one example, multiple data measurements are performed at slightly offset intervals within the desired portion of the multiple pulses, such as data intervals 1A, 1B, and 1C offset from each other by a fixed time (e.g., 1 μs). In this process, the variation of the measured data (e.g., current, voltage, etc.) is determined in each of the measurement data intervals 1A, 1B, and 1C to find which measurement has the smallest variation so that subsequent measurements can then be made with the same corrected time delay within each subsequent pulse.
[0089] As described above, the collection of impedance-related data may be triggered by the rising or falling edge of the synchronization signal from the RF generator 171 and / or the PV waveform generator 175. P During this period, multiple data intervals of impedance related data are collected. Each pulse period T PThe number of data intervals within is not limited. The duration / width of each data interval is also not limited. The impedance-related data collected during each data interval may include voltage, current, phase, etc. The combined impedance parameters can then be determined based on the impedance-related data that can be used to adjust the matching point of the RF matcher 172. In one example, the collection of impedance-related data can be triggered by the rising edge of the synchronization signal transmitted by the RF generator 171.
[0090] At block 848 of method 817, a combined impedance parameter is determined based on the determined first to sixth second impedances. Based on the combined impedance parameter, the matching point of the RF matcher 172 is updated based on the combined impedance. In other words, the first matching point of the RF matcher 172 is updated to a second matching point based on the combined impedance.
[0091] In one example, the combined impedance may be a combination of the first impedance to the sixth impedance. The combined impedance may be determined by taking a weighted average of the first impedance to the sixth impedance. In another example, a first combined impedance determined by combining the first impedance and the second impedance may be combined with a second combined impedance determined by combining the third impedance and the fourth impedance and a third combined impedance determined by combining the fifth impedance and the sixth impedance to be used as the combined impedance. The combined impedance may be determined for each subsequent pulse period T p This process is repeated. As explained above, the first combined impedance can be determined by taking the weighted average of the first impedance and the second impedance. The second combined impedance can be determined by taking the weighted average of the third impedance and the fourth impedance. The third combined impedance can be determined by taking the weighted average of the fifth impedance and the sixth impedance. The combined impedance can then be determined by taking the weighted average of the first combined impedance to the third combined impedance.
[0092] Alternatively, any number of pulse cycles occurring during the pulse train on-time of the PV waveform may be used. For example, two pulses may be used to determine the combined impedance parameter, and the combined impedance may be determined based on the first to fourth data intervals 1A-2B. In another example, the pulses used to determine the combined impedance parameter may not be continuous. For example, the combined impedance parameter may be determined based on the first and second impedance-related data collected during data intervals 1A and 2A, and the fifth and sixth impedance-related data collected during data intervals 1C and 2C.
[0093] At block 850 of method 817, based on the combined impedance parameter, a matching point of the RF matcher 172 is updated based on the combined impedance. In other words, a first matching point of the RF matcher 172 is updated to a second matching point based on the combined impedance.
[0094] During optional block 852, after determining the combined impedance during block 848, the RF match controller 302 may optionally further fine tune the impedance of the RF match 172 to improve the impedance match of the RF waveform. The input sensor 116 samples the impedance-related data of the RF waveform and reports the impedance-related data to the controller 302. The RF match controller 302 then further updates the matching point and further adjusts the tuning circuit 312 based on the impedance of the RF waveform. These processes may be repeated for each pulse train on time of the PV waveform.
[0095] Figure 6 An example multiple synchronization signals configured to trigger different components of the RF matcher 172 are shown. As explained above, the impedance measurement can be determined by each sensor after a delay triggered by the synchronization signal. Each sensor can receive the same synchronization signal or a different synchronization signal. In some embodiments, the input sensor 116 and the output sensor 117 can use different synchronization signals to trigger data collection. For example, the RF generator 171 synchronization signal 543 can be transmitted to the input sensor 116 and can be used to trigger the input sensor 116 to collect impedance-related data, while the PV waveform generator 175 synchronization signal 541 can be transmitted to the output sensor 117 and can be used to trigger the output sensor 117 to collect impedance-related data (or vice versa).
[0096] The PV waveform generator 175 synchronization signal 541 may include a plurality of pulses 555. For example, the rising edge of the pulse 555 may trigger the output sensor 117 to collect impedance-related data of the plasma processing system 10, determine an impedance measurement value (i.e., a combined impedance parameter), and transmit the combined impedance parameter to the RF match controller 302. The RF match controller 302 may then determine an updated match point and adjust the RF match 172 to achieve the updated match point. In other words, as discussed above, impedance-related data may be collected after a delay triggered by each rising edge, a combined impedance measurement may be determined during the pulse 555 of the PV waveform generator 175 synchronization signal 541, and the match point of the RF match 172 may be updated during the pulse 555. The combined impedance measurement may be determined during each pulse period 532 of the PV generator waveform 175 synchronization signal 541. A first measurement value may be determined during a first pulse, a second measurement value may be determined during a second pulse, a third measurement value may be determined during a third pulse, and so on. On the other hand, the falling edge of the PV waveform generator 175 synchronization signal 541 may be used to trigger the output sensor 117 to collect impedance related data and determine a combined impedance parameter during the rest time between each of the pulses 555 .
[0097] The RF generator 171 synchronization signal 543 may include a plurality of pulses 557. The rising edge of the pulse 557 may trigger the input sensor 116 to detect the RF waveform 521 ( Figure 5B and Figure 5D ) is sampled, and the impedance is used to further update the matching point of the RF matcher 172 determined based on the impedance-related data sampled by the output sensor 116. For example, after the matching point of the RF matcher 172 is updated based on the impedance measurement of the output sensor, the matching point is further updated based on the impedance sampled by the input sensor 116 during each pulse period 530. On the other hand, the falling edge of the pulse 557 can be used to trigger the input sensor 117 to collect impedance-related data of the RF waveform 521 during the rest time between pulses of the synchronization signal 543 of the RF generator 171.
[0098] Figure 7 and Fig. 9 A method of sampling a change in load impedance generated by a plasma 101 using an RF matcher 172 in which a pulsed RF signal is used to form the plasma 101 is illustrated.
[0099] Fig. 7A FIG. 1 illustrates multiple RF pulses provided to an electrode during plasma processing according to one or more embodiments. Fig. 7A , the output sensor of the RF matcher 172 collects impedance related data during a portion of the RF waveform generated by the RF generator 171 in the pulse mode. In one example of the pulse mode, Fig. 7A As shown, plasma 101 is generated by sequentially transmitting a first RF pulse state and a second RF pulse state. The first RF pulse state is transmitted at a first power level state and the second pulse state is transmitted at a second power level state. In one example, Fig. 7A As shown, the first power level state is a higher power level than the second power level state, and the first power level state transitions to the second power level state at time t0. In other embodiments, the first power level state may be lower than the second power level state.
[0100] In one embodiment, the RF matcher 172 determines the matching point by combining impedance-related data obtained from the data interval 1 of the plasma processing system 10 as the RF waveform transitions between the second RF pulse state and the first RF pulse state. RF During the period and while the RF waveform is in the second RF pulse state (or the first RF pulse state) in the baseline data interval 2 RFFor example, the scanned impedance of the plasma processing system 10 is sampled between a first time t1 and a second time t2 while the RF waveform transitions from a first RF pulse state to a second RF pulse state (or vice versa). The baseline impedance data is sampled at time t3 while the RF waveform is in the first state.
[0101] The scanned impedance of the plasma processing system 10 can be sampled by the output sensor 117 and reported to the RF match controller 302 in the same manner as explained above. RF The sampling of the impedance-related data collected during the period can be triggered by the first time delay d1 and in the data interval 2 RF The sampling of impedance-related data collected during the period can be triggered by the second time delay d2. The first time delay d1 and the second time delay d2 can be triggered in the same manner as described above. The first time delay d1 is a variable time delay and can be offset between state changes based on the characteristics sampled by the input sensor 116 to ensure that data 1 only includes impedance during the transition between states. The second delay d2 can be fixed. Further, based on the impedance or other characteristics of the RF waveform sampled by the output sensor 117, the duration between the first time t1 and the second time t2 can be adjusted between state changes to ensure that the sampled impedance is sampled only during the transition between states.
[0102] Figure 7B An example of measured values of resistance (R) and reactance (X) generated by delivering RF pulses to a complex load as a function of time during plasma processing according to one or more embodiments is illustrated. Figure 7B Input sensor 116 and output sensor 117 are sensors configured to measure parameters used to determine complex impedance (X). The sensors are configured to simultaneously measure the resistance of plasma processing system 10 and the capacitance element (X) of plasma processing system 10. C ) or inductor element (X L Then, based on the resistance (ie, the real component) and the non-real component, the sensor can scan the impedance and report the impedance to the controller 302.
[0103] Fig. 9A method 900 of using an RF plasma processing system when multiple RF pulses are provided to an electrode of the plasma processing system in accordance with certain embodiments is illustrated. For simplicity of illustration, the method 900 is depicted and described as a series of operations. However, operations in accordance with the present disclosure may occur in various orders and / or simultaneously and with other operations not presented and described herein. Furthermore, in some embodiments, not all of the illustrated operations are performed to implement the method 900 in accordance with the disclosed subject matter. Additionally, those skilled in the art will understand and appreciate that the method 900 may alternatively be represented as a series of interrelated states via a state diagram or events.
[0104] At block 902 of method 900, a plasma 101 is generated in a processing volume 129 of a plasma processing system 10. As explained above, in one example, generating the plasma 101 includes transmitting an RF waveform, the transmitting RF waveform including sequentially transmitting a series of first RF pulses, each first RF pulse being separated by a second RF pulse. FIG. 7A to FIG. 7B As shown in FIG. 1 , the first RF pulse and the second RF pulse are generated by the RF generator 171, and the RF generator 171 transmits the RF signal to the electrode assembly via the RF matcher 172. The first RF pulse is at a first power level state 1 RF (i.e., state 1) is transmitted, and the second pulse is transmitted at the second power level state 2 RF (i.e., state 2) transmission. Typically, the RF waveform is transmitted to the electrode assembly at the first matching point set by the RF matcher 172. In some embodiments, the settings of various components within the RF matcher 172 (such as the variable capacitor in the tuning circuit 312) for achieving the first matching point are based on knowledge of a previous calibration process or similar system, and are preset and stored in a memory to be used as a starting point for the controller 302 within the RF matcher 172.
[0105] At block 904 of method 900, as FIG. 7A to FIG. 7B As shown, the transition region between the first RF pulse and the second RF pulse is determined by the controller 302 of the RF matcher 172. In some embodiments, the beginning or end of the transition region is used as a trigger by the matching controller 302 to detect impedance-related data during the portion of the RF waveform that includes the first RF pulse and the second RF pulse. FIG. 7A to FIG. 7B A trigger is detected at the beginning of the transition region found at time t1 illustrated in FIG.
[0106] At block 906 of method 900, as FIG. 7A to FIG. 7BAs shown, the RF matcher 172 determines the scanned impedance of the plasma processing system 10 during the transition region between the first RF pulse and the second RF pulse. The scanned impedance is created by detecting one or more impedance-related data in the impedance-related data collected by the output sensor 117 during a data interval of a desired length (e.g., time t2 minus time t1) within at least a portion of the transition region. The RF matcher controller 302 can determine the scanned impedance value by averaging the sampled impedance-related data collected during the defined data interval.
[0107] At block 908 of method 900, as FIG. 7A to FIG. 7B As shown, the RF matcher 172 determines the baseline impedance of the plasma processing system 10 during either the first pulse or the second pulse. The baseline impedance is created by detecting one or more of the impedance-related data by the output sensor 117 during a portion of the first pulse or the second pulse (e.g., time t3).
[0108] At block 910 of method 900, as FIG. 7A to FIG. 7B As shown, the controller 302 of the RF matcher 172 determines the combined impedance parameter based on the detected scanning impedance and the baseline impedance. For example, the RF matcher 172 can determine the combined impedance parameter by taking a weighted average between the scanning impedance and the baseline impedance.
[0109] At block 912 of method 900, the RF matcher 172 updates the matching parameters of the RF matcher 172 by updating the matching point of the RF matcher 172 based on the combined impedance and adjusting the tuning circuit 312 accordingly. In other words, by adjusting one or more components in the RF matcher 172 (such as one or more variable capacitors in the tuning circuit 312 (e.g., Figure 3B The capacitors C1 and / or C2 in the RF matcher 172 are tuned and adjusted to update the first matching point of the RF matcher 172 to a second matching point based on the combined impedance.
[0110] During box 914, after determining the combined impedance during box 912, the RF match controller 302 further fine tunes the impedance of the RF match 172 to improve the impedance matching of the RF waveform. The input sensor 116 samples the impedance-related data of the RF waveform and reports the impedance-related data to the controller 302. Then, the RF match controller 302 further updates the matching point to a third matching point by further adjusting the tuning circuit 312 based on the detected impedance of the RF waveform. This process can be repeated for each portion of the RF waveform. In various embodiments, other possible options for updating the variable capacitor position of the RF match include using theoretical calculations or lookup tables based on the combined impedance parameters.
[0111] As previously described, embodiments of the present disclosure include apparatus and methods for synchronizing and controlling the delivery of an RF bias signal to one or more electrodes disposed within a plasma processing chamber to better control efficient delivery of RF power to a plasma formed within a processing region of the plasma processing chamber.
Claims
1. A method for processing a substrate in a plasma processing system, the method comprising the following steps: Transmitting an RF signal from an RF generator to an electrode assembly disposed in the plasma processing system through an RF matcher, wherein while transmitting the RF signal, the RF matcher is set to a first matching point; transmitting a voltage waveform to the electrode assembly disposed in the plasma processing system by a waveform generator, and transmitting the RF signal to the electrode assembly; The RF matcher receives a synchronization signal from an RF generator or the waveform generator; Measuring a first set of impedance-related data of the plasma processing system by an output sensor of the RF matcher during a first time period, the first time period starting after a first delay, the first delay being triggered by a first portion of a first waveform pulse of the synchronization signal; measuring, by the output sensor of the RF matcher, a second set of impedance-related data of the plasma processing system during a second time period, the second time period starting after a second delay, the second delay being triggered by the first portion of the first waveform pulse of the synchronization signal; Calculating a combined impedance parameter by the RF matcher based on the measured first set of impedance-related data and the measured second set of impedance-related data; as well as The matching parameters in the RF matcher are adjusted based on the calculated combined impedance parameters to achieve a second matching point. 2 . The method of claim 1 , wherein the first time period and the second time period have equal duration.
3. The method of claim 1, wherein calculating the combined impedance parameter comprises the following steps: A weighted average between the first set of impedance-related data and the second set of impedance-related data is calculated.
4. The method of claim 1, wherein the synchronization signal from the RF generator and the synchronization signal from the waveform generator are transistor-transistor logic (TTL) synchronization signals.
5. The method of claim 1, further comprising the steps of: After adjusting the matching parameters in the RF matcher, measuring the impedance of the RF signal by an input sensor of the RF matcher; The matching parameters within the RF matcher are further adjusted based on the measured impedance of the RF signal to achieve a third matching point.
6. The method of claim 1, wherein the first set of impedance-related data is determined by averaging the first set of impedance-related data measured during the first time period, and the second set of impedance-related data is determined by averaging the second set of impedance-related data measured.
7. The method of claim 1 wherein said first time period occurs while said plasma processing system is in a shell collapse phase of processing and said second time period occurs while said plasma processing system is in an ion current phase of processing.
8. The method of claim 1, wherein the first time period and the second time period occur during a same cycle of the voltage waveform.
9. The method of claim 1, further comprising the steps of: measuring, by the output sensor of the RF matcher, a third set of impedance-related data of the plasma processing system during a third time period, the third time period starting after a third delay, the third delay starting simultaneously with the first delay; measuring, by the output sensor of the RF matcher, a fourth set of impedance-related data of the plasma processing system during a fourth time period, the fourth time period starting after a fourth delay, the fourth delay starting simultaneously with the first delay; and The combined impedance parameter is calculated by the RF matcher based on the first set of measured impedance-related data, the second set of measured impedance-related data, the third set of measured impedance-related data, and the fourth set of measured impedance-related data.
10. The method of claim 9, wherein the first time period and the second time period occur during a first cycle of the voltage waveform, and the third time period and the fourth time period occur during a second cycle of the voltage waveform.
11. A method for processing a substrate in a plasma processing system, the method comprising the steps of: Plasma is generated in a processing space of the plasma processing system, wherein generating the plasma by transmitting an RF waveform, the transmitting RF waveform comprising sequentially transmitting a first RF pulse and a second RF pulse; The first RF pulse comprises a first RF power level and the second RF pulse comprises a second RF power level; as well as forming the first RF pulse and the second RF pulse transmitted sequentially by transmitting an RF signal through an RF matcher and to an electrode assembly of the plasma processing system; detecting a transition region between the first RF pulse and the second RF pulse; determining a scan impedance of the plasma processing system during the transition region between the first RF pulse and the second RF pulse; determining a baseline impedance of the plasma processing system during the first RF pulse or the second RF pulse; as well as A combined impedance parameter is calculated based on the scanned impedance and the baseline impedance.
12. The method of claim 11, wherein the second RF power level is zero or less than the first RF power level.
13. The method of claim 12, wherein the scanned impedance is an average impedance of the plasma processing system during a rising edge or a falling edge extending between the first RF power level and the second RF power level.
14. The method of claim 13, wherein the baseline impedance is an impedance of the plasma processing system at the second RF power level.
15. The method of claim 13, wherein the baseline impedance is an impedance of the plasma processing system at the first RF power level.
16. The method of claim 11, wherein: While transmitting a first RF pulse of the RF waveform through the RF matcher, the RF matcher is set to a first matching point; and The method further comprises the following steps: The matching parameters in the RF matcher are adjusted based on the calculated combined impedance parameters to achieve a second matching point different from the first matching point.
17. A plasma processing system comprising: an RF generator configured to transmit an RF signal to an electrode assembly disposed in the plasma processing system through an RF matcher, wherein the RF matcher is set to a first matching point while transmitting the RF signal; a voltage waveform generator configured to transmit a voltage waveform to the electrode assembly disposed in the plasma processing system, while the RF signal is transmitted to the electrode assembly, the RF matcher comprising: Input sensor; Output sensor; RF matching device controller; and A memory, the memory being used to store a program to be executed in the RF matcher controller, the program comprising instructions, which when executed cause the RF matcher controller to: The RF matcher receives a synchronization signal from an RF generator or the waveform generator; measuring a first set of impedance-related data of the plasma processing system using the output sensor during a first time period, the first time period beginning after a first delay, the first delay being triggered by a first portion of a first waveform pulse of the synchronization signal; measuring a second set of impedance-related data of the plasma processing system using the output sensor of the RF match during a second time period, the second time period starting after a second delay, the second delay being triggered by the first portion of the first waveform pulse of the synchronization signal; Calculating, by the RF matcher controller, a combined impedance parameter based on the measured first set of impedance-related data and the measured second set of impedance-related data; as well as The matching parameters in the RF matcher are adjusted based on the calculated combined impedance parameters to achieve a second matching point.
18. The plasma processing system of claim 17, wherein the program further comprises instructions for: After adjusting the matching parameters in the RF matcher, measuring the impedance of the RF signal by the input sensor of the RF matcher; and The matching parameters within the RF matcher are further adjusted based on the measured impedance of the RF signal to achieve a third matching point.
19. The plasma processing system of claim 17 wherein said instructions for calculating said combined impedance parameter comprise: A weighted average between the first set of impedance-related data and the second set of impedance-related data is calculated.
20. The plasma processing system of claim 17, wherein the program further comprises instructions for: measuring, by the output sensor of the RF matcher, a third set of impedance-related data of the plasma processing system during a third time period, the third time period starting after a third delay, the third delay starting simultaneously with the first delay; measuring, by the output sensor of the RF matcher, a fourth set of impedance-related data of the plasma processing system during a fourth time period, the fourth time period starting after a fourth delay, the fourth delay starting simultaneously with the first delay; and The combined impedance parameter is calculated by the RF matcher based on the first set of measured impedance-related data, the second set of measured impedance-related data, the third set of measured impedance-related data, and the fourth set of measured impedance-related data.