Bidirectional solid-state direct-current circuit breaker with on-off speed control function

Abstract

The bidirectional circuit breaker has an on-off speed control (BSC) to prevent false triggering when an upstream fault occurs. The semiconductor switch has a metal oxide semiconductor field effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT) and a varistor in three parallel branches, which drive a positive output. An input capacitor between the positive input and the negative input forms an LC network with an inductor connected to the positive input. A current sensor is connected between the inductor and the semiconductor switch. When the current sensor detects a reverse current, the snubber switch closes, connecting the snubber capacitor to both terminals of the inductor. The formed LCC network stores more energy than that of an LC network, the current peak caused by an upstream fault is dispersed, and the peak reverse current flowing through the circuit breaker due to the upstream fault is reduced. Therefore, when the buffer switch is closed, the on-off speed is reduced.

Description

[Technical field]

[0001] The present invention relates to a circuit breaker, and more particularly to a bidirectional circuit breaker with breaking speed control. [Background technology]

[0002] Direct current (DC) power supply and distribution networks are used in a variety of systems, including marine, battery storage, solar, electric vehicles (EVs), and EV charging. DC networks can power equipment in DC buildings on the DC grid.

[0003] Similar to alternating current (AC) networks, DC networks require circuit breakers to protect power supplies, loads, cables, and other components from damage during abnormal electrical conditions such as short circuits and overloads.

[0004] Mechanical circuit breakers, such as miniature circuit breakers (MCBs), can be used to protect DC networks. However, these mechanical circuit breakers may take milliseconds (ms) to open the circuit, but semiconductor-based power supplies and loads can fail within microseconds (μs). Tiny semiconductor features can be destroyed a thousand times faster than the speed of mechanical switch action.

[0005] 1A-1E highlight the problem of false triggering in a DC network. In FIG. 1A , a DC power source 100 provides DC power to a DC network including DC loads 114 , 116 , 118 , which are located on different branches of a DC trunk 110 . The DC trunk 110 may include several long cables or other transmission lines and may have branches and various topologies. The DC trunk 110 may include cables that exhibit a low-pass filtering effect due to parasitic inductance, resistance, and capacitance distributed along the cables. Longer cables exacerbate this filtering effect.

[0006] The DC power source 100 is protected by a circuit breaker 102, which is located near the DC power source 100 and may be quite far away from the DC loads 114, 116, 118. The DC loads 114, 116, 118 are protected by the circuit breakers 104, 106, 108, which are located near the DC loads and along the branches of the DC trunk line 110. When the circuit breakers 102, 104, 106, 108 are closed, the DC power source 100 can supply power to the DC loads 114, 116, 118 through the DC power transmitted and distributed by the DC trunk line 110.

[0007] In FIG1B , a short circuit occurs in the DC load 116. The short circuit causes the DC load 116 to draw a large amount of current. The large current comes from the DC power supply 100, but the parasitic inductance of the DC rail 110 limits the current drawn immediately from the DC power supply 100 through the long cables in the DC rail 110.

[0008] Since the circuit breaker 116 is rated at a higher current, such as 500 amps, the circuit breaker 116 will not trip immediately. Likewise, the circuit breaker 102 is also rated at a higher current and will not trip immediately. However, the short circuit in the DC load 116 will continue to draw more and more current until the circuit breaker finally trips when the rated load value of the circuit breaker is reached.

[0009] In FIG1C , the short circuit of the DC load 116 also cannot cause the DC power supply 100 to immediately provide such a large current because the long cable between the DC power supply 100 and the DC load 116 acts as a low-pass filter to resist fast current surges. However, the DC load 118 on the adjacent branch of the DC trunk line 110 is closer to the DC load 116 than to the DC power supply 100. Therefore, the impedance between the DC loads 116, 118 may be smaller than the impedance between the DC load 116 and the DC power supply 100. This lower impedance causes part of the current to flow from the adjacent DC load 118 to the short-circuited DC load 114.

[0010] 1D , the short circuit in the DC load 116 draws more and more current from the DC rail 110 . However, the circuit breaker 106 does not trip until the current reaches its rated load of 500 amps. The short circuit in the DC load 116 draws more and more current from the DC power source 100 and the adjacent DC load 118 .

[0011] While circuit breakers 102 and 106 are rated for a higher current, such as 500 amps or more, circuit breaker 108 is rated for a lower current, such as 70 amps. DC load 118 may be a smaller DC load, and therefore its circuit breaker 108 is rated for a lower current, such as 70 amps. Circuit breaker 108 may be a bidirectional circuit breaker that trips at the same current level regardless of the direction of current flow.

[0012] Circuit breaker 108 trips first due to the lower negative load rating. Circuit breakers 102, 106 remain closed. Now, all the current shorted in DC load 116 must be drawn from DC power source 100.

[0013] 1E , the short circuit current continues to increase, exceeding 70 amps, until the current reaches 500 amps. The circuit breaker 106 then trips and stops drawing the short circuit current from the DC mains 110 and the DC power supply 100. The other branches of the DC mains 110 are then protected from the short circuit of the DC load 116.

[0014] Circuit breaker 108 trips before circuit breaker 106, even if the short circuit occurs in DC load 116 protected by circuit breaker 106. Such false triggering is undesirable. Ideally, circuit breaker 108 remains closed until circuit breaker 106 trips, DC mains 110 is protected by circuit breaker 106, and circuit breaker 106 opens to isolate the short circuit on DC load 116, so that DC load 118 continues to receive power from DC power source 100.

[0015] To prevent this false tripping, the current rating of circuit breaker 108 is increased to 500 amps to match the current rating of circuit breaker 106. However, this may be undesirable or even dangerous. DC load 116 may have a high-power DC motor that can draw up to 400 amps, which would require its circuit breaker 106 to have a higher current rating, such as 500 amps. However, neighboring DC loads 118 may only have small DC devices that never draw more than 50 amps, or may have a backup battery or energy storage system (ESS) that is limited to 50 amps. Therefore, circuit breaker 108 needs to have a lower current rating, such as 70 amps, to protect the smaller DC load 118. If the current rating of circuit breaker 108 is increased from 70 amps to 500 amps, a short circuit in the small DC load 118 may draw 500 amps before disconnecting, and such a large current may damage the small device or ESS in the DC load 118.

[0016] 2 is a graph showing the breaking speed of the example of FIG1A-1E. Line 130 shows the current flowing through the circuit breaker 106 into the DC load 116 when the short circuit begins at time zero. The current flowing through the circuit breaker 106 into the DC load 116 increases until the current reaches the rated value of the circuit breaker 106 at 10 μs and the circuit breaker 106 opens.

[0017] As shown in FIG. 1C , part of the current through the circuit breaker 106 comes from the adjacent DC load 118, not the DC power source 100. This adjacent current is shown as line 132. Although this adjacent current is less than the current of line 130, the circuit breaker 108 can reach the lower rated current of 7 amperes in a shorter time. Once the current drawn from the adjacent DC load 118 reaches 70 amperes, the circuit breaker 108 will open. In this example, the circuit breaker 108 trips at 3 μs, while the larger circuit breaker 106 trips after 10 μs. The false triggering of the adjacent circuit breaker 108 at 3 μs is undesirable because the adjacent DC load 118 protected by the adjacent circuit breaker 108 has not failed.

[0018] The lines 130, 132 in this example are idealized. In a real system, the lines 130, 132 may have various shapes and irregular curves. However, the adjacent circuit breaker 108 may still be triggered earlier than the circuit breaker 106 with a higher rated load.

[0019] FIG3 shows the current and voltage waveforms for the false triggering condition of FIG1A-1E. Waveform curve 70 shows the current flowing through the circuit breaker 106 when the DC load 116 is short-circuited. The top of the waveform curve 70 is clipped because of the very high current spikes. These current spikes eventually cause the gate signal G3 to be driven high (curve 74), thereby opening the circuit breaker 106, resulting in an increase in the voltage across the circuit breaker 106 (curve 72).

[0020] As shown in the current curve 80, before the circuit breaker 106 opens, the current will flow in the opposite direction through the adjacent circuit breaker 108. When the current curve 80 exceeds the rated current of 70 amperes of the circuit breaker 108, its G3 control signal is driven high (curve 84), and the circuit breaker 108 opens, causing the voltage across the circuit breaker 108 to fluctuate (curve 82).

[0021] Curves 80, 82, 84 are delayed relative to curves 70, 72, 74 due to transmission line delays in the cable between circuit breakers 106, 108. The current spike of curve 80 takes some time to propagate through the cable to the adjacent DC load 118. Therefore, when these transmission line delays are taken into account, the adjacent circuit breaker 108 will open after circuit breaker 106 opens. The simplified example of Figures 1A-1E ignores these transmission line delays and shows circuit breaker 108 being triggered before circuit breaker 106. Note that curve 80 shows negative (reverse) current through circuit breaker 108, while curve 70 shows positive (forward) current through circuit breaker 106.

[0022] A semiconductor circuit breaker with breaking speed control (BSC) is needed to prevent false triggering when a short circuit occurs in an adjacent branch. A bidirectional circuit breaker with both semiconductor circuit breaker and mechanical relay protection is needed. A circuit breaker device is needed that can detect reverse current and actively increase switch impedance and energy storage to prevent reverse current from falsely triggering the circuit breaker.

Brief Description of the Drawings

[0023] Figures 1A-1E highlight the problem of false triggering in a DC network.

[0024] FIG. 2 shows a graph of the breaking speeds of the example of FIGS. 1A-1E .

[0025] FIG. 3 shows the current and voltage waveforms of the false triggering case of FIGS. 1A-1E .

[0026] Figure 4 Diagram showing a circuit breaker with active breaking speed control (BSC) to prevent false tripping.

[0027] Figure 5 is a schematic diagram of a circuit breaker with breaking speed control (BSC).

[0028] Figure 6 Shows Figure 5 Current and voltage waveforms of the BSC circuit breaker.

[0029] Figures 7A-7C Shows Figure 5 Operation flow chart of BSC circuit breaker.

[0030] Figure 8 The circuit breaker 108 of FIG. 1C and Figure 5 The waveform of the BSC.

[0031] Fig. 9 Graph showing the reduced current slope due to breaking speed control (BSC). [Specific implementation method]

[0032] The present invention relates to improvements to circuit breakers. The following description is intended to enable one of ordinary skill in the art to make and use the invention in the context of a particular application and its requirements. Various modifications to the preferred embodiments will be apparent to those skilled in the art, and the general principles defined herein may also be applied to other embodiments. Therefore, the present invention is not intended to be limited to the specific embodiments shown and described, but is to be given the widest scope consistent with the principles and novel features disclosed herein.

[0033] Figure 4 A diagram showing a circuit breaker with active breaking speed control (BSC) to prevent false tripping. As shown by curve 130, a short circuit occurs in a branch protected by a 500 amp circuit breaker, causing a sharp rise in current. Once the 500 amp rating is reached at 10 μs, the circuit breaker opens.

[0034] As shown in curve 132, when part of the current in curve 130 is pulled back through the adjacent circuit breaker, the adjacent circuit breaker will be falsely triggered at 3μs. However, the adjacent circuit breaker has a breaking speed control (BSC) function, which will be activated when the reverse current is detected. In this way, the impedance and energy storage of the adjacent circuit breaker will increase. The increased impedance and energy storage will shunt the reverse current spike, reducing the current passing through the adjacent circuit breaker 108 and entering its DC load 118 (Figure 1A). The shunted current reduces the slope of curve 132, forming curve 134.

[0035] The lower slope of curve 134 results in the 70 amp rated current being reached 10 μs later, rather than 3 μs later. During this additional time before the breaker rated current limit of 70 amps is reached, the circuit breaker 106 has more time to open and the current peak can subside. Ideally, the circuit breaker 106 reaches its limit (500 amps) before the adjacent circuit breaker 108 reaches its limit of 70 amps. In this way, the adjacent circuit breaker 108 will not trip in error. The adjacent circuit breaker 108 can remain closed, allowing the DC load 118 to continue to be powered despite the short circuit of the DC load 116 (FIG. 1E).

[0036] Figure 5 Schematic diagram of a circuit breaker with breaking speed control (BSC). When the gate signal G1 is in an inactive state such as a low voltage, the mechanical relay 20 disconnects the input ground GND_IN from the output ground GND_OUT of the DC network. The mechanical relay 20 is relatively slow and can be a mechanical relay with a moving plate that is pulled when the electromagnet is energized to open (or close) the relay contacts.

[0037] The positive terminal POS_IN of the power supply is disconnected from the positive terminal POS_OUT of the DC network through a semiconductor switch, which includes a metal oxide semiconductor field effect transistor (MOSFET) 22 and an insulated gate bipolar transistor (IGBT) 24. MOSFET 22, IGBT 24 and varistor 30 together constitute a semiconductor switch with three branches.

[0038] There is no mechanical switch between POS_IN and POS_OUT, only a semiconductor switch. For the negative pole, there is no semiconductor switch between GND_IN and GND_OUT, only a mechanical switch. Therefore, the positive pole has a pure semiconductor switch, and the negative pole has a pure mechanical switch. In this way, the disconnection speed of the positive pole is very fast, but the disconnection speed of the negative pole is much slower. The use of a pure semiconductor switch for the positive pole and a pure mechanical switch for the negative pole allows the two poles to be disconnected at the same time without the added cost of a semiconductor switch in the negative pole.

[0039] If the output polarity is reversed and POS_OUT is lower than GND_OUT, diode 38 will conduct. Diode 38 provides protection against abnormal current spikes, such as those that may be caused by a short circuit in a downstream DC load.

[0040] In the main branch, MOSFET 22 is turned off by gate signal G3. In the bypass branch, IGBT 24 is turned off by gate signal G2. In the bypass branch, IGBT 24 is connected in series with resistor 26. IGBT 24 can be two NPN bipolar transistors, receiving G2 on their insulated gates (bases), while MOSFET 22 can be two n-channel enhancement transistors, receiving G3 on their gates. Therefore, MOSFET 22 is a bidirectional switch, and IGBT 24 is a bidirectional switch.

[0041] The third branch is a protection branch. The varistor 30 may be a metal-oxide varistor (MOV) having a nonlinear variable resistance, which can suppress voltage spikes and clamp. Under normal operating voltage, the resistance of the varistor 30 can be very large. However, when a high voltage is applied, the resistance of the varistor 30 decreases. Therefore, the varistor 30 can provide clamping for large voltage spikes.

[0042] During normal operation, most of the current flows through the main branch and MOSFET 22 because MOSFET 22 can be turned on at a lower source-drain voltage, while IGBT 24 in series with resistor 26 requires a larger voltage to conduct a given current. Varistor 30 requires a higher voltage to turn on, so in the absence of a large voltage spike, the third branch will not carry current during normal operation.

[0043] Figure 5 The circuit breaker can be the improved circuit breaker 108 of FIG1C, which has a protection function to prevent false triggering due to a short circuit of another DC load 116 in another branch, thereby preventing the false triggering of FIG1D. POS_IN and GND_IN can be connected to the DC main line 110 as upstream ports, and POS_OUT and GND_OUT can be connected to the DC load 118 (FIG1C) as downstream ports.

[0044] The current sensor 40 can be used to detect fault conditions such as overcurrent. The current sensor 40 can be a bidirectional sensor that can sense and measure current in either direction. When the current in either direction measured by the current sensor 40 exceeds the rated current, the circuit breaker will trip and disconnect to provide bidirectional protection.

[0045] Inductor 42 and current sensor 40 are connected in series with POS_IN. Inductor 42 resists sudden changes in input current and helps filter input noise. The current from current sensor 40 is split into one of three branches, which then recombine to drive POS_OUT at the downstream port.

[0046] The input capacitor 36 provides a stable voltage at the input. The input capacitor 36 also decouples the input energy from the cable of the DC rail 110. The inductor 42 can also store energy from the input cable. The input capacitor 36 and the inductor 42 provide passive input energy decoupling. This input energy decoupling can reduce Figure 5 False triggering of the circuit breaker because the energy spike caused by the short circuit or other fault in other branches of the DC mains 110 (FIG. 1C) is partially absorbed by the input capacitor 36 and the inductor 42. Absorbing the energy of the current spike and storing it, even for a short time, allows the circuit breaker 106 near the short circuit more time to trigger and open before the circuit breaker 108 is forced to falsely trigger and open. This additional time can prevent false triggering.

[0047] In addition to the passive energy decoupling provided by input capacitor 36 and inductor 42, active energy decoupling is provided by buffer capacitor 34, which is switched on and off by switch 32. Switch 32 may be a MOSFET transistor, similar to MOSFET 22. Switch 32 is controlled by a control signal G4 applied to its gate.

[0048] During normal operation, G4 is low and switch 32 is off or open, preventing current from flowing to the right plate of buffer capacitor 34, disconnecting buffer capacitor 34 from the circuit. The left plate of buffer capacitor 34 is charged by POS_IN.

[0049] When a reverse current spike is detected, G4 is driven high, turning on switch 32 and closing it. Switch 32 then connects the right plate of buffer capacitor 34 to the right terminal of inductor 42, and the left plate of buffer capacitor 34 to the left terminal of inductor 42. Since buffer capacitor 34 and inductor 42 are now connected in parallel through switch 32, they form an LC tank circuit. This LC tank circuit can absorb more energy than inductor 42. Part of the current and energy entering current sensor 40 from inductor 42 is transferred to buffer capacitor 34 through switch 32.

[0050] The LC tank circuit can resonate, and the resonant frequency is determined by the values ​​of the inductor 42 and the buffer capacitor 34. The inductor value L can be determined by limiting the speed of current increase related to the control response time. The setting of the capacitor value C can provide as much resonant energy as possible in combination with the L value. For example, L can be 3μH and C can be 3μF. L*C does not have to be set to the resonant frequency to be effective. When the switch 32 is open, energy can be stored on the left plate of the buffer capacitor 34, and when the switch 32 is closed, the energy stored on the buffer capacitor 34 can flow back to the input capacitor 36 through the switch 32 and the inductor 42, forming a resonant feedback loop to increase the energy storage during the transient current spike. As the transient current spike weakens, this stored energy will be released back to the input POS_IN over time. Due to this energy storage and release mechanism, the amplitude of the current and voltage spikes through the current sensor 40 can be reduced and dispersed over time.

[0051] When the switch 32 is closed, the input capacitor 36 also forms a network with the inductor 42 and the snubber capacitor 34. When the switch 32 is closed, they form an LCC network, but when the switch 32 is opened, the network becomes an LC network because only the input capacitor 36 and the inductor 42 are in the LC network since the snubber capacitor 34 is disconnected by the switch 32. When the switch 32 is closed, the LCC network has a larger impedance and energy storage capacity than the LC network when the switch 32 is opened.

[0052] When switch 32 is closed, the LCC network greatly increases the energy storage, providing a positive boost to energy storage and current spike suppression. This greater energy absorption capability further reduces the current through current sensor 40, reducing the possibility of false triggering.

[0053] Thus, while inductor 42 and input capacitor 36 provide some passive energy decoupling, when switch 32 is closed, snubber capacitor 34, inductor 42, and input capacitor 36 form an LCC network that provides greater energy decoupling as an active circuit that can be turned on and off.

[0054] Figure 6 Shows Figure 5 The current and voltage waveforms of the BSC circuit breaker to prevent the false triggering of Figures 1A-1E. The waveforms 70, 72, 74 are used for the circuit breaker 106 (Figure 1C), while the waveforms 90, 92, 94, 96 are used for the circuit breakers 108 and Figure 5 .

[0055] Waveform curve 70 shows the current through circuit breaker 106 (FIG. 1B) when DC load 116 is short-circuited. Waveform curve 70 is clipped at the top because of the very high current spikes. These current spikes ultimately cause gate signal G3 to be driven low (curve 74), thereby opening circuit breaker 106 (FIG. 1E), causing the voltage across circuit breaker 106 to increase (curve 72).

[0056] As shown by the current curve 90, before the circuit breaker 106 opens, the current flows backward through the adjacent circuit breaker 108. When the current curve 90 reverses direction, G4 is driven to a high level, as shown by the curve 96. G4 turns on the switch 32 ( Figure 5 ), the LCC network including inductor 42, buffer capacitor 34 and input capacitor 36 increases impedance and energy storage, reducing the slope of current curve 90. The lower slope of curve 90 results in a reduction in peak current.

[0057] Since the peak current of current curve 90 is less than the 70A rated current of circuit breaker 108, its G3 control signal will not be driven high (curve 94) and circuit breaker 108 will not be disconnected, so that the voltage across circuit breaker 108 remains relatively stable (curve 92).

[0058] Once the current curve 90 drops back to zero and reverses again, G4 turns off, causing switch 32 to open and disconnecting snubber capacitor 34 from inductor 42. Note that curve 90 shows a negative (reverse) current ( Figure 5 ), while curve 70 shows the positive (forward) current through the circuit breaker 106.

[0059] Curves 90, 92, 94 are delayed relative to curves 70, 72, 74 due to transmission line delays in the cables between the circuit breakers 106, 108. The current spike of curve 80 requires some time to propagate through the cables to the adjacent DC load 118.

[0060] Figures 7A-7C Shows Figure 5 Operation flow chart of BSC circuit breaker. Fig. 7A In , a controller is started, which checks the Figure 5 The current value read by the current sensor 40 and possibly a voltage sensor or a thermal sensor (not shown) is read in step 302 as a sample current I(N).

[0061] The change in current direction can be detected by the current zero crossing measured by the current sensor 40. When the current direction changes, that is, step 308, the process continues as follows Figure 7B. In step 310, the current sensor 40 samples the reverse current. In step 312, when the reverse current detected by the current sensor 40 is greater than the rated thermal current TH_NOM, the controller activates G4 to turn on and close the switch 32, i.e., step 316. Closing the switch 32 causes the buffer capacitor 34 to be connected in parallel with the inductor 42 to form an LCC network, thereby improving energy storage and current spike suppression capabilities. Then the inductor 42, the input capacitor 36 and the buffer capacitor 34 form an active BSC LCC network.

[0062] In step 318 , when the reverse current measured by the current sensor 40 is lower than the short-circuit threshold THSC, the reverse current continues to be sampled, i.e., step 310 . When the reverse current measured by the current sensor 40 remains higher than the rated thermal current TH_NOM, the active BSC remains turned on, i.e., steps 312 and 316 .

[0063] At step 318 , if the reverse current measured by the current sensor 40 exceeds the short circuit threshold THSC, a short circuit is detected, ie, step 322 .

[0064] At step 312, when the reverse current measured by the current sensor 40 (step 310) is lower than the rated thermal current TH_NOM, G4 is disabled and the switch 32 is opened (step 314). Then the inductor 42 and the input capacitor 36 form a passive BSC LC network. Current sampling continues at step 302.

[0065] The rated thermal current TH_NOM provides an offset or guard band around the zero current crossing point to prevent noise near zero current from falsely activating and deactivating the BSC.

[0066] When the current flow direction remains unchanged (step 308), the process continues as follows Figure 7C When the forward current measured by the current sensor 40 does not exceed the short-circuit threshold THSC (step 320), the process loops back to Fig. 7A In step 302, sampling continues.

[0067] exist Figure 7C In the embodiment of the present invention, when the forward current measured by the current sensor 40 exceeds the short circuit threshold value THSC (step 320), a short circuit is detected (step 322). In step 324, G3 is driven to an inactive state to disconnect the MOSFET 22 and open the main branch of the circuit breaker. When the thermal sensor detects a high temperature (step 330), step 324 is activated to disconnect the MOSFET 22. After a delay of 3 μs (step 328), G2 is also deactivated to disconnect the IGFET 24 in the parallel branch. Finally, after a delay of about 0.1 seconds, G1 disconnects the relay 20 (step 329).

[0068] Figure 8 The waveforms of the circuit breaker 108 with and without BSC in FIG1C are shown. Curves 80, 82, and 84 show that the current peak in curve 80 of the prior art circuit breaker 108 without BSC is higher and sharper, exceeding the rated current of 70 amperes, resulting in G3 being activated (curve 84) and voltage fluctuations (curve 82).

[0069] When the circuit breaker 108 includes a BSC, as Figure 5 As shown, the peaks of curve 90 are dispersed over time, and the peak current is relatively low. The relatively low peak current in curve 90 is less than the 70 ampere rated current, so G3 is not activated (curve 94), and the voltage remains stable (curve 92).

[0070] Fig. 9 The figure shows the current slope reduced due to breaking speed control (BSC). Figure 5 ). When there is no BSC, such as in the prior art circuit breaker 108 (FIG. 1E), the current curve 80 has a larger slope 88. The reverse current will quickly rise to a peak value exceeding the rated current of the circuit breaker (e.g., 70 amps). Therefore, false triggering may occur.

[0071] When BSC is provided, switch 32 is closed to provide an LCC network including inductor 42, input capacitor 36 and buffer capacitor 34 ( Figure 5 ). The high impedance and energy storage of the LCC network reduces the slope of the current curve 90. Slope 98 is lower than slope 88 of the prior art circuit breaker. The lower slope 98 causes the peak of the current curve 90 to be delayed in time, and the peak current is lower than curve 80. The energy or area of ​​the peak is about the same, but the peak of the prior art current curve 80 is shorter and higher, while the peak of the BSC current curve 90 is wider and lower, and the peak current is lower. The lower peak current is more likely to be lower than the rated current of the circuit breaker, for example, less than 70 amps. [Alternative Embodiments]

[0072] The inventors have also contemplated other embodiments. For example, multiple combinations and variations of circuit breakers are possible. Although grounding has been shown, a lower power supply (such as VSS) can be used instead. Relay 20 can be replaced by a second semiconductor switch, such as a switch with parallel branches of a MOSFET, an IGBT, and a varistor. The varistor can be replaced by a more complex RC network, and additional devices such as resistors and capacitors can be added to any of the three branches of the semiconductor switch or at other locations on the circuit breaker.

[0073] exist Figure 5In the embodiment of the present invention, the snubber switch 32 and the snubber capacitor 34 can be interchanged, so that the snubber switch 32 is connected to the power supply input, and the snubber capacitor 34 is connected to the current sensor 40. In addition, the current sensor 40 can be located after the MOSFET 22 instead of before the MOSFET 22. As another alternative, the current sensor 40 can be located before the inductor 42.

[0074] Although a 70 amp circuit breaker trip threshold or current rating has been described, other current ratings may be used instead, such as 50 amps, 100 amps, 150 amps, etc. The circuit breakers 106, 108 may have different current ratings or may have the same current rating.

[0075] Figures 7A-7C The control program can be a hardware controller, a firmware routine, or a software routine executed on a processor or programmable controller, or a combination of hardware, firmware, and software. The start-up or initialization routine can be used to re-enable the circuit breaker by activating G1, G2, and G3. The start-up routine can be activated when power is restored or at the instruction of the higher-level control program, or after a waiting period of time.

[0076] Varistor 30( Figure 5 ) can be connected in parallel with resistors and capacitors to form a protection network. The R and C values ​​of the resistors and capacitors can be set to the desired RC values ​​to limit the voltage on sensitive components (such as MOSFET 22) when MOSFET 22 and IGBT 24 are turned off. A voltage sensor can be added to detect the output voltage on POS_OUT. The output voltage of this voltage sensor can be used to detect overvoltage and voltage sag conditions.

[0077] A more complex bidirectional 3-pole circuit breaker can be designed. By adding an additional semiconductor switch in series in the positive path between POS_IN and POS_OUT, Figure 5 The circuit breaker is extended to a 3-pole bidirectional circuit breaker. It is also possible to add an additional semiconductor switch between NEG_IN and NEG_OUT.

[0078] One or two series and mirrored ground current IGBTs may be added in parallel to the mechanical relay 20 .

[0079] Another 3-pole bidirectional circuit breaker can be created by adding diodes around the positive semiconductor switch. Another set of four diodes can be added around the negative semiconductor switch.

[0080] Although the current sensor 40 and the inductor 42 are shown at the input of the semiconductor switch, the current sensor 40 can be moved to the output of the semiconductor switch, or the current sensor 40 can be located within the semiconductor switch network. A more complex network can be used for the inductor 42, the varistor 30, the input capacitor 36, and the buffer capacitor 34. In addition to the varistor 30, other types of variable resistors can be used to adjust the RC network. The rating of the varistor 30 can be determined after testing the prototype. Other passive components can be added to the RC network.

[0081] Various faults can be detected, such as current overload (with or without output voltage sag), output voltage sag (without current overload), short circuit, output voltage overvoltage, and various combinations. When the operating conditions exceed the normal operating area, MOSFET22 can be disconnected immediately and quickly, but when the operating conditions enter the overcurrent area or voltage sag area from the normal operating area, the disconnection may be delayed until the integrated current exceeds the threshold or after a period of voltage sag. When entering the voltage sag area, MOSFET 22 can be disconnected immediately, while IGBT 24 can remain turned on until a period of time has passed. Therefore, a temporary voltage sag will only reduce the current drive, that is, partial disconnection.

[0082] Although the delay between the on / off of MOSFET 22 and IGBT 24 is described as 3 μs, other delay values ​​may be substituted. Likewise, other delay values ​​may be added or adjusted to other values. Voltage and current values ​​may also be changed. The internal power supply voltage Vcc may be different from POS_IN, or may be derived or separated from POS_IN. The rated current value I(N) may be adjusted according to different loads and environments.

[0083] The mechanical relay 20 can be an electromechanical relay, such as a single-pole contactor, a part of a multi-pole relay, a cryogenic contactor, a vacuum switch, a Thompson coil actuator, a DC contactor, normally open or normally closed. Although the mechanical relay 20 has been described as using a normally open relay, the mechanical relay 20 can also use a normally closed relay. The polarity of the gate signal (such as G1) can be reversed as needed. Although the default state of the relay is closed rather than disconnected, the normally closed relay can still be considered to be activated by G1 to close the relay and deactivated by G1 to disconnect the relay. The first gate signal of the relay can be a power signal of the relay, which closes the relay for a normally open relay and disconnects the relay for a normally closed relay. For a normally closed relay, the power signal applied to the relay can be considered to be the inversion of the positive gate signal G1, or a low-level effective gate signal G1.

[0084] Likewise, MOSFET 22 may be a depletion mode transistor rather than an enhancement mode transistor and have a normally on state rather than a normally isolated state. MOSFET 22 may be a p-channel device rather than an n-channel device. Likewise, IGBT 24 may use a PNP rather than an NPN, with or without an insulated gate, or a MOSFET or other semiconductor device may be used in place of IGBT 24.

[0085] Step 330 may use a more complex thermal model or a simple current integrator. Multiple thresholds may be used, or thresholds or delays may be reprogrammed or selected based on the application, environment, or other characteristics. Numerical values ​​may be scaled or otherwise manipulated. Parameters such as delays and targets may be adjusted or scaled based on conditions such as device temperature or the length of time between detected faults, or statistics or properties of the specific load being driven. For example, a large load with large capacitance may have a longer delay setting and a larger short circuit threshold THSC value (steps 318, 320) than a load with less capacitance or less load capacitance switching. These values ​​may be increased when the load uses a higher frequency clock to allow more capacitors to charge.

[0086] Certain types of faults can be disabled, while others can be enabled. Different applications or uses of the circuit breaker can enable fault recognition for certain types of faults, while disabling fault recognition for other types of faults. Undervoltage lockout (UVLO) can be supported by providing a fault signal to downstream devices in the load, which can disable their own functionality while the circuit breaker continues to operate. Figures 7A-7C Other steps may be added to the flowchart to implement additional functionality.

[0087] Other fault types can also be identified. Some faults can activate fault signals to the controller within the load circuit, which can act on these fault signals, such as pausing, sleeping, slowing down, or shutting down certain blocks within the load. Otherwise, the circuit breaker device may ignore these faults identified by the external controller. The fault signal can be sent as an electrical signal to other blocks, or it can be encoded together, or sent wirelessly by means such as Bluetooth.

[0088] Control logic, such as start-up detector, overload detector, overvoltage detector, voltage sag detector, overcurrent detector and gate driver for generating G1, G2, G3, G4, can be implemented in the form of hardware, firmware, software or a combination (such as programmable controller). Delay can be generated by timer, frequency divider or system clock, system interrupt, command loop, etc.

[0089] Although a series MOSFET 22 ( Figure 5), but different numbers of MOSFETs 22 in series may be used, such as 2, 4, 8, 10, 16, etc. All MOSFETs 22 in series may have the same size or different sizes, such as a tapered shape. MOSFETs 22 and IGBTs 24 may use various features and geometries, such as ring transistors, circular or ring gates, multi-pin transistors, guard rings, etc.

[0090] A resistor may be connected in series with the emitter of the ground current IGBT 24. Alternatively, the resistor 26 connected in series with the emitter of the IGBT 24 may be removed, or the parasitic resistance of the IGBT 24 may be sufficient.

[0091] More complex buffers, level shifters, or other components can be substituted or added. Inverters can be added in different locations. Other delays, hysteresis, and output waveform shaping can also be added. In addition to using CMOS inverters, other types of buffer circuits, selectors, or multiplexers can also be used.

[0092] Different transistor, capacitor, resistor, and other device sizes can be used, as well as various layout arrangements, such as multi-pin, ring, donut, or irregular shaped transistors. Current can be positive or negative and can flow in either direction. Many second- and third-order circuit effects are possible and can be significant, especially for smaller device sizes. Circuit simulation can be used during the design process to account for these secondary factors.

[0093] The device can be implemented using n-channel, p-channel or bipolar transistors or junctions among these transistors. The gate length and spacing can be increased to provide better protection against damage.

[0094] There are many variations of IC semiconductor manufacturing processes. Various materials can be used. When integrating transistors into larger devices, additional process steps can be added, such as for additional metal layers or other transistor types, or modifications to standard complementary metal oxide semiconductor (CMOS) transistors. Although complementary metal oxide semiconductor (CMOS) transistors have been described, for some embodiments, other types of transistors can be used instead, such as only using n-channel, only using p-channel when the output swing is limited, or using various alternative transistor technologies, such as bipolar or BiCMOS. The CMOS process can be a fin field effect transistor (FinFET) process.

[0095] Terms such as up, down, above, below, horizontal, vertical, inside, outside, etc. are relative and depend on the viewing angle and are not meant to limit the invention to a particular viewing angle. The device can be rotated so that vertical is horizontal and horizontal is vertical, so these terms depend on the observer.

[0096] The background section of the present invention may contain background information about the problem or environment of the present invention, rather than describing the prior art of others. Therefore, the materials contained in the background section are not an admission by the applicant that the prior art is available.

[0097] Any method or process described herein is machine-implemented or computer-implemented, intended to be performed by a machine, computer or other device, and is not intended to be performed solely by humans without machine assistance. Tangible results produced may include reports or other machine-generated displays on display devices such as computer monitors, projection devices, audio generating devices, and related media devices, and may include hard copy printouts that are also machine-generated. Computer control of other machines is another tangible result.

[0098] Any advantages and benefits described do not necessarily apply to all embodiments of the invention. When the word "means" appears in a claim element, applicant intends that the claim element fall within 35 USC § 112(6). Typically, the word "means" is preceded by a label of one or more words. The one or more words preceding the word "means" are a label for the purpose of facilitating reference to the claim element and are not intended to express a structural limitation. Such a means-plus-function claim is intended to cover not only the structures described herein for performing the function and their structural equivalents, but also equivalent structures. For example, although a nail and a screw have different constructions, they are equivalent structures because they both perform the function of fastening. Claims that do not use the word "means" do not fall within 35 USC § 112(6). Signals are typically electronic signals, but can also be optical signals, such as those that can be transmitted over fiber optic lines.

[0099] The above description of the embodiments of the present invention is presented for the purpose of illustration and description. It is not intended to be exhaustive, nor is it intended to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teachings. It is intended that the scope of the present invention is not limited by this detailed description, but rather by the limitations of the claims appended hereto.

Claims

1. Breaking speed control (BSC) circuit breaker includes: A power input terminal, which is used to connect to a power source; an inductor connected to the power input terminal and an intermediate node; a current sensor and a semiconductor switch connected in series between the intermediate node and a power supply output terminal connected to a load protected by the BSC circuit breaker; Snubber capacitors; a buffer switch controlled by a fourth gate control signal; wherein the buffer switch and the buffer capacitor are connected in series between the power input terminal and the intermediate node; and a controller, which drives the fourth gating signal to close the buffer switch when the current sensor detects a reverse current passing through the semiconductor switch, and the reverse current flows from the load to the power input terminal; Wherein, when the reverse current is not detected, the controller drives the fourth gating signal to turn off the buffer switch and disconnect the buffer capacitor from the inductor; When the snubber switch is closed, the input energy absorption of the inductor and the snubber capacitor increases, thereby reducing the breaking speed.

2. The BSC circuit breaker according to claim 1, further comprising: Connect an input capacitor between the power supply input and the ground input.

3. The BSC circuit breaker according to claim 2, wherein the BSC circuit breaker is a direct current (DC) circuit breaker having a bidirectional protection function; in, The power input is connected to a DC main line connected to the power source, the DC main line having branches connected to branch loads protected by local circuit breakers; Wherein, the reverse current is caused by a short circuit in a branch load protected by a local circuit breaker, the current triggering rating of which is higher than the current triggering rating of the BSC circuit breaker.

4. The BSC circuit breaker of claim 3, wherein the semiconductor switch further comprises: a main branch having a metal oxide semiconductor field effect transistor (MOSFET) whose gate is controlled by a third gating signal; as well as a bypass branch having a bipolar transistor which is turned on and off by a second gating signal; The main branch and the bypass branch are connected in parallel.

5. The BSC circuit breaker of claim 4, wherein the semiconductor switch further comprises: a passive branch having a passive network of resistors and capacitors; The main branch, the bypass branch and the passive branch are connected in parallel with each other.

6. The BSC circuit breaker according to claim 4, further comprising: A relay is connected between the ground input of the power source and the ground output of the load, the relay being an electromechanical relay responsive to a first gating signal.

7. The BSC circuit breaker according to claim 6, further comprising: a gate driver for generating a startup sequence and generating a shutdown sequence activated by a fault; wherein the startup sequence activates the first, second and third gating signals in sequence with a delay between each activation so that the relay is activated first, then activates the bipolar transistor after a delay, and then activates the MOSFET after another delay; Therein, the shutdown sequence deactivates the third, second and first gating signals in sequence with a delay between each deactivation, so that the MOSFET is first deactivated, then the bipolar transistor is deactivated after a delay, and then the relay is deactivated after another delay.

8. The BSC circuit breaker of claim 7, wherein the bipolar transistor is an insulated gate bipolar transistor (IGBT) having an insulated gate on a base, wherein the insulated gate receives the second gating signal.

9. A circuit breaker comprising: an inductor having a first terminal connected to the power input and having a second terminal; Current sensor; a semiconductor switch connected in series with the current sensor and the inductor to switch current between the power input and the power output; a metal oxide semiconductor field effect transistor (MOSFET), whose gate is controlled by a third gating signal, the MOSFET being located in the first branch of the semiconductor switch, the MOSFET being connected between an input and an output of the semiconductor switch; a buffer switch, a gate of which is controlled by a fourth gating signal; a snubber capacitor connected in series with the snubber switch between the power supply input and the second terminal of the inductor; as well as a controller, wherein when the current sensor detects a reverse current flowing from the power output to the power input, the controller drives the fourth gating signal to be valid; When the current sensor detects a reverse current, the fourth gate control signal is activated, and the buffer switch is closed to connect the buffer capacitor between the first terminal and the second terminal of the inductor.

10. The circuit breaker of claim 9, wherein said inductor and said snubber capacitor are connected in parallel and form an LC tank circuit when said snubber switch is closed, said LC tank circuit absorbing energy of said reverse current flowing from said power input, wherein the absorbed energy reduces a peak current measured by said current sensor; in, Reducing the peak current reduces false tripping when an upstream fault introduces reverse current into the circuit breaker.

11. The circuit breaker according to claim 9, further comprising: an input capacitor connected to the power supply input; wherein, when the buffer switch is turned off, the input capacitor and the inductor form a passive LC network, and the passive LC network is capable of absorbing first energy of a reverse current spike from the power input; wherein, when the snubber switch is closed, the input capacitor, the inductor and the snubber capacitor form an active LCC network, and the active LCC network is capable of absorbing a second energy of the reverse current spike from the power input; wherein the second energy is greater than the first energy, When the buffer switch is closed, the energy absorbed from the reverse current spike will increase.

12. The circuit breaker of claim 11, wherein the input capacitor is connected between the power input and the ground input.

13. The circuit breaker according to claim 12, further comprising: A mechanical relay is connected between the ground input and the ground output and is controlled by a first gate signal.

14. The circuit breaker according to claim 13, further comprising: An output diode is connected between the power supply output and the ground output.

15. The circuit breaker according to claim 14, further comprising: An insulated gate bipolar transistor (IGBT) is connected in series with a resistor in a second branch between the input and the output of the semiconductor switch, and a control gate of the IGBT is controlled by a second gate control signal.

16. The circuit breaker according to claim 15, further comprising: A varistor is connected between the input and the output of the semiconductor switch in the third branch.

17. The circuit breaker according to claim 16, wherein when the current sensor detects the reverse current flowing from the power output to the power input, and the reverse current is greater than a rated current value, the controller drives the fourth gating signal to be valid; in, For current values ​​close to zero, the fourth gating signal is not activated.

18. The circuit breaker of claim 17, wherein when the reverse current exceeds a short-circuit threshold, the controller drives the third gate signal to a non-active state to disable the MOSFET, and then the controller waits for a period of time before driving the second gate signal to a non-active state to disable the IGBT.

19. A circuit breaker with upstream fault tolerance capability, comprising: A power input, which is connected to an upstream power source and also to an upstream load; an inductor connected between the power supply input and a first node; a current sensor connected between the first node and the second node; a semiconductor switch connected between the second node and a power supply output of a load, the semiconductor switch having a transistor controlled by a main gate signal; an input capacitor connected between the power input and the ground input; a buffer capacitor connected between the power supply input and a buffer node; a buffer switch connected between the buffer node and the first node; the buffer switch is controlled by a buffer gating signal; a buffer controller, wherein when the current sensor detects a reverse current flowing from the second node to the first node, the buffer controller drives the buffer gating signal to an active state to close the buffer switch; When the current sensor detects a forward current flowing from the first node to the second node, the buffer controller drives the buffer gating signal to an inactive state; as well as The main controller drives the main gating signal to an inactive state when the current sensor detects a current exceeding a trigger current, thereby turning off the transistor to disconnect the second node from the power output.

20. The circuit breaker according to claim 19, further comprising: A mechanical relay is connected between the ground input and the ground output and is controlled by a first gate control signal from the main controller.

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