Method for transmitting information block, communication device, processing device and storage medium, and method for receiving information block, communication device, processing device and storage medium

Abstract

The communication device may apply convolutional precoding to a bit sequence, perform polarization coding on the convolutional precoding bit sequence, and transmit the bit sequence. When the size of the polarization encoder for convolutional precoding is 2N, the predetermined value is mapped to the last m bit indices among the first N bit indices in a bit sequence of length 2N, which is an input for convolutional precoding, and the bit value of the information block is mapped to K bit indices among the remaining (2N-m) bit indices.

Description

Technical Field

[0001] The present disclosure relates to wireless communication systems. Background Art

[0002] Various technologies such as machine-to-machine (M2M) communication, machine-type communication (MTC), and various devices requiring high data throughput (e.g., smart phones and tablet personal computers (PCs)) have emerged and become popular. Therefore, the data throughput required to be processed in cellular networks has increased rapidly. In order to meet this rapidly increasing data throughput, carrier aggregation technology or cognitive radio technology for effectively using more frequency bands and multiple input multiple output (MIMO) technology or multiple base station (BS) cooperation technology for increasing the data capacity transmitted on limited frequency resources have been developed.

[0003] As more and more communication devices require greater communication capacity, enhanced mobile broadband (eMBB) communication is needed relative to traditional radio access technology (RAT). In addition, massive machine type communication (mMTC), which provides various services anytime and anywhere by connecting multiple devices and objects to each other, is a major issue to be considered in next-generation communications.

[0004] Discussions are also underway to design communication systems that take into account services / user equipment (UE) that are sensitive to reliability and latency. Discussions are also underway to introduce next generation RATs that take into account eMBB communications, mMTC, ultra-reliable low latency communications (URLLC), etc. Summary of the invention

[0005] Technical issues

[0006] With the introduction of new radio communication technologies, the number of UEs that the BS should provide services to in a specified resource area is increasing, and the amount of data and control information sent / received by the BS to / from the UEs provided services by the BS is also increasing. Since the amount of resources that the BS can use to communicate with the UE is limited, a new method for the BS to effectively receive / send uplink / downlink data and / or uplink / downlink control information using limited radio resources is needed. In other words, due to the increase in the density of nodes and / or the density of UEs, a method for effectively using high-density nodes or high-density UEs for communication is needed.

[0007] There is also a need for a method of efficiently supporting various services with different requirements in a wireless communication system.

[0008] For applications whose performance is sensitive to latency / delay, overcoming latency or delay is a significant challenge.

[0009] There is a need for a method for further improving the performance of polar codes proposed as an alternative to existing channel codes.

[0010] The objects to be achieved by using the present disclosure are not limited to those specifically described above, and other objects not described herein will be more clearly understood by those skilled in the art from the following detailed description.

[0011] Technical Solution

[0012] According to one aspect of the present disclosure, a method for transmitting an information block by a communication device in a wireless communication system is provided. The method comprises: based on an information block of length K and a polarization sequence Q of length 2N 2N-1 0={Q0,Q1,...,Q 2N-1}Determine the first bit sequence v as the input of the convolutional precoding 2N ={v0,...,v 2N-1}; Determine a second bit sequence u based on performing convolution precoding on the first bit sequence 2N ={u0,...,u 2N-1}; determining a third bit sequence including bits encoded based on polarization coding for the second bit sequence; and sending the third bit sequence to another communication device, wherein the polarization sequence Q having a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1} in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and the first bit sequence v 2N The determination includes mapping a predetermined bit value to a first bit sequence v 2N The last m bit indices among the first N bit indices in and the K bit values ​​of the information block are mapped to the K bit indices among the remaining (2N-m) bit indices, where m is the number of shift registers used for convolution precoding.

[0013] According to another aspect of the present disclosure, a communication device for transmitting an information block in a wireless communication system is provided. The communication device includes: at least one transceiver; at least one processor; and at least one computer memory, wherein the at least one computer memory is operatively connected to the at least one processor and stores instructions, wherein when the instructions are executed, the at least one processor performs operations, wherein the operations include: based on an information block of length K and a polarization sequence Q of length 2N 2N-1 0={Q0,Q1,...,Q 2N-1}Determine the first bit sequence v as the input of the convolutional precoding 2N ={v0,...,v 2N-1}; Determine a second bit sequence u based on performing convolution precoding on the first bit sequence 2N ={u0,...,u 2N-1}; determining a third bit sequence including bits encoded based on polarization coding for the second bit sequence; and sending the third bit sequence to another communication device, wherein the polarization sequence Q having a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1} in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and the first bit sequence v 2N The determination includes mapping a predetermined bit value to a first bit sequence v 2N The last m bit indices among the first N bit indices in and the K bit values ​​of the information block are mapped to the K bit indices among the remaining (2N-m) bit indices, where m is the number of shift registers used for convolution precoding.

[0014] According to another aspect of the present disclosure, a processing device is provided. The processing device includes at least one processor and at least one computer memory, wherein the at least one computer memory is operatively connected to the at least one processor and stores instructions, wherein when the instructions are executed, the at least one processor performs operations, wherein the operations include: based on an information block of length K and a polarization sequence Q of length 2N 2N-1 0={Q0,Q1,...,Q 2N-1}Determine the first bit sequence v as the input of the convolutional precoding 2N ={v0,...,v 2N-1}; Determine a second bit sequence u based on performing convolution precoding on the first bit sequence 2N ={u0,...,u 2N-1}; determining a third bit sequence including bits encoded based on polarization coding for the second bit sequence; and sending the third bit sequence to another communication device, wherein the polarization sequence Q having a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1} in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and the first bit sequence v 2N The determination includes mapping a predetermined bit value to a first bit sequence v 2N The last m bit indices among the first N bit indices in and the K bit values ​​of the information block are mapped to the K bit indices among the remaining (2N-m) bit indices, where m is the number of shift registers used for convolution precoding.

[0015] According to another aspect of the present disclosure, a computer-readable storage medium is provided. The storage medium stores at least one computer program code including instructions, which, when executed, causes at least one processor to perform operations, and the operations include: based on an information block of length K and a polarization sequence Q of length 2N 2N-1 0={Q0,Q1,...,Q 2N-1}Determine the first bit sequence v as the input of the convolutional precoding 2N ={v0,...,v 2N-1}; Determine a second bit sequence u based on performing convolution precoding on the first bit sequence 2N ={u0,...,u 2N-1}; determining a third bit sequence including bits encoded based on polarization coding for the second bit sequence; and sending the third bit sequence to another communication device, wherein the polarization sequence Q having a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1} in ascending order of reliability W(Q2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and the first bit sequence v 2N The determination includes mapping a predetermined bit value to a first bit sequence v 2N The last m bit indices among the first N bit indices in and the K bit values ​​of the information block are mapped to the K bit indices among the remaining (2N-m) bit indices, where m is the number of shift registers used for convolution precoding.

[0016] According to another aspect of the present disclosure, a method for receiving an information block by a communication device in a wireless communication system is provided. The method comprises: receiving a third bit sequence including coded bits; and obtaining an information block of length K based on the third bit sequence, wherein based on the second bit sequence u 2N ={u0,...,u 2N-1} polarization coding provides the third bit sequence, and the first bit sequence v 2N ={v0,...,v 2N-1 The convolution precoding of} provides the second bit sequence based on the information block with a length of K and the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1} Provide the first bit sequence v 2N , the polarization sequence Q of length 2N 2N-1 0={Q0,Q1,...,Q 2N-1} in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and in the first bit sequence v 2NAmong the first N bit indices, the last m bit indices include predetermined bit values, and among the remaining (2N-m) bit indices, K bit indices include K bit values ​​of the information block, where m is the number of shift registers used for convolution precoding.

[0017] According to another aspect of the present disclosure, a communication device for receiving an information block in a wireless communication system is provided. The communication device includes: at least one transceiver; at least one processor; and at least one computer memory, wherein the at least one computer memory is operatively connected to the at least one processor and stores instructions, wherein the instructions, when executed, cause the at least one processor to perform operations, wherein the operations include: receiving a third bit sequence including coded bits; and obtaining an information block of length K based on the third bit sequence, wherein based on the second bit sequence u 2N ={u0,...,u 2N-1} polarization coding provides the third bit sequence, and the first bit sequence v 2N ={v0,...,v 2N-1 The convolution precoding of} provides the second bit sequence based on the information block with a length of K and the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1} Provide the first bit sequence v 2N , the polarization sequence Q of length 2N 2N-1 0={Q0,Q1,...,Q 2N-1} in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and in the first bit sequence v 2N Among the first N bit indices, the last m bit indices include predetermined bit values, and among the remaining (2N-m) bit indices, K bit indices include K bit values ​​of the information block, where m is the number of shift registers used for convolution precoding.

[0018] According to another aspect of the present disclosure, a processing device is provided. The processing device includes at least one processor and at least one computer memory, wherein the at least one computer memory is operatively connected to the at least one processor and stores instructions, wherein the instructions, when executed, cause the at least one processor to perform operations, wherein the operations include: receiving a third bit sequence including coded bits; and obtaining an information block of length K based on the third bit sequence, wherein based on the second bit sequence u 2N ={u0,...,u 2N-1} polarization coding provides the third bit sequence, and the first bit sequence v 2N ={v0,...,v 2N-1 The convolution precoding of} provides the second bit sequence based on the information block with a length of K and the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1} Provide the first bit sequence v 2N , the polarization sequence Q of length 2N 2N-1 0={Q0,Q1,...,Q 2N-1} in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and in the first bit sequence v 2N Among the first N bit indices, the last m bit indices include predetermined bit values, and among the remaining (2N-m) bit indices, K bit indices include K bit values ​​of the information block, where m is the number of shift registers used for convolution precoding.

[0019] According to another aspect of the present disclosure, a computer-readable storage medium is provided. The storage medium stores at least one computer program code including instructions, and when the instructions are executed, at least one processor performs operations, the operations including: receiving a third bit sequence including coded bits; and obtaining an information block with a length K based on the third bit sequence, wherein based on the second bit sequence u 2N ={u0,...,u 2N-1} polarization coding provides the third bit sequence, and the first bit sequence v 2N={v0,...,v 2N-1 The convolution precoding of} provides the second bit sequence based on the information block with a length of K and the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1} Provide the first bit sequence v 2N , the polarization sequence Q of length 2N 2N-1 0={Q0,Q1,...,Q 2N-1} in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and in the first bit sequence v 2N Among the first N bit indices, the last m bit indices include predetermined bit values, and among the remaining (2N-m) bit indices, K bit indices include K bit values ​​of the information block, where m is the number of shift registers used for convolution precoding.

[0020] In each aspect of the present disclosure, the last m bit indexes may be frozen.

[0021] In each aspect of the present disclosure, the last m bit indexes may be in v j includes 0 as a predetermined bit value.

[0022] In each aspect of the present disclosure, based on the first bit sequence v 2N ={v0,...,v 2N-1}and To provide the second bit sequence, wherein c k is the impulse response c=(c0,...,c m ), k=0,...,m,u n is an element of the second bit sequence, n=0,...,2N-1 and u0=v0.

[0023] In each aspect of the present disclosure, v from among the last m bit indices j May include bit values ​​that satisfy the following conditions: Wherein, j=Nm,...,N-1.

[0024] In each aspect of the present disclosure, K bit indices from the remaining (2N-m) bit indices may be based on a polarization sequence Q of length 2N. 2N-1 0={Q 0, Q1,...,Q 2N-1}The most reliable K bit indices.

[0025] The above solutions are only some examples of the present disclosure, and those skilled in the art can deduce and understand various examples into which the technical features of the present disclosure are incorporated from the following detailed description.

[0026] Beneficial Effects

[0027] According to some implementations of the present disclosure, wireless communication signals can be efficiently sent / received, and thus the overall throughput of the wireless communication system can be improved.

[0028] According to some implementations of the present disclosure, the performance of polar code based channel coding may be improved by maximizing the minimum distance between codewords.

[0029] According to some implementations of the present disclosure, various information sizes may be supported in polarization adjusted convolutional (PAC) codes while maximizing the minimum distance between codewords.

[0030] According to some implementations of the present disclosure, incremental redundancy (IR) HARQ may be supported for user data encoded by a PAC code.

[0031] Effects according to the present disclosure are not limited to those specifically described above, and other effects not described herein will be more clearly understood by those skilled in the art to which the present disclosure relates from the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The accompanying drawings are included to provide a further understanding of the present disclosure, and illustrate examples of implementations of the present disclosure and together with the detailed description serve to explain the implementations of the present disclosure:

[0033] Figure 1 An example of a communication system 1 to which an implementation of the present disclosure is applied is shown;

[0034] Figure 2 is a block diagram illustrating an example of a communication device capable of executing the method according to the present disclosure;

[0035] Figure 3 Another example of a wireless device capable of performing implementations of the present disclosure is shown;

[0036] Figure 4 An example of a frame structure used in a wireless communication system based on the 3rd Generation Partnership Project (3GPP) is shown;

[0037] Figure 5 shows the process of processing a transport block (TB) on the sending side;

[0038] Figure 6 is an exemplary block diagram of a polar encoder;

[0039] Figure 7 The concepts of channel splitting and channel combining showing channel polarization;

[0040] Figure 8 shows the Nth level channel combination of polar codes;

[0041] Fig. 9 shows the evolution of the decoding path during the decoding of List L;

[0042] Fig.10 is a diagram illustrating the concept of selecting a position to which an information bit is to be allocated in a polar code;

[0043] Fig.11 The puncturing and information bit allocation of polar codes are shown;

[0044] Fig.12 A method of generating parity check bits used in polar codes is shown;

[0045] Fig.13 is a diagram illustrating a rate matching process according to some implementations of the present disclosure;

[0046] Fig.14 shows the structure of one of the encoder / decoders of the PAC code that can be used in some implementations of the present disclosure;

[0047] Fig.15 A codeword tree is shown for illustrating the concept of sequential decoding;

[0048] Fig.16 An example of assigning information bits to polar encoders according to some implementations of the present disclosure is shown;

[0049] Fig.17 and Fig.18 shows an input sequence of a convolution according to some implementations of the present disclosure;

[0050] Fig.19 and Fig. 20 shows the recursive convolution operation;

[0051] Fig.21 shows an input sequence of a convolution according to some implementations of the present disclosure;

[0052] Fig. 22 The channel coding process according to some implementations of the present disclosure is shown;

[0053] Fig.23A channel decoding process according to some implementations of the present disclosure is shown. DETAILED DESCRIPTION

[0054] Hereinafter, implementations according to the present disclosure will be described in detail with reference to the accompanying drawings. The detailed description given below with reference to the accompanying drawings is intended to illustrate exemplary implementations of the present disclosure, rather than to show the only implementations that can be implemented according to the present disclosure. The following detailed description includes specific details in order to provide a thorough understanding of the present disclosure. However, it will be apparent to those skilled in the art that the present disclosure can be practiced without these specific details.

[0055] In some cases, known structures and devices may be omitted or may be shown in block diagram form, thereby focusing on important features of the structures and devices so as not to obscure the concepts of the present disclosure. The same reference numerals will be used throughout the present disclosure to refer to the same or similar parts.

[0056] The following techniques, devices and systems can be applied to various wireless multiple access systems. For example, multiple access systems may include code division multiple access (CDMA) systems, frequency division multiple access (FDMA) systems, time division multiple access (TDMA) systems, orthogonal frequency division multiple access (OFDMA) systems, single carrier frequency division multiple access (SC-FDMA) systems, multi-carrier frequency division multiple access (MC-FDMA) systems, etc. CDMA can be implemented by radio technologies such as Universal Terrestrial Radio Access (UTRA) or CDMA2000. TDMA can be implemented by radio technologies such as Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), Enhanced Data Rate for GSM Evolution (EDGE) (i.e., GERAN), etc. OFDMA can be specifically implemented by radio technologies such as Institute of Electrical and Electronics Engineers (IEEE) 802.11 (Wi-Fi), IEEE802.16 (WiMAX), IEEE 802.20, Evolved UTRA (E-UTRA), etc. UTRA is part of Universal Mobile Telecommunications System (UMTS), and 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE) is part of E-UMTS using E-UTRA. 3GPP LTE adopts OFDMA on downlink (DL) and SC-FDMA on uplink (UL). LTE-advanced (LTE-A) is an evolved version of 3GPP LTE.

[0057] For the convenience of description, the description will be given under the assumption that the present disclosure is applied to LTE and / or new RAT (NR). However, the technical features of the present disclosure are not limited thereto. For example, although the following detailed description is given based on a mobile communication system corresponding to a 3GPP LTE / NR system, the mobile communication system is applicable to any other mobile communication system except for matters specific to the 3GPP LTE / NR system.

[0058] For terms and techniques used in the present disclosure that are not described in detail, reference may be made to standard specifications based on 3GPP (for example, 3GPP TS 36.211, 3GPP TS 36.212, 3GPP TS 36.213, 3GPP TS 36.321, 3GPP TS 36.300, 3GPP TS 36.331, 3GPP TS 37.213, 3GPP TS 38.211, 3GPP TS 38.212, 3GPP TS 38.213, 3GPP TS 38.214, 3GPP TS 38.300, 3GPP TS 38.331, etc.).

[0059] In an example of the present disclosure described later, if a device "assumes" something, this may mean that a channel transmission entity transmits a channel in accordance with the corresponding "assumption". This may also mean that a channel reception entity receives or decodes a channel in a form that conforms to the "assumption" under the premise that the channel is transmitted in accordance with the "assumption".

[0060] In the present disclosure, a user equipment (UE) may be fixed or mobile. Each of the various devices that transmit and / or receive user data and / or control information by communicating with a base station (BS) may be a UE. The term UE may be referred to as a terminal device, a mobile station (MS), a mobile terminal (MT), a user terminal (UT), a subscriber station (SS), a wireless device, a personal digital assistant (PDA), a wireless modem, a handheld device, etc. In the present disclosure, a BS refers to a fixed station that communicates with a UE and / or another BS and exchanges data and control information with the UE and another BS. The term BS may be referred to as an advanced base station (ABS), a node B (NB), an evolved node B (eNB), a base transceiver system (BTS), an access point (AP), a processing server (PS), etc. Specifically, a BS of a universal terrestrial radio access (UTRAN) is referred to as an NB, a BS of an evolved UTRAN (E-UTRAN) is referred to as an eNB, and a BS of a new radio access technology network is referred to as a gNB. In the following, for the convenience of description, NB, eNB or gNB will be referred to as a BS regardless of the type or version of the communication technology.

[0061] In the present disclosure, a node refers to a fixed point that can send / receive a radio signal to / from a UE by communicating with the UE. Regardless of its name, various types of BSs can be used as nodes. For example, a BS, NB, eNB, picocell eNB (PeNB), home eNB (HeNB), repeater, transponder, etc. can be a node. In addition, a node may not be a BS. For example, a radio remote head (RRH) or a radio remote unit (RRU) can be a node. Typically, RRH and RRU have a power level lower than that of the BS. Since the RRH or RRU (hereinafter, RRH / RRU) is usually connected to the BS via a dedicated line such as an optical cable, the collaborative communication according to the RRH / RRU and the BS can be smoothly performed compared to the collaborative communication according to the BS connected via a wireless link. At least one antenna is installed per node. The antenna may refer to a physical antenna port or to a virtual antenna or an antenna group. A node may also be referred to as a point.

[0062] In the present disclosure, a cell refers to a specific geographical area where one or more nodes provide communication services. Therefore, in the present disclosure, communication with a specific cell may mean communication with a BS or node that provides communication services to a specific cell. The DL / UL signal of a specific cell refers to the DL / UL signal from / to the BS or node that provides communication services to the specific cell. A cell that provides UL / DL communication services to a UE is particularly referred to as a service cell. In addition, the channel state / quality of a specific cell refers to the channel state / quality of a channel or communication link generated between a BS or node that provides communication services to a specific cell and the UE. In a 3GPP-based communication system, a UE can use a CRS sent on a cell-specific reference signal (CRS) resource and / or a CSI-RS sent on a channel state information reference signal (CSI-RS) resource (allocated to a specific node by an antenna port of a specific node) to measure the DL channel state from a specific node.

[0063] The 3GPP-based communication system uses the concept of a cell in order to manage radio resources, and distinguishes a cell related to radio resources from a cell of a geographical area.

[0064] A "cell" of a geographic area may be understood as a coverage area in which a node can use a carrier to provide services, and a "cell" of radio resources is associated with a bandwidth (BW) which is a frequency range configured by a carrier. Since the DL coverage (the range in which a node can send a valid signal) and the UL coverage (the range in which a node can receive a valid signal from a UE) depend on the carrier that carries the signal, the coverage of a node may also be associated with the coverage of a "cell" of radio resources used by the node. Therefore, the term "cell" may be used to indicate the service coverage of a node at times, to indicate a radio resource at other times, or to indicate a range that a signal using a radio resource can reach with effective strength at other times.

[0065] In the 3GPP communication standard, the concept of a cell is used to manage radio resources. A "cell" associated with a radio resource is defined by a combination of DL resources and UL resources (i.e., a combination of DL component carriers (CCs) and UL CCs). A cell may be configured only by DL resources, or by a combination of DL resources and UL resources. If carrier aggregation is supported, the link between the carrier frequency of a DL resource (or DL ​​CC) and the carrier frequency of a UL resource (or UL CC) may be indicated by system information. For example, the combination of DL resources and UL resources may be indicated by a system information block type 2 (SIB2) link. In this case, the carrier frequency may be equal to or different from the center frequency of each cell or CC. When carrier aggregation (CA) is configured, the UE has only one radio resource control (RRC) connection with the network. During RRC connection establishment / reestablishment / handover, one serving cell provides non-access layer (NAS) mobility information. During RRC connection reestablishment / handover, one serving cell provides security input. The cell is called a primary cell (Pcell). Pcell refers to a cell operating on the primary frequency where the UE performs an initial connection establishment process or initiates a connection reestablishment process. According to the UE capabilities, the secondary cell (Scell) can be configured to form a set of serving cells together with the Pcell. The Scell ​​can be configured after the RRC connection establishment is completed and is used to provide additional radio resources in addition to the resources of the specific cell (SpCell). The carrier corresponding to the Pcell on the DL is called the downlink primary CC (DL PCC), and the carrier corresponding to the Pcell on the UL is called the uplink primary CC (UL PCC). The carrier corresponding to the Scell ​​on the DL is called the downlink secondary CC (DL SCC), and the carrier corresponding to the Scell ​​on the UL is called the uplink secondary CC (UL SCC).

[0066] In dual connectivity (DC) operation, the term special cell (SpCell) refers to a Pcell of a primary cell group (MCG) or a primary secondary cell (Pcell) of a secondary cell group (SCG). SpCell supports PUCCH transmission and contention-based random access and is always enabled. MCG is a group of service cells associated with a master node (e.g., BS) and includes SpCell (Pcell) and optionally one or more Scells. For a UE configured with DC, SCG is a subset of the service cells associated with the secondary node and includes PSCell and 0 or more Scells. PSCell is the primary Scell ​​of the SCG. For a UE in RRC_CONNECTED state that is not configured with CA or DC, there is only one service cell that includes only Pcell. For a UE in RRC_CONNECTED state that is configured with CA or DC, the term service cell refers to a set of cells including SpCell and all Scells. In DC, two medium access control (MAC) entities are configured for the UE, i.e., one MAC entity for MCG and one MAC entity for SCG.

[0067] For a UE configured with CA and not configured with DC, a Pcell PUCCH group including a Pcell and 0 or more Scells and a Scell ​​PUCCH group including only Scells may be configured. For a Scell, a Scell ​​(hereinafter, a PUCCH cell) for transmitting a PUCCH associated with a corresponding cell may be configured. A Scell ​​in which a PUCCH Scell ​​is indicated belongs to a Scell ​​PUCCH group, and PUCCH transmission of related uplink control information (UCI) is performed on the PUCCH Scell. If a PUCCH Scell ​​is not indicated for a Scell ​​or a cell indicated for PUCCH transmission for a Scell ​​is a Pcell, the Scell ​​belongs to a Pcell PUCCH group, and PUCCH transmission of related UCI is performed on the Pcell.

[0068] In a wireless communication system, a UE receives information from a BS on DL, and a UE transmits information to a BS on UL. The information transmitted and / or received by the BS and the UE includes data and various control information, and there are various physical channels according to the type / purpose of the information transmitted and / or received by the UE and the BS.

[0069] The communication standards based on 3GPP define DL physical channels corresponding to resource elements carrying information from high layers and DL physical signals corresponding to resource elements used by the physical layer but not carrying information from high layers. For example, physical downlink shared channel (PDSCH), physical broadcast channel (PBCH), physical multicast channel (PMCH), physical control format indicator channel (PCFICH), physical downlink control channel (PDCCH), etc. are defined as DL physical channels, and reference signals (RS) and synchronization signals (SS) are defined as DL physical signals. RS (also called pilot) represents a signal with a predefined special waveform known to both BS and UE. For example, demodulation reference signal (DMRS), channel state information RS (CSI-RS), etc. are defined as DL RS. The communication standards based on 3GPP define UL physical channels corresponding to resource elements carrying information from high layers and UL physical signals corresponding to resource elements used by the physical layer but not carrying information from high layers. For example, a physical uplink shared channel (PUSCH), a physical uplink control channel (PUCCH), and a physical random access channel (PRACH) are defined as UL physical channels, and a DMRS for UL control / data signals, a sounding reference signal (SRS) for UL channel measurement, etc. are defined.

[0070] In the present disclosure, PDCCH refers to a set of time-frequency resources (e.g., resource elements (REs)) carrying downlink control information (DCI), and PDSCH refers to a set of time-frequency resources carrying DL data. PUCCH, PUSCH, and PRACH refer to a set of time-frequency resources carrying UCI, a set of time-frequency resources carrying UL data, and a set of time-frequency resources carrying random access signals, respectively. In the following description, "UE sends / receives PUCCH / PUSCH / PRACH" is used as the same meaning as the UE sends / receives UCI / UL data / random access signals on PUCCH / PUSCH / PRACH or through PUSCH / PUCCH / PRACH, respectively. In addition, "BS sends / receives PBCH / PDCCH / PDSCH" is used as the same meaning as the BS sends broadcast information / DCI / DL data on PBCH / PDCCH / PDSCH or through PBCH / PDCCH / PDSCH, respectively.

[0071] In the present disclosure, radio resources (eg, time-frequency resources) scheduled or configured by a BS for a UE to transmit or receive a PUCCH / PUSCH / PDSCH may be referred to as PUCCH / PUSCH / PDSCH resources.

[0072] Since the communication device receives synchronization signal blocks (SSBs), DMRS, CSI-RS, PBCH, PDCCH, PDSCH, PUSCH and / or PUCCH in the form of radio signals on the cell, the communication device may not select and receive a radio signal including only a specific physical channel or a specific physical signal through a radio frequency (RF) receiver, or may not select and receive a radio signal without a specific physical channel or a specific physical signal through an RF receiver. In actual operation, the communication device receives a radio signal on the cell via an RF receiver, converts the radio signal as an RF band signal into a baseband signal, and then uses one or more processors to decode the physical signal and / or physical channel in the baseband signal. Therefore, in some implementations of the present disclosure, not receiving a physical signal and / or a physical channel may mean that the communication device does not attempt to recover the physical signal and / or the physical channel from the radio signal, for example, does not attempt to decode the physical signal and / or the physical channel, rather than the communication device actually receiving a radio signal including the corresponding physical signal and / or the physical channel.

[0073] As more and more communication devices require greater communication capacity, eMBB communication relative to traditional radio access technology (RAT) is needed. In addition, large-scale MTC, which provides various services anytime and anywhere by connecting multiple devices and objects to each other, is a major issue to be considered in the next generation of communications. In addition, the design of communication systems that take into account services / UEs that are sensitive to reliability and delay is also being discussed. Considering eMBB communication, large-scale MTC, ultra-reliable low-latency communication (URLLC), etc., the introduction of the next generation RAT is being discussed. Currently, in 3GPP, research on the next generation mobile communication system after EPC is underway. In this disclosure, for convenience, the corresponding technology is referred to as a new RAT (NR) or a fifth generation (5G) RAT, and a system using NR or supporting NR is referred to as an NR system.

[0074] Figure 1 An example of a communication system 1 to which an implementation of the present disclosure is applied is shown. Figure 1, the communication system 1 applied to the present disclosure includes a wireless device, a BS, and a network. Here, the wireless device refers to a device that performs communication using a RAT (e.g., 5G NR or LTE (e.g., E-UTRA)), and may be referred to as a communication / radio / 5G device. The wireless device may include (but is not limited to) a robot 100a, a vehicle 100b-1 and 100b-2, an extended reality (XR) device 100c, a handheld device 100d, a home appliance 100e, an Internet of Things (IoT) device 100f, and an artificial intelligence (AI) device / server 400. For example, a vehicle may include a vehicle with a wireless communication function, an autonomous driving vehicle, and a vehicle capable of performing vehicle-to-vehicle communication. Here, a vehicle may include an unmanned aerial vehicle (UAV) (e.g., a drone). The XR device may include an augmented reality (AR) / virtual reality (VR) / mixed reality (MR) device, and may be implemented in the form of a head-mounted device (HMD), a head-up display (HUD) installed in a vehicle, a television, a smart phone, a computer, a wearable device, a home appliance device, a digital signage, a vehicle, a robot, and the like. Handheld devices may include smart phones, smart boards, wearable devices (e.g., smart watches or smart glasses), and computers (e.g., notebooks). Home appliances may include TVs, refrigerators, and washing machines. IoT devices may include sensors and smart meters. For example, BSs and networks may also be implemented as wireless devices, and a specific wireless device may operate as a BS / network node relative to another wireless device.

[0075] The wireless devices 100a to 100f may be connected to the network 300 via the BS 200. The AI ​​technology may be applied to the wireless devices 100a to 100f, and the wireless devices 100a to 100f may be connected to the AI ​​server 400 via the network 300. The network 300 may be configured using a 3G network, a 4G (e.g., LTE) network, or a 5G (e.g., NR) network. Although the wireless devices 100a to 100f may communicate with each other via the BS 200 / network 300, the wireless devices 100a to 100f may perform direct communication (e.g., side link communication) with each other without passing through the BS / network. For example, vehicles 100b-1 and 100b-2 may perform direct communication (e.g., vehicle-to-vehicle (V2V) / vehicle-to-everything (V2X) communication). An IoT device (e.g., a sensor) may perform direct communication with other IoT devices (e.g., a sensor) or other wireless devices 100a to 100f.

[0076] Wireless communication / connection 150a and 150b may be established between wireless devices 100a to 100f and BS200, and between wireless devices 100a to 100f. Here, wireless communication / connection such as UL / DL communication 150a and sidelink communication 150b (or device-to-device (D2D) communication) may be established through various RATs (e.g., 5G NR). The wireless device and the BS / wireless device may send / receive radio signals to / from each other through wireless communication / connection 150a and 150b. To this end, various configuration information configuration processes for sending / receiving radio signals, various signal processing processes (e.g., channel coding / decoding, modulation / demodulation, and resource mapping / demapping), and at least a portion of a resource allocation process may be performed based on various proposals of the present disclosure.

[0077] Figure 2 is a block diagram showing an example of a communication device capable of executing the method according to the present disclosure. Figure 2 , the first wireless device 100 and the second wireless device 200 may transmit and / or receive radio signals through various RATs (e.g., LTE and NR). Here, {the first wireless device 100 and the second wireless device 200} may correspond to Figure 1 {wireless device 100x and BS 200} and / or {wireless device 100x and wireless device 100x}.

[0078] The first wireless device 100 may include one or more processors 102 and one or more memories 104, and further include one or more transceivers 106 and / or one or more antennas 108. The processor 102 may control the memory 104 and / or the transceiver 106, and may be configured to implement the functions, processes and / or methods described / proposed below. For example, the processor 102 may process the information in the memory 104 to generate first information / signal, and then transmit a radio signal including the first information / signal through the transceiver 106. The processor 102 may receive a radio signal including second information / signal through the transceiver 106, and then store information obtained by processing the second information / signal in the memory 104. The memory 104 may be connected to the processor 102, and may store various information related to the operation of the processor 102. For example, the memory 104 may execute part or all of the processes controlled by the processor 102 or store software codes including commands for executing the processes and / or methods described / proposed below. Here, the processor 102 and the memory 104 may be part of a communication modem / circuit / chip designed to implement a RAT (e.g., LTE or NR). The transceiver 106 may be connected to the processor 102 and transmit and / or receive radio signals through one or more antennas 108. Each transceiver 106 may include a transmitter and / or a receiver. The transceiver 106 may be used interchangeably with a radio frequency (RF) unit. In the present disclosure, a wireless device may represent a communication modem / circuit / chip.

[0079] The second wireless device 200 may include one or more processors 202 and one or more memories 204, and further include one or more transceivers 206 and / or one or more antennas 208. The processor 202 may control the memory 204 and / or the transceiver 206, and may be configured to implement the functions, processes and / or methods described / proposed below. For example, the processor 202 may process the information in the memory 204 to generate third information / signals, and then transmit a radio signal including the third information / signals through the transceiver 206. The processor 202 may receive a radio signal including fourth information / signals through the transceiver 206, and then store information obtained by processing the fourth information / signals in the memory 204. The memory 204 may be connected to the processor 202, and may store various information related to the operation of the processor 202. For example, the memory 204 may execute part or all of the processes controlled by the processor 202 or store software codes including commands for executing the processes and / or methods described / proposed below. Here, the processor 202 and the memory 204 may be part of a communication modem / circuit / chip designed to implement a RAT (e.g., LTE or NR). The transceiver 206 may be connected to the processor 202 and transmit and / or receive radio signals through one or more antennas 208. Each transceiver 206 may include a transmitter and / or a receiver. The transceiver 206 may be used interchangeably with an RF unit. In the present disclosure, a wireless device may represent a communication modem / circuit / chip.

[0080] The wireless communication technology implemented in the wireless devices 100 and 200 of the present disclosure may include narrowband Internet of Things for low-power communication as well as LTE, NR and 6G. For example, NB-IoT technology may be an example of low-power wide area network (LPWAN) technology and is implemented in standards such as LTE Cat NB1 and / or LTE Cat NB2. However, NB-IoT technology is not limited to the above names. Additionally or alternatively, the wireless communication technology implemented in the wireless devices XXX and YYY of the present disclosure may perform communication based on LTE-M technology. For example, LTE-M technology may be an example of LPWAN technology and is referred to as various names including enhanced machine type communication (eMTC). For example, LTE-M technology may be implemented in accordance with at least one of the following various standards: 1) LTE CAT 0, 2) LTE Cat M1, 3) LTE Cat M2, 4) LTE non-bandwidth limited (non-BL), 5) LTE-MTC, 6) LTE machine type communication and / or 7) LTE M, etc., but LTE-M technology is not limited to the above names. Additionally or alternatively, in consideration of low power communication, the wireless communication technology implemented in the wireless devices XXX and YYY of the present disclosure may include at least one of ZigBee, Bluetooth, and LPWAN, but the wireless communication technology is not limited to the above names. For example, ZigBee technology may be based on various standards such as IEEE 802.15.4 to create a personal area network (PAN) related to small / low power digital communication, and ZigBee technology may be referred to as various names.

[0081] Hereinafter, the hardware elements of the wireless devices 100 and 200 will be described in more detail. One or more protocol layers may be implemented by (but not limited to) one or more processors 102 and 202. For example, one or more processors 102 and 202 may implement one or more layers (e.g., functional layers such as a physical (PHY) layer, a medium access control (MAC) layer, a radio link control (RLC) layer, a packet data convergence protocol (PDCP) layer, a radio resource control (RRC) layer, and a service data adaptation protocol (SDAP) layer). One or more processors 102 and 202 may generate one or more protocol data units (PDUs) and / or one or more service data units (SDUs) according to the functions, procedures, proposals, and / or methods disclosed in the present disclosure. One or more processors 102 and 202 may generate messages, control information, data, or information according to the functions, procedures, proposals, and / or methods disclosed in the present disclosure. One or more processors 102 and 202 may generate a signal (e.g., a baseband signal) including a PDU, an SDU, a message, control information, data, or information according to the functions, procedures, proposals, and / or methods disclosed in the present disclosure, and provide the generated signal to one or more transceivers 106 and 206. One or more processors 102 and 202 may receive a signal (e.g., a baseband signal) from one or more transceivers 106 and 206 and obtain the PDU, SDU, message, control information, data, or information according to the functions, procedures, proposals, and / or methods disclosed in the present disclosure.

[0082] One or more processors 102 and 202 may be referred to as controllers, microcontrollers, microprocessors, or microcomputers. One or more processors 102 and 202 may be implemented by hardware, firmware, software, or a combination thereof. As an example, one or more application specific integrated circuits (ASICs), one or more digital signal processors (DSPs), one or more digital signal processing devices (DSPDs), one or more programmable logic devices (PLDs), or one or more field programmable gate arrays (FPGAs) may be included in one or more processors 102 and 202. The functions, processes, proposals, and / or methods disclosed in the present disclosure may be implemented using firmware or software, and the firmware or software may be configured to include modules, processes, or functions. Firmware or software configured to perform the functions, processes, proposals, and / or methods disclosed in the present disclosure may be included in one or more processors 102 and 202 or stored in one or more memories 104 and 204 to be driven by one or more processors 102 and 202. The functions, processes, proposals, and / or methods disclosed in the present disclosure may be implemented using firmware or software in the form of code, commands, and / or command sets.

[0083] One or more memories 104 and 204 may be connected to one or more processors 102 and 202 and store various types of data, signals, messages, information, programs, codes, commands and / or instructions. One or more memories 104 and 204 may be configured by read-only memory (ROM), random access memory (RAM), electrically erasable programmable read-only memory (EPROM), flash memory, hard disk drive, register, cache memory, computer-readable storage medium and / or a combination thereof. One or more memories 104 and 204 may be located inside and / or outside of one or more processors 102 and 202. One or more memories 104 and 204 may be connected to one or more processors 102 and 202 by various technologies such as wired or wireless connections.

[0084] One or more transceivers 106 and 206 may send the user data, control information and / or radio signal / channel mentioned in the method and / or operation flow chart of the present disclosure to one or more other devices. One or more transceivers 106 and 206 may receive the user data, control information and / or radio signal / channel mentioned in the function, process, proposal, method and / or operation flow chart disclosed in the present disclosure from one or more other devices. For example, one or more transceivers 106 and 206 may be connected to one or more processors 102 and 202 and send and receive radio signals. For example, one or more processors 102 and 202 may perform control so that one or more transceivers 106 and 206 may send user data, control information or radio signal to one or more other devices. One or more processors 102 and 202 may perform control so that one or more transceivers 106 and 206 may receive user data, control information or radio signal from one or more other devices. One or more transceivers 106 and 206 may be connected to one or more antennas 108 and 208. One or more transceivers 106 and 206 may be configured to send and receive user data, control information and / or radio signals / channels mentioned in the functional, process, proposal, method and / or operation flow chart disclosed in the present disclosure through one or more antennas 108 and 208. In the present disclosure, one or more antennas may be multiple physical antennas or multiple logical antennas (e.g., antenna ports). One or more transceivers 106 and 206 may convert received radio signals / channels, etc. from RF band signals to baseband signals so as to process received user data, control information, radio signals / channels, etc. using one or more processors 102 and 202. One or more transceivers 106 and 206 may convert user data, control information, radio signals / channels, etc. processed using one or more processors 102 and 202 from baseband signals to RF band signals. To this end, one or more of the transceivers 106 and 206 may include (analog) oscillators and / or filters.

[0085] Figure 3 Another example of a wireless device capable of executing implementations of the present disclosure is shown. Figure 3 , the wireless devices 100 and 200 may correspond to Figure 2 The wireless devices 100 and 200 of the present invention may be configured by various elements, components, units / parts and / or modules. For example, each of the wireless devices 100 and 200 may include a communication unit 110, a control unit 120, a memory unit 130 and an additional component 140. The communication unit may include a communication circuit 112 and a transceiver 114. For example, the communication circuit 112 may include Figure 2One or more processors 102 and 202 and / or one or more memories 104 and 204. For example, the transceiver 114 may include Figure 2 The control unit 120 is electrically connected to the communication unit 110, the memory 130, and the additional components 140, and controls the overall operation of the wireless device. For example, the control unit 120 may control the electrical / mechanical operation of the wireless device based on the program / code / command / information stored in the memory unit 130. The control unit 120 may send information stored in the memory unit 130 to the outside (e.g., other communication devices) via the communication unit 110 through a wireless / wired interface, or store information received from the outside (e.g., other communication devices) via the communication unit 110 in the memory unit 130 through a wireless / wired interface.

[0086] The additional components 140 may be configured differently depending on the type of wireless device. For example, the additional components 140 may include at least one of a power supply unit / battery, an input / output (I / O) unit, a drive unit, and a computing unit. The wireless device may be configured in the form of, but not limited to, a robot ( Figure 1 100a), vehicles ( Figure 1 100b-1 and 100b-2), XR devices ( Figure 1 100c), handheld device ( Figure 1 100d), household appliances ( Figure 1 100e), IoT devices ( Figure 1 100f), digital broadcast UE, holographic device, public safety device, MTC device, medical device, fintech device (or financial device), security device, climate / environmental device, AI server / device ( Figure 1 400), BS( Figure 1 200), network nodes, etc. The wireless device can be used in a mobile or fixed location depending on the usage / service.

[0087] exist Figure 3In the wireless devices 100 and 200, various elements, components, units / parts and / or modules in the wireless devices 100 and 200 may all be connected to each other through a wired interface, or at least a part thereof may be wirelessly connected through the communication unit 110. For example, in each of the wireless devices 100 and 200, the control unit 120 and the communication unit 110 may be wired, and the control unit 120 and the first unit (e.g., 130 and 140) may be wirelessly connected through the communication unit 110. The various elements, components, units / parts and / or modules within the wireless devices 100 and 200 may also include one or more elements. For example, the control unit 120 may be configured by a collection of one or more processors. As an example, the control unit 120 may be configured by a collection of a communication control processor, an application processor, an electronic control unit (ECU), a graphics processing unit and a memory control processor. As another example, the memory 130 may be configured by a random access memory (RAM), a dynamic RAM (DRAM), a read-only memory (ROM)), a flash memory, a volatile memory, a non-volatile memory and / or a combination thereof.

[0088] In the present disclosure, at least one memory (e.g., 104 or 204) may store instructions or programs, and these instructions or programs, when executed, may cause at least one processor operatively connected to the at least one memory to perform operations according to some embodiments or implementations of the present disclosure.

[0089] In the present disclosure, a computer-readable (non-temporary) storage medium may store at least one instruction or program, and when the at least one instruction or program is executed by at least one processor, the at least one processor may cause the at least one processor to perform operations according to some embodiments or implementations of the present disclosure.

[0090] In the present disclosure, a processing device or apparatus may include at least one processor and at least one computer memory operatively connected to the at least one processor. The at least one computer memory may store instructions or programs, and these instructions or programs, when executed, may cause at least one processor operatively connected to the at least one memory to perform operations according to some embodiments or implementations of the present disclosure.

[0091] In the present disclosure, a computer program may include program code stored on at least one computer-readable (non-volatile) storage medium, and when executed, it is configured to perform operations according to some implementations of the present disclosure or cause at least one processor to perform operations according to some implementations of the present disclosure. The computer program may be provided in the form of a computer program product. The computer program product may include at least one computer-readable (non-volatile) storage medium.

[0092] The communication device of the present disclosure includes: at least one processor; and at least one computer memory, which is operatively connected to the at least one processor and configured to store instructions, which when executed cause the at least one processor to perform operations according to examples of the present disclosure described later.

[0093] Figure 4 An example of a frame structure used in a 3GPP-based wireless communication system is shown.

[0094] Figure 4 The frame structure is only exemplary, and the number of subframes, the number of time slots, and the number of symbols in the frame may be changed differently. In the NR system, different OFDM parameter sets (e.g., subcarrier spacing (SCS)) may be configured for multiple cells aggregated for one UE. Therefore, the (absolute time) duration of time resources including the same number of symbols (e.g., subframes, time slots, or transmission time intervals (TTIs)) may be configured differently for the aggregated cells. Here, the symbol may include an OFDM symbol (or a cyclic prefix-OFDM (CP-OFDM) symbol) and an SC-FDMA symbol (or a discrete Fourier transform-spread-OFDM (DFT-s-OFDM) symbol). In the present disclosure, symbols, OFDM-based symbols, OFDM symbols, CP-OFDM symbols, and DFT-s-OFDM symbols may be used interchangeably.

[0095] Reference Figure 4 In the NR system, UL transmission and DL transmission are organized into frames. Each frame has T f =(Δf max *N f / 100)*T c = 10 ms duration and is divided into two half frames of 5 ms each. The basic time unit of NR is T c =1 / (Δf max *N f ), where Δf max =480*10 3 Hz and N f =4096. For reference, the basic time unit of LTE is T s =1 / (Δf ref *N f，ref ), where Δf ref =15*10 3 Hz and N f，ref =2048. c and T f With constant κ = T c / T f =64. Each half frame includes 5 subframes, and the duration of a single subframe is T sfThe subframe is further divided into time slots, and the number of time slots in a subframe depends on the subcarrier spacing. Each time slot includes 14 or 12 OFDM symbols based on the cyclic prefix. In normal CP, each time slot includes 14 OFDM symbols, and in extended CP, each time slot includes 12 OFDM symbols. The parameter set depends on the exponentially scalable subcarrier spacing Δf=2u*15kHz. The following table shows the number of OFDM symbols per time slot (N slot symb ), the number of time slots per frame (N frame,u slot ) and the number of time slots per subframe (N subframe,u slot ).

[0096] [Table 1]

[0097] u <![CDATA[N slot symb ]]> <![CDATA[N frame，u slot ]]> <![CDATA[N subframe，u slot ]]> 0 14 10 1 1 14 20 2 2 14 40 4 3 14 80 8 4 14 160 16 5 14 320 32 6 14 640 64

[0098] The following table shows the number of OFDM symbols per time slot, the number of time slots per frame, and the number of time slots per subframe according to the subcarrier spacing Δf=2u*15kHz.

[0099] [Table 2]

[0100] u <![CDATA[N slot symb ]]> <![CDATA[N frame,u slot ]]> <![CDATA[N subframe,u slot ]]> 2 12 40 4

[0101] For subcarrier spacing configuration u, the time slots may be indexed in ascending order within a subframe as follows: n u s ∈{0,...,n subframe ,u slot -1}, and are indexed in ascending order within the frame as follows: n u s,f ∈{0,...,n frame,u slot -1}.

[0102] A slot includes multiple (e.g., 14 or 12) symbols in the time domain. For each parameter set (e.g., subcarrier spacing) and carrier, a common resource block (CRB) N indicated by higher layer signaling (e.g., RRC signaling) is allocated. start,u grid Begins to define N size,u grid,x *N RB sc subcarriers and N subframe,u symb OFDM symbol resource grid, where N size,u grid,x is the number of resource blocks (RBs) in the resource grid, and the subscript x is DL for the downlink and UL for the uplink. NRB sc is the number of subcarriers per RB. In 3GPP-based wireless communication systems, N RB sc Typically 12. For a given antenna port p, subcarrier spacing configuration u, and transmission link (DL or UL), there is one resource grid. The carrier bandwidth N for subcarrier spacing configuration u is given to the UE through higher-layer parameters (e.g., RRC parameters) size,u grid . Each element in the resource grid for antenna port p and subcarrier spacing configuration u is called a resource element (RE), and one complex symbol can be mapped to each RE. Each RE in the resource grid is uniquely identified by an index k in the frequency domain and an index l representing the symbol position relative to a reference point in the time domain. In the NR system, an RB is defined by 12 consecutive subcarriers in the frequency domain. In the NR system, RBs are classified into CRBs and physical resource blocks (PRBs). For subcarrier spacing configuration u, CRBs are numbered from 0 upwards in the frequency domain. The center of subcarrier 0 of CRB 0 of subcarrier spacing configuration u is equal to "point A" used as a common reference point for the RB grid. PRBs for subcarrier spacing configuration u are defined within a bandwidth part (BWP) and are numbered from 0 to N. size,u BWP,i -1 numbering, where i is the number of BWPs. PRB n in BWP i PRB With CRBn u CRB The relationship between n u PRB =n u CRB +N size,u BWP,i Given, where N size BWP,i is the CRB at which the BWP starts relative to CRB 0. A BWP includes multiple consecutive RBs in the frequency domain. For example, a BWP may be a CRB with a given parameter set u in BWP i on a given carrier. i A subset of contiguous CRBs defined by the UE. A carrier may include up to N (e.g., 5) BWPs. A UE may be configured with one or more BWPs on a given component carrier. Data communication is performed through enabled BWPs, and only a predetermined number of BWPs (e.g., one BWP) among the BWPs configured for the UE may be active on the component carrier.

[0103] A UE configured with carrier aggregation may be configured to use one or more cells. If the UE is configured with multiple serving cells, the UE may be configured with one or more cell groups. The UE may also be configured with multiple cell groups associated with different BSs. Alternatively, the UE may be configured with multiple cell groups associated with a single BS. Each cell group of the UE includes one or more serving cells and includes a single PUCCH cell configured with PUCCH resources. The PUCCH cell may be a Pcell or an Scell ​​configured as a PUCCH cell among the Scells of the corresponding cell group. Each serving cell of the UE belongs to one of the cell groups of the UE and does not belong to multiple cells.

[0104] Figure 5 The process of processing a transport block (TB) on the transmitting side is shown.

[0105] In order for the receiving side to correct the errors experienced by the radio signal in the radio channel, the transmitting side encodes the information using a forward error correction code and then transmits the encoded information. The receiving side demodulates the received signal and decodes the error correction code to restore the information sent by the transmitting side. In this decoding process, the errors in the received signal caused by the radio channel are corrected.

[0106] Data arrives at the coding block in the form of up to two transport blocks per transmission time interval (TTI) in each DL / UL cell. The following coding steps can be applied to each transport block of the DL / UL cell:

[0107] - Cyclic Redundancy Check (CRC) attachment to the transport block;

[0108] - Code block segmentation and CRC attachment to code blocks;

[0109] - channel coding;

[0110] - rate matching; and

[0111] - Code block concatenation.

[0112] In an actual communication system, a transport block of a predetermined size or larger is divided into a plurality of smaller data blocks and then encoded to facilitate the actual implementation of encoding. The smaller data blocks are referred to as code blocks. Although code blocks typically have the same size, one of the code blocks may have a different size due to the limited size of the internal interleaver of the channel encoder. Error correction coding is performed on each code block of a predetermined interleaver size, and then interleaving is performed to reduce the impact of burst errors generated during transmission over a radio channel. The error-corrected and interleaved code blocks are transmitted by being mapped to actual radio resources. The amount of radio resources designated for actual transmission is specified. Thus, the encoded code blocks are rate-matched to the amount of radio resources. Generally, rate matching is performed by puncturing or repeating. For example, if the amount of radio resources (i.e., the number of transmission bits that can be transmitted on the radio resources) is M, and if the encoded bit sequence (i.e., the number of output bits of the encoder) is N (where M is different from N), then rate matching is performed to match the length of the encoded bit sequence to M. If M > N, then all or part of the bits of the encoded bit sequence are repeated to match the length of the rate-matched sequence to M. If M < N, then a part of the bits of the encoded bit sequence is punctured to match the length of the rate-matched sequence to M, and the punctured bits are excluded from the transmission.

[0113] In a wireless communication system, a transmitting side encodes data to be transmitted based on channel coding having a specific code rate. Then, the transmitting side adjusts the code rate of the data to be transmitted through a rate matching process involving puncturing and repeating.

[0114] There are various types of error correction codes, but the size of the information block that can achieve the best performance is determined according to the error correction code. Although many coding schemes can be used to achieve high-capacity information performance with long information block lengths, most coding schemes do not consistently show good performance over a wide range of information block lengths and code rates. . However, turbo codes, low-density parity-check (LPDC) codes, and polar codes show promising BLER performance over a wide range of code rates and code lengths, and are therefore considered for use in NR systems. As requirements for various situations such as eMBB, massive IoT, and URLLC increase, there is a need for coding schemes that provide higher channel coding efficiency than turbo codes. In addition, there is a need to increase the maximum number of subscribers that can be accommodated by the channel, that is, to increase capacity. Polar codes among various error correction codes are codes that provide a new framework that can solve the problems of traditional channel codes. They were invented by Arikan of Bikent University (reference: "Channel Polarization: A Method for Constructing Capacity-Achieving Codes for Symmetric Binary-Input Memoryless Channels" by E. Arikan, published in IEEE Transactions on Information Theory, Vol. 55, No. 7, pp. 3051-3073, July 2009). Polar codes are the first capacity-achieving codes with low encoding and decoding complexity, which has been mathematically verified. Polar codes outperform turbo codes in large information block lengths without the presence of error streams. In the following, channel coding using polar codes is referred to as polar coding.

[0115] Polar codes are known as codes that can achieve the capacity of a given binary discrete memoryless channel. This can only be achieved when the block size is large enough. That is, polar codes are codes that can achieve channel capacity when the size N of the code increases infinitely. Polar codes have low encoding and decoding complexity and can be successfully decoded. Polar codes are a type of linear block error correction code. Multiple recursive connections are the basic building blocks of polar codes and are the basis of code construction. A physical conversion of a channel occurs in which a physical channel is converted into a virtual channel, and this conversion is based on multiple recursive cascades. If multiple channels are multiplied and accumulated, most channels can become better or worse. The basic idea of ​​polar codes is to use good channels. For example, data is sent through a good channel at a rate of 1, and data is sent through a bad channel at a rate of 0. That is, through channel polarization, the channel enters a polarization state from a normal state.

[0116] Figure 6 is an example of a block diagram of a polar code encoder.

[0117] Figure 6 (a) shows the basic module of polar code, specifically, the first level channel combination for polar coding. Figure 6 In (a), W2 represents the entire equivalent channel obtained by combining two binary input discrete memoryless channels (B-DMC) Ws. In this paper, u1 and u2 are binary input source bits, and y1 and y2 are output coded bits. Channel combining is the process of connecting B-DMCs in parallel.

[0118] Figure 6 (b) shows a basic matrix F of the basic module. The binary input source bits u1 and u2 input to the basic matrix F and the output coded bits x1 and x2 of the basic matrix F have the following relationship.

[0119] [Formula 1]

[0120]

[0121] Channel W2 can achieve the highest rate symmetric capacity I(W). In B-DMC W, symmetric capacity is an important parameter for measuring rate, and is the highest rate at which reliable communication can occur on channel W. B-DMC can be defined as follows.

[0122] [Formula 2]

[0123]

[0124] A second set of N binary input channels can be synthesized or created from N independent copies of a given B-DMC W, and the channels have the property {W N (i) :1<=i<=N}. If N increases, there is a tendency for a portion of the channels to have a capacity close to 1 and the rest to have a capacity close to 0. This is called channel polarization. In other words, channel polarization is the creation of a second set of N channels {W using N independent copies of a given B-DMC W. N (i) :1<=i<=N}. The effect of channel polarization means that when N increases, all symmetric capacity terms {I(W N (i))} tends to 0 or 1. In other words, the concept behind channel polarization in polar codes is to transform N copies (i.e., N transmissions) of a channel with a symmetric capacity of I(W) (e.g., an additive white Gaussian noise channel) into extreme channels with a capacity close to 1 or 0. Of the N channels, the I(W) portion will be perfect channels, while the 1-I(W) portion will be completely noisy channels. Then, only information bits are sent through good channels, while bits input to other channels are frozen to 1 or 0. The amount of channel polarization increases with the block length. Channel polarization consists of two stages: the channel combination stage and the channel splitting stage.

[0125] Figure 7 The concepts of channel combining and channel splitting for channel polarization are shown. Figure 7 As shown in , when N copies of the original channel W are appropriately combined to create the vector channel W vec , and then split into new polarized channels, if N is large enough, the new polarized channels are classified into channels with capacity C(W) = 1 and channels with C(W) = 0. In this case, since bits passing through the channel with channel capacity C(W) = 1 are transmitted without error, it is better to transmit information bits through the channel, and since bits passing through the channel with capacity C(W) = 0 cannot transmit information, it is better to transmit frozen bits as meaningless bits through the channel.

[0126] Reference Figure 7 (a), given a B-DMC W, copies are recursively combined to output a N →Y N Given the vector channel W vec , where N = 2 n and n is an integer equal to or greater than 0. The recursion always starts from level 0 and W1=W. If n is 1 (n=1), it represents the first level of recursion in which two independent copies of W1 are combined. If the above two copies are combined, a channel W2: X2→Y2 is obtained. The transitional probability of this new channel W2 can be expressed by the following equation.

[0127] [Formula 3]

[0128] W2(y1,y2|u1,u2)=W(y1|u1⊕u2)W(y1|u2)

[0129] If channel W2 is obtained, the two copies of channel W2 are combined to obtain a single copy of channel W4. This recursion can be represented by W4:X4→Y4 with the following transition probabilities.

[0130] [Formula 4]

[0131]

[0132] exist Figure 7 In (b), G N is a generator matrix of size N. Figure 7 (b) Input to G N u N 1 and G N The output x N The relationship between 1 can be expressed as x N 1=u N 1G N , where x N 1={x1,...,x N},u N 1={u1,...,u N}. When N B-DMCs are combined, each B-DMC can be expressed recursively. That is, G N It can be expressed by the following formula.

[0133] [Formula 5]

[0134]

[0135] In this article, represents Kronecker product, N = 2 n , n>=1, and B N is the permutation matrix for the so-called bit-reversal operation, and can be calculated recursively. I2 is the two-dimensional identity matrix, and the recursion is initialized as B2=I2. R N is a bit-reversal interleaver and is used to convert the input s N 1={s1,...,s N} is mapped to the output x N 1={s1,s3,...,s N-1 ,s2,...,s N}. For example, G2 corresponds to Figure 6 The basic matrix F shown in (b) of G4 can be expressed as the following matrix.

[0136] [Formula 6]

[0137]

[0138] The bit reversal interleaver may not be included in the transmitting side. Without considering the bit reversal interleaver, G N It can be expressed as (where N = 2 n ). represents the nth Kronecker power of the matrix G2, where G2 is Figure 6 is the same as the basic matrix F shown in (b).

[0139] The relationship in formula 5 is Figure 8 Shown in.

[0140] Figure 8 The Nth level channel combination for polar codes is shown.

[0141] The process of defining an equivalent channel for a specific input after combining N B-DMC Ws is called channel splitting. Channel splitting can be expressed as a channel transition probability indicated by the following equation.

[0142] [Formula 7]

[0143]

[0144] Signal polarization has the following characteristics:

[0145] >Conservation: C(W - )+C(W + )=2C(W),

[0146] >Extreme value: C(W - )≤C(W)≤C(W + ).

[0147] When channel combining and channel splitting are performed, the following theorem can be obtained.

[0148] *Theorem: For any B-DMC W, the channel {W N (i)} is polarized in the following sense. For any fixed δ∈{0,1}, when N becomes infinite through the power of 2, the channel capacity I(W N (i) )∈(1-δ,1] becomes I(W) and is used for channel capacity The i part of becomes 1-I(W). Therefore, if N→∞, the signal is completely noisy or polarized to have no noise. These channels can be accurately identified by the transmitting side. Therefore, the bad channel is fixed, and non-fixed bits can be transmitted on the good channel.

[0149] That is, if the size N of the polar code is infinite, the channel has a lot of noise or no noise relative to a specific input bit. This has the same meaning as the capacity of the equivalent channel for a specific input bit being divided into 0 or I(W).

[0150] The input of the polarization encoder is divided into a bit channel to which information data is mapped and a bit channel to which information data is not mapped. As mentioned above, according to the theorem of the polarization code, if the codeword of the polarization code becomes infinite, the input bit channel can be classified into a noiseless channel and a noise channel. Therefore, if the information is assigned to the noiseless bit channel, the channel capacity can be obtained. However, in practice, it is impossible to configure a codeword of infinite length, calculate the reliability of the input bit channel, and assign the data bits to the input bit channel in order of reliability. In the present disclosure, the bit channel to which the data bit is assigned is referred to as a good bit channel. The good bit channel may be an input bit channel to which the data bit is mapped. The bit channel to which the data is not mapped is referred to as a frozen bit channel. A known value (e.g., 0) is input to the frozen bit channel, and then encoding is performed. Any value known to the transmitting side and the receiving side can be mapped to the frozen bit channel. When performing puncturing or repetition, information about the good bit channel can be used. For example, the position of the codeword bit (i.e., the output bit) corresponding to the position of the input bit to which the information bit is not assigned can be punctured.

[0151] The decoding scheme of the polar code is a successive cancellation (SC) decoding scheme. The SC decoding scheme obtains the channel transition probability and then uses the channel transition probability to calculate the likelihood ratio (LLR) of the input bit. In this case, if the channel combination and channel splitting process use features in a recursive form, the channel transition probability can be calculated in a recursive form. Therefore, the final LLR value can also be calculated in a recursive form. First, the input bit u can be obtained as follows i The channel transition probability W N (i) (y1 N ,u1 i-1 |u1).u1 i Splittable into odd index u 1,o i and even index u 1,e i The channel transition probability can be indicated by the following equation.

[0152] [Formula 8]

[0153]

[0154] in,

[0155] [Formula 9]

[0156]

[0157] The polar decoder uses the known values ​​of the polar code (e.g., received bits, frozen bits, etc.) to retrieve the information and generate u N Estimation u^1 N 1. LLR is defined as follows.

[0158] [Formula 10]

[0159]

[0160] The LLR can be calculated recursively as follows.

[0161] [Formula 11]

[0162]

[0163] The recursive calculation of LLR is based on LLR L (1) 1(y i )=W(y i |0) / W(y i |1) Backtrack to code length 1. L (1) 1(y i ) is the soft information observed from the channel.

[0164] The complexity of the polar encoder and SC decoder scales with the length N of the polar code and is considered to be O(NlogN). Assuming K input bits are used for a polar code of length N, the coding rate becomes N / K. If the generator matrix of the polar encoder for a data payload size N is G N , then the coded bits can be expressed as x N 1=u N 1G N Assume u N The K bits in 1 correspond to the payload bits, then G N The row index corresponding to the payload bit is i, and G N The row index corresponding to (NK) bits is F. The minimum distance of the polar code can be assumed to be d min (C) = min i∈I 2 wt(i) , where wt(i) is the number of 1s in the binary expansion of i, and i=0, 1, ..., N-1.

[0165] SC List (SCL) decoding is an extension of the basic SC decoder. In this type of decoder, L decoding paths are considered simultaneously at each decoding stage. Here, L is an integer. In other words, in the case of polar codes, the List L decoding algorithm is an algorithm for tracking L paths simultaneously during the decoding process.

[0166] Fig. 9 The evolution of the decoding path during the decoding of a list L is illustrated. For ease of description, it is assumed that the number of bits to be determined is n and that all bits are not frozen. If the list size L is 4, each level includes a maximum of 4 nodes with paths that continue downward. Fig. 9 The dashed lines in the figure indicate discontinuous paths. Fig. 9 Describe the process of decoding paths evolving in List L decoding. i) If List L decoding starts, the first unfrozen bit can be either 0 or 1. ii) Continue with List L decoding. The second unfrozen bit can be either 0 or 1. Since the number of paths is not greater than L=4, no pruning is needed yet. iii) Consideration of all options for the first bit (i.e., the bit of the first level), the second bit (i.e., the bit of the second level), and the third bit (i.e., the bit of the third level) results in 8 decoding paths, which are too many because L=4. iv) Prune the 8 decoding paths to L(=4) promising paths. v) Continue with the 4 valid paths by considering two options for the fourth unfrozen bit. In this case, the number of paths is doubled, i.e., 8 paths, which are too many because L=4. vi) Prune the 8 paths to the L(=4) best paths. In Figure 7 In the example of , four candidate codewords 0100, 0110, 0111 and 1111 are obtained, and one of the codewords is determined to be the codeword most similar to the original codeword. In a manner similar to the normal decoding process, for example, in the pruning process or the process of determining the final codeword, the path in which the sum of the absolute values ​​of the LLRs is the largest can be selected as the surviving path. If a CRC is present, the surviving path can be selected by the CRC.

[0167] In addition, CRC-assisted SCL decoding is SCL decoding using CRC, and improves the performance of polar codes. CRC is the most widely used error detection and correction technology in the fields of information theory and coding. For example, if the input block of the error correction encoder has K bits and the length of the information bits is k, and the length of the CRC sequence is m bits, then K=k+m. The CRC bits are part of the source bits of the error correction code. If the size of the channel code used for encoding is N, the code rate R is defined as R=K / N. CRC-assisted SCL decoding is used to detect error-free paths while the receiving device confirms the CRC code for each path. The SCL decoder outputs the candidate sequence to the CRC detector. The CRC detector feeds back the check result to help determine the codeword.

[0168] Although more complex than the SC algorithm, SCL decoding or CRC-assisted SCL decoding has the advantage of excellent decoding performance. For more details on the list-L decoding algorithm for polar codes, see I. Tal and A. Vardy, "List decoding of polar codes", Proc. IEEE Int. Symp. Inf. Theory, July 2011, pp. 1-5.

[0169] Fig.10 The concept of selecting positions in polar codes to which information bits are to be allocated is illustrated.

[0170] exist Fig.10 In the example of , it is assumed that the size N of the mother code is 8 (that is, the size N of the polar code is 8) and the code rate is 1 / 2.

[0171] exist Fig.10 In, C(W i ) represents the channel W i The capacity of the channel at the input bit position of the polar code is as follows: Fig.10 When shown as Fig.10 In order to send data at a code rate of 1 / 2, the transmitting device allocates the 4 bits constituting the data to the 4 input bit positions with high channel capacity among the 8 input bit positions (i.e., Fig.10 The input bit positions u1 to u8 are represented by the input position bits u4, u6, u7 and u8) and the other input bit positions are frozen. Fig.10 The generator matrix G8 corresponding to the polar code of is as follows. To obtain the generator matrix G8.

[0172] [Formula 12]

[0173]

[0174] Fig.10 The input bit positions represented as u1 to u8 correspond one-to-one to the rows from the highest row to the lowest row of G8. Fig.10, it can be understood that the input bit corresponding to u8 affects all output coded bits. On the other hand, it can be understood that the input bit corresponding to u1 only affects y1 among the output coded bits. Referring to Equation 12, when the binary input source bits u1 to u8 are multiplied by G8, the row in which the input bit appears at all output bits is the lowest row [1,1,1,1,1,1,1,1,1] among the rows of G8 in which all elements are 1. In addition, the row in which the binary input source bit appears at only one output bit is the row in which one element is 1 among the rows of G8, that is, the row [1,0,0,0,0,0,0,0,0] where the row weight is 1. Similarly, it can be understood that a row with a row weight of 2 reflects the input bit corresponding to the row into two output bits. Referring to Fig.10 According to Formula 12, u1 to u8 correspond to the rows of G8 one by one and the rows of G8 may be assigned bit indexes for distinguishing the input positions of u1 to u8 (ie, bit indexes for distinguishing the input positions).

[0175] In the following, for polar codes, it can be assumed that starting from the highest row with the smallest row weight relative to the N input bits, the number of bits is G. N Each row of is assigned a bit index from 0 to N-1 in sequence. Fig.10 , bit index 0 is assigned to the input position of u1, i.e., the first row of G8, and bit index 7 is assigned to the input position of u8, i.e., the last row of G8. However, since the bit index is used to indicate the input position of the polar code, a scheme different from the above assignment scheme may be used. For example, bit indexes 0 to N-1 may be assigned starting from the lowest row with the largest row weight.

[0176] In the case of output bit indexing, such as Fig.10 As shown in Equation 12, it may be assumed that bit indexes of 0 to N-1 or bit indexes of 1 to N are assigned to each column from the first column having the largest column weight to the last column having the smallest column weight among the columns of the GN.

[0177] In polar codes, the setting of information bits and frozen bits is one of the most important elements in the configuration and performance of polar codes. That is, the determination of the rank of input bit positions can be an important element in the performance and configuration of polar codes. For polar codes, bit indexes can distinguish input positions or output positions of polar codes. In the present invention, a sequence obtained by enumerating the reliability of bit positions in ascending or descending order is called a bit index sequence or a polarization sequence. That is, the bit index sequence represents the reliability of input bit positions or output bit positions of polar codes in ascending or descending order. The transmitting device inputs information bits to input bits with high reliability based on the input bit index sequence, and performs encoding using polar codes. The receiving device can use the same or corresponding input bit index sequence to identify input positions to which information bits are assigned or input positions to which frozen bits are assigned. That is, the receiving device can use the same or corresponding input bit index sequence as the input bit index sequence used by the transmitting device and use the corresponding polar code to perform polarization decoding. In the following description, it can be assumed that the input bit index sequence is predetermined so that information bits can be assigned to input bit positions with high reliability. In this disclosure, the input bit index sequence is also referred to as a polarization sequence.

[0178] Fig.11 The puncturing and information bit allocation of polar codes are illustrated. Fig.11 In the , F represents frozen bits, D represents information bits, and 0 represents skipped bits.

[0179] Among the coded bits, a situation in which the information bit is changed to a frozen bit may occur according to the index or position of the punctured bit. For example, if the output coded bits of the mother code of N=8 should be punctured in the order of Y8, Y7, Y6, Y4, Y5, Y3, Y2, and Y1 and the target code rate is 1 / 2, Y8, Y7, Y6, and Y4 are punctured, and only U8, U7, U6, and U4 connected to Y8, Y7, Y6, and Y4 are frozen to 0, and these input bits are not transmitted, as shown in FIG. Fig. 9 As shown. The input bits that are changed to frozen bits by puncturing the coded bits are called skipped bits or shortened bits, and the corresponding input positions are called skipped positions or shortened positions. Shortening is a rate matching method that inserts known bits into the input bit positions connected to the positions of the output bits that are expected to be transmitted while maintaining the size of the input information (i.e., the size of the information block). The matrix G can be generated from NThe input corresponding to the column with a column weight of 1 in the matrix is ​​shortened, and the next shortening can be performed relative to the input corresponding to the column with a column weight of 1 in the remaining matrix, in which the columns and rows with a column weight of 1 are removed. In order to prevent all information bits from being punctured, the information bits already assigned to the information bit positions can be reallocated in an order of high reliability within a set of frozen bit positions.

[0180] In the case of polar codes, decoding can generally be performed in the following order.

[0181] >1. Recover bits with low reliability first. Although the reliability varies depending on the structure of the decoder, since the input index in the encoder with a low value (hereinafter, referred to as the encoder input bit index or bit index) usually has low reliability, decoding is usually performed starting from a low encoder input bit index.

[0182] >2. When there are known bits for recovering bits, use the known bits together with the recovery bits or omit the processing of 1 and immediately use the known bits for the specific input bit positions, thereby recovering the information bits that are unknown bits. The information bits can be source information bits (e.g., bits of a transport block) or CRC bits.

[0183] As mentioned earlier, the process of channel combining and channel splitting results in the equivalent channel being divided into a noisy channel and a noiseless channel. The data payload needs to be sent through the noiseless channel. In other words, the data payload needs to be sent through the noiseless equivalent channel to achieve the desired performance. This can be done by calculating the value of the equivalent channel for each input bit to determine the noise-free equivalent channel. Z(W) is called a Battacharyya parameter, which can represent a value corresponding to an upper limit of the error probability when a MAP (maximum a posteriori probability) decision is performed for sending a binary input of 0 or 1. Therefore, the transmitting side can obtain the value of Z(W), select an equivalent channel up to the size of the data payload in ascending order (e.g., descending order) of the value of Z(W), and use the equivalent channel to send the data payload. For a binary erasure channel (BEC), Z(W) can be obtained by formula 13.

[0184] [Formula 13]

[0185]

[0186] For example, when the binary probability of BEC is 0.5 and the code block size is 8, the value of Z(W) can be calculated as follows according to Formula 11: Z(W) = {1.00, 0.68, 0.81, 0.12, 0.88, 0.19, 0.32, 0.00}. Therefore, when the size of the data payload is 2, the data payload can be sent on an equivalent channel 8 with Z(W) = 0.00 and an equivalent channel 4 with Z(W) = 0.12.

[0187] As described above, since the polarization encoder has different reliabilities depending on the input position, the transmitting side can allocate the data block (ie, the information block before encoding) to the bit channel in the order of reliability according to the size of the corresponding data block, and perform encoding by setting all other items to be frozen (eg, a value of '0'). For example, if the mother code size of the polarization encoder (ie, the maximum size of the code block that the polarization encoder can encode) is N, and if the size of the data block input to the polarization encoder is K, polarization encoding is performed by arranging the bits of the data block in the order of reliability in K bit channels and setting 0 to NK bit channels.

[0188] The following shows the polarization sequence used in the NR (5G) system (see the polarization sequence defined in 3GPP TS 38.212Rel-15).

[0189] <Polarization Sequence>

[0190]

[0191]

[0192]

[0193]

[0194] The table above shows the polarization sequence Q0 Nmax-1 and the reliability of the polarization sequence W(Q i Nmax ). In the above table, W represents W(Q i Nmax ), I represents Q i Nmax That is, the above table gives the polarization sequence Q0 Nmax-1 = {Q0 Nmax ,Q1 Nmax ,...,Q Nmax-1 Nmax}, where 0 <= Q i Nmax< = Nmax - 1 represents the bit index before polar coding (i.e., the bit channel index), where i = 0, 1, ..., Nmax - 1. For 3GPP TS 38.212 Rel - 15, Nmax = 1024. The polar sequence Q0 Nmax-1 is the ascending order of reliability W(Q0 Nmax ) < W(Q1 Nmax ) <... < W(Q Nmax-1 Nmax ), where W(Q i Nmax ) represents the reliability of the bit index Q i Nmax . For example, referring to the above table, the reliability of the bit index Q i Nmax = 4, W(Q i Nmax ) = 3, is lower than the reliability of the bit index Q i Nmax = 3, W(Q i Nmax ) = 7. That is to say, the above table lists the bit indices 0 to 1023 representing the 1024 input positions of the polar code with Nmax = 1024 in ascending order of reliability.

[0195] For any information block encoded into N bits, the same polar sequence Q0 N-1 = {Q0 N , Q1 N , Q2 N ,..., Q N-1 N}. The polar sequence Q0 N-1 is the subset of all elements Q Nmax-1 of the polar sequence Q0 N sorted in ascending order of reliability W(Q0 N ) < W(Q1 N ) < W(Q2 N-1 ) <... < W(Q N i Nmax ) with values less than N. For example, when N = 8, the polar sequence Q0 7 includes the elements of Q Nmax-1 among the elements of the polar sequence Q0 i Nmax < 8, and the elements of Q i Nmax < 8 are sorted in ascending order of reliability W(0) < W(1) < W(2) < W(4) < W(3) < W(5) < W(6).

[0196] For example, Table 3 lists the input bit positions of an information block of a size K (=10) of a polar code input into a polar sequence of N=512.

[0197] [Table 3]

[0198] Polarization sequence 1 505 2 506 3 479 4 508 5 495 6 503 7 507 8 509 9 510 10 511

[0199] Table 3 shows 10 elements for K=10 among the elements of the polarization sequence of N=512 in ascending order of reliability. Referring to the above <Polarization Sequence> table, I(=Q i Nmax ) value has 10 reliability W(Q i Nmax ) is {479, 495, 503, 505, 506, 507, 508, 509, 510, 511}. If {479, 495, 503, 505, 506, 507, 508, 509, 510, 511} are arranged in ascending order of reliability W, {505, 506, 479, 508, 495, 503, 507, 509, 510, 511} can be obtained, which is a set of bit indices for K=10 in the polarization sequence for N=512 shown in Table 3.

[0200] If the bit sequence input to the channel coding is composed of c0, c1, c2, c3, . . . , c K-1 The encoded bits are represented by d0, d1, d2, d3, . . . , d N-1 Represents, where K is the number of bits to be encoded, where N = 2 n , and the value of n is determined by the following table.

[0201] [Table 4]

[0202]

[0203] Where n min =5.

[0204] In Table 4, n max It can be a value predetermined according to the type of channel or control information and / or the number of information bits input to the channel coding block. For example, n for the broadcast channel (BCH) max Can be set to 9 for DCI n max Can be scheduled as 9, and for UCI's n max Can be booked as 10.

[0205] In Table 4, E represents the rate matching output sequence length. The rate matching output sequence length E can be predetermined according to the type of channel, the type of control information, the amount of resources mapped to the channel or control information, and / or the number of code blocks used to send control information. For example, the rate matching output sequence length E for BCH is 864, the rate matching output sequence length E for downlink control information is 864, and the rate matching output sequence length E for UCI can be predetermined based on the number of OFDM symbols carrying UCI, the number of RBs, the expansion factor, the number of code blocks for UCI, and / or the type of UCI included in the UCI payload (e.g., HARQ-ACK, scheduling request (SR), channel state information (CSI), etc.).

[0206] For any information block coded as N bits, the same polarization sequence Q0 is used N-1 = {Q0 N ,Q1 N ,Q2 N ,...,Q N-1 N}. Polarization sequence Q0 N-1 is the polarization sequence Q0 Nmax-1 A subset of Q where all elements Q with a value less than N i Nmax In ascending order of reliability W(Q0 N ) <W(Q1 N ) <W(Q2 N )<... <W(Q N-1 N ) sort.

[0207] In the NR system, under certain conditions, such as when 18<=polar code information size<=25, parity check bits are generated to improve the performance (e.g., block error rate (BLER)) when using polar codes. Here, the polar code information size K refers to the number of information bits encoded by polar coding. For example, the sum of the code block bits and the code block CRC bits may be equal to the polar code information size.

[0208] Fig.12 A method of generating parity bits used in polar codes is shown.

[0209] In some implementations, a parity check (PC) polar code may be used. A PC polar code refers to a polar code in which PC bits generated using a portion of a data block (i.e., an information block) are placed in the input of a polar encoder. According to the currently disclosed NR specification, when the data block size K is in the range of 18 <= K <= 25, a PC polar code may be used. In this case, the number of PC bits is 3, and the PC bits may be used as Fig.12The 5-bit shift register shown is used to generate the PC bits. Fig.12 In the example, the 5-bit shift registers (i.e., y[0], y[1], y[2], y[3], and y[4]) are all initialized to 0. That is, the following can be used for the data block [u0, u1, u2, ..., u N-1 ]Generate PC bits.

[0210] >Registers are rotated left,

[0211] >If u i is the information bit, then set y[0] = (u i XOR y[0]),

[0212] >If u i If it is a PC bit, then set u i =y[0].

[0213] The generated PC bits are assigned to the input bit channels of the polar encoder (i.e., the bit indices of the polar code) as follows. wm PC =1, when E-K+3<=192, n wm PC = 0. In this case, if the bit index set of the PC bits is represented as Q N PC , and if Q N PC The bit index set of the other PC bits is denoted as Q N PC_wm , then the set Q N PC The size of |Q N PC |=n PC , and the set Q N PC_wm The size of |Q N PC_wm |=n wm PC According to NR specifications (e.g., 3GPP TS 38.212Rel-15), Q N PC and Q N PC_wm It can be calculated as follows. For bit index j ranging from 0 to N-1 (i.e., j=0, 1, ..., N-1), G N The jth row of j , and g j The row weight is expressed as w(g j ), where w(g j ) is gj In this case, (n PC -n wm PC ) PC bits are placed in (n PC -n wm PC ) the least reliable bit index. In addition, the remaining n wm PC The PC bits are placed The bit index with the smallest row weight in , where express The most reliable bit index. If There are more than n rows with the same minimum row weight in wm PC If there are more bit indices, the remaining n wm PC The PC bits are placed The n with the highest reliability and the smallest row weight wm PC bit index.

[0214] Polar coding input u=[u0 u1 u2...u N-1 ] can be generated according to Table 5 below.

[0215] [Table 5]

[0216]

[0217] The encoded output d = [d0 d1 d2 d3 ... d N-1 ] is through d = uG N obtained, and encoding is performed by GF(2).

[0218] Fig.13 is a diagram illustrating a rate matching process according to some implementations of the present disclosure.

[0219] In some implementations, rate matching is performed after channel coding. In the NR specification, rate matching of polar codes is defined for each code block, and rate matching includes sub-block interleaving, bit selection, and bit interleaving. In this specification, the input bit sequence before rate matching can be represented as d0, d1, d2, d3, . . . , d N-1 , and the output bit sequence after rate matching can be expressed as f0, f1, f2, f3, …, f E-1 The bits input to the sub-block interleaver are coded bits d0, d1, d2, d3, . . . , d N-1 . The coded bits d0, d1, d2, d3, ..., dN-1 It can be divided into 32 sub-blocks. The bits output from the sub-block interleaver can be represented as y0, y1, y2, y3, ..., y N-1 , which can be generated as follows: for n=0 to N-1: i=floor(32n / N); J(n)=P(i)*(N / 32)+mod(n,N / 32); y n =d J(n) , where the sub-block interleaver pattern P(i) is determined according to Table 6 below.

[0220] [Table 6]

[0221] i P(i) i P(i) i P(i) i P(i) i P(i) i P(i) i P(i) i P(i) 0 0 4 3 8 8 12 10 16 12 20 14 24 24 28 27 1 1 5 5 9 16 13 18 17 20 21 22 25 25 29 29 2 2 6 6 10 9 14 11 18 13 22 15 26 26 30 30 3 4 7 7 11 17 15 19 19 21 23 23 27 28 31 31

[0222] represents the nth Kronecker power of the matrix G2, where N is 2 n ; and G2 and Figure 6 is the same as the basic matrix F shown in (b).

[0223] In some implementations, the bit sequence y0, y1, y2, y3, ..., y N-1 Write to a circular buffer of length N. If the rate matching output sequence length is denoted as E, the bit selection output bit sequence e can be generated as follows k (where k = 0, 1, 2, ..., E-1).

[0224] [Table 7]

[0225]

[0226] Puncturing or shortening is a technique of not transmitting some coded bits when the resources allocated for transmission are not large enough to accommodate all coded bits. Repetition is a technique of duplicating and transmitting some coded bits when the resources allocated for transmission are large enough to accommodate all coded bits.

[0227] Depending on the type of transmission channel or control information or on the channel coding scheme, the bit sequence e0, e1, e2, ..., e E-1 Can be interleaved into bit sequences f0, f1, f2, f3, ···, f E-1 For example, in the case of polar coding for UCI, the bit sequence e0, e1, e2, . . . , e E-1 It can be interleaved into the bit sequence f0, f1, f2, f3, . . . , f E-1 .

[0228] [Table 8]

[0229]

[0230] Polarization sequence Q0 N-1 The set of bit indices in is represented as And the polarization sequence Q0 N-1 The set of other bit indices in is represented as in, And n PC is the number of PC bits. In the present disclosure, |S| represents the number of elements in set S. and Given below.

[0231] [Table 9]

[0232]

[0233] In the present disclosure, A\B represents the difference between set B and set A, that is, AB. In other words, A\B refers to the set of all elements in set A that do not belong to set B.

[0234] In order to improve the performance of polar coding / decoding, polarization adjusted convolutional (PAC) codes that use convolution transformation as a precoding operation before polarization transformation have been considered. PAC codes can improve the error correction performance of polar codes by cascading convolution transformation with polarization transformation.

[0235] Fig.14 The structure of one of the encoder / decoders of the PAC code that can be used in some implementations of the present disclosure is shown.

[0236] As with typical polar codes, the overall performance of a PAC code depends on which positions in the convolution’s input vector v carry information and which positions are frozen to zero. This choice of frozen positions in the input vector v is called rate profiling.

[0237] Reference Fig.14 , the rate configuration in the PAC code classifies the user data into an information set and a frozen set. For example, assuming a PAC code with a mother code size N = 8, when the user data size K = 4, d = [d0, d1, d2, d3]. In this case, assuming that the method of allocating information / frozen bits according to the current NR standard, the user data of size K is allocated to K bit channels in the order of bit channels 7, 6, 5, 3, 4, 2, 1 and 0, so the information set A = {7, 6, 5, 3} and the frozen set A c ={4,2,1,0}. The rate configuration maps user data d = [d0,d1,d2,d3] to v = [v0,...,v7], where v iis the value mapped to the bit channel i. Therefore, it can be represented as v = [0, 0, 0, d1, 0, d2, d3, d4]. The convolution operation can be represented by the impulse response c = (c0, ..., c m ) to execute, where c0≠0 and c m ≠0. The parameter m+1 is called the constraint length of the convolution. m is the size of the memory used for the convolution, for example, the number of shift registers. In some implementations of the present disclosure, the convolution precoder may include m memories (for example, shift registers). With a given impulse response c=(c0,...,c m )’s input-output relationship for the convolution is Where i = 0, ..., N-1, and when j> = i, v i-j = 0. If it is expressed as a matrix, it can be expressed in the form of an upper triangular matrix as follows.

[0238] [Formula 14]

[0239]

[0240] Polarization variant P with mother code size N N represents the polar code kernel matrix, as shown in Equation 5. The PAC codeword x can be expressed as follows.

[0241] [Formula 15]

[0242] x=vTP N =uP N

[0243] The decoding method of the PAC code can be roughly divided into two types. The first method performs sequential decoding by interpreting the convolution operation (i.e., convolution precoding) and polarization transformation as convolution coding of constraint length N. Sequential decoding is heuristic decoding, various algorithms are known, and Fano decoding is known as an effective method (see "From sequential decoding to channel polarization and back again" by E. Arikan).

[0244] Fig.15 A codeword tree is shown to illustrate the concept of sequential decoding. Fig.15 In the example of , assuming that the input data is 100, the codeword obtained by encoding the input data 100 is 111 010 100, and the corresponding received codeword at the receiver is 001 010 100.

[0245] Reference Fig.15 , sequential decoding can be performed from left to right in the codeword tree. Fig.15, for example, the decoder can perform decoding in the direction corresponding to 0 because for the first codeword part 001 of the received codeword 001 010 100, 000 has a smaller (Hamming) distance value among the possible codewords 111 and 000. The decoder can perform decoding by comparing the second codeword part 010 of the received codeword 001010 100 with 111, 000 again to continue decoding in the direction of 0 corresponding to the input 000, and comparing the third codeword part 100 with 111, 000 again to select 0, thereby obtaining the final value 000. However, since the received codeword is decoded as a value 000 different from the input data 100, this is wrong. Therefore, when a specific condition is generated to allow the decoder to perform decoding again at the upper node, error-free decoding can be achieved. In the example, when the first codeword part 001 is decoded and then branched to the upper node and decoding is performed in the direction corresponding to 111 instead of 000, a decoding result of 100 can be obtained.

[0246] A brief description of Fano decoding of a convolutional encoder with an input bit number λ, an output bit number v, and a constraint length L is as follows. When the decoding is implemented, the path metric can be expressed as follows.

[0247] [Formula 16]

[0248]

[0249] Here, l is the depth of the code tree, and where Q(k) is the relative frequency of k. In this case, the update of path depth can be expressed as follows.

[0250] [Formula 17]

[0251]

[0252] The following table illustrates the Fano decoding algorithm.

[0253] [Table 10]

[0254]

[0255] In Table 10, * indicates that jδ is added to the threshold, where j is selected to satisfy: Γ l -δ<T+jδ<Γ l In Table 10, means moving forward to the first node derived from the current node. In Table 10, Indicates moving sideways to the next node that differs from the current node only in the last branch. If the current node is the last one, move backwards.

[0256] The second method performs the above-mentioned SC or SCL decoding by interpreting the convolution operation and polarization transformation as a polar code to which the precoding T is applied. In this case, SC / SCL decoding of the PAC code requires an SC / SCL decoder for a conventional polar code and storage of a memory state after convolution recoding is performed during the decoding process. This is because, in the PAC code, the input of the polarization transformation is the output of the convolution encoder.

[0257] An example of the SCL decoding algorithm for PAC code can be shown in the following table (reference: M. Rowshan, A. Burg and E. Viterbo, "Polarization-adjusted convolutional (PAC) codes: sequential decoding vs list decoding", IEEE Tr. VT., vol. 70, no. 2, 2021).

[0258] [Table 11]

[0259]

[0260]

[0261] Further summary: Fig.14 The PAC code shown can be interpreted as a precoding in which the convolution operation matrix T is in the form of an upper triangular matrix. It is known that the precoded polar code may have an improved minimum distance property compared to the non-precoded polar code.

[0262] HARQ is a technology that combines forward error correction (FEC) and automatic repeat request (ARQ). For example, the transmitter sends all or some of the coded bits encoded by using FEC, and the receiver detects whether there is an error in the received data and sends a HARQ-ACK signal indicating confirmation (ARQ) or negative ARQ (NACK) of the received data to the transmitter. If the transmitter determines that the data received at the receiver is error-free or below a certain threshold, the transmitter sends new data, on the contrary, if the data received at the receiver contains an error, the transmitter retransmits the corresponding data block. The receiver combines the retransmitted data block with the previously transmitted data block and performs decoding again to detect errors. This operation can be performed until no error is detected or until a predetermined number of retransmissions is reached. The combined method for decoding the retransmitted data block can be divided into the following two types.

[0263] *Chase combining: The transmitter retransmits the same coded bits as originally sent for combining at the receiver. Chase combining can reduce the error probability through power gain when decoding the retransmitted data blocks.

[0264] *Incremental Redundancy (IR): For combining at the receiver, the transmitter retransmits coded bits that are different from the coded bits originally sent. For example, the transmitter can send redundancy to the receiver in the retransmission that was not sent in the initial transmission. In the retransmission, the redundancy that was not sent in the previous transmission is sent, so the redundancy of the previous transmission and the redundancy of the current transmission are combined to increase the redundancy, which has the effect of reducing the code rate. That is, incremental redundancy can reduce the error probability through coding gain during the decoding of the retransmitted data block. In general, Chase combining corresponds to the case where there is no incremental redundancy among the incremental redundancy, and therefore Chase combining can also be interpreted as a special form of incremental redundancy.

[0265] There are various types of HARQ schemes. For example, HARQ schemes can be broadly classified into synchronous HARQ schemes and asynchronous HARQ schemes based on the timing of retransmission. In addition, depending on whether the channel state is reflected in the amount of resources to be used for retransmission, the HARQ scheme can be classified into a channel adaptive scheme and a channel non-adaptive scheme.

[0266] In the case of a synchronous HARQ scheme, if the initial transmission fails, subsequent retransmissions occur at a timing determined by the system. For example, assuming that retransmissions occur every four time units after the initial transmission fails, there is no need for the transmitter to notify the receiver of the timing of the retransmission or for the receiver to notify the transmitter of the timing of the retransmission because the timing has been determined between the transmitter and the receiver. However, in a synchronous HARQ scheme, if the data sending side receives a NACK message, the data sending side retransmits a frame, for example, every four time units until an ACK message is received. On the other hand, in the case of an asynchronous HARQ scheme, the timing of retransmissions can be newly scheduled or provided by additional signaling (from the transmitter to the receiver or from the receiver to the transmitter). In an asynchronous HARQ scheme, the timing of retransmitting a previously failed frame varies according to various factors, such as channel status.

[0267] In the case of the channel non-adaptive HARQ scheme, the frame modulation, the number of RBs used, adaptive modulation and coding (AMC), etc. for retransmission are determined to be the same as those determined for initial transmission. In contrast, in the case of the channel adaptive HARQ scheme, these parameters vary according to the channel state. For example, in the channel non-adaptive HARQ scheme, the transmitting side uses 6 RBs to transmit data during initial transmission, and also uses 6 RBs for retransmission. On the other hand, in the channel adaptive HARQ scheme, even if the transmitting side uses 6 RBs during initial transmission, the transmitting side can use more or less RBs for retransmission based on the channel state.

[0268] According to the above classification, four different types of HARQ schemes can be used, but asynchronous and channel adaptive HARQ schemes and synchronous and channel non-adaptive HARQ schemes are generally used. Asynchronous and channel adaptive HARQ schemes can maximize retransmission efficiency by adaptively changing the retransmission timing and the amount of resources used based on the channel state. However, asynchronous and channel adaptive HARQ schemes may increase overhead, so asynchronous and channel adaptive HARQ schemes are generally not considered for UL. On the other hand, synchronous and channel non-adaptive HARQ schemes have the advantage of minimal overhead because the timing and resource allocation for retransmission are predetermined in the system. However, under conditions with rapidly changing channel states, synchronous and channel non-adaptive HARQ schemes can be used. When the channel state changes rapidly, the retransmission efficiency of the synchronous and channel non-adaptive HARQ schemes can be significantly reduced.

[0269] <Incremental Redundancy (IR) HARQ>

[0270] In current 3GPP-based wireless systems, polarization codes are only used for channel coding of control information with a small number of bits (such as broadcast channels (BCH), DCI, and UCI) or transport channels, so there is almost no need to apply HARQ to information blocks to which polarization coding is applied. However, as wireless communication technology develops and the required services become more diversified, it is possible to consider applying polarization code-based channel coding to data channels (e.g., uplink shared channel (UL-SCH), downlink shared channel (DL-SCH), and sidelink shared channel (SL-SCH)). In the future, when polarization code-based channel coding is applied to data, a method for supporting HARQ of information blocks to which polarization code-based channel coding is applied is needed. Hereinafter, an implementation of the present disclosure for supporting polarization code-based HARQ is described.

[0271] Fig.16 An example of allocating information bits to polar encoders according to some implementations of the present disclosure is shown. Specifically, Fig.16 The allocation of information bits for incremental redundancy (IR) to polar coding blocks is shown, where Fig.16 The example assumes that the size of the data block (i.e., the size of the information block in polar coding) is K=6, the mother code size N=8 for initial transmission, and the mother code size N=16 for retransmission. Fig.16 In the example, we assume the reliability of the Battacharyya parameter. Fig.16 In (a), it is assumed that the bit index with a larger reliability order value is a more reliable bit index. For example, it is assumed that the bit index with a reliability order value of 1 is more reliable than the bit index with a reliability order value of 0. Fig.16In (b), the value in the input node is the calculated Battacharyya parameter, and smaller values ​​indicate higher reliability.

[0272] In order to support incremental redundancy based HARQ (hereinafter, IR HARQ) for polar codes, the transmitter may increase the mother code size when performing retransmission. For example, the transmitter may apply a mother code size of N to initial transmission and a mother code size of 2N to retransmission.

[0273] Reference Fig.16 , in the case of initial transmission, K=6, so the transmitter performs polarization encoding by placing bits c0, c1, c2, c3, c4 and c5 of the data block in the most reliable bit indices 2, 3, 4, 5, 6 and 7 among the bit channel indices 0 to 7 of the mother code size N=8 (i.e., the bit indices before polarization encoding). If the receiver determines that there is an error after decoding the initial transmission and requests retransmission, or if the transmitter intends to perform retransmission if there is an error in the initial transmission, the transmitter performs polarization encoding by placing bits c0, c1, c2, c3, c4 and c5 of the data block in the six most reliable bit indices 7, 11, 12, 13, 14 and 15 among the bit indices 0 to 15 of the mother code size N=16. However, in order to support IRHARQ, the transmitter and the receiver need to satisfy the property of providing the coded bits generated in the initial transmission in the coded bits generated in the retransmission. For example, referring to Fig.16 (a) and Fig.16 (b), in the current transmission, information bits c0, c1, c2, c3, c4 and c5 need to be placed in the bit index where information bits c0, c1, c2, c3, c4 and c5 were placed in the previous transmission. When the mother code size increases from N to 2N, the polar coding codeword can be expressed as follows.

[0274] [Formula 18]

[0275]

[0276] Here, F is the kernel for polar coding of mother code size N, and [U2 U1] is the data block. In this case, U1F needs to be the codeword of the initial transmission so that IR HARQ can be supported. Therefore, refer to Fig.16 , the data corresponding to bit index 7 needs to be allocated to the operation of bit index 10 as well. That is, the same data bits need to be placed in bit indexes 7 and 10 and then encoded. This duplication operation occurs if the mother code size is increased for retransmission and the data block size is placed in the bit index of the upper polar encoder. That is, according to Fig.16In the example of , when N=16, the information bit is placed in bit index 7, which is the most reliable bit index among the bit indices corresponding to the lower polarization coder when the data block size is greater than or equal to 5, and thus a copy operation occurs. Hereinafter, a polarimetric subcode with a small bit index is referred to as a lower polarimetric subcode, and a polarimetric subcode with a large bit index is referred to as an upper polarimetric subcode.

[0277] exist Fig.16 In the example of , the copy operation is described as copying the bit value mapped to the bit index of the lower polarization code to the bit index of the upper polarization code, but it is also possible to specify that the copy operation is performed from the upper polarization code to the lower polarization code. Fig.16 , a transmitter performing a retransmission may place bits c0, c1, c2, c3, c4, and c5 of the data block in bit indices 9 to 15 of the retransmitted polar code so that the upper polar subcode includes a mapping pattern to the previously transmitted polar code, and copy bit c0 placed in bit index 10 to bit index 7.

[0278] Hereinafter, an implementation of the present disclosure for supporting IR HARQ by using a PAC code is described.

[0279] <HARQ Design with PAC Codes with Non-Recursive Convolution>

[0280] The non-recursive convolution operation can be represented by the impulse response c = (c0, ..., c m ). In this case, the constraint length is m+1. If the mother code size of the initial transmission is N, the polarization transformation can be represented by an N*N matrix. In order to obtain IR gain during retransmission, the mother code size can be increased to 2N. In this case, the size of both the convolutional precoding matrix and the polarization transformation can be increased to a 2N*2N matrix. For example, if the codeword of the initial transmission is represented as in Equation 19, the codeword for retransmission can be represented as in Equation 20.

[0281] [Formula 19]

[0282] x1=v1T N P N

[0283] [Formula 20]

[0284]

[0285] In Equation 19, x1 and v1 are 1*N matrices, and T N and P N It is an N*N matrix. N It can be expressed as follows.

[0286] [Formula 21]

[0287]

[0288] In Equation 20, x2 is a 1*2N matrix, v2 and v2 are 1*N matrices, and T 2N and P 2N is a 2N*2N matrix and satisfies T 2N It can be expressed as follows.

[0289] [Formula 22]

[0290]

[0291] Here, T N,tail It can be expressed as follows.

[0292] [Formula 23]

[0293]

[0294] The codeword x2 during retransmission can be expressed as follows using Formula 22.

[0295] [Equation 24]

[0296]

[0297] To support IR HARQ, the retransmitted codeword x2 needs to include the initially transmitted codeword v1T N P N , so Equation 24 needs to satisfy the following conditions.

[0298] [Formula 25]

[0299]

[0300] The codeword for retransmission that satisfies the condition of Formula 25 can be expressed as follows.

[0301] [Equation 26]

[0302] x2=[v2 v1]T 2N P 2N

[0303] =[v2T N P N +v1T N P N v1T N P N ]

[0304] In some implementations of the present disclosure, the following method may be considered to determine a solution that satisfies the condition of Equation 25.

[0305] *Method 1: As v2TN,tail = 0, that is, we can consider assigning 0 to the last m bit positions of v2 to satisfy v2T N,tail = 0. In other words, method 1 may set the last portion of the rate configuration corresponding to v2 to frozen bits equal to the number of memories used for non-recursive convolution operations.

[0306] *Method 2: As v2T N,tail = 0, that is, we can consider setting T N,tail = 0 to satisfy v2T N,tail = 0. In this case, when the convolution is calculated, corresponding to T N,tail The part of is set to 0 and excluded from the target of the convolution, so it can be interpreted that a part of the codeword corresponding to the mother code size 2N is obtained by a convolution different from the other parts. Therefore, for method 2, the receiver may need to modify its decoding operation when receiving the corresponding codeword. In method 2, the precoding matrix T applied during retransmission 2N It can be expressed as follows.

[0307] [Formula 27]

[0308]

[0309] Fig.17 and Fig.18 The input sequence of the convolution according to some implementations of the present disclosure is shown. Specifically, Fig.17 shows an example of a convolution input when a reliability order sequence (ie, a polarization sequence) defined in the current NR standard is applied to a rate configuration according to method 1, and Fig.18 An example of a convolution input when the polarization sequence defined in the current NR standard is applied to a rate configuration according to Method 2 is shown. Fig.17 and Fig.18 In the example of , it is assumed that the mother code size of the initial transmission is N=32, the mother code size of the retransmission is 2N=64, the information size is K=20, and the constraint length is m+1=3.

[0310] Reference Fig.17 (a), for the initial transmission, the information is assigned to the bit indices {31,30,29,27,23,15,28,22,25,26,21,14,13,19,11,7,24,20,12,18} according to the reliability order defined in the polarization sequence. Fig.17(b), if the mother code size is increased to 64 for retransmission, and the codeword of the initial transmission is placed in the lower 32 bits of the codeword for retransmission, the bit index in which the information of the initial transmission is to be placed among the 64 bit indexes of the mother code size 64 corresponds to the bit index {63, 62, 61, 59, 55, 47, 60, 54, 57, 58, 53, 46, 45, 51, 43, 39, 56, 52, 44, 50}. When the mother code size is 64, the bit index to which the 20-bit information is allocated according to the reliability order defined in the polarization sequence is the bit index {63, 62, 61, 59, 55, 47, 31, 60, 58, 57, 54, 53, 46, 51, 45, 30, 43, 29, 39, 27}. However, according to the conditions of method 1, the frozen bits are set in m=2 bit indices {31,30} among the lower part of the rate configuration (i.e., bit indices 0 to N-1 when the mother code size is 2N). Therefore, the next reliable bit index {56,23} is selected as the bit index to which information is to be allocated. Therefore, the bit index {63,62,61,59,55,47,60,54,57,58,53,46,45,51,43,39,56,52,44,50,27,56,23} can be determined as the bit index to which information is to be allocated.

[0311] Reference Fig.17 (b), for example, for retransmission, information may be allocated to the most reliable 20 bit indices {63, 62, 61, 59, 55, 47, 60, 54, 57, 58, 53, 46, 45, 51, 43, 39, 56, 52, 44, 50, 27, 56, 23} among the bit indices {63, 62, 61, 59, 55, 47, 60, 58, 57, 54, 53, 46, 51, 45, 43, 29, 39, 27, 56, 23}. To support IRHARQ, information needs to be allocated to bit indices {44, 50, 52}, so an operation of copying the information allocated to bit indices {23, 27, 29} to bit indices {44, 50, 52}, respectively, may be performed. To support IR HARQ, upper bit indices 32 to 63 of the 64 bit indices for retransmission may be set to include bit values ​​allocated to the 32 bit indices 0 to 31 for initial transmission.

[0312] As another example, for retransmission, the bit values ​​placed in bit indices {31,30,29,27,23,15,28,22,25,26,21,14,13,19,11,7,24,20,12,18} for initial transmission may be allocated in bit indices {63,62,61,59,55,47,60,54,57,58,53,46,4 The bit values ​​placed in bit indexes {63,62,61,59,55,47,60,54,57,58,53,46,45,51,43,39,56,52,44,50} among bit indexes {44,50,52} and the bit values ​​placed in bit indexes {23,27,29}.

[0313] Reference Fig.18 (a), for the initial transmission, the information is assigned to the bit indices {31,30,29,27,23,15,28,22,25,26,21,14,13,19,11,7,24,20,12,18} according to the reliability order defined in the polarization sequence. Fig.18(b), if the mother code size is increased to 64 for retransmission, and the codeword of the initial transmission is placed in the lower 32 bits of the codeword for retransmission, the bit index in which the information of the initial transmission is to be placed among the 64 bit indexes of the mother code size 64 corresponds to the bit index {63, 62, 61, 59, 55, 47, 60, 54, 57, 58, 53, 46, 45, 51, 43, 39, 56, 52, 44, 50}. When the mother code size is 64, the bit index to which the 20-bit information is allocated according to the reliability order defined in the polarization sequence is the bit index {63, 62, 61, 59, 55, 47, 31, 60, 58, 57, 54, 53, 46, 51, 45, 30, 43, 29, 39, 27}. In order to support IR HARQ, information needs to be allocated to bit indexes {44, 50, 52, 56}, so, for example, an operation of copying information allocated to bit indexes {27, 29, 30, 31} to bit indexes {44, 50, 52, 56}, respectively, may be performed. As another example, information allocated to bit indexes {31, 30, 29, 27, 23, 15, 28, 22, 25, 26, 21, 14, 13, 19, 11, 7, 24, 20, 12, 18} in an initial transmission using a PAC code with a mother code size of 32 may be allocated to bit indexes {63, 62, 61, 59, 55, 47, 60, 54, 57, 58, 53, 46, 45, 51, 43, 39, 56, 52, 44, 50} in a retransmission using a PAC code with a mother code size of 64, and is allocated to bit indexes that do not belong to the bit indexes. The bits of {44, 50, 52, 56} of the most reliable 20 bit indexes {63, 62, 61, 59, 55, 47, 31, 60, 58, 57, 54, 53, 46, 51, 45, 30, 43, 29, 39, 27} in the PAC code with a mother code size of 64 among {63, 62, 61, 59, 55, 47, 31, 60, 58, 57, 54, 53, 46, 51, 45, 30, 43, 29, 39, 27} may be copied to the next most reliable bit indexes {27, 29, 30, 31} respectively.

[0314] <HARQ Design of PAC Code with Recursive Convolution>

[0315] Fig.19 and Fig. 20 A recursive convolution operation is shown. In some implementations of the present disclosure, the convolution precoder may include m shift registers. Fig.19 An example of a recursive convolutional precoder with a number of shift registers of 1 (ie, a constraint length of 2) is shown, and Fig. 20 An example of a recursive convolutional precoder with a number of shift registers of m (ie, a constraint length of m+1) is shown.

[0316] Reference Fig.19 , can be obtained by replacing u stored in shift register 1 n-1 The convolution of c1 and v n Add to determine u n .exist Fig.19 In , if c1 is 0, the result of the convolution is always 0, so there is no constraint, which is the same as not applying the convolution. Fig.19 In the example, c1 can be 1, and thus Fig.19 The recursive convolution operation can be expressed as u n =v n +u n-1 .

[0317] Reference Fig. 20 , by inputting the PAC code with a mother code size of N u = [u1, u2, ..., u N ]Execute as Fig. 20 The output v = [v1, v2, ..., v N ] can be expressed as Among them, u0=v0.

[0318] Assume that the rate configuration output for the initial transmission of mother code size N is v N =[v0,v1,...,v N-1 ] and the recursive convolution output is u N =[u0,u1,...,u N-1 ].in this case, When the mother code size is 2N during retransmission, assuming the rate configuration output is v 2N =[v'0,...,v' N-1 ,v0,...,v N-1 ] and the recursive convolution output is u 2N =[u'0,...,u' N-1 ,u0,...,u N-1 ]. In order to support IR HARQ, the codeword for retransmission corresponding to the mother code size 2N needs to include the codeword for initial transmission corresponding to the mother code size N. To this end, it is necessary to satisfy the codeword corresponding to u 2N The memory size of the lower recursive convolution (ie, if the mother code size is 2N, the bit index is 0 to N-1) output u' j =0, j=Nm,...,N-1, which can be expressed as the following formula. This condition is applied to ensure that the recursive convolution of the lower part does not affect the upper part (ie, when the mother code size is 2N, the bit index N to 2N-1).

[0319] [Equation 28]

[0320]

[0321] In some implementations of the present disclosure, the transmitter sets the input bit sequence v to be convolved so that the lower part [v'0, ..., v' N-1 ] satisfies the condition in equation 28. The receiver can perform decoding assuming this operation of the transmitter.

[0322] Fig.21 The input sequence of the convolution according to some implementations of the present disclosure is shown. Specifically, Fig.21 An example of a convolution input according to some implementations of the present disclosure is shown, which supports IR HARQ for PAC codes that apply recursive convolution when a reliability order sequence (i.e., polarization sequence) defined in the current NR standard is applied to a rate configuration. Fig.21 In the example of , it is assumed that the mother code size of the initial transmission is N=32, the mother code size of the retransmission is 2N=64, the information size is K=20, and the constraint length is m+1=3.

[0323] exist Fig.21 In the example, Fig.17 As in the example of , bit indexes {63, 62, 61, 59, 55, 47, 60, 54, 57, 58, 53, 46, 45, 51, 43, 39, 56, 52, 44, 50, 27, 56, 23} may be determined as bit indexes to which information is to be allocated. However, in the case of a PAC code to which non-recursive convolution is applied, frozen bits are set in bit indexes {31, 30} (see Fig.17 ). In contrast, Fig.21 , in the case of PAC codes with recursive convolution, the value u' 30 +u' 29 and value u' 29 +u' 28 are set to the bit values ​​{v' corresponding to bit indices {31,30} respectively 31 ,v' 30}.

[0324] In some implementations of the present disclosure, for a PAC code of size 2N with recursive convolution, the last m bit positions among the highest N bit positions in the convolved input bit sequence v are set to values ​​satisfying Equation 28. The value satisfying Equation 28 may vary according to the memory size m and information input as the PAC code.

[0325] In some implementations of the present disclosure, when a PAC code of size 2N with non-recursive or recursive convolution is applied to retransmission, the last m bit indexes of the first N bit positions in the convolved input bit sequence v are set to predetermined bit values ​​(e.g., frozen bit values ​​or bit values ​​satisfying Equation 28), and the K most reliable bit positions of the remaining (2N-m) bit positions are set to the K bit values ​​of the information block. In order to ensure that the retransmitted codeword may include the codeword used for the initial transmission, the next most reliable K copy The information bit value of the copy operation or the information bit value used for the copy operation is set in the bit positions, where K copy is the number of bit indices where the copy operation is performed.

[0326] Some implementations of the present disclosure may support HARQ for data communication to which PAC codes are applied. Therefore, according to some implementations of the present disclosure, the throughput of a wireless communication system may be improved due to support for PAC codes and HARQ.

[0327] Fig. 22 A channel coding process according to some implementations of the present disclosure is shown.

[0328] According to some implementations of the present disclosure, a communication device or an encoder may perform operations related to channel coding. A communication device may include: at least one transceiver; at least one processor; and at least one computer memory, which is connected to at least one processor when in operation and stores instructions, and the instructions, when executed, cause at least one processor to perform operations according to some implementations of the present disclosure. A processing device for a communication device or an encoder may include: at least one processor; and at least one computer memory, which is connected to at least one processor when in operation and stores instructions, and the instructions, when executed, cause at least one processor to perform operations according to some implementations of the present disclosure. A computer-readable (non-volatile) storage medium may store at least one computer program including instructions, which, when executed by at least one processor, cause the at least one processor to perform operations according to some implementations of the present disclosure. A computer program or a computer program product may include instructions, which are recorded in at least one computer-readable (non-volatile) storage medium and cause (at least one processor) to perform operations according to some implementations of the present disclosure when executed.

[0329] Reference Fig. 22 In a method performed by a communication device, in a communication device, an encoder, a processing device, a computer-readable (non-volatile) storage medium and / or a computer program product, operations may include: based on an information block of length K and a polarization sequence Q of length 2N 2N-10={Q 0, Q1,...,Q 2N-1} to determine the first bit sequence v as the input of the convolutional precoding 2N ={v0,...,v 2N-1}(S2201); Determine the second bit sequence u based on performing convolution precoding on the first bit sequence 2N ={u0,...,u 2N-1}(S2203); and performing polarization coding on the second bit sequence (S2205). The polarization sequence Q with a length of 2N 2N-1 0={Q 0, Q1,...,Q 2N-1} in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) definition, where 0 <= Q 2N i <=2N-1 is the bit index of i=0,1,...,2N-1, and W(Q 2N i ) is Bitso Q 2N i The reliability of the first bit sequence v 2N The determination may include mapping a predetermined bit value to a first bit sequence v 2N The last m bit indices among the first N bit indices in and the K bit values ​​of the information block are mapped to the K bit indices among the remaining (2N-m) bit indices, where m is the number of shift registers used for convolution precoding.

[0330] In some implementations, the method or operation may include determining a third bit sequence, the third bit sequence including coded bits obtained via polar coding of the second bit sequence. Determining the third bit sequence may include determining a rate-matched output sequence of length E by rate matching.

[0331] In some implementations, the method or operation may include sending the third bit sequence to another communication device.

[0332] In some implementations, mapping the predetermined bit value to the last m bit indexes may include mapping the frozen bit value to each of the last m bit indexes. For example, mapping the predetermined bit value to the last m bit indexes may include mapping 0 to each of the last m bit indexes.

[0333] In some implementations, performing convolutional precoding on the first bit sequence may include based on To determine the second bit sequence u2N ={u0,...,u 2N-1}, where c k is the impulse response c=(c0,...,c m ), k=0,...,m,u n is an element of the second bit sequence n=0,...,2N-1 and u0=v0.

[0334] In some implementations, mapping the predetermined bit value to the last m bit indexes may be performed by j The mapping satisfies the following conditions: Wherein, j=Nm,...,N-1.

[0335] In some implementations, mapping the K bit values ​​of the information block to the K bit indices among the remaining (2N-m) bit indices may include mapping the K bit values ​​of the information block to the K bit indices among the remaining (2N-m) bit indices based on the polarization sequence Q of length 2N. 2N-1 0={Q 0, Q1,...,Q 2N-1}Map the K bit values ​​of the information block to the K most reliable bit indices among the remaining (2N-m) bit indices.

[0336] Fig.23 A channel decoding process according to some implementations of the present disclosure is shown.

[0337] According to some implementations of the present disclosure, a communication device or a decoder may perform operations related to channel decoding. A communication device may include: at least one transceiver; at least one processor; and at least one computer memory, which is connected to at least one processor when in operation and stores instructions, and the instructions, when executed, cause at least one processor to perform operations according to some implementations of the present disclosure. A processing device for a communication device or a decoder may include: at least one processor; and at least one computer memory, which is connected to at least one processor when in operation and stores instructions, and the instructions, when executed, cause at least one processor to perform operations according to some implementations of the present disclosure. A computer-readable (non-volatile) storage medium may store at least one computer program including instructions, which, when executed by at least one processor, cause the at least one processor to perform operations according to some implementations of the present disclosure. A computer program or a computer program product may include instructions, which are recorded in at least one computer-readable (non-volatile) storage medium and cause (at least one processor) to perform operations according to some implementations of the present disclosure when executed.

[0338] Reference Fig.23In a method performed by a communication device, in a communication device, a decoder, a processing device, a computer-readable (non-volatile) storage medium and / or a computer program product, operations may include: receiving a third bit sequence including coded bits (S2301); and obtaining an information block of length K based on the third bit sequence (S2303). 2N ={u0,...,u 2N-1 The third bit sequence can be provided by polarization coding of the first bit sequence v 2N ={v0,...,v 2N-1 The second bit sequence can be provided based on the information block of length K and the polarization sequence Q of length 2N. 2N-1 0={Q 0, Q1,...,Q 2N-1} to provide the first bit sequence v 2N The polarization sequence Q of length 2N 2N-1 0={Q 0, Q1,...,Q 2N-1} in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) definition, where 0 <= Q 2N i <=2N-1 is ... - bit index for i=0, 1, ..., 2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability. In the first bit sequence v 2N Among the first N bit indices, the last m bit indices may include predetermined bit values, and among the remaining (2N-m) bit indices, the K bit indices may include K bit values ​​of the information block, where m is the number of shift registers used for convolution precoding.

[0339] In some implementations, the last m bit indices may be frozen. For example, the last m bit indices may be frozen in v j includes 0 as a predetermined bit value.

[0340] In some implementations, based on the first bit sequence v 2N ={v0,...,v 2N-1}and To provide a second bit sequence, where c k is the impulse response c=(c0,...,c m )(k=0,...,m),un is an element of the second bit sequence, n=0,...,2N-1, and u0=v0.

[0341] In some implementations, the last m bits of the index v j May include bit values ​​that satisfy the following conditions: Wherein, j=Nm,...,N-1.

[0342] In some implementations, the K bit indices among the remaining (2N-m) bit indices may be based on the polarization sequence Q of length 2N. 2N-1 0={Q 0, Q1,...,Q 2N-1}The most reliable K bit indices.

[0343] The examples of the present disclosure as described above have been presented to enable those of ordinary skill in the art to implement and practice the present disclosure. Although the present disclosure is described with reference to the examples, those skilled in the art may make various modifications and changes in the examples of the present disclosure. Therefore, the present disclosure is not intended to be limited to the examples set forth herein, but to conform to the widest scope consistent with the principles and features disclosed herein.

[0344] Implementations of the present disclosure may be used in a BS, a UE, or other devices in a wireless communication system.

Claims

1. A method for sending an information block by a communication device in a wireless communication system, the method comprising: Based on the information block of length K and the polarization sequence Q of length 2N 2N-1 0={Q0,Q1,...,Q 2N-1 }Determine the first bit sequence v as the input of the convolutional precoding 2N ={v0,...,v 2N-1 }; Determine a second bit sequence u based on performing the convolution precoding on the first bit sequence 2N ={u0,...,u 2N-1 }; determining a third bit sequence comprising bits encoded based on polarization encoding for the second bit sequence; and sending the third bit sequence to another communication device, Among them, the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1 } in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and Wherein, determining the first bit sequence v 2N comprising mapping a predetermined bit value to the first bit sequence v 2N The last m bit indices among the first N bit indices in the convolution precoding and the K bit values ​​of the information block are mapped to the K bit indices among the remaining (2N-m) bit indices, where m is the number of shift registers used for the convolution precoding.

2. The method according to claim 1, wherein: Mapping the predetermined bit value to the last m bit indices includes mapping 0 to the last m bit indices.

3. The method according to claim 1, wherein: Performing the convolution precoding on the first bit sequence includes: based on Determine the second bit sequence u 2N ={u0,...,u 2N-1 }, where c k is the impulse response c=(c0,...,c m ), k=0,...,m,u n is an element of the second bit sequence, n=0,...,2N-1, and u0=v0.

4. The method according to claim 3, wherein: Mapping the predetermined bit value to the last m bit indexes includes: mapping v j Mapping to satisfy Wherein, j=Nm,...,N-1.

5. The method according to claim 1, wherein: Mapping the K bits of the information block to the K bit indexes among the remaining (2N-m) bit indexes comprises: mapping the K bits of the information block to the K bit indexes among the remaining (2N-m) bit indexes based on the polarization sequence Q having a length of 2N; 2N-1 0={Q 0, ,Q1,...,Q 2N-1 }, map the K bit values ​​of the information block to the K most reliable bit indices among the remaining (2N-m) bit indices.

6. A communication device for sending an information block in a wireless communication system, the communication device comprising: at least one transceiver; at least one processor; as well as at least one computer memory operatively connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations comprising: Based on the information block of length K and the polarization sequence Q of length 2N 2N-1 0={Q0,Q1,...,Q 2N-1 }Determine the first bit sequence v as the input of the convolutional precoding 2N ={v0,...,v 2N-1 }; Determine a second bit sequence u based on performing the convolution precoding on the first bit sequence 2N ={u0,...,u 2N-1 }; determining a third bit sequence comprising bits encoded based on polarization encoding for the second bit sequence; and sending the third bit sequence to another communication device, Among them, the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1 } in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and Wherein, determining the first bit sequence v 2N comprising mapping a predetermined bit value to the first bit sequence v 2N The last m bit indices among the first N bit indices in the convolution precoding and the K bit values ​​of the information block are mapped to the K bit indices among the remaining (2N-m) bit indices, where m is the number of shift registers used for the convolution precoding.

7. A processing device in a wireless communication system, the processing device comprising: at least one processor; as well as at least one computer memory operatively connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations comprising: Based on the information block of length K and the polarization sequence Q of length 2N 2N-1 0={Q0,Q1,...,Q 2N-1 }Determine the first bit sequence v as the input of the convolutional precoding 2N ={v0,...,v 2N-1 }; Determine a second bit sequence u based on performing the convolution precoding on the first bit sequence 2N ={u0,...,u 2N-1 }; determining a third bit sequence comprising bits encoded based on polarization encoding for the second bit sequence; and sending the third bit sequence to another communication device, Among them, the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1 } in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and Wherein, determining the first bit sequence v 2N comprising mapping a predetermined bit value to the first bit sequence v 2N The last m bit indices among the first N bit indices in the convolution precoding and the K bit values ​​of the information block are mapped to the K bit indices among the remaining (2N-m) bit indices, where m is the number of shift registers used for the convolution precoding.

8. A computer-readable storage medium storing at least one computer program code, the at least one computer program code comprising instructions that, when executed, cause at least one processor to perform operations comprising: Based on the information block of length K and the polarization sequence Q of length 2N 2N-1 0={Q0,Q1,...,Q 2N-1 }Determine the first bit sequence v as the input of the convolutional precoding 2N ={v0,...,v 2N-1 }; Determine a second bit sequence u based on performing the convolution precoding on the first bit sequence 2N ={u0,...,u 2N-1 }; determining a third bit sequence comprising bits encoded based on polarization encoding for the second bit sequence; and sending the third bit sequence to another communication device, Among them, the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1 } in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and Wherein, determining the first bit sequence v 2N comprising mapping a predetermined bit value to the first bit sequence v 2N The last m bit indices among the first N bit indices in the convolution precoding and the K bit values ​​of the information block are mapped to the K bit indices among the remaining (2N-m) bit indices, where m is the number of shift registers used for the convolution precoding.

9. A method for receiving an information block by a communication device in a wireless communication system, the method comprising: receiving a third bit sequence comprising coded bits; as well as obtaining the information block with a length of K based on the third bit sequence, Wherein, based on the second bit sequence u 2N ={u0,...,u 2N-1 The polarization coding of} provides the third bit sequence, Among them, by targeting the first bit sequence v 2N ={v0,...,v 2N-1 The convolution precoding of} provides the second bit sequence, Wherein, based on the information block with a length of K and the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1 } Provide the first bit sequence v 2N , Among them, the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1 } in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and Among them, in the first bit sequence v 2N Among the first N bit indices, the last m bit indices include predetermined bit values, and among the remaining (2N-m) bit indices, K bit indices include K bit values ​​of the information block, where m is the number of shift registers used for the convolution precoding.

10. The method according to claim 9, wherein: The last m bits are indexed in v j includes 0 as the predetermined bit value.

11. The method according to claim 9, wherein: Based on the first bit sequence v 2N ={v0,...,v 2N-1 }and To provide the second bit sequence, wherein c k is the impulse response c=(c0,...,c m ), k=0,...,m,u n is an element of the second bit sequence, n=0,...,2N-1, and u0=v0.

12. The method according to claim 11, wherein: v from the last m bit indices j Include bit values ​​that satisfy the following conditions: Wherein, j=Nm,...,N-1.

13. The method according to claim 9, wherein: The K bit indices from the remaining (2N-m) bit indices are based on the polarization sequence Q of length 2N. 2N-1 0={Q 0, Q1,...,Q 2N-1 }The most reliable K bit indices.

14. A communication device for receiving an information block in a wireless communication system, the communication device comprising: at least one transceiver; at least one processor; as well as at least one computer memory operatively connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations comprising: receiving a third bit sequence comprising coded bits; and obtaining the information block with a length of K based on the third bit sequence, Wherein, based on the second bit sequence u 2N ={u0,...,u 2N-1 The polarization coding of} provides the third bit sequence, Among them, by targeting the first bit sequence v 2N ={v0,...,v 2N-1 The convolution precoding of} provides the second bit sequence, Wherein, based on the information block with a length of K and the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1 } Provide the first bit sequence v 2N , Among them, the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1 } in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and Among them, in the first bit sequence v 2N Among the first N bit indices, the last m bit indices include predetermined bit values, and among the remaining (2N-m) bit indices, K bit indices include K bit values ​​of the information block, where m is the number of shift registers used for the convolution precoding.

15. A processing device in a wireless communication system, the processing device comprising: at least one processor; as well as at least one computer memory operatively connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations comprising: receiving a third bit sequence comprising coded bits; and Based on the third bit sequence, an information block with a length of K is obtained, Wherein, based on the second bit sequence u 2N ={u0,...,u 2N-1 The polarization coding of} provides the third bit sequence, Among them, by targeting the first bit sequence v 2N ={v0,...,v 2N-1 The convolution precoding of} provides the second bit sequence, Wherein, based on the information block with a length of K and the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1 } Provide the first bit sequence v 2N , Among them, the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1 } in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and Among them, in the first bit sequence v 2N Among the first N bit indices, the last m bit indices include predetermined bit values, and among the remaining (2N-m) bit indices, K bit indices include K bit values ​​of the information block, where m is the number of shift registers used for the convolution precoding.

16. A computer readable storage medium storing at least one computer program code, the at least one computer program code comprising instructions which, when executed, cause at least one processor to perform operations comprising: receiving a third bit sequence comprising coded bits; and Based on the third bit sequence, an information block with a length of K is obtained, Wherein, based on the second bit sequence u 2N ={u0,...,u 2N-1 The polarization coding of} provides the third bit sequence, Among them, by targeting the first bit sequence v 2N ={v0,...,v 2N-1 The convolution precoding of} provides the second bit sequence, Wherein, based on the information block with a length of K and the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1 } Provide the first bit sequence v 2N , Among them, the polarization sequence Q with a length of 2N 2N-1 0={Q0,Q1,...,Q 2N-1 } in ascending order of reliability W(Q 2N 0) <W(Q 2N 1)<... <W(Q 2N 2N-1 ) is defined, where 0 <= Q 2N i <=2N-1 is the bit index for i=0,1,...,2N-1, and W(Q 2N i ) is the bit index Q 2N i reliability, and Among them, in the first bit sequence v 2N Among the first N bit indices, the last m bit indices include predetermined bit values, and among the remaining (2N-m) bit indices, K bit indices include K bit values ​​of the information block, where m is the number of shift registers used for the convolution precoding.

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