Method and system for predicting electromagnetic radiation intensity of integrated isolation chip

Abstract

The invention relates to the technical field of electromagnetic compatibility test and evaluation, in particular to an electromagnetic radiation intensity prediction method and system of an integrated isolation chip. The method comprises the steps that a first electromagnetic field model of a transformer is converted into an equivalent circuit model, and simulation parasitic electrical parameters are acquired; comparing the measured parasitic electrical parameters with the simulated parasitic electrical parameters to adjust the equivalent circuit model; the common-mode current of the adjusted equivalent circuit model serves as an excitation signal to be input into a second electromagnetic field model of the PCB evaluation board, an electromagnetic radiation intensity simulation result of the integrated isolation chip is obtained, and the common-mode current is determined as a main radiation source of the integrated isolation chip; and the electromagnetic radiation intensity simulation result and the electromagnetic radiation intensity measurement result are compared to adjust the second electromagnetic field model, and an electromagnetic radiation intensity prediction model of the integrated isolation chip is obtained. The radiation intensity of the isolation chip can be accurately predicted, the necessity of multiple rounds of proofing and testing is reduced, and the reliability and stability during chip design are improved.

Description

Technical Field

[0001] The present disclosure relates to the technical field of electromagnetic compatibility testing and evaluation, and in particular to a method and system for predicting electromagnetic radiation intensity of an integrated isolation chip. Background Art

[0002] As the trend of miniaturization and integration of electronic devices continues to accelerate, the application of integrated isolation chips in power management, signal processing, data transmission and other fields has become more and more extensive. However, the development trend of miniaturization and integration of integrated isolation chips has also brought higher challenges to electromagnetic compatibility design. Specifically, miniaturization and integration make the circuit layout more compact, the spacing between components is reduced, and the wiring is more complicated, thereby introducing more parasitic parameters and coupling paths. These factors have caused the problem of electromagnetic interference (EMI) to become more prominent. In addition, the trend of high frequency has caused the operating frequency of power switching devices to continue to increase, and the voltage change speed has accelerated, thereby generating higher frequency electromagnetic noise, which has increased the electromagnetic interference noise of the system.

[0003] The current electromagnetic compatibility design of integrated isolation chips mainly relies on empirical proofing and testing methods, and optimizes the design through multiple rounds of tests and adjustments. This method has obvious disadvantages, including long time consumption, high cost, and uncertain results. Due to the long cycle of each proofing and testing, the overall R&D time is greatly delayed, increasing the time to market for the product. At the same time, frequent sample production and testing involve high manufacturing and experimental costs, especially in the development of high-frequency transformers, the investment in materials and human resources has increased significantly. In addition, the existing methods rely heavily on the experience of designers for adjustments, and cannot achieve accurate radiation prediction in the design stage. Summary of the invention

[0004] In order to solve the problems in the related art, the embodiments of the present disclosure provide a method and system for predicting the electromagnetic radiation intensity of an integrated isolation chip.

[0005] In a first aspect, an embodiment of the present disclosure provides a method for predicting electromagnetic radiation intensity of an integrated isolation chip, wherein the integrated isolation chip includes a transformer, and the method includes:

[0006] Establishing a first electromagnetic field model of the transformer;

[0007] converting the first electromagnetic field model into an equivalent circuit model;

[0008] Acquiring simulated parasitic electrical parameters of the transformer according to the equivalent circuit model;

[0009] Acquire measured parasitic electrical parameters of the transformer, compare the measured parasitic electrical parameters with the simulated parasitic electrical parameters to obtain a first comparison result, adjust the equivalent circuit model based on an adjustment scheme determined according to the first comparison result and a preset simulation error threshold, and obtain an adjusted equivalent circuit model;

[0010] Establishing a second electromagnetic field model of the integrated isolation chip PCB evaluation board, inputting the common-mode current generated by the parasitic capacitance coupling between the primary coil and the secondary coil of the transformer in the adjusted equivalent circuit model as an excitation signal into the second electromagnetic field model, and setting a plurality of detection points in the second electromagnetic field model to obtain a simulation result of the electromagnetic radiation intensity of the integrated isolation chip, wherein the common-mode current is determined to be the main radiation source of the integrated isolation chip;

[0011] Obtain a measurement result of the electromagnetic radiation intensity of the integrated isolation chip, compare the electromagnetic radiation intensity simulation result with the electromagnetic radiation intensity measurement result to obtain a second comparison result, adjust the second electromagnetic field model based on an adjustment scheme determined according to the second comparison result and a preset simulation error threshold, and use the adjusted second electromagnetic field model as a prediction model for the electromagnetic radiation intensity of the integrated isolation chip.

[0012] According to an embodiment of the present disclosure, the establishing the first electromagnetic field model of the transformer includes: acquiring size parameters and material parameters of the transformer, and establishing the first electromagnetic field model of the transformer according to the size parameters and material parameters of the transformer;

[0013] The second electromagnetic field model of the integrated isolation chip PCB evaluation board is established, including: obtaining the size parameters of the peripheral circuit of the integrated isolation chip and the material parameters of the transformer, and establishing the second electromagnetic field model of the integrated isolation chip PCB evaluation board according to the size parameters of the peripheral circuit of the integrated isolation chip and the material parameters of the transformer.

[0014] According to an embodiment of the present disclosure, the simulated parasitic electrical parameters include any one or more of the following: simulated parasitic inductance, simulated parasitic resistance, simulated parasitic capacitance;

[0015] The measuring of parasitic electrical parameters includes any one or more of the following: measuring parasitic inductance, measuring parasitic resistance, and measuring parasitic capacitance.

[0016] According to an embodiment of the present disclosure, the measured parasitic electrical parameters are obtained by measuring the transformer using a test circuit board group; wherein the test circuit board group includes: a short circuit test board, an open circuit test board, a load test board and a through test board;

[0017] The short-circuit test board is used to perform a short-circuit test on the transformer;

[0018] The open circuit test board is used to perform an open circuit test on the transformer;

[0019] The load test board is used to perform a load test on the transformer;

[0020] The through-test board is used to perform a through-test on the transformer.

[0021] According to an embodiment of the present disclosure, the electromagnetic radiation intensity measurement result is obtained using an electromagnetic interference test platform set up in a darkroom;

[0022] The electromagnetic interference test platform includes: a signal generator, a test cable, a receiving antenna and an electromagnetic interference receiver; the signal generator is connected to the integrated isolation chip PCB evaluation board through the test cable, the electromagnetic interference receiver is connected to the receiving antenna through the test cable, and there is a set distance between the receiving antenna and the integrated isolation chip PCB evaluation board;

[0023] Wherein, the signal generator transmits the excitation signal, and the integrated isolation chip PCB evaluation board generates electromagnetic radiation under the action of the excitation signal;

[0024] The electromagnetic interference receiver obtains the radiation value of the integrated isolation chip PCB evaluation board through the receiving antenna, and obtains the electromagnetic radiation intensity measurement result of the integrated isolation chip according to the radiation value of the integrated isolation chip PCB evaluation board, the loss value of the test cable and the array factor of the receiving antenna.

[0025] According to an embodiment of the present disclosure, obtaining the electromagnetic radiation intensity measurement result of the integrated isolation chip according to the radiation value of the integrated isolation chip PCB evaluation board, the loss value of the test cable, and the array factor of the receiving antenna includes obtaining the electromagnetic radiation intensity measurement result according to the following formula:

[0026] Emeas=Eread+L+AF;

[0027] Among them, Emeas is the measurement result of the electromagnetic radiation intensity, Eread is the radiation value of the integrated isolation chip PCB evaluation board, L is the loss value of the test cable, and AF is the array factor of the receiving antenna.

[0028] According to an embodiment of the present disclosure, the electromagnetic interference test platform further includes: a rotating storage table; the rotating storage table is used to place the integrated isolation chip PCB evaluation board.

[0029] According to an embodiment of the present disclosure, the step of inputting the common mode current generated by the parasitic capacitance coupling between the primary coil and the secondary coil of the transformer in the adjusted equivalent circuit model as an excitation signal into the second electromagnetic field model includes:

[0030] Extracting the common-mode current curve of the adjusted equivalent circuit model, fitting the common-mode current curve using a fitting function, and obtaining a common-mode current expression;

[0031] The common mode current expression is input as an excitation signal into the power supply terminal of the second electromagnetic field model to feed the second electromagnetic field model.

[0032] According to an embodiment of the present disclosure, the fitting function is a multi-segment sine function.

[0033] According to an embodiment of the present disclosure, the equivalent circuit model includes: the resistance R of the primary coil ac1 , the resistance R of the secondary coil ac2 , the leakage inductance L of the primary coil l1 , the leakage inductance L of the secondary coil l2 , the equivalent loss resistance R of the magnetic core of the transformer c , the excitation inductance L of the primary coil MAG , the parasitic capacitance C of the primary coil 1 , the parasitic capacitance C of the secondary coil 2 , the parasitic capacitance C between the primary coil and the secondary coil 12 ;

[0034] Among them, the leakage inductance L l1 Connect one end of the resistor R ac1 One end of the resistor R ac1 The other end of the resistor R ac2 One end of the secondary coil is connected to one end of the resistor R ac2 The other end of the leakage inductance L l2 One end of the equivalent loss resistor R c With the excitation inductance L MAG After being connected in series, the two ends of the primary coil are connected in parallel. The parasitic capacitance C 1 Connected in parallel at both ends of the primary coil, the parasitic capacitor C 12 One end of the leakage inductance L l1 The other end is connected to the parasitic capacitor C 12 The other end of the leakage inductance L l2 The other end is connected to the parasitic capacitor C 2 The two ends of the secondary coil are connected in parallel.

[0035] In a second aspect, an electromagnetic radiation intensity prediction system of an integrated isolation chip is provided in an embodiment of the present disclosure, including electromagnetic field simulation software, a test circuit board group, and an electromagnetic interference test platform set in a darkroom;

[0036] The test circuit board group is configured to measure parasitic electrical parameters of the transformer;

[0037] The electromagnetic interference test platform is configured to obtain the electromagnetic radiation intensity measurement result of the integrated isolation chip;

[0038] The electromagnetic field simulation software is configured to establish a first electromagnetic field model of the transformer;

[0039] converting the first electromagnetic field model into an equivalent circuit model;

[0040] Acquiring simulated parasitic electrical parameters of the transformer according to the equivalent circuit model;

[0041] Acquiring the measured parasitic electrical parameters, comparing the measured parasitic electrical parameters with the simulated parasitic electrical parameters to obtain a first comparison result, adjusting the equivalent circuit model based on an adjustment scheme determined according to the first comparison result and a preset simulation error threshold, and obtaining an adjusted equivalent circuit model;

[0042] Establishing a second electromagnetic field model of the integrated isolation chip PCB evaluation board, inputting the common-mode current generated by the parasitic capacitance coupling between the primary coil and the secondary coil of the transformer in the adjusted equivalent circuit model as an excitation signal into the second electromagnetic field model, and setting a plurality of detection points in the second electromagnetic field model to obtain a simulation result of the electromagnetic radiation intensity of the integrated isolation chip, wherein the common-mode current is determined to be the main radiation source of the integrated isolation chip;

[0043] Acquire the electromagnetic radiation intensity measurement result, compare the electromagnetic radiation intensity simulation result and the electromagnetic radiation intensity measurement result to obtain a second comparison result, adjust the second electromagnetic field model based on an adjustment scheme determined according to the second comparison result and a preset simulation error threshold, and use the adjusted second electromagnetic field model as the electromagnetic radiation intensity prediction model of the integrated isolation chip.

[0044] According to an embodiment of the present disclosure, the test circuit board group includes: a short circuit test board, an open circuit test board, a load test board and a through test board;

[0045] The short-circuit test board is used to perform a short-circuit test on the transformer;

[0046] The open circuit test board is used to perform an open circuit test on the transformer;

[0047] The load test board is used to perform a load test on the transformer;

[0048] The through-test board is used to perform a through-test on the transformer.

[0049] According to an embodiment of the present disclosure, the electromagnetic interference test platform includes: a signal generator, a test cable, a receiving antenna, an electromagnetic interference receiver, and a rotating storage table;

[0050] The integrated isolation chip is placed on the rotating storage table, the signal generator is connected to the integrated isolation chip PCB evaluation board through the test cable, the electromagnetic interference receiver is connected to the receiving antenna through the test cable, and there is a set distance between the receiving antenna and the integrated isolation chip;

[0051] Wherein, the signal generator transmits the excitation signal, and the integrated isolation chip PCB evaluation board generates electromagnetic radiation under the action of the excitation signal;

[0052] The electromagnetic interference receiver obtains the radiation value of the integrated isolation chip PCB evaluation board through the receiving antenna, and obtains the electromagnetic radiation intensity measurement result of the integrated isolation chip according to the radiation value of the integrated isolation chip PCB evaluation board, the loss value of the test cable and the array factor of the receiving antenna.

[0053] In a third aspect, an embodiment of the present disclosure provides an electronic device, comprising a memory and a processor, wherein the memory is used to store computer instructions, and wherein the computer instructions are executed by the processor to implement a method as described in any one of the first aspects.

[0054] In a fourth aspect, an embodiment of the present disclosure provides a computer-readable storage medium on which computer instructions are stored. When the computer instructions are executed by a processor, the method described in any one of the first aspects is implemented.

[0055] In a fifth aspect, a computer program product is provided in an embodiment of the present disclosure, comprising computer instructions, which, when executed by a processor, implement the method as described in any one of the first aspects.

[0056] According to the technical solution provided by the embodiment of the present disclosure, the first electromagnetic field model of the transformer of the established integrated isolation chip is converted into an equivalent circuit model to obtain the simulated parasitic electrical parameters of the transformer; the measured parasitic electrical parameters and the simulated parasitic electrical parameters are compared to adjust the equivalent circuit model; the common-mode current of the adjusted equivalent circuit model is input as an excitation signal into the second electromagnetic field model of the integrated isolation chip PCB evaluation board to obtain the electromagnetic radiation intensity simulation result of the integrated isolation chip, wherein the common-mode current is determined to be the main radiation source of the integrated isolation chip; the second electromagnetic field model is adjusted by comparing the electromagnetic radiation intensity simulation result and the electromagnetic radiation intensity measurement result to obtain the electromagnetic radiation intensity prediction model of the integrated isolation chip.

[0057] The present disclosure establishes an electromagnetic radiation model of an integrated isolation chip PCB evaluation board, and combines simulation technology to simulate the common-mode current of its transformer and input it into the electromagnetic radiation model of the PCB evaluation board as an excitation signal, thereby simplifying the simulation and modeling requirements of the chip, that is, there is no need to model the complex circuits inside the integrated isolation chip, and accurately estimate the radiation intensity of the integrated isolation chip, thereby optimizing the design of the integrated isolation chip, that is, the electromagnetic radiation intensity of the integrated isolation chip can be accurately predicted in the design stage to evaluate whether the designed chip can meet the electromagnetic compatibility standard, thereby providing scientific design guidance and optimization solutions to reduce electromagnetic interference and improve the reliability of electronic systems. The present disclosure reduces the necessity of multiple rounds of proofing and testing, shortens R&D time, reduces R&D costs, reduces dependence on design experience, improves the reliability and stability of the design, and provides an innovative solution for efficient and reliable integrated isolation chip design.

[0058] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] Other features, objectives and advantages of the present disclosure will become more apparent through the following detailed description of non-limiting embodiments in conjunction with the accompanying drawings. In the accompanying drawings:

[0060] Figure 1 A flow chart showing a method for predicting electromagnetic radiation intensity of an integrated isolation chip according to an embodiment of the present disclosure;

[0061] Figure 2 An X-ray scan of a transformer in an integrated isolation chip according to an embodiment of the present disclosure is shown;

[0062] Figure 3 A schematic diagram showing a circuit structure of an equivalent circuit model of a transformer according to an embodiment of the present disclosure is shown;

[0063] Figure 4A schematic diagram showing a transmission path of a common-mode current of a transformer in an integrated isolation chip PCB evaluation board according to an embodiment of the present disclosure;

[0064] Figure 5 A schematic diagram showing an electromagnetic interference test platform according to an embodiment of the present disclosure;

[0065] Figure 6 A schematic diagram showing the structure of an electromagnetic radiation intensity prediction system integrating an isolation chip according to an embodiment of the present disclosure is shown;

[0066] Figure 7 A structural block diagram of an electronic device according to an embodiment of the present disclosure is shown;

[0067] Figure 8 A schematic diagram showing the structure of a computer system suitable for implementing the method according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0068] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement them. In addition, for the sake of clarity, parts not related to the description of the exemplary embodiments are omitted in the accompanying drawings.

[0069] In the present disclosure, it should be understood that terms such as "include" or "have" are intended to indicate the presence of features, numbers, steps, behaviors, components, parts, or a combination thereof disclosed in the present specification, and are not intended to exclude the possibility that one or more other features, numbers, steps, behaviors, components, parts, or a combination thereof exist or are added.

[0070] It should also be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present disclosure may be combined with each other. The present disclosure will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0071] In the present disclosure, if it involves operations of obtaining user information or user data or displaying user information or user data to others, the operations are all authorized and confirmed by the user, or actively selected by the user.

[0072] As mentioned above, the current electromagnetic compatibility design of integrated isolation chips mainly relies on empirical proofing test methods. This method usually requires multiple rounds of testing and adjustment to optimize the design. However, due to the relatively complex circuit structure inside the integrated isolation chip, this undoubtedly brings many adverse effects such as high cost, uncertain results, heavy reliance on the experience of designers for adjustment, and inability to achieve accurate radiation prediction during the design stage. In addition, empirical adjustment schemes may not achieve the best electromagnetic interference suppression effect.

[0073] The inventors found that in existing integrated isolation chips, transformers have a significant common-mode interference problem due to their compact structure but are prone to cause high-frequency common-mode current, making the transformer the main source of electromagnetic radiation in the integrated isolation chip. This not only limits the power density and efficiency of the circuit in the chip, but also causes potential interference to surrounding electronic equipment, affecting the reliability of the entire electronic system.

[0074] The present disclosure provides a method for predicting the electromagnetic radiation intensity of an integrated isolation chip, wherein the integrated isolation chip includes a transformer, and the method includes: establishing a first electromagnetic field model of the transformer; converting the first electromagnetic field model into an equivalent circuit model; obtaining simulated parasitic electrical parameters of the transformer according to the equivalent circuit model; obtaining measured parasitic electrical parameters of the transformer, comparing the measured parasitic electrical parameters with the simulated parasitic electrical parameters to obtain a first comparison result, adjusting the equivalent circuit model based on an adjustment scheme determined according to the first comparison result and a preset simulation error threshold, and obtaining an adjusted equivalent circuit model; establishing a second electromagnetic field model of a PCB evaluation board of the integrated isolation chip, and converting the measured parasitic electrical parameters of the transformer into an equivalent circuit model; obtaining ... The common-mode current generated by the parasitic capacitance coupling between the primary coil and the secondary coil of the transformer is input into the second electromagnetic field model as an excitation signal, and a plurality of detection points are set in the second electromagnetic field model to obtain a simulation result of the electromagnetic radiation intensity of the integrated isolation chip, wherein the common-mode current is determined to be the main radiation source of the integrated isolation chip; the electromagnetic radiation intensity measurement result of the integrated isolation chip is obtained, and the electromagnetic radiation intensity simulation result and the electromagnetic radiation intensity measurement result are compared to obtain a second comparison result, and the second electromagnetic field model is adjusted based on an adjustment scheme determined according to the second comparison result and a preset simulation error threshold, and the adjusted second electromagnetic field model is used as the electromagnetic radiation intensity prediction model of the integrated isolation chip.

[0075] The present invention conducts electromagnetic interference modeling and simulation design for the common-mode current induced by the transformer in the integrated isolation chip, and inputs it into the electromagnetic field model of the integrated isolation chip PCB evaluation board as an excitation signal. The electromagnetic radiation intensity of the integrated isolation chip can be accurately predicted in the design stage without establishing a complex electromagnetic field model based on the complex circuit structure in the integrated isolation chip. This provides guidance for the optimization design of subsequent circuits or systems, thereby effectively reducing R&D time and cost and improving product design efficiency and electromagnetic compatibility performance.

[0076] Figure 1 FIG. 1 is a flow chart showing a method for predicting electromagnetic radiation intensity of an integrated isolation chip according to an embodiment of the present disclosure. Figure 1 As shown, the electromagnetic radiation intensity prediction method includes the following steps S101 to S106:

[0077] In the present disclosure, the integrated isolation chip includes a transformer, and the transformer may be a planar transformer, a high-frequency transformer, an on-chip isolation transformer, and the like.

[0078] In step S101, a first electromagnetic field model of the transformer is established.

[0079] According to an embodiment of the present disclosure, size parameters and material parameters of the transformer are acquired, and a first electromagnetic field model of the transformer is established according to the size parameters and material parameters of the transformer.

[0080] The size parameters of the transformer may include: the inner diameter, outer diameter, thickness, and number of turns of the primary coil and the secondary coil of the transformer; the material parameters may include: the electrical conductivity, magnetic permeability, and dielectric constant of the wire.

[0081] Figure 2 An X-ray scan of a transformer in an integrated isolation chip according to an embodiment of the present disclosure is shown.

[0082] In a specific embodiment, for example, the transformer in the integrated isolation chip may be monitored by using a non-destructive testing method such as an X-ray detector to obtain an X-ray scan image of the transformer.

[0083] like Figure 2 As shown, the transformer includes 4 layers of PCB boards, a metal trace is designed on the first layer of PCB board, i.e., a conductor of the transformer is formed, a primary winding is designed on the second layer of PCB board, and the primary winding includes two left and right auxiliary windings, a secondary winding is designed on the third layer of PCB board, and the secondary winding also includes two left and right auxiliary windings, and the magnetic core of the transformer (not shown in the figure) is sandwiched between the second layer of PCB board and the third layer of PCB board; the transformer structure also includes some bonding wires for realizing connection with other electrical components outside the transformer.

[0084] In step S102, the first electromagnetic field model is converted into an equivalent circuit model.

[0085] In step S103, simulated parasitic electrical parameters of the transformer are obtained according to the equivalent circuit model.

[0086] The simulated parasitic electrical parameters include any one or more of the following: simulated parasitic inductance, simulated parasitic resistance, and simulated parasitic capacitance.

[0087] The inventors established an electromagnetic field model to more accurately simulate the electromagnetic field distribution inside the transformer. This is because the simulation model can comprehensively consider various complex factors, such as the layout of the windings, the dielectric constant of the insulating material, etc., so as to more accurately extract the parasitic electrical parameters.

[0088] Figure 3A circuit structure schematic diagram of an equivalent circuit model of a transformer according to an embodiment of the present disclosure is shown.

[0089] like Figure 3 As shown, the equivalent circuit model includes: the resistance R of the primary coil ac1 , the resistance R of the secondary coil ac2 , the leakage inductance L of the primary coil l1 , the leakage inductance L of the secondary coil l2 , the equivalent loss resistance R of the magnetic core of the transformer c , the excitation inductance L of the primary coil MAG , the parasitic capacitance C of the primary coil 1 , the parasitic capacitance C of the secondary coil 2 , the parasitic capacitance C between the primary coil and the secondary coil 12 .

[0090] The leakage inductance L l1 Connect one end of the resistor R ac1 One end of the resistor R ac1 The other end of the resistor R ac2 One end of the secondary coil is connected to one end of the resistor R ac2 The other end of the leakage inductance L l2 One end of the equivalent loss resistor R c With the excitation inductance L MAG After being connected in series, the two ends of the primary coil are connected in parallel. The parasitic capacitance C 1 Connected in parallel at both ends of the primary coil, the parasitic capacitor C 12 One end of the leakage inductance L l1 The other end is connected to the parasitic capacitor C 12 The other end of the leakage inductance L l2 The other end is connected to the parasitic capacitor C 2 The two ends of the secondary coil are connected in parallel.

[0091] Among them, the resistor R ac1 and resistor R ac2 , which affects the power loss and efficiency of the transformer; leakage inductance L l1 and leakage inductance L l2 , is caused by the imperfect coupling between the transformer coils, which affects the high-frequency performance of the transformer; the equivalent loss resistance R c , is a parameter that needs to be focused on in high-frequency circuit design; parasitic capacitance C 12 It provides a coupling path for common-mode current and is a key parameter in electromagnetic interference analysis.

[0092] Parasitic capacitance C1 , parasitic capacitance C 2 , parasitic capacitance C 12 Together they form the simulated parasitic capacitance and resistance R of the equivalent circuit model. ac1 , resistor R ac2 , equivalent loss resistance R c Together they constitute the simulated parasitic resistance of the equivalent circuit model, the leakage inductance L l1 , leakage inductance L l2 , Excitation inductance L MAG Together they form the simulated parasitic inductance of the equivalent circuit model.

[0093] In step S104, the measured parasitic electrical parameters of the transformer are obtained, and the measured parasitic electrical parameters are compared with the simulated parasitic electrical parameters to obtain a first comparison result. The equivalent circuit model is adjusted based on an adjustment scheme determined according to the first comparison result and a preset simulation error threshold to obtain an adjusted equivalent circuit model.

[0094] The parasitic electrical parameter measurement includes any one or more of the following: parasitic inductance measurement, parasitic resistance measurement, and parasitic capacitance measurement. The parasitic electrical parameter measurement is obtained by measuring the transformer using a test circuit board set.

[0095] Specifically, the test circuit board group includes: a short circuit test board, an open circuit test board, a load test board and a through test board; wherein the short circuit test board is used to perform a short circuit test on the transformer; the open circuit test board is used to perform an open circuit test on the transformer; the load test board is used to perform a load test on the transformer; and the through test board is used to perform a through test on the transformer.

[0096] The present invention utilizes a test circuit board group and uses a SOLT (Short-Open-Load-Through) de-embedding method to eliminate the influence of the wiring on the circuit board and the test cables, so as to accurately measure the parasitic electrical parameters on the transformer.

[0097] In the above measurement process, multiple measurements can be performed and an average value can be taken to ensure the accuracy of the measurement data finally obtained.

[0098] When adjusting the equivalent circuit model based on the adjustment scheme determined according to the first comparison result and the preset simulation error threshold (generally set to 30%), when the first comparison result exceeds the predicted simulation error threshold, the equivalent circuit model needs to be adjusted. For example, when the material parameters or size parameters are not very accurate during modeling, the material parameters or size parameters need to be readjusted, or some avoidable errors occur in the conversion method used when converting the first electromagnetic field model to the equivalent circuit model, so that the preset simulation error threshold is reduced as much as possible, so that the final adjusted equivalent circuit model can reflect the performance under actual working conditions as accurately as possible.

[0099] In step S105, a second electromagnetic field model of the integrated isolation chip PCB evaluation board is established, and the common-mode current generated by the parasitic capacitance coupling between the primary coil and the secondary coil of the transformer in the adjusted equivalent circuit model is input into the second electromagnetic field model as an excitation signal, and a plurality of detection points are set in the second electromagnetic field model to obtain a simulation result of the electromagnetic radiation intensity of the integrated isolation chip, wherein the common-mode current is determined to be the main radiation source of the integrated isolation chip.

[0100] The inventors noticed that there are other structures inside the integrated isolation chip, such as packaging, wiring, etc. The radiation intensity generated by these structures is very small compared to the radiation intensity generated by the common-mode current of the transformer. Therefore, based on the common-mode current of the transformer, the radiation source inside the chip is reasonably simplified and equivalent, without having to build the model of the complex circuit structure inside the chip, and then set the corresponding transmission port according to the signal type to be transmitted to input the excitation signal, etc., and a series of complex operations, thereby avoiding the high complexity of modeling and simulation caused by directly simulating the integrated isolation chip.

[0101] Specific as Figure 4 As shown, Figure 4 A schematic diagram showing a transmission path of a common-mode current of a transformer in an integrated isolation chip PCB evaluation board according to an embodiment of the present disclosure.

[0102] exist Figure 4 In the figure, PCB1 and PCB2 represent two PCBs for connecting the integrated isolation chip, and Chip1 and Chip2 represent circuits for converting the power on the PCB into transformer input signals. The parasitic capacitance between the primary and secondary coils of the transformer provides a coupling interference path for common-mode interference, so that the induced common-mode current has no return path and becomes the main radiation source.

[0103] According to an embodiment of the present disclosure, the size parameters and material parameters of the peripheral circuit of the integrated isolation chip are obtained, and the second electromagnetic field model of the integrated isolation chip PCB evaluation board is established according to the size parameters and material parameters of the peripheral circuit of the integrated isolation chip.

[0104] The peripheral circuit of the integrated isolation chip is an external circuit connected to the integrated isolation chip, such as a power supply circuit, a grounding circuit, and the like.

[0105] In detail, the common-mode current curve of the adjusted equivalent circuit model is extracted, and the common-mode current curve is fitted using a fitting function to obtain a common-mode current expression; the common-mode current expression is input as an excitation signal into the power supply end of the second electromagnetic field model to feed the second electromagnetic field model.

[0106] According to an embodiment of the present disclosure, the common-mode current curve is fitted by a fitting function to obtain a function that can optimally describe and predict the common-mode current behavior, namely, the common-mode current expression; the fitting function may be a multi-segment sine function.

[0107] In step S106, the electromagnetic radiation intensity measurement result of the integrated isolation chip is obtained, and the electromagnetic radiation intensity simulation result and the electromagnetic radiation intensity measurement result are compared to obtain a second comparison result, and the second electromagnetic field model is adjusted based on an adjustment scheme determined according to the second comparison result and a preset simulation error threshold, and the adjusted second electromagnetic field model is used as the electromagnetic radiation intensity prediction model of the integrated isolation chip.

[0108] In the present disclosure, the electromagnetic radiation intensity measurement results are obtained using an electromagnetic interference test platform set up in a darkroom. The darkroom is an electromagnetic compatibility darkroom, also known as a semi-anechoic chamber, or EMC darkroom for short. It is based on an electromagnetic shielding room, with electromagnetic wave absorbing materials mounted on the four inner walls and the ceiling, and the ground is an ideal reflective surface, thereby simulating the test conditions of an open field.

[0109] Figure 5 A schematic diagram of an electromagnetic interference testing platform according to an embodiment of the present disclosure is shown.

[0110] like Figure 5 As shown, the electromagnetic interference test platform includes: a signal generator, a test cable, a receiving antenna and an electromagnetic interference receiver; the signal generator is connected to the integrated isolation chip PCB evaluation board through the test cable, the electromagnetic interference receiver is connected to the receiving antenna through the test cable, and there is a set distance between the receiving antenna and the integrated isolation chip.

[0111] The signal generator transmits the excitation signal, and the integrated isolation chip PCB evaluation board generates electromagnetic radiation under the action of the excitation signal; the electromagnetic interference receiver obtains the radiation value of the integrated isolation chip PCB evaluation board through the receiving antenna, and obtains the electromagnetic radiation intensity measurement result of the integrated isolation chip according to the radiation value of the integrated isolation chip PCB evaluation board, the loss value of the test cable and the array factor of the receiving antenna.

[0112] Furthermore, the electromagnetic radiation intensity measurement result is obtained according to the following formula:

[0113] Emeas=Eread+L+AF;

[0114] Among them, Emeas is the measurement result of the electromagnetic radiation intensity, Eread is the radiation value of the integrated isolation chip PCB evaluation board, L is the loss value of the test cable, and AF is the array factor of the receiving antenna.

[0115] According to an embodiment of the present disclosure, the electromagnetic interference test platform further includes: a rotating storage table; the rotating storage table is used to place the integrated isolation chip PCB evaluation board.

[0116] The present invention establishes an electromagnetic radiation model of an integrated isolation chip PCB evaluation board, and combines simulation technology to simulate the common-mode current of its transformer and input it into the electromagnetic radiation model as an excitation signal, thereby simplifying the simulation and modeling requirements of the chip. There is no need to model the complex circuits inside the integrated isolation chip. The electromagnetic radiation intensity of the integrated isolation chip can be accurately predicted in the design stage to evaluate whether the designed chip can meet the electromagnetic compatibility standard, thereby providing scientific design guidance and optimization solutions.

[0117] Figure 6 An electromagnetic radiation intensity prediction system integrating an isolation chip according to an embodiment of the present disclosure is shown.

[0118] like Figure 6 As shown, the electromagnetic radiation intensity prediction system 600 includes electromagnetic field simulation software 610, a test circuit board group 620 and an electromagnetic interference test platform 630 set in a darkroom.

[0119] The test circuit board group 620 is configured to measure parasitic electrical parameters of the transformer;

[0120] The electromagnetic interference test platform 630 is configured to obtain the electromagnetic radiation intensity measurement result of the integrated isolation chip;

[0121] The electromagnetic field simulation software 610 is configured to establish a first electromagnetic field model of the transformer;

[0122] converting the first electromagnetic field model into an equivalent circuit model;

[0123] Acquiring simulated parasitic electrical parameters of the transformer according to the equivalent circuit model;

[0124] Acquiring the measured parasitic electrical parameters, comparing the measured parasitic electrical parameters with the simulated parasitic electrical parameters to obtain a first comparison result, adjusting the equivalent circuit model based on an adjustment scheme determined according to the first comparison result and a preset simulation error threshold, and obtaining an adjusted equivalent circuit model;

[0125] Establishing a second electromagnetic field model of the integrated isolation chip PCB evaluation board, inputting the common-mode current generated by the parasitic capacitance coupling between the primary coil and the secondary coil of the transformer in the adjusted equivalent circuit model as an excitation signal into the second electromagnetic field model, and setting a plurality of detection points in the second electromagnetic field model to obtain a simulation result of the electromagnetic radiation intensity of the integrated isolation chip, wherein the common-mode current is determined to be the main radiation source of the integrated isolation chip;

[0126] Acquire the electromagnetic radiation intensity measurement result, compare the electromagnetic radiation intensity simulation result and the electromagnetic radiation intensity measurement result to obtain a second comparison result, adjust the second electromagnetic field model based on an adjustment scheme determined according to the second comparison result and a preset simulation error threshold, and use the adjusted second electromagnetic field model as the electromagnetic radiation intensity prediction model of the integrated isolation chip.

[0127] According to an embodiment of the present disclosure, the test circuit board group 620 includes: a short circuit test board, an open circuit test board, a load test board and a through test board; the short circuit test board is used to perform a short circuit test on the transformer; the open circuit test board is used to perform an open circuit test on the transformer; the load test board is used to perform a load test on the transformer; and the through test board is used to perform a through test on the transformer.

[0128] According to an embodiment of the present disclosure, the electromagnetic interference test platform 630 includes: a signal generator, a test cable, a receiving antenna, an electromagnetic interference receiver, and a rotating storage table;

[0129] The integrated isolation chip PCB evaluation board is placed on the rotating storage table, the signal generator is connected to the integrated isolation chip PCB evaluation board through the test cable, the electromagnetic interference receiver is connected to the receiving antenna through the test cable, and there is a set distance between the receiving antenna and the integrated isolation chip PCB evaluation board;

[0130] Wherein, the signal generator transmits the excitation signal, and the integrated isolation chip PCB evaluation board generates electromagnetic radiation under the action of the excitation signal;

[0131] The electromagnetic interference receiver obtains the radiation value of the integrated isolation chip PCB evaluation board through the receiving antenna, and obtains the electromagnetic radiation intensity measurement result of the integrated isolation chip according to the radiation value of the integrated isolation chip PCB evaluation board, the loss value of the test cable and the array factor of the receiving antenna.

[0132] The present disclosure also discloses an electronic device, Figure 7 A structural block diagram of an electronic device according to an embodiment of the present disclosure is shown.

[0133] like Figure 7 As shown, the electronic device includes a memory and a processor, wherein the memory is used to store one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement the method according to an embodiment of the present disclosure.

[0134] Figure 8 A schematic diagram showing the structure of a computer system suitable for implementing the method according to an embodiment of the present disclosure is shown.

[0135] like Figure 8 As shown, the computer system includes a processing unit, which can perform the various methods in the above-mentioned embodiments according to the program stored in the read-only memory (ROM) or the program loaded from the storage part into the random access memory (RAM). In the RAM, various programs and data required for the operation of the computer system are also stored. The processing unit, ROM and RAM are connected to each other through a bus. The input / output (I / O) interface is also connected to the bus.

[0136] The following components are connected to the I / O interface: an input part including a keyboard, a mouse, etc.; an output part including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker; a storage part including a hard disk, etc.; and a communication part including a network interface card such as a LAN card, a modem, etc. The communication part performs a communication process via a network such as the Internet. The drive is also connected to the I / O interface as needed. Removable media, such as disks, optical disks, magneto-optical disks, semiconductor memories, etc., are installed on the drive as needed so that the computer program read therefrom is installed into the storage part as needed. Among them, the processing unit can be implemented as a processing unit such as a CPU, a GPU, a TPU, an FPGA, an NPU, etc.

[0137] In particular, according to an embodiment of the present disclosure, the method described above can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program tangibly contained on a machine-readable medium, and the computer program includes a program code for executing the above method. In such an embodiment, the computer program can be downloaded and installed from a network through a communication part, and / or installed from a removable medium.

[0138] The flowcharts and block diagrams in the accompanying drawings illustrate the possible architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the module, a program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0139] The units or modules involved in the embodiments described in the present disclosure may be implemented by software or programmable hardware. The units or modules described may also be set in a processor, and the names of these units or modules do not constitute limitations on the units or modules themselves in some cases.

[0140] As another aspect, the present disclosure further provides a computer-readable storage medium, which may be a computer-readable storage medium included in the electronic device or computer system in the above embodiment; or a computer-readable storage medium that exists independently and is not assembled into a device. The computer-readable storage medium stores one or more programs, and the programs are used by one or more processors to execute the method described in the present disclosure.

[0141] The above description is only a preferred embodiment of the present disclosure and an explanation of the technical principles used. Those skilled in the art should understand that the scope of the invention involved in the present disclosure is not limited to the technical solution formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the inventive concept. For example, the above features are replaced with the technical features with similar functions disclosed in the present disclosure (but not limited to) by each other.

Claims

1. A method for predicting electromagnetic radiation intensity of an integrated isolation chip, characterized in that: The integrated isolation chip includes a transformer, and the method includes: Establishing a first electromagnetic field model of the transformer; converting the first electromagnetic field model into an equivalent circuit model; Acquiring simulated parasitic electrical parameters of the transformer according to the equivalent circuit model; Acquire measured parasitic electrical parameters of the transformer, compare the measured parasitic electrical parameters with the simulated parasitic electrical parameters to obtain a first comparison result, adjust the equivalent circuit model based on an adjustment scheme determined according to the first comparison result and a preset simulation error threshold, and obtain an adjusted equivalent circuit model; Establishing a second electromagnetic field model of the integrated isolation chip PCB evaluation board, inputting the common-mode current generated by the parasitic capacitance coupling between the primary coil and the secondary coil of the transformer in the adjusted equivalent circuit model as an excitation signal into the second electromagnetic field model, and setting a plurality of detection points in the second electromagnetic field model to obtain a simulation result of the electromagnetic radiation intensity of the integrated isolation chip, wherein the common-mode current is determined to be the main radiation source of the integrated isolation chip; Obtain a measurement result of the electromagnetic radiation intensity of the integrated isolation chip, compare the electromagnetic radiation intensity simulation result with the electromagnetic radiation intensity measurement result to obtain a second comparison result, adjust the second electromagnetic field model based on an adjustment scheme determined according to the second comparison result and a preset simulation error threshold, and use the adjusted second electromagnetic field model as a prediction model for the electromagnetic radiation intensity of the integrated isolation chip.

2. The method according to claim 1, characterized in that: The establishing of the first electromagnetic field model of the transformer comprises: acquiring size parameters and material parameters of the transformer, and establishing the first electromagnetic field model of the transformer according to the size parameters and material parameters of the transformer; The second electromagnetic field model of the integrated isolation chip PCB evaluation board is established, including: obtaining the size parameters and material parameters of the peripheral circuit of the integrated isolation chip, and establishing the second electromagnetic field model of the integrated isolation chip PCB evaluation board according to the size parameters and material parameters of the peripheral circuit of the integrated isolation chip.

3. The method according to claim 1, characterized in that: The simulated parasitic electrical parameters include any one or more of the following: simulated parasitic inductance, simulated parasitic resistance, and simulated parasitic capacitance; The measuring of parasitic electrical parameters includes any one or more of the following: measuring parasitic inductance, measuring parasitic resistance, and measuring parasitic capacitance.

4. The method according to claim 1, characterized in that: The measured parasitic electrical parameters are obtained by measuring the transformer using a test circuit board group; wherein the test circuit board group includes: a short circuit test board, an open circuit test board, a load test board and a through test board; The short-circuit test board is used to perform a short-circuit test on the transformer; The open circuit test board is used to perform an open circuit test on the transformer; The load test board is used to perform a load test on the transformer; The through-test board is used to perform a through-test on the transformer.

5. The method according to claim 1, characterized in that The electromagnetic radiation intensity measurement result is obtained by using an electromagnetic interference test platform set up in a dark room; The electromagnetic interference test platform includes: a signal generator, a test cable, a receiving antenna and an electromagnetic interference receiver; the signal generator is connected to the integrated isolation chip PCB evaluation board through the test cable, the electromagnetic interference receiver is connected to the receiving antenna through the test cable, and there is a set distance between the receiving antenna and the integrated isolation chip PCB evaluation board; Wherein, the signal generator transmits the excitation signal, and the integrated isolation chip PCB evaluation board generates electromagnetic radiation under the action of the excitation signal; The electromagnetic interference receiver obtains the radiation value of the integrated isolation chip PCB evaluation board through the receiving antenna, and obtains the electromagnetic radiation intensity measurement result of the integrated isolation chip according to the radiation value of the integrated isolation chip PCB evaluation board, the loss value of the test cable and the array factor of the receiving antenna.

6. The method according to claim 5, characterized in that The obtaining of the electromagnetic radiation intensity measurement result of the integrated isolation chip according to the radiation value of the integrated isolation chip PCB evaluation board, the loss value of the test cable and the array factor of the receiving antenna includes obtaining the electromagnetic radiation intensity measurement result according to the following formula: Emeas=Eread+L+AF; Among them, Emeas is the measurement result of the electromagnetic radiation intensity, Eread is the radiation value of the integrated isolation chip PCB evaluation board, L is the loss value of the test cable, and AF is the array factor of the receiving antenna.

7. The method according to claim 6, characterized in that The electromagnetic interference test platform also includes: a rotating storage table; the rotating storage table is used to place the integrated isolation chip PCB evaluation board.

8. The method according to claim 1, characterized in that The step of inputting the common mode current generated by the parasitic capacitance coupling between the primary coil and the secondary coil of the transformer in the adjusted equivalent circuit model as an excitation signal into the second electromagnetic field model comprises: Extracting the common-mode current curve of the adjusted equivalent circuit model, fitting the common-mode current curve using a fitting function, and obtaining a common-mode current expression; The common mode current expression is input as an excitation signal into the power supply terminal of the second electromagnetic field model to feed the second electromagnetic field model.

9. The method according to claim 8, characterized in that The fitting function is a multi-segment sine function.

10. The method according to claim 1, characterized in that The equivalent circuit model includes: the resistance R of the primary coil ac1 , the resistance R of the secondary coil ac2 , the leakage inductance L of the primary coil l1 , the leakage inductance L of the secondary coil l2 , the equivalent loss resistance R of the magnetic core of the transformer c , the excitation inductance L of the primary coil MAG , the parasitic capacitance C1 of the primary coil, the parasitic capacitance C2 of the secondary coil, the parasitic capacitance C between the primary coil and the secondary coil 12 ; Among them, the leakage inductance L l1 Connect one end of the resistor R ac1 One end of the resistor R ac1 The other end of the resistor R ac2 One end of the secondary coil is connected to one end of the resistor R ac2 The other end of the leakage inductance L l2 One end of the equivalent loss resistor R c With the excitation inductance L MAG The two ends of the primary coil are connected in parallel after being connected in series. The parasitic capacitor C1 is connected in parallel at both ends of the primary coil. 12 One end of the leakage inductance L l1 The other end is connected to the parasitic capacitor C 12 The other end of the leakage inductance L l2 The other end of the secondary coil is connected, and the parasitic capacitor C2 is connected in parallel to both ends of the secondary coil.

11. An electromagnetic radiation intensity prediction system with integrated isolation chip, characterized in that: It includes electromagnetic field simulation software, a test circuit board set and an electromagnetic interference test platform set up in a darkroom; The test circuit board group is configured to measure parasitic electrical parameters of the transformer; The electromagnetic interference test platform is configured to obtain the electromagnetic radiation intensity measurement result of the integrated isolation chip; The electromagnetic field simulation software is configured to establish a first electromagnetic field model of the transformer; converting the first electromagnetic field model into an equivalent circuit model; Acquiring simulated parasitic electrical parameters of the transformer according to the equivalent circuit model; Acquiring the measured parasitic electrical parameters, comparing the measured parasitic electrical parameters with the simulated parasitic electrical parameters to obtain a first comparison result, adjusting the equivalent circuit model based on an adjustment scheme determined according to the first comparison result and a preset simulation error threshold, and obtaining an adjusted equivalent circuit model; Establishing a second electromagnetic field model of the integrated isolation chip PCB evaluation board, inputting the common-mode current generated by the parasitic capacitance coupling between the primary coil and the secondary coil of the transformer in the adjusted equivalent circuit model as an excitation signal into the second electromagnetic field model, and setting a plurality of detection points in the second electromagnetic field model to obtain a simulation result of the electromagnetic radiation intensity of the integrated isolation chip, wherein the common-mode current is determined to be the main radiation source of the integrated isolation chip; Acquire the electromagnetic radiation intensity measurement result, compare the electromagnetic radiation intensity simulation result and the electromagnetic radiation intensity measurement result to obtain a second comparison result, adjust the second electromagnetic field model based on an adjustment scheme determined according to the second comparison result and a preset simulation error threshold, and use the adjusted second electromagnetic field model as the electromagnetic radiation intensity prediction model of the integrated isolation chip.

12. The system according to claim 11, characterized in that The test circuit board group includes: a short circuit test board, an open circuit test board, a load test board and a through test board; The short-circuit test board is used to perform a short-circuit test on the transformer; The open circuit test board is used to perform an open circuit test on the transformer; The load test board is used to perform a load test on the transformer; The through-test board is used to perform a through-test on the transformer.

13. The system according to claim 11, characterized in that The electromagnetic interference test platform includes: a signal generator, a test cable, a receiving antenna, an electromagnetic interference receiver, and a rotating storage table; The integrated isolation chip PCB evaluation board is placed on the rotating storage table, the signal generator is connected to the integrated isolation chip PCB evaluation board through the test cable, the electromagnetic interference receiver is connected to the receiving antenna through the test cable, and there is a set distance between the receiving antenna and the integrated isolation chip PCB evaluation board; Wherein, the signal generator transmits the excitation signal, and the integrated isolation chip PCB evaluation board generates electromagnetic radiation under the action of the excitation signal; The electromagnetic interference receiver obtains the radiation value of the integrated isolation chip PCB evaluation board through the receiving antenna, and obtains the electromagnetic radiation intensity measurement result of the integrated isolation chip according to the radiation value of the integrated isolation chip PCB evaluation board, the loss value of the test cable and the array factor of the receiving antenna.

14. An electronic device, characterized in that: The method comprises a memory and a processor; wherein the memory is used to store computer instructions, wherein the computer instructions are executed by the processor to implement the method according to any one of claims 1 to 10.

15. A computer-readable storage medium having computer instructions stored thereon, characterized in that: When the computer instructions are executed by a processor, the method according to any one of claims 1 to 10 is implemented.

16. A computer program product, characterized in that The method comprises computer instructions, which, when executed by a processor, implement the method according to any one of claims 1 to 10.

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